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/*******************************************************************************

     2

     3

  Intel PRO/1000 Linux driver

     4

  Copyright(c) 1999 - 2013 Intel Corporation.

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  This program is free software; you can redistribute it and/or modify it

     7

  under the terms and conditions of the GNU General Public License,

     8

  version 2, as published by the Free Software Foundation.

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  This program is distributed in the hope it will be useful, but WITHOUT

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  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

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  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

    13

  more details.

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    15

  You should have received a copy of the GNU General Public License along with

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  this program; if not, write to the Free Software Foundation, Inc.,

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  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

    18

    19

  The full GNU General Public License is included in this distribution in

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  the file called "COPYING".

    21

    22

  Contact Information:

    23

  Linux NICS <linux.nics@intel.com>

    24

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    25

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

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    27

*******************************************************************************/

    28

    29

/* 82571EB Gigabit Ethernet Controller

    30

 * 82571EB Gigabit Ethernet Controller (Copper)

    31

 * 82571EB Gigabit Ethernet Controller (Fiber)

    32

 * 82571EB Dual Port Gigabit Mezzanine Adapter

    33

 * 82571EB Quad Port Gigabit Mezzanine Adapter

    34

 * 82571PT Gigabit PT Quad Port Server ExpressModule

    35

 * 82572EI Gigabit Ethernet Controller (Copper)

    36

 * 82572EI Gigabit Ethernet Controller (Fiber)

    37

 * 82572EI Gigabit Ethernet Controller

    38

 * 82573V Gigabit Ethernet Controller (Copper)

    39

 * 82573E Gigabit Ethernet Controller (Copper)

    40

 * 82573L Gigabit Ethernet Controller

    41

 * 82574L Gigabit Network Connection

    42

 * 82583V Gigabit Network Connection

    43

 */

    44

    45

#include "e1000.h"

    46

    47

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);

    48

static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);

    49

static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);

    50

static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);

    51

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

    52

				      u16 words, u16 *data);

    53

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);

    54

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);

    55

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);

    56

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);

    57

static s32 e1000_led_on_82574(struct e1000_hw *hw);

    58

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);

    59

static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);

    60

static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw);

    61

static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);

    62

static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);

    63

static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active);

    64

static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active);

    65

    66

/**

    67

 *  e1000_init_phy_params_82571 - Init PHY func ptrs.

    68

 *  @hw: pointer to the HW structure

    69

 **/

    70

static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)

    71

{

    72

	struct e1000_phy_info *phy = &hw->phy;

    73

	s32 ret_val;

    74

    75

	if (hw->phy.media_type != e1000_media_type_copper) {

    76

		phy->type = e1000_phy_none;

    77

		return 0;

    78

	}

    79

    80

	phy->addr			 = 1;

    81

	phy->autoneg_mask		 = AUTONEG_ADVERTISE_SPEED_DEFAULT;

    82

	phy->reset_delay_us		 = 100;

    83

    84

	phy->ops.power_up		 = e1000_power_up_phy_copper;

    85

	phy->ops.power_down		 = e1000_power_down_phy_copper_82571;

    86

    87

	switch (hw->mac.type) {

    88

	case e1000_82571:

    89

	case e1000_82572:

    90

		phy->type		 = e1000_phy_igp_2;

    91

		break;

    92

	case e1000_82573:

    93

		phy->type		 = e1000_phy_m88;

    94

		break;

    95

	case e1000_82574:

    96

	case e1000_82583:

    97

		phy->type		 = e1000_phy_bm;

    98

		phy->ops.acquire = e1000_get_hw_semaphore_82574;

    99

		phy->ops.release = e1000_put_hw_semaphore_82574;

   100

		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82574;

   101

		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82574;

   102

		break;

   103

	default:

   104

		return -E1000_ERR_PHY;

   105

		break;

   106

	}

   107

   108

	/* This can only be done after all function pointers are setup. */

   109

	ret_val = e1000_get_phy_id_82571(hw);

   110

	if (ret_val) {

   111

		e_dbg("Error getting PHY ID\n");

   112

		return ret_val;

   113

	}

   114

   115

	/* Verify phy id */

   116

	switch (hw->mac.type) {

   117

	case e1000_82571:

   118

	case e1000_82572:

   119

		if (phy->id != IGP01E1000_I_PHY_ID)

   120

			ret_val = -E1000_ERR_PHY;

   121

		break;

   122

	case e1000_82573:

   123

		if (phy->id != M88E1111_I_PHY_ID)

   124

			ret_val = -E1000_ERR_PHY;

   125

		break;

   126

	case e1000_82574:

   127

	case e1000_82583:

   128

		if (phy->id != BME1000_E_PHY_ID_R2)

   129

			ret_val = -E1000_ERR_PHY;

   130

		break;

   131

	default:

   132

		ret_val = -E1000_ERR_PHY;

   133

		break;

   134

	}

   135

   136

	if (ret_val)

   137

		e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);

   138

   139

	return ret_val;

   140

}

   141

   142

/**

   143

 *  e1000_init_nvm_params_82571 - Init NVM func ptrs.

   144

 *  @hw: pointer to the HW structure

   145

 **/

   146

static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)

   147

{

   148

	struct e1000_nvm_info *nvm = &hw->nvm;

   149

	u32 eecd = er32(EECD);

   150

	u16 size;

   151

   152

	nvm->opcode_bits = 8;

   153

	nvm->delay_usec = 1;

   154

	switch (nvm->override) {

   155

	case e1000_nvm_override_spi_large:

   156

		nvm->page_size = 32;

   157

		nvm->address_bits = 16;

   158

		break;

   159

	case e1000_nvm_override_spi_small:

   160

		nvm->page_size = 8;

   161

		nvm->address_bits = 8;

   162

		break;

   163

	default:

   164

		nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;

   165

		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;

   166

		break;

   167

	}

   168

   169

	switch (hw->mac.type) {

   170

	case e1000_82573:

   171

	case e1000_82574:

   172

	case e1000_82583:

   173

		if (((eecd >> 15) & 0x3) == 0x3) {

   174

			nvm->type = e1000_nvm_flash_hw;

   175

			nvm->word_size = 2048;

   176

			/* Autonomous Flash update bit must be cleared due

   177

			 * to Flash update issue.

   178

			 */

   179

			eecd &= ~E1000_EECD_AUPDEN;

   180

			ew32(EECD, eecd);

   181

			break;

   182

		}

   183

		/* Fall Through */

   184

	default:

   185

		nvm->type = e1000_nvm_eeprom_spi;

   186

		size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>

   187

			     E1000_EECD_SIZE_EX_SHIFT);

   188

		/* Added to a constant, "size" becomes the left-shift value

   189

		 * for setting word_size.

   190

		 */

   191

		size += NVM_WORD_SIZE_BASE_SHIFT;

   192

   193

		/* EEPROM access above 16k is unsupported */

   194

		if (size > 14)

   195

			size = 14;

   196

		nvm->word_size	= 1 << size;

   197

		break;

   198

	}

   199

   200

	/* Function Pointers */

   201

	switch (hw->mac.type) {

   202

	case e1000_82574:

   203

	case e1000_82583:

   204

		nvm->ops.acquire = e1000_get_hw_semaphore_82574;

   205

		nvm->ops.release = e1000_put_hw_semaphore_82574;

   206

		break;

   207

	default:

   208

		break;

   209

	}

   210

   211

	return 0;

   212

}

   213

   214

/**

   215

 *  e1000_init_mac_params_82571 - Init MAC func ptrs.

   216

 *  @hw: pointer to the HW structure

   217

 **/

   218

static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)

   219

{

   220

	struct e1000_mac_info *mac = &hw->mac;

   221

	u32 swsm = 0;

   222

	u32 swsm2 = 0;

   223

	bool force_clear_smbi = false;

   224

   225

	/* Set media type and media-dependent function pointers */

   226

	switch (hw->adapter->pdev->device) {

   227

	case E1000_DEV_ID_82571EB_FIBER:

   228

	case E1000_DEV_ID_82572EI_FIBER:

   229

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   230

		hw->phy.media_type = e1000_media_type_fiber;

   231

		mac->ops.setup_physical_interface =

   232

		    e1000_setup_fiber_serdes_link_82571;

   233

		mac->ops.check_for_link = e1000e_check_for_fiber_link;

   234

		mac->ops.get_link_up_info =

   235

		    e1000e_get_speed_and_duplex_fiber_serdes;

   236

		break;

   237

	case E1000_DEV_ID_82571EB_SERDES:

   238

	case E1000_DEV_ID_82571EB_SERDES_DUAL:

   239

	case E1000_DEV_ID_82571EB_SERDES_QUAD:

   240

	case E1000_DEV_ID_82572EI_SERDES:

   241

		hw->phy.media_type = e1000_media_type_internal_serdes;

   242

		mac->ops.setup_physical_interface =

   243

		    e1000_setup_fiber_serdes_link_82571;

   244

		mac->ops.check_for_link = e1000_check_for_serdes_link_82571;

   245

		mac->ops.get_link_up_info =

   246

		    e1000e_get_speed_and_duplex_fiber_serdes;

   247

		break;

   248

	default:

   249

		hw->phy.media_type = e1000_media_type_copper;

   250

		mac->ops.setup_physical_interface =

   251

		    e1000_setup_copper_link_82571;

   252

		mac->ops.check_for_link = e1000e_check_for_copper_link;

   253

		mac->ops.get_link_up_info = e1000e_get_speed_and_duplex_copper;

   254

		break;

   255

	}

   256

   257

	/* Set mta register count */

   258

	mac->mta_reg_count = 128;

   259

	/* Set rar entry count */

   260

	mac->rar_entry_count = E1000_RAR_ENTRIES;

   261

	/* Adaptive IFS supported */

   262

	mac->adaptive_ifs = true;

   263

   264

	/* MAC-specific function pointers */

   265

	switch (hw->mac.type) {

   266

	case e1000_82573:

   267

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   268

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   269

		mac->ops.led_on = e1000e_led_on_generic;

   270

		mac->ops.blink_led = e1000e_blink_led_generic;

   271

   272

		/* FWSM register */

   273

		mac->has_fwsm = true;

   274

		/* ARC supported; valid only if manageability features are

   275

		 * enabled.

   276

		 */

   277

		mac->arc_subsystem_valid = !!(er32(FWSM) &

   278

					      E1000_FWSM_MODE_MASK);

   279

		break;

   280

	case e1000_82574:

   281

	case e1000_82583:

   282

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   283

		mac->ops.check_mng_mode = e1000_check_mng_mode_82574;

   284

		mac->ops.led_on = e1000_led_on_82574;

   285

		break;

   286

	default:

   287

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   288

		mac->ops.led_on = e1000e_led_on_generic;

   289

		mac->ops.blink_led = e1000e_blink_led_generic;

   290

   291

		/* FWSM register */

   292

		mac->has_fwsm = true;

   293

		break;

   294

	}

   295

   296

	/* Ensure that the inter-port SWSM.SMBI lock bit is clear before

   297

	 * first NVM or PHY access. This should be done for single-port

   298

	 * devices, and for one port only on dual-port devices so that

   299

	 * for those devices we can still use the SMBI lock to synchronize

   300

	 * inter-port accesses to the PHY & NVM.

   301

	 */

   302

	switch (hw->mac.type) {

   303

	case e1000_82571:

   304

	case e1000_82572:

   305

		swsm2 = er32(SWSM2);

   306

   307

		if (!(swsm2 & E1000_SWSM2_LOCK)) {

   308

			/* Only do this for the first interface on this card */

   309

			ew32(SWSM2, swsm2 | E1000_SWSM2_LOCK);

   310

			force_clear_smbi = true;

   311

		} else {

   312

			force_clear_smbi = false;

   313

		}

   314

		break;

   315

	default:

   316

		force_clear_smbi = true;

   317

		break;

   318

	}

   319

   320

	if (force_clear_smbi) {

   321

		/* Make sure SWSM.SMBI is clear */

   322

		swsm = er32(SWSM);

   323

		if (swsm & E1000_SWSM_SMBI) {

   324

			/* This bit should not be set on a first interface, and

   325

			 * indicates that the bootagent or EFI code has

   326

			 * improperly left this bit enabled

   327

			 */

   328

			e_dbg("Please update your 82571 Bootagent\n");

   329

		}

   330

		ew32(SWSM, swsm & ~E1000_SWSM_SMBI);

   331

	}

   332

   333

	/* Initialize device specific counter of SMBI acquisition timeouts. */

   334

	hw->dev_spec.e82571.smb_counter = 0;

   335

   336

	return 0;

   337

}

   338

   339

static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)

   340

{

   341

	struct e1000_hw *hw = &adapter->hw;

   342

	static int global_quad_port_a; /* global port a indication */

   343

	struct pci_dev *pdev = adapter->pdev;

   344

	int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;

   345

	s32 rc;

   346

   347

	rc = e1000_init_mac_params_82571(hw);

   348

	if (rc)

   349

		return rc;

   350

   351

	rc = e1000_init_nvm_params_82571(hw);

   352

	if (rc)

   353

		return rc;

   354

   355

	rc = e1000_init_phy_params_82571(hw);

   356

	if (rc)

   357

		return rc;

   358

   359

	/* tag quad port adapters first, it's used below */

   360

	switch (pdev->device) {

   361

	case E1000_DEV_ID_82571EB_QUAD_COPPER:

   362

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   363

	case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:

   364

	case E1000_DEV_ID_82571PT_QUAD_COPPER:

   365

		adapter->flags |= FLAG_IS_QUAD_PORT;

   366

		/* mark the first port */

   367

		if (global_quad_port_a == 0)

   368

			adapter->flags |= FLAG_IS_QUAD_PORT_A;

   369

		/* Reset for multiple quad port adapters */

   370

		global_quad_port_a++;

   371

		if (global_quad_port_a == 4)

   372

			global_quad_port_a = 0;

   373

		break;

   374

	default:

   375

		break;

   376

	}

   377

   378

	switch (adapter->hw.mac.type) {

   379

	case e1000_82571:

   380

		/* these dual ports don't have WoL on port B at all */

   381

		if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||

   382

		     (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||

   383

		     (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&

   384

		    (is_port_b))

   385

			adapter->flags &= ~FLAG_HAS_WOL;

   386

		/* quad ports only support WoL on port A */

   387

		if (adapter->flags & FLAG_IS_QUAD_PORT &&

   388

		    (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))

   389

			adapter->flags &= ~FLAG_HAS_WOL;

   390

		/* Does not support WoL on any port */

   391

		if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)

   392

			adapter->flags &= ~FLAG_HAS_WOL;

   393

		break;

   394

	case e1000_82573:

   395

		if (pdev->device == E1000_DEV_ID_82573L) {

   396

			adapter->flags |= FLAG_HAS_JUMBO_FRAMES;

   397

			adapter->max_hw_frame_size = DEFAULT_JUMBO;

   398

		}

   399

		break;

   400

	default:

   401

		break;

   402

	}

   403

   404

	return 0;

   405

}

   406

   407

/**

   408

 *  e1000_get_phy_id_82571 - Retrieve the PHY ID and revision

   409

 *  @hw: pointer to the HW structure

   410

 *

   411

 *  Reads the PHY registers and stores the PHY ID and possibly the PHY

   412

 *  revision in the hardware structure.

   413

 **/

   414

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)

   415

{

   416

	struct e1000_phy_info *phy = &hw->phy;

   417

	s32 ret_val;

   418

	u16 phy_id = 0;

   419

   420

	switch (hw->mac.type) {

   421

	case e1000_82571:

   422

	case e1000_82572:

   423

		/* The 82571 firmware may still be configuring the PHY.

   424

		 * In this case, we cannot access the PHY until the

   425

		 * configuration is done.  So we explicitly set the

   426

		 * PHY ID.

   427

		 */

   428

		phy->id = IGP01E1000_I_PHY_ID;

   429

		break;

   430

	case e1000_82573:

   431

		return e1000e_get_phy_id(hw);

   432

		break;

   433

	case e1000_82574:

   434

	case e1000_82583:

   435

		ret_val = e1e_rphy(hw, MII_PHYSID1, &phy_id);

   436

		if (ret_val)

   437

			return ret_val;

   438

   439

		phy->id = (u32)(phy_id << 16);

   440

		usleep_range(20, 40);

   441

		ret_val = e1e_rphy(hw, MII_PHYSID2, &phy_id);

   442

		if (ret_val)

   443

			return ret_val;

   444

   445

		phy->id |= (u32)(phy_id);

   446

		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

   447

		break;

   448

	default:

   449

		return -E1000_ERR_PHY;

   450

		break;

   451

	}

   452

   453

	return 0;

   454

}

   455

   456

/**

   457

 *  e1000_get_hw_semaphore_82571 - Acquire hardware semaphore

   458

 *  @hw: pointer to the HW structure

   459

 *

   460

 *  Acquire the HW semaphore to access the PHY or NVM

   461

 **/

   462

static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw)

   463

{

   464

	u32 swsm;

   465

	s32 sw_timeout = hw->nvm.word_size + 1;

   466

	s32 fw_timeout = hw->nvm.word_size + 1;

   467

	s32 i = 0;

   468

   469

	/* If we have timedout 3 times on trying to acquire

   470

	 * the inter-port SMBI semaphore, there is old code

   471

	 * operating on the other port, and it is not

   472

	 * releasing SMBI. Modify the number of times that

   473

	 * we try for the semaphore to interwork with this

   474

	 * older code.

   475

	 */

   476

	if (hw->dev_spec.e82571.smb_counter > 2)

   477

		sw_timeout = 1;

   478

   479

	/* Get the SW semaphore */

   480

	while (i < sw_timeout) {

   481

		swsm = er32(SWSM);

   482

		if (!(swsm & E1000_SWSM_SMBI))

   483

			break;

   484

   485

		usleep_range(50, 100);

   486

		i++;

   487

	}

   488

   489

	if (i == sw_timeout) {

   490

		e_dbg("Driver can't access device - SMBI bit is set.\n");

   491

		hw->dev_spec.e82571.smb_counter++;

   492

	}

   493

	/* Get the FW semaphore. */

   494

	for (i = 0; i < fw_timeout; i++) {

   495

		swsm = er32(SWSM);

   496

		ew32(SWSM, swsm | E1000_SWSM_SWESMBI);

   497

   498

		/* Semaphore acquired if bit latched */

   499

		if (er32(SWSM) & E1000_SWSM_SWESMBI)

   500

			break;

   501

   502

		usleep_range(50, 100);

   503

	}

   504

   505

	if (i == fw_timeout) {

   506

		/* Release semaphores */

   507

		e1000_put_hw_semaphore_82571(hw);

   508

		e_dbg("Driver can't access the NVM\n");

   509

		return -E1000_ERR_NVM;

   510

	}

   511

   512

	return 0;

   513

}

   514

   515

/**

   516

 *  e1000_put_hw_semaphore_82571 - Release hardware semaphore

   517

 *  @hw: pointer to the HW structure

   518

 *

   519

 *  Release hardware semaphore used to access the PHY or NVM

   520

 **/

   521

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw)

   522

{

   523

	u32 swsm;

   524

   525

	swsm = er32(SWSM);

   526

	swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);

   527

	ew32(SWSM, swsm);

   528

}

   529