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/* Intel(R) Gigabit Ethernet Linux driver

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 * Copyright(c) 2007-2014 Intel Corporation.

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 *

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 * This program is free software; you can redistribute it and/or modify it

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 * under the terms and conditions of the GNU General Public License,

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 * version 2, as published by the Free Software Foundation.

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 *

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 * This program is distributed in the hope it will be useful, but WITHOUT

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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

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 * more details.

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 *

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 * You should have received a copy of the GNU General Public License along with

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 * this program; if not, see <http://www.gnu.org/licenses/>.

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 *

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 * The full GNU General Public License is included in this distribution in

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 * the file called "COPYING".

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 *

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 * Contact Information:

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 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

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 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

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 */

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#ifndef _E1000_I210_H_

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#define _E1000_I210_H_

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s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);

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void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);

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s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data);

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s32 igb_read_invm_version(struct e1000_hw *hw,

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			  struct e1000_fw_version *invm_ver);

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s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data);

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s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data);

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s32 igb_init_nvm_params_i210(struct e1000_hw *hw);

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bool igb_get_flash_presence_i210(struct e1000_hw *hw);

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s32 igb_pll_workaround_i210(struct e1000_hw *hw);

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#define E1000_STM_OPCODE		0xDB00

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#define E1000_EEPROM_FLASH_SIZE_WORD	0x11

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#define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \

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	(u8)((invm_dword) & 0x7)

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#define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \

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	(u8)(((invm_dword) & 0x0000FE00) >> 9)

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#define INVM_DWORD_TO_WORD_DATA(invm_dword) \

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	(u16)(((invm_dword) & 0xFFFF0000) >> 16)

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enum E1000_INVM_STRUCTURE_TYPE {

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	E1000_INVM_UNINITIALIZED_STRUCTURE		= 0x00,

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	E1000_INVM_WORD_AUTOLOAD_STRUCTURE		= 0x01,

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	E1000_INVM_CSR_AUTOLOAD_STRUCTURE		= 0x02,

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	E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE	= 0x03,

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	E1000_INVM_RSA_KEY_SHA256_STRUCTURE		= 0x04,

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	E1000_INVM_INVALIDATED_STRUCTURE		= 0x0F,

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};

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#define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS	8

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#define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS	1

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#define E1000_INVM_ULT_BYTES_SIZE			8

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#define E1000_INVM_RECORD_SIZE_IN_BYTES			4

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#define E1000_INVM_VER_FIELD_ONE			0x1FF8

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#define E1000_INVM_VER_FIELD_TWO			0x7FE000

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#define E1000_INVM_IMGTYPE_FIELD			0x1F800000

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#define E1000_INVM_MAJOR_MASK		0x3F0

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#define E1000_INVM_MINOR_MASK		0xF

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#define E1000_INVM_MAJOR_SHIFT		4

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#define ID_LED_DEFAULT_I210		((ID_LED_OFF1_ON2  << 8) | \

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					 (ID_LED_DEF1_DEF2 <<  4) | \

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					 (ID_LED_OFF1_OFF2))

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#define ID_LED_DEFAULT_I210_SERDES	((ID_LED_DEF1_DEF2 << 8) | \

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					 (ID_LED_DEF1_DEF2 <<  4) | \

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					 (ID_LED_OFF1_ON2))

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/* NVM offset defaults for i211 device */

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#define NVM_INIT_CTRL_2_DEFAULT_I211	0X7243

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#define NVM_INIT_CTRL_4_DEFAULT_I211	0x00C1

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#define NVM_LED_1_CFG_DEFAULT_I211	0x0184

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#define NVM_LED_0_2_CFG_DEFAULT_I211	0x200C

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/* PLL Defines */

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#define E1000_PCI_PMCSR			0x44

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#define E1000_PCI_PMCSR_D3		0x03

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#define E1000_MAX_PLL_TRIES		5

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#define E1000_PHY_PLL_UNCONF		0xFF

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#define E1000_PHY_PLL_FREQ_PAGE		0xFC0000

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#define E1000_PHY_PLL_FREQ_REG		0x000E

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#define E1000_INVM_DEFAULT_AL		0x202F

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#define E1000_INVM_AUTOLOAD		0x0A

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#define E1000_INVM_PLL_WO_VAL		0x0010

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#endif