1

/* Intel PRO/1000 Linux driver

     2

 * Copyright(c) 1999 - 2014 Intel Corporation.

     3

 *

     4

 * This program is free software; you can redistribute it and/or modify it

     5

 * under the terms and conditions of the GNU General Public License,

     6

 * version 2, as published by the Free Software Foundation.

     7

 *

     8

 * This program is distributed in the hope it will be useful, but WITHOUT

     9

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    10

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

    11

 * more details.

    12

 *

    13

 * The full GNU General Public License is included in this distribution in

    14

 * the file called "COPYING".

    15

 *

    16

 * Contact Information:

    17

 * Linux NICS <linux.nics@intel.com>

    18

 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    19

 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

    20

 */

    21

    22

/* 82571EB Gigabit Ethernet Controller

    23

 * 82571EB Gigabit Ethernet Controller (Copper)

    24

 * 82571EB Gigabit Ethernet Controller (Fiber)

    25

 * 82571EB Dual Port Gigabit Mezzanine Adapter

    26

 * 82571EB Quad Port Gigabit Mezzanine Adapter

    27

 * 82571PT Gigabit PT Quad Port Server ExpressModule

    28

 * 82572EI Gigabit Ethernet Controller (Copper)

    29

 * 82572EI Gigabit Ethernet Controller (Fiber)

    30

 * 82572EI Gigabit Ethernet Controller

    31

 * 82573V Gigabit Ethernet Controller (Copper)

    32

 * 82573E Gigabit Ethernet Controller (Copper)

    33

 * 82573L Gigabit Ethernet Controller

    34

 * 82574L Gigabit Network Connection

    35

 * 82583V Gigabit Network Connection

    36

 */

    37

    38

#include "e1000.h"

    39

    40

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);

    41

static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);

    42

static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);

    43

static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);

    44

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

    45

				      u16 words, u16 *data);

    46

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);

    47

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);

    48

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);

    49

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);

    50

static s32 e1000_led_on_82574(struct e1000_hw *hw);

    51

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);

    52

static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);

    53

static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw);

    54

static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);

    55

static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);

    56

static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active);

    57

static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active);

    58

    59

/**

    60

 *  e1000_init_phy_params_82571 - Init PHY func ptrs.

    61

 *  @hw: pointer to the HW structure

    62

 **/

    63

static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)

    64

{

    65

	struct e1000_phy_info *phy = &hw->phy;

    66

	s32 ret_val;

    67

    68

	if (hw->phy.media_type != e1000_media_type_copper) {

    69

		phy->type = e1000_phy_none;

    70

		return 0;

    71

	}

    72

    73

	phy->addr = 1;

    74

	phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;

    75

	phy->reset_delay_us = 100;

    76

    77

	phy->ops.power_up = e1000_power_up_phy_copper;

    78

	phy->ops.power_down = e1000_power_down_phy_copper_82571;

    79

    80

	switch (hw->mac.type) {

    81

	case e1000_82571:

    82

	case e1000_82572:

    83

		phy->type = e1000_phy_igp_2;

    84

		break;

    85

	case e1000_82573:

    86

		phy->type = e1000_phy_m88;

    87

		break;

    88

	case e1000_82574:

    89

	case e1000_82583:

    90

		phy->type = e1000_phy_bm;

    91

		phy->ops.acquire = e1000_get_hw_semaphore_82574;

    92

		phy->ops.release = e1000_put_hw_semaphore_82574;

    93

		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82574;

    94

		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82574;

    95

		break;

    96

	default:

    97

		return -E1000_ERR_PHY;

    98

		break;

    99

	}

   100

   101

	/* This can only be done after all function pointers are setup. */

   102

	ret_val = e1000_get_phy_id_82571(hw);

   103

	if (ret_val) {

   104

		e_dbg("Error getting PHY ID\n");

   105

		return ret_val;

   106

	}

   107

   108

	/* Verify phy id */

   109

	switch (hw->mac.type) {

   110

	case e1000_82571:

   111

	case e1000_82572:

   112

		if (phy->id != IGP01E1000_I_PHY_ID)

   113

			ret_val = -E1000_ERR_PHY;

   114

		break;

   115

	case e1000_82573:

   116

		if (phy->id != M88E1111_I_PHY_ID)

   117

			ret_val = -E1000_ERR_PHY;

   118

		break;

   119

	case e1000_82574:

   120

	case e1000_82583:

   121

		if (phy->id != BME1000_E_PHY_ID_R2)

   122

			ret_val = -E1000_ERR_PHY;

   123

		break;

   124

	default:

   125

		ret_val = -E1000_ERR_PHY;

   126

		break;

   127

	}

   128

   129

	if (ret_val)

   130

		e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);

   131

   132

	return ret_val;

   133

}

   134

   135

/**

   136

 *  e1000_init_nvm_params_82571 - Init NVM func ptrs.

   137

 *  @hw: pointer to the HW structure

   138

 **/

   139

static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)

   140

{

   141

	struct e1000_nvm_info *nvm = &hw->nvm;

   142

	u32 eecd = er32(EECD);

   143

	u16 size;

   144

   145

	nvm->opcode_bits = 8;

   146

	nvm->delay_usec = 1;

   147

	switch (nvm->override) {

   148

	case e1000_nvm_override_spi_large:

   149

		nvm->page_size = 32;

   150

		nvm->address_bits = 16;

   151

		break;

   152

	case e1000_nvm_override_spi_small:

   153

		nvm->page_size = 8;

   154

		nvm->address_bits = 8;

   155

		break;

   156

	default:

   157

		nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;

   158

		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;

   159

		break;

   160

	}

   161

   162

	switch (hw->mac.type) {

   163

	case e1000_82573:

   164

	case e1000_82574:

   165

	case e1000_82583:

   166

		if (((eecd >> 15) & 0x3) == 0x3) {

   167

			nvm->type = e1000_nvm_flash_hw;

   168

			nvm->word_size = 2048;

   169

			/* Autonomous Flash update bit must be cleared due

   170

			 * to Flash update issue.

   171

			 */

   172

			eecd &= ~E1000_EECD_AUPDEN;

   173

			ew32(EECD, eecd);

   174

			break;

   175

		}

   176

		/* Fall Through */

   177

	default:

   178

		nvm->type = e1000_nvm_eeprom_spi;

   179

		size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>

   180

			     E1000_EECD_SIZE_EX_SHIFT);

   181

		/* Added to a constant, "size" becomes the left-shift value

   182

		 * for setting word_size.

   183

		 */

   184

		size += NVM_WORD_SIZE_BASE_SHIFT;

   185

   186

		/* EEPROM access above 16k is unsupported */

   187

		if (size > 14)

   188

			size = 14;

   189

		nvm->word_size = 1 << size;

   190

		break;

   191

	}

   192

   193

	/* Function Pointers */

   194

	switch (hw->mac.type) {

   195

	case e1000_82574:

   196

	case e1000_82583:

   197

		nvm->ops.acquire = e1000_get_hw_semaphore_82574;

   198

		nvm->ops.release = e1000_put_hw_semaphore_82574;

   199

		break;

   200

	default:

   201

		break;

   202

	}

   203

   204

	return 0;

   205

}

   206

   207

/**

   208

 *  e1000_init_mac_params_82571 - Init MAC func ptrs.

   209

 *  @hw: pointer to the HW structure

   210

 **/

   211

static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)

   212

{

   213

	struct e1000_mac_info *mac = &hw->mac;

   214

	u32 swsm = 0;

   215

	u32 swsm2 = 0;

   216

	bool force_clear_smbi = false;

   217

   218

	/* Set media type and media-dependent function pointers */

   219

	switch (hw->adapter->pdev->device) {

   220

	case E1000_DEV_ID_82571EB_FIBER:

   221

	case E1000_DEV_ID_82572EI_FIBER:

   222

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   223

		hw->phy.media_type = e1000_media_type_fiber;

   224

		mac->ops.setup_physical_interface =

   225

		    e1000_setup_fiber_serdes_link_82571;

   226

		mac->ops.check_for_link = e1000e_check_for_fiber_link;

   227

		mac->ops.get_link_up_info =

   228

		    e1000e_get_speed_and_duplex_fiber_serdes;

   229

		break;

   230

	case E1000_DEV_ID_82571EB_SERDES:

   231

	case E1000_DEV_ID_82571EB_SERDES_DUAL:

   232

	case E1000_DEV_ID_82571EB_SERDES_QUAD:

   233

	case E1000_DEV_ID_82572EI_SERDES:

   234

		hw->phy.media_type = e1000_media_type_internal_serdes;

   235

		mac->ops.setup_physical_interface =

   236

		    e1000_setup_fiber_serdes_link_82571;

   237

		mac->ops.check_for_link = e1000_check_for_serdes_link_82571;

   238

		mac->ops.get_link_up_info =

   239

		    e1000e_get_speed_and_duplex_fiber_serdes;

   240

		break;

   241

	default:

   242

		hw->phy.media_type = e1000_media_type_copper;

   243

		mac->ops.setup_physical_interface =

   244

		    e1000_setup_copper_link_82571;

   245

		mac->ops.check_for_link = e1000e_check_for_copper_link;

   246

		mac->ops.get_link_up_info = e1000e_get_speed_and_duplex_copper;

   247

		break;

   248

	}

   249

   250

	/* Set mta register count */

   251

	mac->mta_reg_count = 128;

   252

	/* Set rar entry count */

   253

	mac->rar_entry_count = E1000_RAR_ENTRIES;

   254

	/* Adaptive IFS supported */

   255

	mac->adaptive_ifs = true;

   256

   257

	/* MAC-specific function pointers */

   258

	switch (hw->mac.type) {

   259

	case e1000_82573:

   260

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   261

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   262

		mac->ops.led_on = e1000e_led_on_generic;

   263

		mac->ops.blink_led = e1000e_blink_led_generic;

   264

   265

		/* FWSM register */

   266

		mac->has_fwsm = true;

   267

		/* ARC supported; valid only if manageability features are

   268

		 * enabled.

   269

		 */

   270

		mac->arc_subsystem_valid = !!(er32(FWSM) &

   271

					      E1000_FWSM_MODE_MASK);

   272

		break;

   273

	case e1000_82574:

   274

	case e1000_82583:

   275

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   276

		mac->ops.check_mng_mode = e1000_check_mng_mode_82574;

   277

		mac->ops.led_on = e1000_led_on_82574;

   278

		break;

   279

	default:

   280

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   281

		mac->ops.led_on = e1000e_led_on_generic;

   282

		mac->ops.blink_led = e1000e_blink_led_generic;

   283

   284

		/* FWSM register */

   285

		mac->has_fwsm = true;

   286

		break;

   287

	}

   288

   289

	/* Ensure that the inter-port SWSM.SMBI lock bit is clear before

   290

	 * first NVM or PHY access. This should be done for single-port

   291

	 * devices, and for one port only on dual-port devices so that

   292

	 * for those devices we can still use the SMBI lock to synchronize

   293

	 * inter-port accesses to the PHY & NVM.

   294

	 */

   295

	switch (hw->mac.type) {

   296

	case e1000_82571:

   297

	case e1000_82572:

   298

		swsm2 = er32(SWSM2);

   299

   300

		if (!(swsm2 & E1000_SWSM2_LOCK)) {

   301

			/* Only do this for the first interface on this card */

   302

			ew32(SWSM2, swsm2 | E1000_SWSM2_LOCK);

   303

			force_clear_smbi = true;

   304

		} else {

   305

			force_clear_smbi = false;

   306

		}

   307

		break;

   308

	default:

   309

		force_clear_smbi = true;

   310

		break;

   311

	}

   312

   313

	if (force_clear_smbi) {

   314

		/* Make sure SWSM.SMBI is clear */

   315

		swsm = er32(SWSM);

   316

		if (swsm & E1000_SWSM_SMBI) {

   317

			/* This bit should not be set on a first interface, and

   318

			 * indicates that the bootagent or EFI code has

   319

			 * improperly left this bit enabled

   320

			 */

   321

			e_dbg("Please update your 82571 Bootagent\n");

   322

		}

   323

		ew32(SWSM, swsm & ~E1000_SWSM_SMBI);

   324

	}

   325

   326

	/* Initialize device specific counter of SMBI acquisition timeouts. */

   327

	hw->dev_spec.e82571.smb_counter = 0;

   328

   329

	return 0;

   330

}

   331

   332

static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)

   333

{

   334

	struct e1000_hw *hw = &adapter->hw;

   335

	static int global_quad_port_a;	/* global port a indication */

   336

	struct pci_dev *pdev = adapter->pdev;

   337

	int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;

   338

	s32 rc;

   339

   340

	rc = e1000_init_mac_params_82571(hw);

   341

	if (rc)

   342

		return rc;

   343

   344

	rc = e1000_init_nvm_params_82571(hw);

   345

	if (rc)

   346

		return rc;

   347

   348

	rc = e1000_init_phy_params_82571(hw);

   349

	if (rc)

   350

		return rc;

   351

   352

	/* tag quad port adapters first, it's used below */

   353

	switch (pdev->device) {

   354

	case E1000_DEV_ID_82571EB_QUAD_COPPER:

   355

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   356

	case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:

   357

	case E1000_DEV_ID_82571PT_QUAD_COPPER:

   358

		adapter->flags |= FLAG_IS_QUAD_PORT;

   359

		/* mark the first port */

   360

		if (global_quad_port_a == 0)

   361

			adapter->flags |= FLAG_IS_QUAD_PORT_A;

   362

		/* Reset for multiple quad port adapters */

   363

		global_quad_port_a++;

   364

		if (global_quad_port_a == 4)

   365

			global_quad_port_a = 0;

   366

		break;

   367

	default:

   368

		break;

   369

	}

   370

   371

	switch (adapter->hw.mac.type) {

   372

	case e1000_82571:

   373

		/* these dual ports don't have WoL on port B at all */

   374

		if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||

   375

		     (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||

   376

		     (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&

   377

		    (is_port_b))

   378

			adapter->flags &= ~FLAG_HAS_WOL;

   379

		/* quad ports only support WoL on port A */

   380

		if (adapter->flags & FLAG_IS_QUAD_PORT &&

   381

		    (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))

   382

			adapter->flags &= ~FLAG_HAS_WOL;

   383

		/* Does not support WoL on any port */

   384

		if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)

   385

			adapter->flags &= ~FLAG_HAS_WOL;

   386

		break;

   387

	case e1000_82573:

   388

		if (pdev->device == E1000_DEV_ID_82573L) {

   389

			adapter->flags |= FLAG_HAS_JUMBO_FRAMES;

   390

			adapter->max_hw_frame_size = DEFAULT_JUMBO;

   391

		}

   392

		break;

   393

	default:

   394

		break;

   395

	}

   396

   397

	return 0;

   398

}

   399

   400

/**

   401

 *  e1000_get_phy_id_82571 - Retrieve the PHY ID and revision

   402

 *  @hw: pointer to the HW structure

   403

 *

   404

 *  Reads the PHY registers and stores the PHY ID and possibly the PHY

   405

 *  revision in the hardware structure.

   406

 **/

   407

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)

   408

{

   409

	struct e1000_phy_info *phy = &hw->phy;

   410

	s32 ret_val;

   411

	u16 phy_id = 0;

   412

   413

	switch (hw->mac.type) {

   414

	case e1000_82571:

   415

	case e1000_82572:

   416

		/* The 82571 firmware may still be configuring the PHY.

   417

		 * In this case, we cannot access the PHY until the

   418

		 * configuration is done.  So we explicitly set the

   419

		 * PHY ID.

   420

		 */

   421

		phy->id = IGP01E1000_I_PHY_ID;

   422

		break;

   423

	case e1000_82573:

   424

		return e1000e_get_phy_id(hw);

   425

		break;

   426

	case e1000_82574:

   427

	case e1000_82583:

   428

		ret_val = e1e_rphy(hw, MII_PHYSID1, &phy_id);

   429

		if (ret_val)

   430

			return ret_val;

   431

   432

		phy->id = (u32)(phy_id << 16);

   433

		usleep_range(20, 40);

   434

		ret_val = e1e_rphy(hw, MII_PHYSID2, &phy_id);

   435

		if (ret_val)

   436

			return ret_val;

   437

   438

		phy->id |= (u32)(phy_id);

   439

		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

   440

		break;

   441

	default:

   442

		return -E1000_ERR_PHY;

   443

		break;

   444

	}

   445

   446

	return 0;

   447

}

   448

   449

/**

   450

 *  e1000_get_hw_semaphore_82571 - Acquire hardware semaphore

   451

 *  @hw: pointer to the HW structure

   452

 *

   453

 *  Acquire the HW semaphore to access the PHY or NVM

   454

 **/

   455

static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw)

   456

{

   457

	u32 swsm;

   458

	s32 sw_timeout = hw->nvm.word_size + 1;

   459

	s32 fw_timeout = hw->nvm.word_size + 1;

   460

	s32 i = 0;

   461

   462

	/* If we have timedout 3 times on trying to acquire

   463

	 * the inter-port SMBI semaphore, there is old code

   464

	 * operating on the other port, and it is not

   465

	 * releasing SMBI. Modify the number of times that

   466

	 * we try for the semaphore to interwork with this

   467

	 * older code.

   468

	 */

   469

	if (hw->dev_spec.e82571.smb_counter > 2)

   470

		sw_timeout = 1;

   471

   472

	/* Get the SW semaphore */

   473

	while (i < sw_timeout) {

   474

		swsm = er32(SWSM);

   475

		if (!(swsm & E1000_SWSM_SMBI))

   476

			break;

   477

   478

		usleep_range(50, 100);

   479

		i++;

   480

	}

   481

   482

	if (i == sw_timeout) {

   483

		e_dbg("Driver can't access device - SMBI bit is set.\n");

   484

		hw->dev_spec.e82571.smb_counter++;

   485

	}

   486

	/* Get the FW semaphore. */

   487

	for (i = 0; i < fw_timeout; i++) {

   488

		swsm = er32(SWSM);

   489

		ew32(SWSM, swsm | E1000_SWSM_SWESMBI);

   490

   491

		/* Semaphore acquired if bit latched */

   492

		if (er32(SWSM) & E1000_SWSM_SWESMBI)

   493

			break;

   494

   495

		usleep_range(50, 100);

   496

	}

   497

   498

	if (i == fw_timeout) {

   499

		/* Release semaphores */

   500

		e1000_put_hw_semaphore_82571(hw);

   501

		e_dbg("Driver can't access the NVM\n");

   502

		return -E1000_ERR_NVM;

   503

	}

   504

   505

	return 0;

   506

}

   507

   508

/**

   509

 *  e1000_put_hw_semaphore_82571 - Release hardware semaphore

   510

 *  @hw: pointer to the HW structure

   511

 *

   512

 *  Release hardware semaphore used to access the PHY or NVM

   513

 **/

   514

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw)

   515

{

   516

	u32 swsm;

   517

   518

	swsm = er32(SWSM);

   519

	swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);

   520

	ew32(SWSM, swsm);

   521

}

   522

   523

/**

   524

 *  e1000_get_hw_semaphore_82573 - Acquire hardware semaphore

   525

 *  @hw: pointer to the HW structure

   526

 *

   527

 *  Acquire the HW semaphore during reset.

   528

 *

   529

 **/

   530