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/*******************************************************************************

     2

     3

     4

  Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.

     5

     6

  This program is free software; you can redistribute it and/or modify it 

     7

  under the terms of the GNU General Public License as published by the Free 

     8

  Software Foundation; either version 2 of the License, or (at your option) 

     9

  any later version.

    10

    11

  This program is distributed in the hope that it will be useful, but WITHOUT 

    12

  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 

    13

  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 

    14

  more details.

    15

    16

  You should have received a copy of the GNU General Public License along with

    17

  this program; if not, write to the Free Software Foundation, Inc., 59 

    18

  Temple Place - Suite 330, Boston, MA  02111-1307, USA.

    19

    20

  The full GNU General Public License is included in this distribution in the

    21

  file called LICENSE.

    22

    23

  Contact Information:

    24

  Linux NICS <linux.nics@intel.com>

    25

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    26

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

    27

    28

*******************************************************************************/

    29

    30

/* e1000_hw.c

    31

 * Shared functions for accessing and configuring the MAC

    32

 */

    33

    34

#include "e1000_hw.h"

    35

    36

static int32_t e1000_set_phy_type(struct e1000_hw *hw);

    37

static void e1000_phy_init_script(struct e1000_hw *hw);

    38

static int32_t e1000_setup_copper_link(struct e1000_hw *hw);

    39

static int32_t e1000_setup_fiber_serdes_link(struct e1000_hw *hw);

    40

static int32_t e1000_adjust_serdes_amplitude(struct e1000_hw *hw);

    41

static int32_t e1000_phy_force_speed_duplex(struct e1000_hw *hw);

    42

static int32_t e1000_config_mac_to_phy(struct e1000_hw *hw);

    43

static void e1000_raise_mdi_clk(struct e1000_hw *hw, uint32_t *ctrl);

    44

static void e1000_lower_mdi_clk(struct e1000_hw *hw, uint32_t *ctrl);

    45

static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, uint32_t data,

    46

                                     uint16_t count);

    47

static uint16_t e1000_shift_in_mdi_bits(struct e1000_hw *hw);

    48

static int32_t e1000_phy_reset_dsp(struct e1000_hw *hw);

    49

static int32_t e1000_write_eeprom_spi(struct e1000_hw *hw, uint16_t offset,

    50

                                      uint16_t words, uint16_t *data);

    51

static int32_t e1000_write_eeprom_microwire(struct e1000_hw *hw,

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                                            uint16_t offset, uint16_t words,

    53

                                            uint16_t *data);

    54

static int32_t e1000_spi_eeprom_ready(struct e1000_hw *hw);

    55

static void e1000_raise_ee_clk(struct e1000_hw *hw, uint32_t *eecd);

    56

static void e1000_lower_ee_clk(struct e1000_hw *hw, uint32_t *eecd);

    57

static void e1000_shift_out_ee_bits(struct e1000_hw *hw, uint16_t data,

    58

                                    uint16_t count);

    59

static int32_t e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr,

    60

                                      uint16_t phy_data);

    61

static int32_t e1000_read_phy_reg_ex(struct e1000_hw *hw,uint32_t reg_addr,

    62

                                     uint16_t *phy_data);

    63

static uint16_t e1000_shift_in_ee_bits(struct e1000_hw *hw, uint16_t count);

    64

static int32_t e1000_acquire_eeprom(struct e1000_hw *hw);

    65

static void e1000_release_eeprom(struct e1000_hw *hw);

    66

static void e1000_standby_eeprom(struct e1000_hw *hw);

    67

static int32_t e1000_set_vco_speed(struct e1000_hw *hw);

    68

static int32_t e1000_polarity_reversal_workaround(struct e1000_hw *hw);

    69

static int32_t e1000_set_phy_mode(struct e1000_hw *hw);

    70

static int32_t e1000_host_if_read_cookie(struct e1000_hw *hw, uint8_t *buffer);

    71

static uint8_t e1000_calculate_mng_checksum(char *buffer, uint32_t length);

    72

static uint8_t e1000_arc_subsystem_valid(struct e1000_hw *hw);

    73

static int32_t e1000_check_downshift(struct e1000_hw *hw);

    74

static int32_t e1000_check_polarity(struct e1000_hw *hw, uint16_t *polarity);

    75

static void e1000_clear_hw_cntrs(struct e1000_hw *hw);

    76

static void e1000_clear_vfta(struct e1000_hw *hw);

    77

static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw);

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static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw,

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						  boolean_t link_up);

    80

static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw);

    81

static int32_t e1000_detect_gig_phy(struct e1000_hw *hw);

    82

static int32_t e1000_get_auto_rd_done(struct e1000_hw *hw);

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static int32_t e1000_get_cable_length(struct e1000_hw *hw,

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				      uint16_t *min_length,

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				      uint16_t *max_length);

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static int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);

    87

static int32_t e1000_get_phy_cfg_done(struct e1000_hw *hw);

    88

static int32_t e1000_id_led_init(struct e1000_hw * hw);

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static void e1000_init_rx_addrs(struct e1000_hw *hw);

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static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw);

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static int32_t e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);

    92

static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);

    93

static int32_t e1000_read_eeprom_eerd(struct e1000_hw *hw, uint16_t offset,

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				      uint16_t words, uint16_t *data);

    95

static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active);

    96

static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active);

    97

static int32_t e1000_wait_autoneg(struct e1000_hw *hw);

    98

    99

static void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset,

   100

			       uint32_t value);

   101

   102

#define E1000_WRITE_REG_IO(a, reg, val) \

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	    e1000_write_reg_io((a), E1000_##reg, val)

   104

static int32_t e1000_configure_kmrn_for_10_100(struct e1000_hw *hw,

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                                               uint16_t duplex);

   106

static int32_t e1000_configure_kmrn_for_1000(struct e1000_hw *hw);

   107

   108

static int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw,

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					   uint32_t segment);

   110

static int32_t e1000_get_software_flag(struct e1000_hw *hw);

   111

static int32_t e1000_get_software_semaphore(struct e1000_hw *hw);

   112

static int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw);

   113

static int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw);

   114

static int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset,

   115

				      uint16_t words, uint16_t *data);

   116

static int32_t e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index,

   117

				    uint8_t* data);

   118

static int32_t e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index,

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				    uint16_t *data);

   120

static int32_t e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr,

   121

				   uint16_t *data);

   122

static void e1000_release_software_flag(struct e1000_hw *hw);

   123

static void e1000_release_software_semaphore(struct e1000_hw *hw);

   124

static int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw,

   125

					 uint32_t no_snoop);

   126

static int32_t e1000_verify_write_ich8_byte(struct e1000_hw *hw,

   127

					    uint32_t index, uint8_t byte);

   128

static int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset,

   129

				       uint16_t words, uint16_t *data);

   130

static int32_t e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index,

   131

				     uint8_t data);

   132

static int32_t e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr,

   133

				    uint16_t data);

   134

   135

/* IGP cable length table */

   136

static const

   137

uint16_t e1000_igp_cable_length_table[IGP01E1000_AGC_LENGTH_TABLE_SIZE] =

   138

    { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,

   139

      5, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 25, 25, 25,

   140

      25, 25, 25, 25, 30, 30, 30, 30, 40, 40, 40, 40, 40, 40, 40, 40,

   141

      40, 50, 50, 50, 50, 50, 50, 50, 60, 60, 60, 60, 60, 60, 60, 60,

   142

      60, 70, 70, 70, 70, 70, 70, 80, 80, 80, 80, 80, 80, 90, 90, 90,

   143

      90, 90, 90, 90, 90, 90, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100,

   144

      100, 100, 100, 100, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110,

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      110, 110, 110, 110, 110, 110, 120, 120, 120, 120, 120, 120, 120, 120, 120, 120};

   146

   147

static const

   148

uint16_t e1000_igp_2_cable_length_table[IGP02E1000_AGC_LENGTH_TABLE_SIZE] =

   149

    { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,

   150

      0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41,

   151

      6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61,

   152

      21, 26, 31, 35, 40, 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82,

   153

      40, 45, 51, 56, 61, 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104,

   154

      60, 66, 72, 77, 82, 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121,

   155

      83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124,

   156

      104, 109, 114, 118, 121, 124};

   157

   158

   159

/******************************************************************************

   160

 * Set the phy type member in the hw struct.

   161

 *

   162

 * hw - Struct containing variables accessed by shared code

   163

 *****************************************************************************/

   164

int32_t

   165

e1000_set_phy_type(struct e1000_hw *hw)

   166

{

   167

    DEBUGFUNC("e1000_set_phy_type");

   168

   169

    if(hw->mac_type == e1000_undefined)

   170

        return -E1000_ERR_PHY_TYPE;

   171

   172

    switch(hw->phy_id) {

   173

    case M88E1000_E_PHY_ID:

   174

    case M88E1000_I_PHY_ID:

   175

    case M88E1011_I_PHY_ID:

   176

    case M88E1111_I_PHY_ID:

   177

        hw->phy_type = e1000_phy_m88;

   178

        break;

   179

    case IGP01E1000_I_PHY_ID:

   180

        if(hw->mac_type == e1000_82541 ||

   181

           hw->mac_type == e1000_82541_rev_2 ||

   182

           hw->mac_type == e1000_82547 ||

   183

           hw->mac_type == e1000_82547_rev_2) {

   184

            hw->phy_type = e1000_phy_igp;

   185

            break;

   186

        }

   187

    case IGP03E1000_E_PHY_ID:

   188

        hw->phy_type = e1000_phy_igp_3;

   189

        break;

   190

    case IFE_E_PHY_ID:

   191

    case IFE_PLUS_E_PHY_ID:

   192

    case IFE_C_E_PHY_ID:

   193

        hw->phy_type = e1000_phy_ife;

   194

        break;

   195

    case GG82563_E_PHY_ID:

   196

        if (hw->mac_type == e1000_80003es2lan) {

   197

            hw->phy_type = e1000_phy_gg82563;

   198

            break;

   199

        }

   200

        /* Fall Through */

   201

    default:

   202

        /* Should never have loaded on this device */

   203

        hw->phy_type = e1000_phy_undefined;

   204

        return -E1000_ERR_PHY_TYPE;

   205

    }

   206

   207

    return E1000_SUCCESS;

   208

}

   209

   210

/******************************************************************************

   211

 * IGP phy init script - initializes the GbE PHY

   212

 *

   213

 * hw - Struct containing variables accessed by shared code

   214

 *****************************************************************************/

   215

static void

   216

e1000_phy_init_script(struct e1000_hw *hw)

   217

{

   218

    uint32_t ret_val;

   219

    uint16_t phy_saved_data;

   220

   221

    DEBUGFUNC("e1000_phy_init_script");

   222

   223

    if(hw->phy_init_script) {

   224

        msec_delay(20);

   225

   226

        /* Save off the current value of register 0x2F5B to be restored at

   227

         * the end of this routine. */

   228

        ret_val = e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);

   229

   230

        /* Disabled the PHY transmitter */

   231

        e1000_write_phy_reg(hw, 0x2F5B, 0x0003);

   232

   233

        msec_delay(20);

   234

   235

        e1000_write_phy_reg(hw,0x0000,0x0140);

   236

   237

        msec_delay(5);

   238

   239

        switch(hw->mac_type) {

   240

        case e1000_82541:

   241

        case e1000_82547:

   242

            e1000_write_phy_reg(hw, 0x1F95, 0x0001);

   243

   244

            e1000_write_phy_reg(hw, 0x1F71, 0xBD21);

   245

   246

            e1000_write_phy_reg(hw, 0x1F79, 0x0018);

   247

   248

            e1000_write_phy_reg(hw, 0x1F30, 0x1600);

   249

   250

            e1000_write_phy_reg(hw, 0x1F31, 0x0014);

   251

   252

            e1000_write_phy_reg(hw, 0x1F32, 0x161C);

   253

   254

            e1000_write_phy_reg(hw, 0x1F94, 0x0003);

   255

   256

            e1000_write_phy_reg(hw, 0x1F96, 0x003F);

   257

   258

            e1000_write_phy_reg(hw, 0x2010, 0x0008);

   259

            break;

   260

   261

        case e1000_82541_rev_2:

   262

        case e1000_82547_rev_2:

   263

            e1000_write_phy_reg(hw, 0x1F73, 0x0099);

   264

            break;

   265

        default:

   266

            break;

   267

        }

   268

   269

        e1000_write_phy_reg(hw, 0x0000, 0x3300);

   270

   271

        msec_delay(20);

   272

   273

        /* Now enable the transmitter */

   274

        e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);

   275

   276

        if(hw->mac_type == e1000_82547) {

   277

            uint16_t fused, fine, coarse;

   278

   279

            /* Move to analog registers page */

   280

            e1000_read_phy_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS, &fused);

   281

   282

            if(!(fused & IGP01E1000_ANALOG_SPARE_FUSE_ENABLED)) {

   283

                e1000_read_phy_reg(hw, IGP01E1000_ANALOG_FUSE_STATUS, &fused);

   284

   285

                fine = fused & IGP01E1000_ANALOG_FUSE_FINE_MASK;

   286

                coarse = fused & IGP01E1000_ANALOG_FUSE_COARSE_MASK;

   287

   288

                if(coarse > IGP01E1000_ANALOG_FUSE_COARSE_THRESH) {

   289

                    coarse -= IGP01E1000_ANALOG_FUSE_COARSE_10;

   290

                    fine -= IGP01E1000_ANALOG_FUSE_FINE_1;

   291

                } else if(coarse == IGP01E1000_ANALOG_FUSE_COARSE_THRESH)

   292

                    fine -= IGP01E1000_ANALOG_FUSE_FINE_10;

   293

   294

                fused = (fused & IGP01E1000_ANALOG_FUSE_POLY_MASK) |

   295

                        (fine & IGP01E1000_ANALOG_FUSE_FINE_MASK) |

   296

                        (coarse & IGP01E1000_ANALOG_FUSE_COARSE_MASK);

   297

   298

                e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_CONTROL, fused);

   299

                e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_BYPASS,

   300

                                    IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL);

   301

            }

   302

        }

   303

    }

   304

}

   305

   306

/******************************************************************************

   307

 * Set the mac type member in the hw struct.

   308

 *

   309

 * hw - Struct containing variables accessed by shared code

   310

 *****************************************************************************/

   311

int32_t

   312

e1000_set_mac_type(struct e1000_hw *hw)

   313

{

   314

    DEBUGFUNC("e1000_set_mac_type");

   315

   316

    switch (hw->device_id) {

   317

    case E1000_DEV_ID_82542:

   318

        switch (hw->revision_id) {

   319

        case E1000_82542_2_0_REV_ID:

   320

            hw->mac_type = e1000_82542_rev2_0;

   321

            break;

   322

        case E1000_82542_2_1_REV_ID:

   323

            hw->mac_type = e1000_82542_rev2_1;

   324

            break;

   325

        default:

   326

            /* Invalid 82542 revision ID */

   327

            return -E1000_ERR_MAC_TYPE;

   328

        }

   329

        break;

   330

    case E1000_DEV_ID_82543GC_FIBER:

   331

    case E1000_DEV_ID_82543GC_COPPER:

   332

        hw->mac_type = e1000_82543;

   333

        break;

   334

    case E1000_DEV_ID_82544EI_COPPER:

   335

    case E1000_DEV_ID_82544EI_FIBER:

   336

    case E1000_DEV_ID_82544GC_COPPER:

   337

    case E1000_DEV_ID_82544GC_LOM:

   338

        hw->mac_type = e1000_82544;

   339

        break;

   340

    case E1000_DEV_ID_82540EM:

   341

    case E1000_DEV_ID_82540EM_LOM:

   342

    case E1000_DEV_ID_82540EP:

   343

    case E1000_DEV_ID_82540EP_LOM:

   344

    case E1000_DEV_ID_82540EP_LP:

   345

        hw->mac_type = e1000_82540;

   346

        break;

   347

    case E1000_DEV_ID_82545EM_COPPER:

   348

    case E1000_DEV_ID_82545EM_FIBER:

   349

        hw->mac_type = e1000_82545;

   350

        break;

   351

    case E1000_DEV_ID_82545GM_COPPER:

   352

    case E1000_DEV_ID_82545GM_FIBER:

   353

    case E1000_DEV_ID_82545GM_SERDES:

   354

        hw->mac_type = e1000_82545_rev_3;

   355

        break;

   356

    case E1000_DEV_ID_82546EB_COPPER:

   357

    case E1000_DEV_ID_82546EB_FIBER:

   358

    case E1000_DEV_ID_82546EB_QUAD_COPPER:

   359

        hw->mac_type = e1000_82546;

   360

        break;

   361

    case E1000_DEV_ID_82546GB_COPPER:

   362

    case E1000_DEV_ID_82546GB_FIBER:

   363

    case E1000_DEV_ID_82546GB_SERDES:

   364

    case E1000_DEV_ID_82546GB_PCIE:

   365

    case E1000_DEV_ID_82546GB_QUAD_COPPER:

   366

    case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:

   367

        hw->mac_type = e1000_82546_rev_3;

   368

        break;

   369

    case E1000_DEV_ID_82541EI:

   370

    case E1000_DEV_ID_82541EI_MOBILE:

   371

    case E1000_DEV_ID_82541ER_LOM:

   372

        hw->mac_type = e1000_82541;

   373

        break;

   374

    case E1000_DEV_ID_82541ER:

   375

    case E1000_DEV_ID_82541GI:

   376

    case E1000_DEV_ID_82541GI_LF:

   377

    case E1000_DEV_ID_82541GI_MOBILE:

   378

        hw->mac_type = e1000_82541_rev_2;

   379

        break;

   380

    case E1000_DEV_ID_82547EI:

   381

    case E1000_DEV_ID_82547EI_MOBILE:

   382

        hw->mac_type = e1000_82547;

   383

        break;

   384

    case E1000_DEV_ID_82547GI:

   385

        hw->mac_type = e1000_82547_rev_2;

   386

        break;

   387

    case E1000_DEV_ID_82571EB_COPPER:

   388

    case E1000_DEV_ID_82571EB_FIBER:

   389

    case E1000_DEV_ID_82571EB_SERDES:

   390

            hw->mac_type = e1000_82571;

   391

        break;

   392

    case E1000_DEV_ID_82572EI_COPPER:

   393

    case E1000_DEV_ID_82572EI_FIBER:

   394

    case E1000_DEV_ID_82572EI_SERDES:

   395

    case E1000_DEV_ID_82572EI:

   396

        hw->mac_type = e1000_82572;

   397

        break;

   398

    case E1000_DEV_ID_82573E:

   399

    case E1000_DEV_ID_82573E_IAMT:

   400

    case E1000_DEV_ID_82573L:

   401

        hw->mac_type = e1000_82573;

   402

        break;

   403

    case E1000_DEV_ID_80003ES2LAN_COPPER_SPT:

   404

    case E1000_DEV_ID_80003ES2LAN_SERDES_SPT:

   405

    case E1000_DEV_ID_80003ES2LAN_COPPER_DPT:

   406

    case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:

   407

        hw->mac_type = e1000_80003es2lan;

   408

        break;

   409

    case E1000_DEV_ID_ICH8_IGP_M_AMT:

   410

    case E1000_DEV_ID_ICH8_IGP_AMT:

   411

    case E1000_DEV_ID_ICH8_IGP_C:

   412

    case E1000_DEV_ID_ICH8_IFE:

   413

    case E1000_DEV_ID_ICH8_IGP_M:

   414

        hw->mac_type = e1000_ich8lan;

   415

        break;

   416

    default:

   417

        /* Should never have loaded on this device */

   418

        return -E1000_ERR_MAC_TYPE;

   419

    }

   420

   421

    switch(hw->mac_type) {

   422

    case e1000_ich8lan:

   423

        hw->swfwhw_semaphore_present = TRUE;

   424

        hw->asf_firmware_present = TRUE;

   425

        break;

   426

    case e1000_80003es2lan:

   427

        hw->swfw_sync_present = TRUE;

   428

        /* fall through */

   429

    case e1000_82571:

   430

    case e1000_82572:

   431

    case e1000_82573:

   432

        hw->eeprom_semaphore_present = TRUE;

   433

        /* fall through */

   434

    case e1000_82541:

   435

    case e1000_82547:

   436

    case e1000_82541_rev_2:

   437

    case e1000_82547_rev_2:

   438

        hw->asf_firmware_present = TRUE;

   439

        break;

   440

    default:

   441

        break;

   442

    }

   443

   444

    return E1000_SUCCESS;

   445

}

   446

   447

/*****************************************************************************

   448

 * Set media type and TBI compatibility.

   449

 *

   450

 * hw - Struct containing variables accessed by shared code

   451

 * **************************************************************************/

   452

void

   453

e1000_set_media_type(struct e1000_hw *hw)

   454

{

   455

    uint32_t status;

   456

   457

    DEBUGFUNC("e1000_set_media_type");

   458

   459

    if(hw->mac_type != e1000_82543) {

   460

        /* tbi_compatibility is only valid on 82543 */

   461

        hw->tbi_compatibility_en = FALSE;

   462

    }

   463

   464

    switch (hw->device_id) {

   465

    case E1000_DEV_ID_82545GM_SERDES:

   466

    case E1000_DEV_ID_82546GB_SERDES:

   467

    case E1000_DEV_ID_82571EB_SERDES:

   468

    case E1000_DEV_ID_82572EI_SERDES:

   469

    case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:

   470

        hw->media_type = e1000_media_type_internal_serdes;

   471

        break;

   472

    default:

   473

        switch (hw->mac_type) {

   474

        case e1000_82542_rev2_0:

   475

        case e1000_82542_rev2_1:

   476

            hw->media_type = e1000_media_type_fiber;

   477

            break;

   478

        case e1000_ich8lan:

   479

        case e1000_82573:

   480

            /* The STATUS_TBIMODE bit is reserved or reused for the this

   481

             * device.

   482

             */

   483

            hw->media_type = e1000_media_type_copper;

   484

            break;

   485

        default:

   486

            status = E1000_READ_REG(hw, STATUS);

   487

            if (status & E1000_STATUS_TBIMODE) {

   488

                hw->media_type = e1000_media_type_fiber;

   489

                /* tbi_compatibility not valid on fiber */

   490

                hw->tbi_compatibility_en = FALSE;

   491

            } else {

   492

                hw->media_type = e1000_media_type_copper;

   493

            }

   494

            break;

   495

        }

   496

    }

   497

}

   498

   499

/******************************************************************************

   500

 * Reset the transmit and receive units; mask and clear all interrupts.

   501

 *

   502

 * hw - Struct containing variables accessed by shared code

   503

 *****************************************************************************/

   504

int32_t

   505

e1000_reset_hw(struct e1000_hw *hw)

   506

{

   507

    uint32_t ctrl;

   508

    uint32_t ctrl_ext;

   509

    uint32_t icr;

   510

    uint32_t manc;

   511

    uint32_t led_ctrl;

   512

    uint32_t timeout;

   513

    uint32_t extcnf_ctrl;

   514

    int32_t ret_val;

   515

   516

    DEBUGFUNC("e1000_reset_hw");

   517

   518

    /* For 82542 (rev 2.0), disable MWI before issuing a device reset */

   519

    if(hw->mac_type == e1000_82542_rev2_0) {

   520

        DEBUGOUT("Disabling MWI on 82542 rev 2.0\n");

   521

        e1000_pci_clear_mwi(hw);

   522

    }

   523

   524

    if(hw->bus_type == e1000_bus_type_pci_express) {

   525

        /* Prevent the PCI-E bus from sticking if there is no TLP connection

   526

         * on the last TLP read/write transaction when MAC is reset.

   527

         */

   528

        if(e1000_disable_pciex_master(hw) != E1000_SUCCESS) {

   529

            DEBUGOUT("PCI-E Master disable polling has failed.\n");

   530