1

/* Intel PRO/1000 Linux driver

     2

 * Copyright(c) 1999 - 2014 Intel Corporation.

     3

 *

     4

 * This program is free software; you can redistribute it and/or modify it

     5

 * under the terms and conditions of the GNU General Public License,

     6

 * version 2, as published by the Free Software Foundation.

     7

 *

     8

 * This program is distributed in the hope it will be useful, but WITHOUT

     9

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    10

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

    11

 * more details.

    12

 *

    13

 * The full GNU General Public License is included in this distribution in

    14

 * the file called "COPYING".

    15

 *

    16

 * Contact Information:

    17

 * Linux NICS <linux.nics@intel.com>

    18

 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    19

 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

    20

 *

    21

 * vim: noexpandtab

    22

 */

    23

    24

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

    25

    26

#include <linux/module.h>

    27

#include <linux/types.h>

    28

#include <linux/init.h>

    29

#include <linux/pci.h>

    30

#include <linux/vmalloc.h>

    31

#include <linux/pagemap.h>

    32

#include <linux/delay.h>

    33

#include <linux/netdevice.h>

    34

#include <linux/interrupt.h>

    35

#include <linux/tcp.h>

    36

#include <linux/ipv6.h>

    37

#include <linux/slab.h>

    38

#include <net/checksum.h>

    39

#include <net/ip6_checksum.h>

    40

#include <linux/ethtool.h>

    41

#include <linux/if_vlan.h>

    42

#include <linux/cpu.h>

    43

#include <linux/smp.h>

    44

#include <linux/pm_qos.h>

    45

#include <linux/pm_runtime.h>

    46

#include <linux/aer.h>

    47

#include <linux/prefetch.h>

    48

    49

#include "e1000-3.16-ethercat.h"

    50

    51

#define DRV_EXTRAVERSION "-k-EtherCAT"

    52

    53

#define DRV_VERSION "2.3.2" DRV_EXTRAVERSION

    54

char e1000e_driver_name[] = "ec_e1000e";

    55

const char e1000e_driver_version[] = DRV_VERSION;

    56

    57

#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)

    58

static int debug = -1;

    59

module_param(debug, int, 0);

    60

MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");

    61

    62

static const struct e1000_info *e1000_info_tbl[] = {

    63

	[board_82571]		= &e1000_82571_info,

    64

	[board_82572]		= &e1000_82572_info,

    65

	[board_82573]		= &e1000_82573_info,

    66

	[board_82574]		= &e1000_82574_info,

    67

	[board_82583]		= &e1000_82583_info,

    68

	[board_80003es2lan]	= &e1000_es2_info,

    69

	[board_ich8lan]		= &e1000_ich8_info,

    70

	[board_ich9lan]		= &e1000_ich9_info,

    71

	[board_ich10lan]	= &e1000_ich10_info,

    72

	[board_pchlan]		= &e1000_pch_info,

    73

	[board_pch2lan]		= &e1000_pch2_info,

    74

	[board_pch_lpt]		= &e1000_pch_lpt_info,

    75

};

    76

    77

struct e1000_reg_info {

    78

	u32 ofs;

    79

	char *name;

    80

};

    81

    82

static const struct e1000_reg_info e1000_reg_info_tbl[] = {

    83

	/* General Registers */

    84

	{E1000_CTRL, "CTRL"},

    85

	{E1000_STATUS, "STATUS"},

    86

	{E1000_CTRL_EXT, "CTRL_EXT"},

    87

    88

	/* Interrupt Registers */

    89

	{E1000_ICR, "ICR"},

    90

    91

	/* Rx Registers */

    92

	{E1000_RCTL, "RCTL"},

    93

	{E1000_RDLEN(0), "RDLEN"},

    94

	{E1000_RDH(0), "RDH"},

    95

	{E1000_RDT(0), "RDT"},

    96

	{E1000_RDTR, "RDTR"},

    97

	{E1000_RXDCTL(0), "RXDCTL"},

    98

	{E1000_ERT, "ERT"},

    99

	{E1000_RDBAL(0), "RDBAL"},

   100

	{E1000_RDBAH(0), "RDBAH"},

   101

	{E1000_RDFH, "RDFH"},

   102

	{E1000_RDFT, "RDFT"},

   103

	{E1000_RDFHS, "RDFHS"},

   104

	{E1000_RDFTS, "RDFTS"},

   105

	{E1000_RDFPC, "RDFPC"},

   106

   107

	/* Tx Registers */

   108

	{E1000_TCTL, "TCTL"},

   109

	{E1000_TDBAL(0), "TDBAL"},

   110

	{E1000_TDBAH(0), "TDBAH"},

   111

	{E1000_TDLEN(0), "TDLEN"},

   112

	{E1000_TDH(0), "TDH"},

   113

	{E1000_TDT(0), "TDT"},

   114

	{E1000_TIDV, "TIDV"},

   115

	{E1000_TXDCTL(0), "TXDCTL"},

   116

	{E1000_TADV, "TADV"},

   117

	{E1000_TARC(0), "TARC"},

   118

	{E1000_TDFH, "TDFH"},

   119

	{E1000_TDFT, "TDFT"},

   120

	{E1000_TDFHS, "TDFHS"},

   121

	{E1000_TDFTS, "TDFTS"},

   122

	{E1000_TDFPC, "TDFPC"},

   123

   124

	/* List Terminator */

   125

	{0, NULL}

   126

};

   127

   128

/**

   129

 * __ew32_prepare - prepare to write to MAC CSR register on certain parts

   130

 * @hw: pointer to the HW structure

   131

 *

   132

 * When updating the MAC CSR registers, the Manageability Engine (ME) could

   133

 * be accessing the registers at the same time.  Normally, this is handled in

   134

 * h/w by an arbiter but on some parts there is a bug that acknowledges Host

   135

 * accesses later than it should which could result in the register to have

   136

 * an incorrect value.  Workaround this by checking the FWSM register which

   137

 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set

   138

 * and try again a number of times.

   139

 **/

   140

s32 __ew32_prepare(struct e1000_hw *hw)

   141

{

   142

	s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;

   143

   144

	while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)

   145

		udelay(50);

   146

   147

	return i;

   148

}

   149

   150

void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)

   151

{

   152

	if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)

   153

		__ew32_prepare(hw);

   154

   155

	writel(val, hw->hw_addr + reg);

   156

}

   157

   158

/**

   159

 * e1000_regdump - register printout routine

   160

 * @hw: pointer to the HW structure

   161

 * @reginfo: pointer to the register info table

   162

 **/

   163

static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)

   164

{

   165

	int n = 0;

   166

	char rname[16];

   167

	u32 regs[8];

   168

   169

	switch (reginfo->ofs) {

   170

	case E1000_RXDCTL(0):

   171

		for (n = 0; n < 2; n++)

   172

			regs[n] = __er32(hw, E1000_RXDCTL(n));

   173

		break;

   174

	case E1000_TXDCTL(0):

   175

		for (n = 0; n < 2; n++)

   176

			regs[n] = __er32(hw, E1000_TXDCTL(n));

   177

		break;

   178

	case E1000_TARC(0):

   179

		for (n = 0; n < 2; n++)

   180

			regs[n] = __er32(hw, E1000_TARC(n));

   181

		break;

   182

	default:

   183

		pr_info("%-15s %08x\n",

   184

			reginfo->name, __er32(hw, reginfo->ofs));

   185

		return;

   186

	}

   187

   188

	snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");

   189

	pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);

   190

}

   191

   192

static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,

   193

				 struct e1000_buffer *bi)

   194

{

   195

	int i;

   196

	struct e1000_ps_page *ps_page;

   197

   198

	for (i = 0; i < adapter->rx_ps_pages; i++) {

   199

		ps_page = &bi->ps_pages[i];

   200

   201

		if (ps_page->page) {

   202

			pr_info("packet dump for ps_page %d:\n", i);

   203

			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,

   204

				       16, 1, page_address(ps_page->page),

   205

				       PAGE_SIZE, true);

   206

		}

   207

	}

   208

}

   209

   210

/**

   211

 * e1000e_dump - Print registers, Tx-ring and Rx-ring

   212

 * @adapter: board private structure

   213

 **/

   214

static void e1000e_dump(struct e1000_adapter *adapter)

   215

{

   216

	struct net_device *netdev = adapter->netdev;

   217

	struct e1000_hw *hw = &adapter->hw;

   218

	struct e1000_reg_info *reginfo;

   219

	struct e1000_ring *tx_ring = adapter->tx_ring;

   220

	struct e1000_tx_desc *tx_desc;

   221

	struct my_u0 {

   222

		__le64 a;

   223

		__le64 b;

   224

	} *u0;

   225

	struct e1000_buffer *buffer_info;

   226

	struct e1000_ring *rx_ring = adapter->rx_ring;

   227

	union e1000_rx_desc_packet_split *rx_desc_ps;

   228

	union e1000_rx_desc_extended *rx_desc;

   229

	struct my_u1 {

   230

		__le64 a;

   231

		__le64 b;

   232

		__le64 c;

   233

		__le64 d;

   234

	} *u1;

   235

	u32 staterr;

   236

	int i = 0;

   237

   238

	if (!netif_msg_hw(adapter))

   239

		return;

   240

   241

	/* Print netdevice Info */

   242

	if (netdev) {

   243

		dev_info(&adapter->pdev->dev, "Net device Info\n");

   244

		pr_info("Device Name     state            trans_start      last_rx\n");

   245

		pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,

   246

			netdev->state, netdev->trans_start, netdev->last_rx);

   247

	}

   248

   249

	/* Print Registers */

   250

	dev_info(&adapter->pdev->dev, "Register Dump\n");

   251

	pr_info(" Register Name   Value\n");

   252

	for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;

   253

	     reginfo->name; reginfo++) {

   254

		e1000_regdump(hw, reginfo);

   255

	}

   256

   257

	/* Print Tx Ring Summary */

   258

	if (!netdev || !netif_running(netdev))

   259

		return;

   260

   261

	dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");

   262

	pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");

   263

	buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];

   264

	pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",

   265

		0, tx_ring->next_to_use, tx_ring->next_to_clean,

   266

		(unsigned long long)buffer_info->dma,

   267

		buffer_info->length,

   268

		buffer_info->next_to_watch,

   269

		(unsigned long long)buffer_info->time_stamp);

   270

   271

	/* Print Tx Ring */

   272

	if (!netif_msg_tx_done(adapter))

   273

		goto rx_ring_summary;

   274

   275

	dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");

   276

   277

	/* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)

   278

	 *

   279

	 * Legacy Transmit Descriptor

   280

	 *   +--------------------------------------------------------------+

   281

	 * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |

   282

	 *   +--------------------------------------------------------------+

   283

	 * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |

   284

	 *   +--------------------------------------------------------------+

   285

	 *   63       48 47        36 35    32 31     24 23    16 15        0

   286

	 *

   287

	 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload

   288

	 *   63      48 47    40 39       32 31             16 15    8 7      0

   289

	 *   +----------------------------------------------------------------+

   290

	 * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |

   291

	 *   +----------------------------------------------------------------+

   292

	 * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |

   293

	 *   +----------------------------------------------------------------+

   294

	 *   63      48 47    40 39 36 35 32 31   24 23  20 19                0

   295

	 *

   296

	 * Extended Data Descriptor (DTYP=0x1)

   297

	 *   +----------------------------------------------------------------+

   298

	 * 0 |                     Buffer Address [63:0]                      |

   299

	 *   +----------------------------------------------------------------+

   300

	 * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |

   301

	 *   +----------------------------------------------------------------+

   302

	 *   63       48 47     40 39  36 35    32 31     24 23  20 19        0

   303

	 */

   304

	pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");

   305

	pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");

   306

	pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");

   307

	for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {

   308

		const char *next_desc;

   309

		tx_desc = E1000_TX_DESC(*tx_ring, i);

   310

		buffer_info = &tx_ring->buffer_info[i];

   311

		u0 = (struct my_u0 *)tx_desc;

   312

		if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)

   313

			next_desc = " NTC/U";

   314

		else if (i == tx_ring->next_to_use)

   315

			next_desc = " NTU";

   316

		else if (i == tx_ring->next_to_clean)

   317

			next_desc = " NTC";

   318

		else

   319

			next_desc = "";

   320

		pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",

   321

			(!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :

   322

			 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),

   323

			i,

   324

			(unsigned long long)le64_to_cpu(u0->a),

   325

			(unsigned long long)le64_to_cpu(u0->b),

   326

			(unsigned long long)buffer_info->dma,

   327

			buffer_info->length, buffer_info->next_to_watch,

   328

			(unsigned long long)buffer_info->time_stamp,

   329

			buffer_info->skb, next_desc);

   330

   331

		if (netif_msg_pktdata(adapter) && buffer_info->skb)

   332

			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,

   333

				       16, 1, buffer_info->skb->data,

   334

				       buffer_info->skb->len, true);

   335

	}

   336

   337

	/* Print Rx Ring Summary */

   338

rx_ring_summary:

   339

	dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");

   340

	pr_info("Queue [NTU] [NTC]\n");

   341

	pr_info(" %5d %5X %5X\n",

   342

		0, rx_ring->next_to_use, rx_ring->next_to_clean);

   343

   344

	/* Print Rx Ring */

   345

	if (!netif_msg_rx_status(adapter))

   346

		return;

   347

   348

	dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");

   349

	switch (adapter->rx_ps_pages) {

   350

	case 1:

   351

	case 2:

   352

	case 3:

   353

		/* [Extended] Packet Split Receive Descriptor Format

   354

		 *

   355

		 *    +-----------------------------------------------------+

   356

		 *  0 |                Buffer Address 0 [63:0]              |

   357

		 *    +-----------------------------------------------------+

   358

		 *  8 |                Buffer Address 1 [63:0]              |

   359

		 *    +-----------------------------------------------------+

   360

		 * 16 |                Buffer Address 2 [63:0]              |

   361

		 *    +-----------------------------------------------------+

   362

		 * 24 |                Buffer Address 3 [63:0]              |

   363

		 *    +-----------------------------------------------------+

   364

		 */

   365

		pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");

   366

		/* [Extended] Receive Descriptor (Write-Back) Format

   367

		 *

   368

		 *   63       48 47    32 31     13 12    8 7    4 3        0

   369

		 *   +------------------------------------------------------+

   370

		 * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |

   371

		 *   | Checksum | Ident  |         | Queue |      |  Type   |

   372

		 *   +------------------------------------------------------+

   373

		 * 8 | VLAN Tag | Length | Extended Error | Extended Status |

   374

		 *   +------------------------------------------------------+

   375

		 *   63       48 47    32 31            20 19               0

   376

		 */

   377

		pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");

   378

		for (i = 0; i < rx_ring->count; i++) {

   379

			const char *next_desc;

   380

			buffer_info = &rx_ring->buffer_info[i];

   381

			rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);

   382

			u1 = (struct my_u1 *)rx_desc_ps;

   383

			staterr =

   384

			    le32_to_cpu(rx_desc_ps->wb.middle.status_error);

   385

   386

			if (i == rx_ring->next_to_use)

   387

				next_desc = " NTU";

   388

			else if (i == rx_ring->next_to_clean)

   389

				next_desc = " NTC";

   390

			else

   391

				next_desc = "";

   392

   393

			if (staterr & E1000_RXD_STAT_DD) {

   394

				/* Descriptor Done */

   395

				pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",

   396

					"RWB", i,

   397

					(unsigned long long)le64_to_cpu(u1->a),

   398

					(unsigned long long)le64_to_cpu(u1->b),

   399

					(unsigned long long)le64_to_cpu(u1->c),

   400

					(unsigned long long)le64_to_cpu(u1->d),

   401

					buffer_info->skb, next_desc);

   402

			} else {

   403

				pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",

   404

					"R  ", i,

   405

					(unsigned long long)le64_to_cpu(u1->a),

   406

					(unsigned long long)le64_to_cpu(u1->b),

   407

					(unsigned long long)le64_to_cpu(u1->c),

   408

					(unsigned long long)le64_to_cpu(u1->d),

   409

					(unsigned long long)buffer_info->dma,

   410

					buffer_info->skb, next_desc);

   411

   412

				if (netif_msg_pktdata(adapter))

   413

					e1000e_dump_ps_pages(adapter,

   414

							     buffer_info);

   415

			}

   416

		}

   417

		break;

   418

	default:

   419

	case 0:

   420

		/* Extended Receive Descriptor (Read) Format

   421

		 *

   422

		 *   +-----------------------------------------------------+

   423

		 * 0 |                Buffer Address [63:0]                |

   424

		 *   +-----------------------------------------------------+

   425

		 * 8 |                      Reserved                       |

   426

		 *   +-----------------------------------------------------+

   427

		 */

   428

		pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");

   429

		/* Extended Receive Descriptor (Write-Back) Format

   430

		 *

   431

		 *   63       48 47    32 31    24 23            4 3        0

   432

		 *   +------------------------------------------------------+

   433

		 *   |     RSS Hash      |        |               |         |

   434

		 * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |

   435

		 *   | Packet   | IP     |        |               |  Type   |

   436

		 *   | Checksum | Ident  |        |               |         |

   437

		 *   +------------------------------------------------------+

   438

		 * 8 | VLAN Tag | Length | Extended Error | Extended Status |

   439

		 *   +------------------------------------------------------+

   440

		 *   63       48 47    32 31            20 19               0

   441

		 */

   442

		pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");

   443

   444

		for (i = 0; i < rx_ring->count; i++) {

   445

			const char *next_desc;

   446

   447

			buffer_info = &rx_ring->buffer_info[i];

   448

			rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);

   449

			u1 = (struct my_u1 *)rx_desc;

   450

			staterr = le32_to_cpu(rx_desc->wb.upper.status_error);

   451

   452

			if (i == rx_ring->next_to_use)

   453

				next_desc = " NTU";

   454

			else if (i == rx_ring->next_to_clean)

   455

				next_desc = " NTC";

   456

			else

   457

				next_desc = "";

   458

   459

			if (staterr & E1000_RXD_STAT_DD) {

   460

				/* Descriptor Done */

   461

				pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",

   462

					"RWB", i,

   463

					(unsigned long long)le64_to_cpu(u1->a),

   464

					(unsigned long long)le64_to_cpu(u1->b),

   465

					buffer_info->skb, next_desc);

   466

			} else {

   467

				pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",

   468

					"R  ", i,

   469

					(unsigned long long)le64_to_cpu(u1->a),

   470

					(unsigned long long)le64_to_cpu(u1->b),

   471

					(unsigned long long)buffer_info->dma,

   472

					buffer_info->skb, next_desc);

   473

   474

				if (netif_msg_pktdata(adapter) &&

   475

				    buffer_info->skb)

   476

					print_hex_dump(KERN_INFO, "",

   477

						       DUMP_PREFIX_ADDRESS, 16,

   478

						       1,

   479

						       buffer_info->skb->data,

   480

						       adapter->rx_buffer_len,

   481

						       true);

   482

			}

   483

		}

   484

	}

   485

}

   486

   487

/**

   488

 * e1000_desc_unused - calculate if we have unused descriptors

   489

 **/

   490

static int e1000_desc_unused(struct e1000_ring *ring)

   491

{

   492

	if (ring->next_to_clean > ring->next_to_use)

   493

		return ring->next_to_clean - ring->next_to_use - 1;

   494

   495

	return ring->count + ring->next_to_clean - ring->next_to_use - 1;

   496

}

   497

   498

/**

   499

 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp

   500

 * @adapter: board private structure

   501

 * @hwtstamps: time stamp structure to update

   502

 * @systim: unsigned 64bit system time value.

   503

 *

   504

 * Convert the system time value stored in the RX/TXSTMP registers into a

   505

 * hwtstamp which can be used by the upper level time stamping functions.

   506

 *

   507

 * The 'systim_lock' spinlock is used to protect the consistency of the

   508

 * system time value. This is needed because reading the 64 bit time

   509

 * value involves reading two 32 bit registers. The first read latches the

   510

 * value.

   511

 **/

   512

static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,

   513

				      struct skb_shared_hwtstamps *hwtstamps,

   514

				      u64 systim)

   515

{

   516

	u64 ns;

   517

	unsigned long flags;

   518

   519

	spin_lock_irqsave(&adapter->systim_lock, flags);

   520

	ns = timecounter_cyc2time(&adapter->tc, systim);

   521

	spin_unlock_irqrestore(&adapter->systim_lock, flags);

   522

   523

	memset(hwtstamps, 0, sizeof(*hwtstamps));

   524

	hwtstamps->hwtstamp = ns_to_ktime(ns);

   525

}

   526

   527

/**

   528

 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp

   529

 * @adapter: board private structure

   530

 * @status: descriptor extended error and status field