1

/**

     2

    Network Driver for Beckhoff CCAT communication controller

     3

    Copyright (C) 2014  Beckhoff Automation GmbH

     4

    Author: Patrick Bruenn <p.bruenn@beckhoff.com>

     5

     6

    This program is free software; you can redistribute it and/or modify

     7

    it under the terms of the GNU General Public License as published by

     8

    the Free Software Foundation; either version 2 of the License, or

     9

    (at your option) any later version.

    10

    11

    This program is distributed in the hope that it will be useful,

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    but WITHOUT ANY WARRANTY; without even the implied warranty of

    13

    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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    GNU General Public License for more details.

    15

    16

    You should have received a copy of the GNU General Public License along

    17

    with this program; if not, write to the Free Software Foundation, Inc.,

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    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.

    19

*/

    20

    21

#include <linux/fs.h>

    22

#include <linux/kernel.h>

    23

#include <linux/module.h>

    24

#include <linux/sched.h>

    25

#include <linux/uaccess.h>

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#include "module.h"

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#include "update.h"

    28

    29

#define CCAT_DATA_IN_4 0x038

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#define CCAT_DATA_IN_N 0x7F0

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#define CCAT_DATA_OUT_4 0x030

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#define CCAT_DATA_BLOCK_SIZE (size_t)((CCAT_DATA_IN_N - CCAT_DATA_IN_4)/8)

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#define CCAT_WRITE_BLOCK_SIZE 128

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#define CCAT_FLASH_SIZE (size_t)0xE0000

    35

    36

/**     FUNCTION_NAME            CMD,  CLOCKS          */

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#define CCAT_BULK_ERASE          0xE3, 8

    38

#define CCAT_GET_PROM_ID         0xD5, 40

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#define CCAT_READ_FLASH          0xC0, 32

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#define CCAT_READ_STATUS         0xA0, 16

    41

#define CCAT_WRITE_ENABLE        0x60, 8

    42

#define CCAT_WRITE_FLASH         0x40, 32

    43

    44

/* from http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */

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#define SWAP_BITS(B) \

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	((((B) * 0x0802LU & 0x22110LU) | ((B) * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16)

    47

    48

/**

    49

 * struct update_buffer - keep track of a CCAT FPGA update

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 * @update: pointer to a valid ccat_update object

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 * @data: buffer used for write operations

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 * @size: number of bytes written to the data buffer, if 0 on ccat_update_release() no data will be written to FPGA

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 */

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struct update_buffer {

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	struct ccat_update *update;

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	char data[CCAT_FLASH_SIZE];

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	size_t size;

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};

    59

    60

/**

    61

 * wait_until_busy_reset() - wait until the busy flag was reset

    62

 * @ioaddr: address of the CCAT Update function in PCI config space

    63

 */

    64

static inline void wait_until_busy_reset(void __iomem * const ioaddr)

    65

{

    66

	wmb();

    67

	while (ioread8(ioaddr + 1)) {

    68

		schedule();

    69

	}

    70

}

    71

    72

/**

    73

 * __ccat_update_cmd() - Helper to issue a FPGA flash command

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 * @ioaddr: address of the CCAT Update function in PCI config space

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 * @cmd: the command identifier

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 * @clocks: the number of clocks associated with the specified command

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 *

    78

 * no write memory barrier is called and the busy flag is not evaluated

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 */

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static inline void __ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,

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				     u16 clocks)

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{

    83

	iowrite8((0xff00 & clocks) >> 8, ioaddr);

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	iowrite8(0x00ff & clocks, ioaddr + 0x8);

    85

	iowrite8(cmd, ioaddr + 0x10);

    86

}

    87

    88

/**

    89

 * ccat_update_cmd() - Helper to issue a FPGA flash command

    90

 * @ioaddr: address of the CCAT Update function in PCI config space

    91

 * @cmd: the command identifier

    92

 * @clocks: the number of clocks associated with the specified command

    93

 *

    94

 * Triggers a full flash command cycle with write memory barrier and

    95

 * command activate. This call blocks until the busy flag is reset.

    96

 */

    97

static inline void ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,

    98

				   u16 clocks)

    99

{

   100

	__ccat_update_cmd(ioaddr, cmd, clocks);

   101

	wmb();

   102

	iowrite8(0xff, ioaddr + 0x7f8);

   103

	wait_until_busy_reset(ioaddr);

   104

}

   105

   106

/**

   107

 * ccat_update_cmd_addr() - Helper to issue a FPGA flash command with address parameter

   108

 * @ioaddr: address of the CCAT Update function in PCI config space

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 * @cmd: the command identifier

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 * @clocks: the number of clocks associated with the specified command

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 * @addr: 24 bit address associated with the specified command

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 *

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 * Triggers a full flash command cycle with write memory barrier and

   114

 * command activate. This call blocks until the busy flag is reset.

   115

 */

   116

static inline void ccat_update_cmd_addr(void __iomem * const ioaddr,

   117

					u8 cmd, u16 clocks, u32 addr)

   118

{

   119

	const u8 addr_0 = SWAP_BITS(addr & 0xff);

   120

	const u8 addr_1 = SWAP_BITS((addr & 0xff00) >> 8);

   121

	const u8 addr_2 = SWAP_BITS((addr & 0xff0000) >> 16);

   122

   123

	__ccat_update_cmd(ioaddr, cmd, clocks);

   124

	iowrite8(addr_2, ioaddr + 0x18);

   125

	iowrite8(addr_1, ioaddr + 0x20);

   126

	iowrite8(addr_0, ioaddr + 0x28);

   127

	wmb();

   128

	iowrite8(0xff, ioaddr + 0x7f8);

   129

	wait_until_busy_reset(ioaddr);

   130

}

   131

   132

/**

   133

 * ccat_get_status() - Read CCAT Update status

   134

 * @ioaddr: address of the CCAT Update function in PCI config space

   135

 *

   136

 * Return: the current status of the CCAT Update function

   137

 */

   138

static u8 ccat_get_status(void __iomem * const ioaddr)

   139

{

   140

	ccat_update_cmd(ioaddr, CCAT_READ_STATUS);

   141

	return ioread8(ioaddr + 0x20);

   142

}

   143

   144

/**

   145

 * ccat_read_flash_block() - Read a block of CCAT configuration data from flash

   146

 * @ioaddr: address of the CCAT Update function in PCI config space

   147

 * @addr: 24 bit address of the block to read

   148

 * @len: number of bytes to read from this block, len <= CCAT_DATA_BLOCK_SIZE

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 * @buf: output buffer in user space

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 *

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 * Copies one block of configuration data from the CCAT FPGA's flash to

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 * the user space buffer.

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 * Note that the size of the FPGA's firmware is not known exactly so it

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 * is very possible that the overall buffer ends with a lot of 0xff.

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 *

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 * Return: the number of bytes copied

   157

 */

   158

static int ccat_read_flash_block(void __iomem * const ioaddr,

   159

				 const u32 addr, const u16 len,

   160

				 char __user * const buf)

   161

{

   162

	u16 i;

   163

	const u16 clocks = 8 * len;

   164

   165

	ccat_update_cmd_addr(ioaddr, CCAT_READ_FLASH + clocks, addr);

   166

	for (i = 0; i < len; i++) {

   167

		put_user(ioread8(ioaddr + CCAT_DATA_IN_4 + 8 * i), buf + i);

   168

	}

   169

	return len;

   170

}

   171

   172

/**

   173

 * ccat_read_flash() - Read a chunk of CCAT configuration data from flash

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 * @ioaddr: address of the CCAT Update function in PCI config space

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 * @buf: output buffer in user space

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 * @len: number of bytes to read

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 * @off: offset in the configuration data

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 *

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 * Copies multiple blocks of configuration data from the CCAT FPGA's

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 * flash to the user space buffer.

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 *

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 * Return: the number of bytes copied

   183

 */

   184

static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,

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			   u32 len, loff_t * off)

   186

{

   187

	const loff_t start = *off;

   188

   189

	while (len > CCAT_DATA_BLOCK_SIZE) {

   190

		*off +=

   191

		    ccat_read_flash_block(ioaddr, *off, CCAT_DATA_BLOCK_SIZE,

   192

					  buf);

   193

		buf += CCAT_DATA_BLOCK_SIZE;

   194

		len -= CCAT_DATA_BLOCK_SIZE;

   195

	}

   196

	*off += ccat_read_flash_block(ioaddr, *off, len, buf);

   197

	return *off - start;

   198

}

   199

   200

/**

   201

 * ccat_wait_status_cleared() - wait until CCAT status is cleared

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 * @ioaddr: address of the CCAT Update function in PCI config space

   203

 *

   204

 * Blocks until bit 7 of the CCAT Update status is reset

   205

 */

   206

static void ccat_wait_status_cleared(void __iomem * const ioaddr)

   207

{

   208

	u8 status;

   209

   210

	do {

   211

		status = ccat_get_status(ioaddr);

   212

	} while (status & (1 << 7));

   213

}

   214

   215

/**

   216

 * ccat_write_flash_block() - Write a block of CCAT configuration data to flash

   217

 * @ioaddr: address of the CCAT Update function in PCI config space

   218

 * @addr: 24 bit start address in the CCAT FPGA's flash

   219

 * @len: number of bytes to write in this block, len <= CCAT_WRITE_BLOCK_SIZE

   220

 * @buf: input buffer

   221

 *

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 * Copies one block of configuration data to the CCAT FPGA's flash

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 *

   224

 * Return: the number of bytes copied

   225

 */

   226

static int ccat_write_flash_block(void __iomem * const ioaddr,

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				  const u32 addr, const u16 len,

   228

				  const char *const buf)

   229

{

   230

	const u16 clocks = 8 * len;

   231

	u16 i;

   232

   233

	ccat_update_cmd(ioaddr, CCAT_WRITE_ENABLE);

   234

	for (i = 0; i < len; i++) {

   235

		iowrite8(buf[i], ioaddr + CCAT_DATA_OUT_4 + 8 * i);

   236

	}

   237

	ccat_update_cmd_addr(ioaddr, CCAT_WRITE_FLASH + clocks, addr);

   238

	ccat_wait_status_cleared(ioaddr);

   239

	return len;

   240

}

   241

   242

/**

   243

 * ccat_write_flash() - Write a new CCAT configuration to FPGA's flash

   244

 * @update: a CCAT Update buffer containing the new FPGA configuration

   245

 */

   246

static void ccat_write_flash(const struct update_buffer *const update)

   247

{

   248

	const char *buf = update->data;

   249

	u32 off = 0;

   250

	size_t len = update->size;

   251

   252

	while (len > CCAT_WRITE_BLOCK_SIZE) {

   253

		ccat_write_flash_block(update->update->ioaddr, off,

   254

				       (u16) CCAT_WRITE_BLOCK_SIZE, buf);

   255

		off += CCAT_WRITE_BLOCK_SIZE;

   256

		buf += CCAT_WRITE_BLOCK_SIZE;

   257

		len -= CCAT_WRITE_BLOCK_SIZE;

   258

	}

   259

	ccat_write_flash_block(update->update->ioaddr, off, (u16) len, buf);

   260

}

   261

   262

/**

   263

 * ccat_update_destroy() - Cleanup the CCAT Update function

   264

 * @ref: pointer to a struct kref embedded into a struct ccat_update, which we intend to destroy

   265

 *

   266

 * Retrieves the parent struct ccat_update and destroys it.

   267

 */

   268

static void ccat_update_destroy(struct kref *ref)

   269

{

   270

	struct ccat_update *update =

   271

	    container_of(ref, struct ccat_update, refcount);

   272

   273

	cdev_del(&update->cdev);

   274

	device_destroy(update->class, update->dev);

   275

	class_destroy(update->class);

   276

	unregister_chrdev_region(update->dev, 1);

   277

	kfree(update);

   278

	pr_debug("%s(): done\n", __FUNCTION__);

   279

}

   280

   281

static int ccat_update_open(struct inode *const i, struct file *const f)

   282

{

   283

	struct ccat_update *update =

   284

	    container_of(i->i_cdev, struct ccat_update, cdev);

   285

	struct update_buffer *buf;

   286

   287

	kref_get(&update->refcount);

   288

	if (atomic_read(&update->refcount.refcount) > 2) {

   289

		kref_put(&update->refcount, ccat_update_destroy);

   290

		return -EBUSY;

   291

	}

   292

   293

	buf = kzalloc(sizeof(*buf), GFP_KERNEL);

   294

	if (!buf) {

   295

		kref_put(&update->refcount, ccat_update_destroy);

   296

		return -ENOMEM;

   297

	}

   298

   299

	buf->update = update;

   300

	f->private_data = buf;

   301

	return 0;

   302

}

   303

   304

static int ccat_update_release(struct inode *const i, struct file *const f)

   305

{

   306

	const struct update_buffer *const buf = f->private_data;

   307

	struct ccat_update *const update = buf->update;

   308

   309

	if (buf->size > 0) {

   310

		ccat_update_cmd(update->ioaddr, CCAT_WRITE_ENABLE);

   311

		ccat_update_cmd(update->ioaddr, CCAT_BULK_ERASE);

   312

		ccat_wait_status_cleared(update->ioaddr);

   313

		ccat_write_flash(buf);

   314

	}

   315

	kfree(f->private_data);

   316

	kref_put(&update->refcount, ccat_update_destroy);

   317

	return 0;

   318

}

   319

   320

/**

   321

 * ccat_update_read() - Read CCAT configuration data from flash

   322

 * @f: file handle previously initialized with ccat_update_open()

   323

 * @buf: buffer in user space provided for our data

   324

 * @len: length of the user space buffer

   325

 * @off: current offset of our file operation

   326

 *

   327

 * Copies data from the CCAT FPGA's configuration flash to user space.

   328

 * Note that the size of the FPGA's firmware is not known exactly so it

   329

 * is very possible that the overall buffer ends with a lot of 0xff.

   330

 *

   331

 * Return: the number of bytes written, or 0 if EOF reached

   332

 */

   333

static ssize_t ccat_update_read(struct file *const f, char __user * buf,

   334

				size_t len, loff_t * off)

   335

{

   336

	struct update_buffer *update = f->private_data;

   337

   338

	if (!buf || !off) {

   339

		return -EINVAL;

   340

	}

   341

	if (*off >= CCAT_FLASH_SIZE) {

   342

		return 0;

   343

	}

   344

	if (*off + len >= CCAT_FLASH_SIZE) {

   345

		len = CCAT_FLASH_SIZE - *off;

   346

	}

   347

	return ccat_read_flash(update->update->ioaddr, buf, len, off);

   348

}

   349

   350

/**

   351

 * ccat_update_write() - Write data to the CCAT FPGA's configuration flash

   352

 * @f: file handle previously initialized with ccat_update_open()

   353

 * @buf: buffer in user space providing the new configuration data (from *.rbf)

   354

 * @len: length of the user space buffer

   355

 * @off: current offset in the configuration data

   356

 *

   357

 * Copies data from user space (possibly a *.rbf) to the CCAT FPGA's

   358

 * configuration flash to user space.

   359

 *

   360

 * Return: the number of bytes written, or 0 if flash end is reached

   361

 */

   362

   363

static ssize_t ccat_update_write(struct file *const f, const char __user * buf,

   364

				 size_t len, loff_t * off)

   365

{

   366

	struct update_buffer *const update = f->private_data;

   367

   368

	if (*off + len > sizeof(update->data))

   369

		return 0;

   370

   371

	if (copy_from_user(update->data + *off, buf, len)) {

   372

		return -EFAULT;

   373

	}

   374

   375

	*off += len;

   376

	update->size = *off;

   377

	return len;

   378

}

   379

   380

static struct file_operations update_ops = {

   381

	.owner = THIS_MODULE,

   382

	.open = ccat_update_open,

   383

	.release = ccat_update_release,

   384

	.read = ccat_update_read,

   385

	.write = ccat_update_write,

   386

};

   387

   388

/**

   389

 * ccat_get_prom_id() - Read CCAT PROM ID

   390

 * @ioaddr: address of the CCAT Update function in PCI config space

   391

 *

   392

 * Return: the CCAT FPGA's PROM identifier

   393

 */

   394

u8 ccat_get_prom_id(void __iomem * const ioaddr)

   395

{

   396

	ccat_update_cmd(ioaddr, CCAT_GET_PROM_ID);

   397

	return ioread8(ioaddr + 0x38);

   398

}

   399

   400

/**

   401

 * ccat_update_init() - Initialize the CCAT Update function

   402

 */

   403

struct ccat_update *ccat_update_init(const struct ccat_device *const ccatdev,

   404

				     void __iomem * const addr)

   405

{

   406

	struct ccat_update *const update = kzalloc(sizeof(*update), GFP_KERNEL);

   407

   408

	if (!update) {

   409

		return NULL;

   410

	}

   411

	kref_init(&update->refcount);

   412

	update->ioaddr = ccatdev->bar[0].ioaddr + ioread32(addr + 0x8);

   413

	memcpy_fromio(&update->info, addr, sizeof(update->info));

   414

   415

	if (0x00 != update->info.rev) {

   416

		pr_warn("CCAT Update rev. %d not supported\n",

   417

			update->info.rev);

   418

		goto cleanup;

   419

	}

   420

   421

	if (alloc_chrdev_region(&update->dev, 0, 1, KBUILD_MODNAME)) {

   422

		pr_warn("alloc_chrdev_region() failed\n");

   423

		goto cleanup;

   424

	}

   425

   426

	update->class = class_create(THIS_MODULE, "ccat_update");

   427

	if (NULL == update->class) {

   428

		pr_warn("Create device class failed\n");

   429

		goto cleanup;

   430

	}

   431

   432

	if (NULL ==

   433

	    device_create(update->class, NULL, update->dev, NULL,

   434

			  "ccat_update")) {

   435

		pr_warn("device_create() failed\n");

   436

		goto cleanup;

   437

	}

   438

   439

	cdev_init(&update->cdev, &update_ops);

   440

	update->cdev.owner = THIS_MODULE;

   441

	update->cdev.ops = &update_ops;

   442

	if (cdev_add(&update->cdev, update->dev, 1)) {

   443

		pr_warn("add update device failed\n");

   444

		goto cleanup;

   445

	}

   446

	return update;

   447

cleanup:

   448

	kref_put(&update->refcount, ccat_update_destroy);

   449

	return NULL;

   450

}

   451

   452

/**

   453

 * ccat_update_remove() - Prepare the CCAT Update function for removal

   454

 */

   455

void ccat_update_remove(struct ccat_update *update)

   456

{

   457

	kref_put(&update->refcount, ccat_update_destroy);

   458

	pr_debug("%s(): done\n", __FUNCTION__);

   459

}