1

/* Intel PRO/1000 Linux driver

     2

 * Copyright(c) 1999 - 2014 Intel Corporation.

     3

 *

     4

 * This program is free software; you can redistribute it and/or modify it

     5

 * under the terms and conditions of the GNU General Public License,

     6

 * version 2, as published by the Free Software Foundation.

     7

 *

     8

 * This program is distributed in the hope it will be useful, but WITHOUT

     9

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    10

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

    11

 * more details.

    12

 *

    13

 * The full GNU General Public License is included in this distribution in

    14

 * the file called "COPYING".

    15

 *

    16

 * Contact Information:

    17

 * Linux NICS <linux.nics@intel.com>

    18

 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    19

 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

    20

 */

    21

    22

#include "e1000-3.16-ethercat.h"

    23

    24

static s32 e1000_wait_autoneg(struct e1000_hw *hw);

    25

static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,

    26

					  u16 *data, bool read, bool page_set);

    27

static u32 e1000_get_phy_addr_for_hv_page(u32 page);

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static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

    29

					  u16 *data, bool read);

    30

    31

/* Cable length tables */

    32

static const u16 e1000_m88_cable_length_table[] = {

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	0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED

    34

};

    35

    36

#define M88E1000_CABLE_LENGTH_TABLE_SIZE \

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		ARRAY_SIZE(e1000_m88_cable_length_table)

    38

    39

static const u16 e1000_igp_2_cable_length_table[] = {

    40

	0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21, 0, 0, 0, 3,

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	6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41, 6, 10, 14, 18, 22,

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	26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61, 21, 26, 31, 35, 40,

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	44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82, 40, 45, 51, 56, 61,

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	66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104, 60, 66, 72, 77, 82,

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	87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121, 83, 89, 95,

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	100, 105, 109, 113, 116, 119, 122, 124, 104, 109, 114, 118, 121,

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	124

    48

};

    49

    50

#define IGP02E1000_CABLE_LENGTH_TABLE_SIZE \

    51

		ARRAY_SIZE(e1000_igp_2_cable_length_table)

    52

    53

/**

    54

 *  e1000e_check_reset_block_generic - Check if PHY reset is blocked

    55

 *  @hw: pointer to the HW structure

    56

 *

    57

 *  Read the PHY management control register and check whether a PHY reset

    58

 *  is blocked.  If a reset is not blocked return 0, otherwise

    59

 *  return E1000_BLK_PHY_RESET (12).

    60

 **/

    61

s32 e1000e_check_reset_block_generic(struct e1000_hw *hw)

    62

{

    63

	u32 manc;

    64

    65

	manc = er32(MANC);

    66

    67

	return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ? E1000_BLK_PHY_RESET : 0;

    68

}

    69

    70

/**

    71

 *  e1000e_get_phy_id - Retrieve the PHY ID and revision

    72

 *  @hw: pointer to the HW structure

    73

 *

    74

 *  Reads the PHY registers and stores the PHY ID and possibly the PHY

    75

 *  revision in the hardware structure.

    76

 **/

    77

s32 e1000e_get_phy_id(struct e1000_hw *hw)

    78

{

    79

	struct e1000_phy_info *phy = &hw->phy;

    80

	s32 ret_val = 0;

    81

	u16 phy_id;

    82

	u16 retry_count = 0;

    83

    84

	if (!phy->ops.read_reg)

    85

		return 0;

    86

    87

	while (retry_count < 2) {

    88

		ret_val = e1e_rphy(hw, MII_PHYSID1, &phy_id);

    89

		if (ret_val)

    90

			return ret_val;

    91

    92

		phy->id = (u32)(phy_id << 16);

    93

		usleep_range(20, 40);

    94

		ret_val = e1e_rphy(hw, MII_PHYSID2, &phy_id);

    95

		if (ret_val)

    96

			return ret_val;

    97

    98

		phy->id |= (u32)(phy_id & PHY_REVISION_MASK);

    99

		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

   100

   101

		if (phy->id != 0 && phy->id != PHY_REVISION_MASK)

   102

			return 0;

   103

   104

		retry_count++;

   105

	}

   106

   107

	return 0;

   108

}

   109

   110

/**

   111

 *  e1000e_phy_reset_dsp - Reset PHY DSP

   112

 *  @hw: pointer to the HW structure

   113

 *

   114

 *  Reset the digital signal processor.

   115

 **/

   116

s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)

   117

{

   118

	s32 ret_val;

   119

   120

	ret_val = e1e_wphy(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);

   121

	if (ret_val)

   122

		return ret_val;

   123

   124

	return e1e_wphy(hw, M88E1000_PHY_GEN_CONTROL, 0);

   125

}

   126

   127

/**

   128

 *  e1000e_read_phy_reg_mdic - Read MDI control register

   129

 *  @hw: pointer to the HW structure

   130

 *  @offset: register offset to be read

   131

 *  @data: pointer to the read data

   132

 *

   133

 *  Reads the MDI control register in the PHY at offset and stores the

   134

 *  information read to data.

   135

 **/

   136

s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)

   137

{

   138

	struct e1000_phy_info *phy = &hw->phy;

   139

	u32 i, mdic = 0;

   140

   141

	if (offset > MAX_PHY_REG_ADDRESS) {

   142

		e_dbg("PHY Address %d is out of range\n", offset);

   143

		return -E1000_ERR_PARAM;

   144

	}

   145

   146

	/* Set up Op-code, Phy Address, and register offset in the MDI

   147

	 * Control register.  The MAC will take care of interfacing with the

   148

	 * PHY to retrieve the desired data.

   149

	 */

   150

	mdic = ((offset << E1000_MDIC_REG_SHIFT) |

   151

		(phy->addr << E1000_MDIC_PHY_SHIFT) |

   152

		(E1000_MDIC_OP_READ));

   153

   154

	ew32(MDIC, mdic);

   155

   156

	/* Poll the ready bit to see if the MDI read completed

   157

	 * Increasing the time out as testing showed failures with

   158

	 * the lower time out

   159

	 */

   160

	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {

   161

		udelay(50);

   162

		mdic = er32(MDIC);

   163

		if (mdic & E1000_MDIC_READY)

   164

			break;

   165

	}

   166

	if (!(mdic & E1000_MDIC_READY)) {

   167

		e_dbg("MDI Read did not complete\n");

   168

		return -E1000_ERR_PHY;

   169

	}

   170

	if (mdic & E1000_MDIC_ERROR) {

   171

		e_dbg("MDI Error\n");

   172

		return -E1000_ERR_PHY;

   173

	}

   174

	if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {

   175

		e_dbg("MDI Read offset error - requested %d, returned %d\n",

   176

		      offset,

   177

		      (mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT);

   178

		return -E1000_ERR_PHY;

   179

	}

   180

	*data = (u16)mdic;

   181

   182

	/* Allow some time after each MDIC transaction to avoid

   183

	 * reading duplicate data in the next MDIC transaction.

   184

	 */

   185

	if (hw->mac.type == e1000_pch2lan)

   186

		udelay(100);

   187

   188

	return 0;

   189

}

   190

   191

/**

   192

 *  e1000e_write_phy_reg_mdic - Write MDI control register

   193

 *  @hw: pointer to the HW structure

   194

 *  @offset: register offset to write to

   195

 *  @data: data to write to register at offset

   196

 *

   197

 *  Writes data to MDI control register in the PHY at offset.

   198

 **/

   199

s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)

   200

{

   201

	struct e1000_phy_info *phy = &hw->phy;

   202

	u32 i, mdic = 0;

   203

   204

	if (offset > MAX_PHY_REG_ADDRESS) {

   205

		e_dbg("PHY Address %d is out of range\n", offset);

   206

		return -E1000_ERR_PARAM;

   207

	}

   208

   209

	/* Set up Op-code, Phy Address, and register offset in the MDI

   210

	 * Control register.  The MAC will take care of interfacing with the

   211

	 * PHY to retrieve the desired data.

   212

	 */

   213

	mdic = (((u32)data) |

   214

		(offset << E1000_MDIC_REG_SHIFT) |

   215

		(phy->addr << E1000_MDIC_PHY_SHIFT) |

   216

		(E1000_MDIC_OP_WRITE));

   217

   218

	ew32(MDIC, mdic);

   219

   220

	/* Poll the ready bit to see if the MDI read completed

   221

	 * Increasing the time out as testing showed failures with

   222

	 * the lower time out

   223

	 */

   224

	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {

   225

		udelay(50);

   226

		mdic = er32(MDIC);

   227

		if (mdic & E1000_MDIC_READY)

   228

			break;

   229

	}

   230

	if (!(mdic & E1000_MDIC_READY)) {

   231

		e_dbg("MDI Write did not complete\n");

   232

		return -E1000_ERR_PHY;

   233

	}

   234

	if (mdic & E1000_MDIC_ERROR) {

   235

		e_dbg("MDI Error\n");

   236

		return -E1000_ERR_PHY;

   237

	}

   238

	if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {

   239

		e_dbg("MDI Write offset error - requested %d, returned %d\n",

   240

		      offset,

   241

		      (mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT);

   242

		return -E1000_ERR_PHY;

   243

	}

   244

   245

	/* Allow some time after each MDIC transaction to avoid

   246

	 * reading duplicate data in the next MDIC transaction.

   247

	 */

   248

	if (hw->mac.type == e1000_pch2lan)

   249

		udelay(100);

   250

   251

	return 0;

   252

}

   253

   254

/**

   255

 *  e1000e_read_phy_reg_m88 - Read m88 PHY register

   256

 *  @hw: pointer to the HW structure

   257

 *  @offset: register offset to be read

   258

 *  @data: pointer to the read data

   259

 *

   260

 *  Acquires semaphore, if necessary, then reads the PHY register at offset

   261

 *  and storing the retrieved information in data.  Release any acquired

   262

 *  semaphores before exiting.

   263

 **/

   264

s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)

   265

{

   266

	s32 ret_val;

   267

   268

	ret_val = hw->phy.ops.acquire(hw);

   269

	if (ret_val)

   270

		return ret_val;

   271

   272

	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

   273

					   data);

   274

   275

	hw->phy.ops.release(hw);

   276

   277

	return ret_val;

   278

}

   279

   280

/**

   281

 *  e1000e_write_phy_reg_m88 - Write m88 PHY register

   282

 *  @hw: pointer to the HW structure

   283

 *  @offset: register offset to write to

   284

 *  @data: data to write at register offset

   285

 *

   286

 *  Acquires semaphore, if necessary, then writes the data to PHY register

   287

 *  at the offset.  Release any acquired semaphores before exiting.

   288

 **/

   289

s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)

   290

{

   291

	s32 ret_val;

   292

   293

	ret_val = hw->phy.ops.acquire(hw);

   294

	if (ret_val)

   295

		return ret_val;

   296

   297

	ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

   298

					    data);

   299

   300

	hw->phy.ops.release(hw);

   301

   302

	return ret_val;

   303

}

   304

   305

/**

   306

 *  e1000_set_page_igp - Set page as on IGP-like PHY(s)

   307

 *  @hw: pointer to the HW structure

   308

 *  @page: page to set (shifted left when necessary)

   309

 *

   310

 *  Sets PHY page required for PHY register access.  Assumes semaphore is

   311

 *  already acquired.  Note, this function sets phy.addr to 1 so the caller

   312

 *  must set it appropriately (if necessary) after this function returns.

   313

 **/

   314

s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page)

   315

{

   316

	e_dbg("Setting page 0x%x\n", page);

   317

   318

	hw->phy.addr = 1;

   319

   320

	return e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, page);

   321

}

   322

   323

/**

   324

 *  __e1000e_read_phy_reg_igp - Read igp PHY register

   325

 *  @hw: pointer to the HW structure

   326

 *  @offset: register offset to be read

   327

 *  @data: pointer to the read data

   328

 *  @locked: semaphore has already been acquired or not

   329

 *

   330

 *  Acquires semaphore, if necessary, then reads the PHY register at offset

   331

 *  and stores the retrieved information in data.  Release any acquired

   332

 *  semaphores before exiting.

   333

 **/

   334

static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,

   335

				     bool locked)

   336

{

   337

	s32 ret_val = 0;

   338

   339

	if (!locked) {

   340

		if (!hw->phy.ops.acquire)

   341

			return 0;

   342

   343

		ret_val = hw->phy.ops.acquire(hw);

   344

		if (ret_val)

   345

			return ret_val;

   346

	}

   347

   348

	if (offset > MAX_PHY_MULTI_PAGE_REG)

   349

		ret_val = e1000e_write_phy_reg_mdic(hw,

   350

						    IGP01E1000_PHY_PAGE_SELECT,

   351

						    (u16)offset);

   352

	if (!ret_val)

   353

		ret_val = e1000e_read_phy_reg_mdic(hw,

   354

						   MAX_PHY_REG_ADDRESS & offset,

   355

						   data);

   356

	if (!locked)

   357

		hw->phy.ops.release(hw);

   358

   359

	return ret_val;

   360

}

   361

   362

/**

   363

 *  e1000e_read_phy_reg_igp - Read igp PHY register

   364

 *  @hw: pointer to the HW structure

   365

 *  @offset: register offset to be read

   366

 *  @data: pointer to the read data

   367

 *

   368

 *  Acquires semaphore then reads the PHY register at offset and stores the

   369

 *  retrieved information in data.

   370

 *  Release the acquired semaphore before exiting.

   371

 **/

   372

s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)

   373

{

   374

	return __e1000e_read_phy_reg_igp(hw, offset, data, false);

   375

}

   376

   377

/**

   378

 *  e1000e_read_phy_reg_igp_locked - Read igp PHY register

   379

 *  @hw: pointer to the HW structure

   380

 *  @offset: register offset to be read

   381

 *  @data: pointer to the read data

   382

 *

   383

 *  Reads the PHY register at offset and stores the retrieved information

   384

 *  in data.  Assumes semaphore already acquired.

   385

 **/

   386

s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)

   387

{

   388

	return __e1000e_read_phy_reg_igp(hw, offset, data, true);

   389

}

   390

   391

/**

   392

 *  e1000e_write_phy_reg_igp - Write igp PHY register

   393

 *  @hw: pointer to the HW structure

   394

 *  @offset: register offset to write to

   395

 *  @data: data to write at register offset

   396

 *  @locked: semaphore has already been acquired or not

   397

 *

   398

 *  Acquires semaphore, if necessary, then writes the data to PHY register

   399

 *  at the offset.  Release any acquired semaphores before exiting.

   400

 **/

   401

static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,

   402

				      bool locked)

   403

{

   404

	s32 ret_val = 0;

   405

   406

	if (!locked) {

   407

		if (!hw->phy.ops.acquire)

   408

			return 0;

   409

   410

		ret_val = hw->phy.ops.acquire(hw);

   411

		if (ret_val)

   412

			return ret_val;

   413

	}

   414

   415

	if (offset > MAX_PHY_MULTI_PAGE_REG)

   416

		ret_val = e1000e_write_phy_reg_mdic(hw,

   417

						    IGP01E1000_PHY_PAGE_SELECT,

   418

						    (u16)offset);

   419

	if (!ret_val)

   420

		ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS &

   421

						    offset, data);

   422

	if (!locked)

   423

		hw->phy.ops.release(hw);

   424

   425

	return ret_val;

   426

}

   427

   428

/**

   429

 *  e1000e_write_phy_reg_igp - Write igp PHY register

   430

 *  @hw: pointer to the HW structure

   431

 *  @offset: register offset to write to

   432

 *  @data: data to write at register offset

   433

 *

   434

 *  Acquires semaphore then writes the data to PHY register

   435

 *  at the offset.  Release any acquired semaphores before exiting.

   436

 **/

   437

s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)

   438

{

   439

	return __e1000e_write_phy_reg_igp(hw, offset, data, false);

   440

}

   441

   442

/**

   443

 *  e1000e_write_phy_reg_igp_locked - Write igp PHY register

   444

 *  @hw: pointer to the HW structure

   445

 *  @offset: register offset to write to

   446

 *  @data: data to write at register offset

   447

 *

   448

 *  Writes the data to PHY register at the offset.

   449

 *  Assumes semaphore already acquired.

   450

 **/

   451

s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)

   452

{

   453

	return __e1000e_write_phy_reg_igp(hw, offset, data, true);

   454

}

   455

   456

/**

   457

 *  __e1000_read_kmrn_reg - Read kumeran register

   458

 *  @hw: pointer to the HW structure

   459

 *  @offset: register offset to be read

   460

 *  @data: pointer to the read data

   461

 *  @locked: semaphore has already been acquired or not

   462

 *

   463

 *  Acquires semaphore, if necessary.  Then reads the PHY register at offset

   464

 *  using the kumeran interface.  The information retrieved is stored in data.

   465

 *  Release any acquired semaphores before exiting.

   466

 **/

   467

static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,

   468

				 bool locked)

   469

{

   470

	u32 kmrnctrlsta;

   471

   472

	if (!locked) {

   473

		s32 ret_val = 0;

   474

   475

		if (!hw->phy.ops.acquire)

   476

			return 0;

   477

   478

		ret_val = hw->phy.ops.acquire(hw);

   479

		if (ret_val)

   480

			return ret_val;

   481

	}

   482

   483

	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &

   484

		       E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;

   485

	ew32(KMRNCTRLSTA, kmrnctrlsta);

   486

	e1e_flush();

   487

   488

	udelay(2);

   489

   490

	kmrnctrlsta = er32(KMRNCTRLSTA);

   491

	*data = (u16)kmrnctrlsta;

   492

   493

	if (!locked)

   494

		hw->phy.ops.release(hw);

   495

   496

	return 0;

   497

}

   498

   499

/**

   500

 *  e1000e_read_kmrn_reg -  Read kumeran register

   501

 *  @hw: pointer to the HW structure

   502

 *  @offset: register offset to be read

   503

 *  @data: pointer to the read data

   504

 *

   505

 *  Acquires semaphore then reads the PHY register at offset using the

   506

 *  kumeran interface.  The information retrieved is stored in data.

   507

 *  Release the acquired semaphore before exiting.

   508

 **/

   509

s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)

   510

{

   511

	return __e1000_read_kmrn_reg(hw, offset, data, false);

   512

}

   513

   514

/**

   515

 *  e1000e_read_kmrn_reg_locked -  Read kumeran register

   516

 *  @hw: pointer to the HW structure

   517

 *  @offset: register offset to be read

   518

 *  @data: pointer to the read data

   519

 *

   520

 *  Reads the PHY register at offset using the kumeran interface.  The

   521

 *  information retrieved is stored in data.

   522

 *  Assumes semaphore already acquired.

   523

 **/

   524

s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)

   525

{

   526

	return __e1000_read_kmrn_reg(hw, offset, data, true);

   527

}

   528

   529

/**

   530

 *  __e1000_write_kmrn_reg - Write kumeran register