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/*******************************************************************************

     2

     3

  Intel PRO/1000 Linux driver

     4

  Copyright(c) 1999 - 2013 Intel Corporation.

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  This program is free software; you can redistribute it and/or modify it

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  under the terms and conditions of the GNU General Public License,

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  version 2, as published by the Free Software Foundation.

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    10

  This program is distributed in the hope it will be useful, but WITHOUT

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  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

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  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

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  more details.

    14

    15

  You should have received a copy of the GNU General Public License along with

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  this program; if not, write to the Free Software Foundation, Inc.,

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  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

    18

    19

  The full GNU General Public License is included in this distribution in

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  the file called "COPYING".

    21

    22

  Contact Information:

    23

  Linux NICS <linux.nics@intel.com>

    24

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    25

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

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    27

*******************************************************************************/

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#include "e1000-3.12-ethercat.h"

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    31

static s32 e1000_wait_autoneg(struct e1000_hw *hw);

    32

static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,

    33

					  u16 *data, bool read, bool page_set);

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static u32 e1000_get_phy_addr_for_hv_page(u32 page);

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static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

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					  u16 *data, bool read);

    37

    38

/* Cable length tables */

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static const u16 e1000_m88_cable_length_table[] = {

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	0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED

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};

    42

    43

#define M88E1000_CABLE_LENGTH_TABLE_SIZE \

    44

		ARRAY_SIZE(e1000_m88_cable_length_table)

    45

    46

static const u16 e1000_igp_2_cable_length_table[] = {

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	0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21, 0, 0, 0, 3,

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	6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41, 6, 10, 14, 18, 22,

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	26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61, 21, 26, 31, 35, 40,

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	44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82, 40, 45, 51, 56, 61,

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	66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104, 60, 66, 72, 77, 82,

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	87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121, 83, 89, 95,

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	100, 105, 109, 113, 116, 119, 122, 124, 104, 109, 114, 118, 121,

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	124

    55

};

    56

    57

#define IGP02E1000_CABLE_LENGTH_TABLE_SIZE \

    58

		ARRAY_SIZE(e1000_igp_2_cable_length_table)

    59

    60

/**

    61

 *  e1000e_check_reset_block_generic - Check if PHY reset is blocked

    62

 *  @hw: pointer to the HW structure

    63

 *

    64

 *  Read the PHY management control register and check whether a PHY reset

    65

 *  is blocked.  If a reset is not blocked return 0, otherwise

    66

 *  return E1000_BLK_PHY_RESET (12).

    67

 **/

    68

s32 e1000e_check_reset_block_generic(struct e1000_hw *hw)

    69

{

    70

	u32 manc;

    71

    72

	manc = er32(MANC);

    73

    74

	return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ? E1000_BLK_PHY_RESET : 0;

    75

}

    76

    77

/**

    78

 *  e1000e_get_phy_id - Retrieve the PHY ID and revision

    79

 *  @hw: pointer to the HW structure

    80

 *

    81

 *  Reads the PHY registers and stores the PHY ID and possibly the PHY

    82

 *  revision in the hardware structure.

    83

 **/

    84

s32 e1000e_get_phy_id(struct e1000_hw *hw)

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{

    86

	struct e1000_phy_info *phy = &hw->phy;

    87

	s32 ret_val = 0;

    88

	u16 phy_id;

    89

	u16 retry_count = 0;

    90

    91

	if (!phy->ops.read_reg)

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		return 0;

    93

    94

	while (retry_count < 2) {

    95

		ret_val = e1e_rphy(hw, MII_PHYSID1, &phy_id);

    96

		if (ret_val)

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			return ret_val;

    98

    99

		phy->id = (u32)(phy_id << 16);

   100

		usleep_range(20, 40);

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		ret_val = e1e_rphy(hw, MII_PHYSID2, &phy_id);

   102

		if (ret_val)

   103

			return ret_val;

   104

   105

		phy->id |= (u32)(phy_id & PHY_REVISION_MASK);

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		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

   107

   108

		if (phy->id != 0 && phy->id != PHY_REVISION_MASK)

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			return 0;

   110

   111

		retry_count++;

   112

	}

   113

   114

	return 0;

   115

}

   116

   117

/**

   118

 *  e1000e_phy_reset_dsp - Reset PHY DSP

   119

 *  @hw: pointer to the HW structure

   120

 *

   121

 *  Reset the digital signal processor.

   122

 **/

   123

s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)

   124

{

   125

	s32 ret_val;

   126

   127

	ret_val = e1e_wphy(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);

   128

	if (ret_val)

   129

		return ret_val;

   130

   131

	return e1e_wphy(hw, M88E1000_PHY_GEN_CONTROL, 0);

   132

}

   133

   134

/**

   135

 *  e1000e_read_phy_reg_mdic - Read MDI control register

   136

 *  @hw: pointer to the HW structure

   137

 *  @offset: register offset to be read

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 *  @data: pointer to the read data

   139

 *

   140

 *  Reads the MDI control register in the PHY at offset and stores the

   141

 *  information read to data.

   142

 **/

   143

s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)

   144

{

   145

	struct e1000_phy_info *phy = &hw->phy;

   146

	u32 i, mdic = 0;

   147

   148

	if (offset > MAX_PHY_REG_ADDRESS) {

   149

		e_dbg("PHY Address %d is out of range\n", offset);

   150

		return -E1000_ERR_PARAM;

   151

	}

   152

   153

	/* Set up Op-code, Phy Address, and register offset in the MDI

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	 * Control register.  The MAC will take care of interfacing with the

   155

	 * PHY to retrieve the desired data.

   156

	 */

   157

	mdic = ((offset << E1000_MDIC_REG_SHIFT) |

   158

		(phy->addr << E1000_MDIC_PHY_SHIFT) |

   159

		(E1000_MDIC_OP_READ));

   160

   161

	ew32(MDIC, mdic);

   162

   163

	/* Poll the ready bit to see if the MDI read completed

   164

	 * Increasing the time out as testing showed failures with

   165

	 * the lower time out

   166

	 */

   167

	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {

   168

		udelay(50);

   169

		mdic = er32(MDIC);

   170

		if (mdic & E1000_MDIC_READY)

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			break;

   172

	}

   173

	if (!(mdic & E1000_MDIC_READY)) {

   174

		e_dbg("MDI Read did not complete\n");

   175

		return -E1000_ERR_PHY;

   176

	}

   177

	if (mdic & E1000_MDIC_ERROR) {

   178

		e_dbg("MDI Error\n");

   179

		return -E1000_ERR_PHY;

   180

	}

   181

	if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {

   182

		e_dbg("MDI Read offset error - requested %d, returned %d\n",

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		      offset,

   184

		      (mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT);

   185

		return -E1000_ERR_PHY;

   186

	}

   187

	*data = (u16)mdic;

   188

   189

	/* Allow some time after each MDIC transaction to avoid

   190

	 * reading duplicate data in the next MDIC transaction.

   191

	 */

   192

	if (hw->mac.type == e1000_pch2lan)

   193

		udelay(100);

   194

   195

	return 0;

   196

}

   197

   198

/**

   199

 *  e1000e_write_phy_reg_mdic - Write MDI control register

   200

 *  @hw: pointer to the HW structure

   201

 *  @offset: register offset to write to

   202

 *  @data: data to write to register at offset

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 *

   204

 *  Writes data to MDI control register in the PHY at offset.

   205

 **/

   206

s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)

   207

{

   208

	struct e1000_phy_info *phy = &hw->phy;

   209

	u32 i, mdic = 0;

   210

   211

	if (offset > MAX_PHY_REG_ADDRESS) {

   212

		e_dbg("PHY Address %d is out of range\n", offset);

   213

		return -E1000_ERR_PARAM;

   214

	}

   215

   216

	/* Set up Op-code, Phy Address, and register offset in the MDI

   217

	 * Control register.  The MAC will take care of interfacing with the

   218

	 * PHY to retrieve the desired data.

   219

	 */

   220

	mdic = (((u32)data) |

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		(offset << E1000_MDIC_REG_SHIFT) |

   222

		(phy->addr << E1000_MDIC_PHY_SHIFT) |

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		(E1000_MDIC_OP_WRITE));

   224

   225

	ew32(MDIC, mdic);

   226

   227

	/* Poll the ready bit to see if the MDI read completed

   228

	 * Increasing the time out as testing showed failures with

   229

	 * the lower time out

   230

	 */

   231

	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {

   232

		udelay(50);

   233

		mdic = er32(MDIC);

   234

		if (mdic & E1000_MDIC_READY)

   235

			break;

   236

	}

   237

	if (!(mdic & E1000_MDIC_READY)) {

   238

		e_dbg("MDI Write did not complete\n");

   239

		return -E1000_ERR_PHY;

   240

	}

   241

	if (mdic & E1000_MDIC_ERROR) {

   242

		e_dbg("MDI Error\n");

   243

		return -E1000_ERR_PHY;

   244

	}

   245

	if (((mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT) != offset) {

   246

		e_dbg("MDI Write offset error - requested %d, returned %d\n",

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		      offset,

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		      (mdic & E1000_MDIC_REG_MASK) >> E1000_MDIC_REG_SHIFT);

   249

		return -E1000_ERR_PHY;

   250

	}

   251

   252

	/* Allow some time after each MDIC transaction to avoid

   253

	 * reading duplicate data in the next MDIC transaction.

   254

	 */

   255

	if (hw->mac.type == e1000_pch2lan)

   256

		udelay(100);

   257

   258

	return 0;

   259

}

   260

   261

/**

   262

 *  e1000e_read_phy_reg_m88 - Read m88 PHY register

   263

 *  @hw: pointer to the HW structure

   264

 *  @offset: register offset to be read

   265

 *  @data: pointer to the read data

   266

 *

   267

 *  Acquires semaphore, if necessary, then reads the PHY register at offset

   268

 *  and storing the retrieved information in data.  Release any acquired

   269

 *  semaphores before exiting.

   270

 **/

   271

s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)

   272

{

   273

	s32 ret_val;

   274

   275

	ret_val = hw->phy.ops.acquire(hw);

   276

	if (ret_val)

   277

		return ret_val;

   278

   279

	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

   280

					   data);

   281

   282

	hw->phy.ops.release(hw);

   283

   284

	return ret_val;

   285

}

   286

   287

/**

   288

 *  e1000e_write_phy_reg_m88 - Write m88 PHY register

   289

 *  @hw: pointer to the HW structure

   290

 *  @offset: register offset to write to

   291

 *  @data: data to write at register offset

   292

 *

   293

 *  Acquires semaphore, if necessary, then writes the data to PHY register

   294

 *  at the offset.  Release any acquired semaphores before exiting.

   295

 **/

   296

s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)

   297

{

   298

	s32 ret_val;

   299

   300

	ret_val = hw->phy.ops.acquire(hw);

   301

	if (ret_val)

   302

		return ret_val;

   303

   304

	ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

   305

					    data);

   306

   307

	hw->phy.ops.release(hw);

   308

   309

	return ret_val;

   310

}

   311

   312

/**

   313

 *  e1000_set_page_igp - Set page as on IGP-like PHY(s)

   314

 *  @hw: pointer to the HW structure

   315

 *  @page: page to set (shifted left when necessary)

   316

 *

   317

 *  Sets PHY page required for PHY register access.  Assumes semaphore is

   318

 *  already acquired.  Note, this function sets phy.addr to 1 so the caller

   319

 *  must set it appropriately (if necessary) after this function returns.

   320

 **/

   321

s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page)

   322

{

   323

	e_dbg("Setting page 0x%x\n", page);

   324

   325

	hw->phy.addr = 1;

   326

   327

	return e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, page);

   328

}

   329

   330

/**

   331

 *  __e1000e_read_phy_reg_igp - Read igp PHY register

   332

 *  @hw: pointer to the HW structure

   333

 *  @offset: register offset to be read

   334

 *  @data: pointer to the read data

   335

 *  @locked: semaphore has already been acquired or not

   336

 *

   337

 *  Acquires semaphore, if necessary, then reads the PHY register at offset

   338

 *  and stores the retrieved information in data.  Release any acquired

   339

 *  semaphores before exiting.

   340

 **/

   341

static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,

   342

				     bool locked)

   343

{

   344

	s32 ret_val = 0;

   345

   346

	if (!locked) {

   347

		if (!hw->phy.ops.acquire)

   348

			return 0;

   349

   350

		ret_val = hw->phy.ops.acquire(hw);

   351

		if (ret_val)

   352

			return ret_val;

   353

	}

   354

   355

	if (offset > MAX_PHY_MULTI_PAGE_REG)

   356

		ret_val = e1000e_write_phy_reg_mdic(hw,

   357

						    IGP01E1000_PHY_PAGE_SELECT,

   358

						    (u16)offset);

   359

	if (!ret_val)

   360

		ret_val = e1000e_read_phy_reg_mdic(hw,

   361

						   MAX_PHY_REG_ADDRESS & offset,

   362

						   data);

   363

	if (!locked)

   364

		hw->phy.ops.release(hw);

   365

   366

	return ret_val;

   367

}

   368

   369

/**

   370

 *  e1000e_read_phy_reg_igp - Read igp PHY register

   371

 *  @hw: pointer to the HW structure

   372

 *  @offset: register offset to be read

   373

 *  @data: pointer to the read data

   374

 *

   375

 *  Acquires semaphore then reads the PHY register at offset and stores the

   376

 *  retrieved information in data.

   377

 *  Release the acquired semaphore before exiting.

   378

 **/

   379

s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)

   380

{

   381

	return __e1000e_read_phy_reg_igp(hw, offset, data, false);

   382

}

   383

   384

/**

   385

 *  e1000e_read_phy_reg_igp_locked - Read igp PHY register

   386

 *  @hw: pointer to the HW structure

   387

 *  @offset: register offset to be read

   388

 *  @data: pointer to the read data

   389

 *

   390

 *  Reads the PHY register at offset and stores the retrieved information

   391

 *  in data.  Assumes semaphore already acquired.

   392

 **/

   393

s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)

   394

{

   395

	return __e1000e_read_phy_reg_igp(hw, offset, data, true);

   396

}

   397

   398

/**

   399

 *  e1000e_write_phy_reg_igp - Write igp PHY register

   400

 *  @hw: pointer to the HW structure

   401

 *  @offset: register offset to write to

   402

 *  @data: data to write at register offset

   403

 *  @locked: semaphore has already been acquired or not

   404

 *

   405

 *  Acquires semaphore, if necessary, then writes the data to PHY register

   406

 *  at the offset.  Release any acquired semaphores before exiting.

   407

 **/

   408

static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,

   409

				      bool locked)

   410

{

   411

	s32 ret_val = 0;

   412

   413

	if (!locked) {

   414

		if (!hw->phy.ops.acquire)

   415

			return 0;

   416

   417

		ret_val = hw->phy.ops.acquire(hw);

   418

		if (ret_val)

   419

			return ret_val;

   420

	}

   421

   422

	if (offset > MAX_PHY_MULTI_PAGE_REG)

   423

		ret_val = e1000e_write_phy_reg_mdic(hw,

   424

						    IGP01E1000_PHY_PAGE_SELECT,

   425

						    (u16)offset);

   426

	if (!ret_val)

   427

		ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS &

   428

						    offset, data);

   429

	if (!locked)

   430

		hw->phy.ops.release(hw);

   431

   432

	return ret_val;

   433

}

   434

   435

/**

   436

 *  e1000e_write_phy_reg_igp - Write igp PHY register

   437

 *  @hw: pointer to the HW structure

   438

 *  @offset: register offset to write to

   439

 *  @data: data to write at register offset

   440

 *

   441

 *  Acquires semaphore then writes the data to PHY register

   442

 *  at the offset.  Release any acquired semaphores before exiting.

   443

 **/

   444

s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)

   445

{

   446

	return __e1000e_write_phy_reg_igp(hw, offset, data, false);

   447

}

   448

   449

/**

   450

 *  e1000e_write_phy_reg_igp_locked - Write igp PHY register

   451

 *  @hw: pointer to the HW structure

   452

 *  @offset: register offset to write to

   453

 *  @data: data to write at register offset

   454

 *

   455

 *  Writes the data to PHY register at the offset.

   456

 *  Assumes semaphore already acquired.

   457

 **/

   458

s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)

   459

{

   460

	return __e1000e_write_phy_reg_igp(hw, offset, data, true);

   461

}

   462

   463

/**

   464

 *  __e1000_read_kmrn_reg - Read kumeran register

   465

 *  @hw: pointer to the HW structure

   466

 *  @offset: register offset to be read

   467

 *  @data: pointer to the read data

   468

 *  @locked: semaphore has already been acquired or not

   469

 *

   470

 *  Acquires semaphore, if necessary.  Then reads the PHY register at offset

   471

 *  using the kumeran interface.  The information retrieved is stored in data.

   472

 *  Release any acquired semaphores before exiting.

   473

 **/

   474

static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,

   475

				 bool locked)

   476

{

   477

	u32 kmrnctrlsta;

   478

   479

	if (!locked) {

   480

		s32 ret_val = 0;

   481

   482

		if (!hw->phy.ops.acquire)

   483

			return 0;

   484

   485

		ret_val = hw->phy.ops.acquire(hw);

   486

		if (ret_val)

   487

			return ret_val;

   488

	}

   489

   490

	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &

   491

		       E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;

   492

	ew32(KMRNCTRLSTA, kmrnctrlsta);

   493

	e1e_flush();

   494

   495

	udelay(2);

   496

   497

	kmrnctrlsta = er32(KMRNCTRLSTA);

   498

	*data = (u16)kmrnctrlsta;

   499

   500

	if (!locked)

   501

		hw->phy.ops.release(hw);

   502

   503

	return 0;

   504

}

   505

   506

/**

   507

 *  e1000e_read_kmrn_reg -  Read kumeran register

   508

 *  @hw: pointer to the HW structure

   509

 *  @offset: register offset to be read

   510

 *  @data: pointer to the read data

   511

 *

   512

 *  Acquires semaphore then reads the PHY register at offset using the

   513

 *  kumeran interface.  The information retrieved is stored in data.

   514

 *  Release the acquired semaphore before exiting.

   515

 **/

   516

s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)

   517

{

   518

	return __e1000_read_kmrn_reg(hw, offset, data, false);

   519

}

   520

   521

/**

   522

 *  e1000e_read_kmrn_reg_locked -  Read kumeran register

   523

 *  @hw: pointer to the HW structure

   524

 *  @offset: register offset to be read

   525

 *  @data: pointer to the read data

   526

 *

   527

 *  Reads the PHY register at offset using the kumeran interface.  The

   528

 *  information retrieved is stored in data.

   529

 *  Assumes semaphore already acquired.

   530

 **/