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/* Intel PRO/1000 Linux driver

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 * Copyright(c) 1999 - 2014 Intel Corporation.

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 *

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 * This program is free software; you can redistribute it and/or modify it

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 * under the terms and conditions of the GNU General Public License,

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 * version 2, as published by the Free Software Foundation.

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 *

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 * This program is distributed in the hope it will be useful, but WITHOUT

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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

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 * more details.

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 *

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 * The full GNU General Public License is included in this distribution in

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 * the file called "COPYING".

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 *

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 * Contact Information:

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 * Linux NICS <linux.nics@intel.com>

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 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

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 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

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 */

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#ifndef _E1000E_MANAGE_H_

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#define _E1000E_MANAGE_H_

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bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);

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bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);

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s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);

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bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);

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enum e1000_mng_mode {

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	e1000_mng_mode_none = 0,

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	e1000_mng_mode_asf,

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	e1000_mng_mode_pt,

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	e1000_mng_mode_ipmi,

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	e1000_mng_mode_host_if_only

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};

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#define E1000_FACTPS_MNGCG			0x20000000

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#define E1000_FWSM_MODE_MASK			0xE

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#define E1000_FWSM_MODE_SHIFT			1

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#define E1000_MNG_IAMT_MODE			0x3

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#define E1000_MNG_DHCP_COOKIE_LENGTH		0x10

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#define E1000_MNG_DHCP_COOKIE_OFFSET		0x6F0

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#define E1000_MNG_DHCP_COMMAND_TIMEOUT		10

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#define E1000_MNG_DHCP_TX_PAYLOAD_CMD		64

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#define E1000_MNG_DHCP_COOKIE_STATUS_PARSING	0x1

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#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN	0x2

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#define E1000_VFTA_ENTRY_SHIFT			5

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#define E1000_VFTA_ENTRY_MASK			0x7F

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#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK		0x1F

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#define E1000_HICR_EN			0x01	/* Enable bit - RO */

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/* Driver sets this bit when done to put command in RAM */

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#define E1000_HICR_C			0x02

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#define E1000_HICR_SV			0x04	/* Status Validity */

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#define E1000_HICR_FW_RESET_ENABLE	0x40

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#define E1000_HICR_FW_RESET		0x80

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/* Intel(R) Active Management Technology signature */

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#define E1000_IAMT_SIGNATURE		0x544D4149

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#endif