1

/*******************************************************************************

     2

     3

  Intel PRO/1000 Linux driver

     4

  Copyright(c) 1999 - 2012 Intel Corporation.

     5

     6

  This program is free software; you can redistribute it and/or modify it

     7

  under the terms and conditions of the GNU General Public License,

     8

  version 2, as published by the Free Software Foundation.

     9

    10

  This program is distributed in the hope it will be useful, but WITHOUT

    11

  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    12

  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

    13

  more details.

    14

    15

  You should have received a copy of the GNU General Public License along with

    16

  this program; if not, write to the Free Software Foundation, Inc.,

    17

  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

    18

    19

  The full GNU General Public License is included in this distribution in

    20

  the file called "COPYING".

    21

    22

  Contact Information:

    23

  Linux NICS <linux.nics@intel.com>

    24

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    25

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

    26

    27

*******************************************************************************/

    28

    29

/* 82571EB Gigabit Ethernet Controller

    30

 * 82571EB Gigabit Ethernet Controller (Copper)

    31

 * 82571EB Gigabit Ethernet Controller (Fiber)

    32

 * 82571EB Dual Port Gigabit Mezzanine Adapter

    33

 * 82571EB Quad Port Gigabit Mezzanine Adapter

    34

 * 82571PT Gigabit PT Quad Port Server ExpressModule

    35

 * 82572EI Gigabit Ethernet Controller (Copper)

    36

 * 82572EI Gigabit Ethernet Controller (Fiber)

    37

 * 82572EI Gigabit Ethernet Controller

    38

 * 82573V Gigabit Ethernet Controller (Copper)

    39

 * 82573E Gigabit Ethernet Controller (Copper)

    40

 * 82573L Gigabit Ethernet Controller

    41

 * 82574L Gigabit Network Connection

    42

 * 82583V Gigabit Network Connection

    43

 */

    44

    45

#include "e1000.h"

    46

    47

#define ID_LED_RESERVED_F746 0xF746

    48

#define ID_LED_DEFAULT_82573 ((ID_LED_DEF1_DEF2 << 12) | \

    49

			      (ID_LED_OFF1_ON2  <<  8) | \

    50

			      (ID_LED_DEF1_DEF2 <<  4) | \

    51

			      (ID_LED_DEF1_DEF2))

    52

    53

#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000

    54

#define AN_RETRY_COUNT          5 /* Autoneg Retry Count value */

    55

#define E1000_BASE1000T_STATUS          10

    56

#define E1000_IDLE_ERROR_COUNT_MASK     0xFF

    57

#define E1000_RECEIVE_ERROR_COUNTER     21

    58

#define E1000_RECEIVE_ERROR_MAX         0xFFFF

    59

    60

#define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */

    61

    62

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);

    63

static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);

    64

static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);

    65

static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);

    66

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

    67

				      u16 words, u16 *data);

    68

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);

    69

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);

    70

static s32 e1000_setup_link_82571(struct e1000_hw *hw);

    71

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);

    72

static void e1000_clear_vfta_82571(struct e1000_hw *hw);

    73

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);

    74

static s32 e1000_led_on_82574(struct e1000_hw *hw);

    75

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);

    76

static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);

    77

static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw);

    78

static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);

    79

static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);

    80

static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active);

    81

static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active);

    82

    83

/**

    84

 *  e1000_init_phy_params_82571 - Init PHY func ptrs.

    85

 *  @hw: pointer to the HW structure

    86

 **/

    87

static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)

    88

{

    89

	struct e1000_phy_info *phy = &hw->phy;

    90

	s32 ret_val;

    91

    92

	if (hw->phy.media_type != e1000_media_type_copper) {

    93

		phy->type = e1000_phy_none;

    94

		return 0;

    95

	}

    96

    97

	phy->addr			 = 1;

    98

	phy->autoneg_mask		 = AUTONEG_ADVERTISE_SPEED_DEFAULT;

    99

	phy->reset_delay_us		 = 100;

   100

   101

	phy->ops.power_up		 = e1000_power_up_phy_copper;

   102

	phy->ops.power_down		 = e1000_power_down_phy_copper_82571;

   103

   104

	switch (hw->mac.type) {

   105

	case e1000_82571:

   106

	case e1000_82572:

   107

		phy->type		 = e1000_phy_igp_2;

   108

		break;

   109

	case e1000_82573:

   110

		phy->type		 = e1000_phy_m88;

   111

		break;

   112

	case e1000_82574:

   113

	case e1000_82583:

   114

		phy->type		 = e1000_phy_bm;

   115

		phy->ops.acquire = e1000_get_hw_semaphore_82574;

   116

		phy->ops.release = e1000_put_hw_semaphore_82574;

   117

		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82574;

   118

		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82574;

   119

		break;

   120

	default:

   121

		return -E1000_ERR_PHY;

   122

		break;

   123

	}

   124

   125

	/* This can only be done after all function pointers are setup. */

   126

	ret_val = e1000_get_phy_id_82571(hw);

   127

	if (ret_val) {

   128

		e_dbg("Error getting PHY ID\n");

   129

		return ret_val;

   130

	}

   131

   132

	/* Verify phy id */

   133

	switch (hw->mac.type) {

   134

	case e1000_82571:

   135

	case e1000_82572:

   136

		if (phy->id != IGP01E1000_I_PHY_ID)

   137

			ret_val = -E1000_ERR_PHY;

   138

		break;

   139

	case e1000_82573:

   140

		if (phy->id != M88E1111_I_PHY_ID)

   141

			ret_val = -E1000_ERR_PHY;

   142

		break;

   143

	case e1000_82574:

   144

	case e1000_82583:

   145

		if (phy->id != BME1000_E_PHY_ID_R2)

   146

			ret_val = -E1000_ERR_PHY;

   147

		break;

   148

	default:

   149

		ret_val = -E1000_ERR_PHY;

   150

		break;

   151

	}

   152

   153

	if (ret_val)

   154

		e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);

   155

   156

	return ret_val;

   157

}

   158

   159

/**

   160

 *  e1000_init_nvm_params_82571 - Init NVM func ptrs.

   161

 *  @hw: pointer to the HW structure

   162

 **/

   163

static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)

   164

{

   165

	struct e1000_nvm_info *nvm = &hw->nvm;

   166

	u32 eecd = er32(EECD);

   167

	u16 size;

   168

   169

	nvm->opcode_bits = 8;

   170

	nvm->delay_usec = 1;

   171

	switch (nvm->override) {

   172

	case e1000_nvm_override_spi_large:

   173

		nvm->page_size = 32;

   174

		nvm->address_bits = 16;

   175

		break;

   176

	case e1000_nvm_override_spi_small:

   177

		nvm->page_size = 8;

   178

		nvm->address_bits = 8;

   179

		break;

   180

	default:

   181

		nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;

   182

		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;

   183

		break;

   184

	}

   185

   186

	switch (hw->mac.type) {

   187

	case e1000_82573:

   188

	case e1000_82574:

   189

	case e1000_82583:

   190

		if (((eecd >> 15) & 0x3) == 0x3) {

   191

			nvm->type = e1000_nvm_flash_hw;

   192

			nvm->word_size = 2048;

   193

			/* Autonomous Flash update bit must be cleared due

   194

			 * to Flash update issue.

   195

			 */

   196

			eecd &= ~E1000_EECD_AUPDEN;

   197

			ew32(EECD, eecd);

   198

			break;

   199

		}

   200

		/* Fall Through */

   201

	default:

   202

		nvm->type = e1000_nvm_eeprom_spi;

   203

		size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>

   204

				  E1000_EECD_SIZE_EX_SHIFT);

   205

		/* Added to a constant, "size" becomes the left-shift value

   206

		 * for setting word_size.

   207

		 */

   208

		size += NVM_WORD_SIZE_BASE_SHIFT;

   209

   210

		/* EEPROM access above 16k is unsupported */

   211

		if (size > 14)

   212

			size = 14;

   213

		nvm->word_size	= 1 << size;

   214

		break;

   215

	}

   216

   217

	/* Function Pointers */

   218

	switch (hw->mac.type) {

   219

	case e1000_82574:

   220

	case e1000_82583:

   221

		nvm->ops.acquire = e1000_get_hw_semaphore_82574;

   222

		nvm->ops.release = e1000_put_hw_semaphore_82574;

   223

		break;

   224

	default:

   225

		break;

   226

	}

   227

   228

	return 0;

   229

}

   230

   231

/**

   232

 *  e1000_init_mac_params_82571 - Init MAC func ptrs.

   233

 *  @hw: pointer to the HW structure

   234

 **/

   235

static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)

   236

{

   237

	struct e1000_mac_info *mac = &hw->mac;

   238

	u32 swsm = 0;

   239

	u32 swsm2 = 0;

   240

	bool force_clear_smbi = false;

   241

   242

	/* Set media type and media-dependent function pointers */

   243

	switch (hw->adapter->pdev->device) {

   244

	case E1000_DEV_ID_82571EB_FIBER:

   245

	case E1000_DEV_ID_82572EI_FIBER:

   246

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   247

		hw->phy.media_type = e1000_media_type_fiber;

   248

		mac->ops.setup_physical_interface =

   249

		    e1000_setup_fiber_serdes_link_82571;

   250

		mac->ops.check_for_link = e1000e_check_for_fiber_link;

   251

		mac->ops.get_link_up_info =

   252

		    e1000e_get_speed_and_duplex_fiber_serdes;

   253

		break;

   254

	case E1000_DEV_ID_82571EB_SERDES:

   255

	case E1000_DEV_ID_82571EB_SERDES_DUAL:

   256

	case E1000_DEV_ID_82571EB_SERDES_QUAD:

   257

	case E1000_DEV_ID_82572EI_SERDES:

   258

		hw->phy.media_type = e1000_media_type_internal_serdes;

   259

		mac->ops.setup_physical_interface =

   260

		    e1000_setup_fiber_serdes_link_82571;

   261

		mac->ops.check_for_link = e1000_check_for_serdes_link_82571;

   262

		mac->ops.get_link_up_info =

   263

		    e1000e_get_speed_and_duplex_fiber_serdes;

   264

		break;

   265

	default:

   266

		hw->phy.media_type = e1000_media_type_copper;

   267

		mac->ops.setup_physical_interface =

   268

		    e1000_setup_copper_link_82571;

   269

		mac->ops.check_for_link = e1000e_check_for_copper_link;

   270

		mac->ops.get_link_up_info = e1000e_get_speed_and_duplex_copper;

   271

		break;

   272

	}

   273

   274

	/* Set mta register count */

   275

	mac->mta_reg_count = 128;

   276

	/* Set rar entry count */

   277

	mac->rar_entry_count = E1000_RAR_ENTRIES;

   278

	/* Adaptive IFS supported */

   279

	mac->adaptive_ifs = true;

   280

   281

	/* MAC-specific function pointers */

   282

	switch (hw->mac.type) {

   283

	case e1000_82573:

   284

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   285

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   286

		mac->ops.led_on = e1000e_led_on_generic;

   287

		mac->ops.blink_led = e1000e_blink_led_generic;

   288

   289

		/* FWSM register */

   290

		mac->has_fwsm = true;

   291

		/* ARC supported; valid only if manageability features are

   292

		 * enabled.

   293

		 */

   294

		mac->arc_subsystem_valid = !!(er32(FWSM) &

   295

					      E1000_FWSM_MODE_MASK);

   296

		break;

   297

	case e1000_82574:

   298

	case e1000_82583:

   299

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   300

		mac->ops.check_mng_mode = e1000_check_mng_mode_82574;

   301

		mac->ops.led_on = e1000_led_on_82574;

   302

		break;

   303

	default:

   304

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   305

		mac->ops.led_on = e1000e_led_on_generic;

   306

		mac->ops.blink_led = e1000e_blink_led_generic;

   307

   308

		/* FWSM register */

   309

		mac->has_fwsm = true;

   310

		break;

   311

	}

   312

   313

	/* Ensure that the inter-port SWSM.SMBI lock bit is clear before

   314

	 * first NVM or PHY access. This should be done for single-port

   315

	 * devices, and for one port only on dual-port devices so that

   316

	 * for those devices we can still use the SMBI lock to synchronize

   317

	 * inter-port accesses to the PHY & NVM.

   318

	 */

   319

	switch (hw->mac.type) {

   320

	case e1000_82571:

   321

	case e1000_82572:

   322

		swsm2 = er32(SWSM2);

   323

   324

		if (!(swsm2 & E1000_SWSM2_LOCK)) {

   325

			/* Only do this for the first interface on this card */

   326

			ew32(SWSM2, swsm2 | E1000_SWSM2_LOCK);

   327

			force_clear_smbi = true;

   328

		} else {

   329

			force_clear_smbi = false;

   330

		}

   331

		break;

   332

	default:

   333

		force_clear_smbi = true;

   334

		break;

   335

	}

   336

   337

	if (force_clear_smbi) {

   338

		/* Make sure SWSM.SMBI is clear */

   339

		swsm = er32(SWSM);

   340

		if (swsm & E1000_SWSM_SMBI) {

   341

			/* This bit should not be set on a first interface, and

   342

			 * indicates that the bootagent or EFI code has

   343

			 * improperly left this bit enabled

   344

			 */

   345

			e_dbg("Please update your 82571 Bootagent\n");

   346

		}

   347

		ew32(SWSM, swsm & ~E1000_SWSM_SMBI);

   348

	}

   349

   350

	/* Initialize device specific counter of SMBI acquisition timeouts. */

   351

	hw->dev_spec.e82571.smb_counter = 0;

   352

   353

	return 0;

   354

}

   355

   356

static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)

   357

{

   358

	struct e1000_hw *hw = &adapter->hw;

   359

	static int global_quad_port_a; /* global port a indication */

   360

	struct pci_dev *pdev = adapter->pdev;

   361

	int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;

   362

	s32 rc;

   363

   364

	rc = e1000_init_mac_params_82571(hw);

   365

	if (rc)

   366

		return rc;

   367

   368

	rc = e1000_init_nvm_params_82571(hw);

   369

	if (rc)

   370

		return rc;

   371

   372

	rc = e1000_init_phy_params_82571(hw);

   373

	if (rc)

   374

		return rc;

   375

   376

	/* tag quad port adapters first, it's used below */

   377

	switch (pdev->device) {

   378

	case E1000_DEV_ID_82571EB_QUAD_COPPER:

   379

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   380

	case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:

   381

	case E1000_DEV_ID_82571PT_QUAD_COPPER:

   382

		adapter->flags |= FLAG_IS_QUAD_PORT;

   383

		/* mark the first port */

   384

		if (global_quad_port_a == 0)

   385

			adapter->flags |= FLAG_IS_QUAD_PORT_A;

   386

		/* Reset for multiple quad port adapters */

   387

		global_quad_port_a++;

   388

		if (global_quad_port_a == 4)

   389

			global_quad_port_a = 0;

   390

		break;

   391

	default:

   392

		break;

   393

	}

   394

   395

	switch (adapter->hw.mac.type) {

   396

	case e1000_82571:

   397

		/* these dual ports don't have WoL on port B at all */

   398

		if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||

   399

		     (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||

   400

		     (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&

   401

		    (is_port_b))

   402

			adapter->flags &= ~FLAG_HAS_WOL;

   403

		/* quad ports only support WoL on port A */

   404

		if (adapter->flags & FLAG_IS_QUAD_PORT &&

   405

		    (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))

   406

			adapter->flags &= ~FLAG_HAS_WOL;

   407

		/* Does not support WoL on any port */

   408

		if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)

   409

			adapter->flags &= ~FLAG_HAS_WOL;

   410

		break;

   411

	case e1000_82573:

   412

		if (pdev->device == E1000_DEV_ID_82573L) {

   413

			adapter->flags |= FLAG_HAS_JUMBO_FRAMES;

   414

			adapter->max_hw_frame_size = DEFAULT_JUMBO;

   415

		}

   416

		break;

   417

	default:

   418

		break;

   419

	}

   420

   421

	return 0;

   422

}

   423

   424

/**

   425

 *  e1000_get_phy_id_82571 - Retrieve the PHY ID and revision

   426

 *  @hw: pointer to the HW structure

   427

 *

   428

 *  Reads the PHY registers and stores the PHY ID and possibly the PHY

   429

 *  revision in the hardware structure.

   430

 **/

   431

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)

   432

{

   433

	struct e1000_phy_info *phy = &hw->phy;

   434

	s32 ret_val;

   435

	u16 phy_id = 0;

   436

   437

	switch (hw->mac.type) {

   438

	case e1000_82571:

   439

	case e1000_82572:

   440

		/* The 82571 firmware may still be configuring the PHY.

   441

		 * In this case, we cannot access the PHY until the

   442

		 * configuration is done.  So we explicitly set the

   443

		 * PHY ID.

   444

		 */

   445

		phy->id = IGP01E1000_I_PHY_ID;

   446

		break;

   447

	case e1000_82573:

   448

		return e1000e_get_phy_id(hw);

   449

		break;

   450

	case e1000_82574:

   451

	case e1000_82583:

   452

		ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);

   453

		if (ret_val)

   454

			return ret_val;

   455

   456

		phy->id = (u32)(phy_id << 16);

   457

		udelay(20);

   458

		ret_val = e1e_rphy(hw, PHY_ID2, &phy_id);

   459

		if (ret_val)

   460

			return ret_val;

   461

   462

		phy->id |= (u32)(phy_id);

   463

		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

   464

		break;

   465

	default:

   466

		return -E1000_ERR_PHY;

   467

		break;

   468

	}

   469

   470

	return 0;

   471

}

   472

   473

/**

   474

 *  e1000_get_hw_semaphore_82571 - Acquire hardware semaphore

   475

 *  @hw: pointer to the HW structure

   476

 *

   477

 *  Acquire the HW semaphore to access the PHY or NVM

   478

 **/

   479

static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw)

   480

{

   481

	u32 swsm;

   482

	s32 sw_timeout = hw->nvm.word_size + 1;

   483

	s32 fw_timeout = hw->nvm.word_size + 1;

   484

	s32 i = 0;

   485

   486

	/* If we have timedout 3 times on trying to acquire

   487

	 * the inter-port SMBI semaphore, there is old code

   488

	 * operating on the other port, and it is not

   489

	 * releasing SMBI. Modify the number of times that

   490

	 * we try for the semaphore to interwork with this

   491

	 * older code.

   492

	 */

   493

	if (hw->dev_spec.e82571.smb_counter > 2)

   494

		sw_timeout = 1;

   495

   496

	/* Get the SW semaphore */

   497

	while (i < sw_timeout) {

   498

		swsm = er32(SWSM);

   499

		if (!(swsm & E1000_SWSM_SMBI))

   500

			break;

   501

   502

		udelay(50);

   503

		i++;

   504

	}

   505

   506

	if (i == sw_timeout) {

   507

		e_dbg("Driver can't access device - SMBI bit is set.\n");

   508

		hw->dev_spec.e82571.smb_counter++;

   509

	}

   510

	/* Get the FW semaphore. */

   511

	for (i = 0; i < fw_timeout; i++) {

   512

		swsm = er32(SWSM);

   513

		ew32(SWSM, swsm | E1000_SWSM_SWESMBI);

   514

   515

		/* Semaphore acquired if bit latched */

   516

		if (er32(SWSM) & E1000_SWSM_SWESMBI)

   517

			break;

   518

   519

		udelay(50);

   520

	}

   521

   522

	if (i == fw_timeout) {

   523

		/* Release semaphores */

   524

		e1000_put_hw_semaphore_82571(hw);

   525

		e_dbg("Driver can't access the NVM\n");

   526

		return -E1000_ERR_NVM;

   527

	}

   528

   529

	return 0;

   530