devices/e1000e/manage-3.16-ethercat.c
author Florian Pose <fp@gh.de>
Tue, 03 May 2016 14:18:29 +0200
changeset 2644 0c3987a1b3ee
parent 2589 2b9c78543663
permissions -rw-r--r--
Fixed EoE data debug level 3.
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/* Intel PRO/1000 Linux driver
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 * Copyright(c) 1999 - 2014 Intel Corporation.
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms and conditions of the GNU General Public License,
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 * version 2, as published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * The full GNU General Public License is included in this distribution in
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 * the file called "COPYING".
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 *
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 * Contact Information:
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 * Linux NICS <linux.nics@intel.com>
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 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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 */
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#include "e1000-3.16-ethercat.h"
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/**
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 *  e1000_calculate_checksum - Calculate checksum for buffer
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 *  @buffer: pointer to EEPROM
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 *  @length: size of EEPROM to calculate a checksum for
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 *
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 *  Calculates the checksum for some buffer on a specified length.  The
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 *  checksum calculated is returned.
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 **/
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static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
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{
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	u32 i;
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	u8 sum = 0;
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	if (!buffer)
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		return 0;
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	for (i = 0; i < length; i++)
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		sum += buffer[i];
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	return (u8)(0 - sum);
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}
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/**
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 *  e1000_mng_enable_host_if - Checks host interface is enabled
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 *  @hw: pointer to the HW structure
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 *
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 *  Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
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 *
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 *  This function checks whether the HOST IF is enabled for command operation
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 *  and also checks whether the previous command is completed.  It busy waits
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 *  in case of previous command is not completed.
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 **/
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static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
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{
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	u32 hicr;
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	u8 i;
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	if (!hw->mac.arc_subsystem_valid) {
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		e_dbg("ARC subsystem not valid.\n");
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		return -E1000_ERR_HOST_INTERFACE_COMMAND;
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	}
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	/* Check that the host interface is enabled. */
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	hicr = er32(HICR);
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	if (!(hicr & E1000_HICR_EN)) {
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		e_dbg("E1000_HOST_EN bit disabled.\n");
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		return -E1000_ERR_HOST_INTERFACE_COMMAND;
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	}
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	/* check the previous command is completed */
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	for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
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		hicr = er32(HICR);
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		if (!(hicr & E1000_HICR_C))
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			break;
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		mdelay(1);
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	}
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	if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
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		e_dbg("Previous command timeout failed .\n");
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		return -E1000_ERR_HOST_INTERFACE_COMMAND;
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	}
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	return 0;
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}
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/**
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 *  e1000e_check_mng_mode_generic - Generic check management mode
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 *  @hw: pointer to the HW structure
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 *
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 *  Reads the firmware semaphore register and returns true (>0) if
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 *  manageability is enabled, else false (0).
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 **/
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bool e1000e_check_mng_mode_generic(struct e1000_hw *hw)
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{
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	u32 fwsm = er32(FWSM);
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	return (fwsm & E1000_FWSM_MODE_MASK) ==
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	    (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
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}
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/**
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 *  e1000e_enable_tx_pkt_filtering - Enable packet filtering on Tx
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 *  @hw: pointer to the HW structure
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 *
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 *  Enables packet filtering on transmit packets if manageability is enabled
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 *  and host interface is enabled.
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 **/
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bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
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{
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	struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
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	u32 *buffer = (u32 *)&hw->mng_cookie;
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	u32 offset;
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	s32 ret_val, hdr_csum, csum;
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	u8 i, len;
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	hw->mac.tx_pkt_filtering = true;
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	/* No manageability, no filtering */
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	if (!hw->mac.ops.check_mng_mode(hw)) {
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		hw->mac.tx_pkt_filtering = false;
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		return hw->mac.tx_pkt_filtering;
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	}
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	/* If we can't read from the host interface for whatever
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	 * reason, disable filtering.
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	 */
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	ret_val = e1000_mng_enable_host_if(hw);
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	if (ret_val) {
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		hw->mac.tx_pkt_filtering = false;
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		return hw->mac.tx_pkt_filtering;
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	}
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   134
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   135
	/* Read in the header.  Length and offset are in dwords. */
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   136
	len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
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   137
	offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
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   138
	for (i = 0; i < len; i++)
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   139
		*(buffer + i) = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF,
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   140
						     offset + i);
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   141
	hdr_csum = hdr->checksum;
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   142
	hdr->checksum = 0;
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   143
	csum = e1000_calculate_checksum((u8 *)hdr,
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   144
					E1000_MNG_DHCP_COOKIE_LENGTH);
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   145
	/* If either the checksums or signature don't match, then
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   146
	 * the cookie area isn't considered valid, in which case we
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   147
	 * take the safe route of assuming Tx filtering is enabled.
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   148
	 */
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   149
	if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
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   150
		hw->mac.tx_pkt_filtering = true;
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   151
		return hw->mac.tx_pkt_filtering;
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   152
	}
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   153
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   154
	/* Cookie area is valid, make the final check for filtering. */
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   155
	if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
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   156
		hw->mac.tx_pkt_filtering = false;
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   157
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   158
	return hw->mac.tx_pkt_filtering;
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   159
}
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   160
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   161
/**
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   162
 *  e1000_mng_write_cmd_header - Writes manageability command header
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   163
 *  @hw: pointer to the HW structure
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   164
 *  @hdr: pointer to the host interface command header
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   165
 *
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   166
 *  Writes the command header after does the checksum calculation.
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   167
 **/
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   168
static s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,
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   169
				      struct e1000_host_mng_command_header *hdr)
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   170
{
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   171
	u16 i, length = sizeof(struct e1000_host_mng_command_header);
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   172
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   173
	/* Write the whole command header structure with new checksum. */
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   174
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   175
	hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
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   176
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   177
	length >>= 2;
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   178
	/* Write the relevant command block into the ram area. */
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   179
	for (i = 0; i < length; i++) {
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   180
		E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, i, *((u32 *)hdr + i));
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   181
		e1e_flush();
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   182
	}
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   183
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   184
	return 0;
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   185
}
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   186
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   187
/**
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   188
 *  e1000_mng_host_if_write - Write to the manageability host interface
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   189
 *  @hw: pointer to the HW structure
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   190
 *  @buffer: pointer to the host interface buffer
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   191
 *  @length: size of the buffer
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   192
 *  @offset: location in the buffer to write to
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   193
 *  @sum: sum of the data (not checksum)
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   194
 *
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   195
 *  This function writes the buffer content at the offset given on the host if.
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   196
 *  It also does alignment considerations to do the writes in most efficient
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   197
 *  way.  Also fills up the sum of the buffer in *buffer parameter.
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   198
 **/
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   199
static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer,
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   200
				   u16 length, u16 offset, u8 *sum)
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   201
{
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   202
	u8 *tmp;
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   203
	u8 *bufptr = buffer;
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   204
	u32 data = 0;
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   205
	u16 remaining, i, j, prev_bytes;
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   206
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   207
	/* sum = only sum of the data and it is not checksum */
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   208
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   209
	if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH)
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   210
		return -E1000_ERR_PARAM;
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   211
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   212
	tmp = (u8 *)&data;
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   213
	prev_bytes = offset & 0x3;
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   214
	offset >>= 2;
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diff changeset
   215
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diff changeset
   216
	if (prev_bytes) {
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   217
		data = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, offset);
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   218
		for (j = prev_bytes; j < sizeof(u32); j++) {
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   219
			*(tmp + j) = *bufptr++;
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   220
			*sum += *(tmp + j);
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diff changeset
   221
		}
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   222
		E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset, data);
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diff changeset
   223
		length -= j - prev_bytes;
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   224
		offset++;
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diff changeset
   225
	}
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   226
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   227
	remaining = length & 0x3;
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   228
	length -= remaining;
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   229
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   230
	/* Calculate length in DWORDs */
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diff changeset
   231
	length >>= 2;
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diff changeset
   232
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   233
	/* The device driver writes the relevant command block into the
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diff changeset
   234
	 * ram area.
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diff changeset
   235
	 */
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diff changeset
   236
	for (i = 0; i < length; i++) {
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   237
		for (j = 0; j < sizeof(u32); j++) {
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diff changeset
   238
			*(tmp + j) = *bufptr++;
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diff changeset
   239
			*sum += *(tmp + j);
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   240
		}
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diff changeset
   241
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   242
		E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data);
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diff changeset
   243
	}
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   244
	if (remaining) {
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   245
		for (j = 0; j < sizeof(u32); j++) {
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diff changeset
   246
			if (j < remaining)
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diff changeset
   247
				*(tmp + j) = *bufptr++;
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diff changeset
   248
			else
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diff changeset
   249
				*(tmp + j) = 0;
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   250
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diff changeset
   251
			*sum += *(tmp + j);
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diff changeset
   252
		}
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diff changeset
   253
		E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data);
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diff changeset
   254
	}
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diff changeset
   255
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   256
	return 0;
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diff changeset
   257
}
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diff changeset
   258
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diff changeset
   259
/**
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   260
 *  e1000e_mng_write_dhcp_info - Writes DHCP info to host interface
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diff changeset
   261
 *  @hw: pointer to the HW structure
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   262
 *  @buffer: pointer to the host interface
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diff changeset
   263
 *  @length: size of the buffer
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diff changeset
   264
 *
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   265
 *  Writes the DHCP information to the host interface.
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diff changeset
   266
 **/
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s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length)
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{
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	struct e1000_host_mng_command_header hdr;
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	s32 ret_val;
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	u32 hicr;
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	hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
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	hdr.command_length = length;
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	hdr.reserved1 = 0;
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	hdr.reserved2 = 0;
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	hdr.checksum = 0;
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	/* Enable the host interface */
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	ret_val = e1000_mng_enable_host_if(hw);
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	if (ret_val)
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		return ret_val;
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   283
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	/* Populate the host interface with the contents of "buffer". */
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	ret_val = e1000_mng_host_if_write(hw, buffer, length,
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					  sizeof(hdr), &(hdr.checksum));
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   287
	if (ret_val)
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		return ret_val;
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   289
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	/* Write the manageability command header */
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	ret_val = e1000_mng_write_cmd_header(hw, &hdr);
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	if (ret_val)
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		return ret_val;
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   294
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	/* Tell the ARC a new command is pending. */
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	hicr = er32(HICR);
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	ew32(HICR, hicr | E1000_HICR_C);
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   298
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	return 0;
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}
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   301
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/**
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 *  e1000e_enable_mng_pass_thru - Check if management passthrough is needed
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 *  @hw: pointer to the HW structure
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   305
 *
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 *  Verifies the hardware needs to leave interface enabled so that frames can
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 *  be directed to and from the management interface.
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 **/
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bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw)
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{
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	u32 manc;
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	u32 fwsm, factps;
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   313
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	manc = er32(MANC);
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   315
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	if (!(manc & E1000_MANC_RCV_TCO_EN))
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   317
		return false;
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   318
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   319
	if (hw->mac.has_fwsm) {
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		fwsm = er32(FWSM);
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   321
		factps = er32(FACTPS);
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   322
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   323
		if (!(factps & E1000_FACTPS_MNGCG) &&
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		    ((fwsm & E1000_FWSM_MODE_MASK) ==
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		     (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT)))
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   326
			return true;
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   327
	} else if ((hw->mac.type == e1000_82574) ||
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   328
		   (hw->mac.type == e1000_82583)) {
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   329
		u16 data;
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   330
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   331
		factps = er32(FACTPS);
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   332
		e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
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   333
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   334
		if (!(factps & E1000_FACTPS_MNGCG) &&
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   335
		    ((data & E1000_NVM_INIT_CTRL2_MNGM) ==
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   336
		     (e1000_mng_mode_pt << 13)))
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   337
			return true;
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   338
	} else if ((manc & E1000_MANC_SMBUS_EN) &&
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   339
		   !(manc & E1000_MANC_ASF_EN)) {
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   340
		return true;
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   341
	}
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   342
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   343
	return false;
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   344
}