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/*******************************************************************************

     2

     3

  Intel PRO/1000 Linux driver

     4

  Copyright(c) 1999 - 2006 Intel Corporation.

     5

     6

  This program is free software; you can redistribute it and/or modify it

     7

  under the terms and conditions of the GNU General Public License,

     8

  version 2, as published by the Free Software Foundation.

     9

    10

  This program is distributed in the hope it will be useful, but WITHOUT

    11

  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    12

  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

    13

  more details.

    14

    15

  You should have received a copy of the GNU General Public License along with

    16

  this program; if not, write to the Free Software Foundation, Inc.,

    17

  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

    18

    19

  The full GNU General Public License is included in this distribution in

    20

  the file called "COPYING".

    21

    22

  Contact Information:

    23

  Linux NICS <linux.nics@intel.com>

    24

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    25

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

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    27

*******************************************************************************/

    28

    29

/* e1000_hw.c

    30

 * Shared functions for accessing and configuring the MAC

    31

 */

    32

    33

    34

#include "e1000_hw-2.6.31-ethercat.h"

    35

    36

static s32 e1000_swfw_sync_acquire(struct e1000_hw *hw, u16 mask);

    37

static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask);

    38

static s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 reg_addr, u16 *data);

    39

static s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 reg_addr, u16 data);

    40

static s32 e1000_get_software_semaphore(struct e1000_hw *hw);

    41

static void e1000_release_software_semaphore(struct e1000_hw *hw);

    42

    43

static u8 e1000_arc_subsystem_valid(struct e1000_hw *hw);

    44

static s32 e1000_check_downshift(struct e1000_hw *hw);

    45

static s32 e1000_check_polarity(struct e1000_hw *hw,

    46

				e1000_rev_polarity *polarity);

    47

static void e1000_clear_hw_cntrs(struct e1000_hw *hw);

    48

static void e1000_clear_vfta(struct e1000_hw *hw);

    49

static s32 e1000_commit_shadow_ram(struct e1000_hw *hw);

    50

static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw,

    51

					      bool link_up);

    52

static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw);

    53

static s32 e1000_detect_gig_phy(struct e1000_hw *hw);

    54

static s32 e1000_erase_ich8_4k_segment(struct e1000_hw *hw, u32 bank);

    55

static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);

    56

static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,

    57

				  u16 *max_length);

    58

static s32 e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);

    59

static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);

    60

static s32 e1000_get_software_flag(struct e1000_hw *hw);

    61

static s32 e1000_ich8_cycle_init(struct e1000_hw *hw);

    62

static s32 e1000_ich8_flash_cycle(struct e1000_hw *hw, u32 timeout);

    63

static s32 e1000_id_led_init(struct e1000_hw *hw);

    64

static s32 e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw,

    65

						 u32 cnf_base_addr,

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						 u32 cnf_size);

    67

static s32 e1000_init_lcd_from_nvm(struct e1000_hw *hw);

    68

static void e1000_init_rx_addrs(struct e1000_hw *hw);

    69

static void e1000_initialize_hardware_bits(struct e1000_hw *hw);

    70

static bool e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw);

    71

static s32 e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw);

    72

static s32 e1000_mng_enable_host_if(struct e1000_hw *hw);

    73

static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, u16 length,

    74

				   u16 offset, u8 *sum);

    75

static s32 e1000_mng_write_cmd_header(struct e1000_hw* hw,

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				      struct e1000_host_mng_command_header

    77

				      *hdr);

    78

static s32 e1000_mng_write_commit(struct e1000_hw *hw);

    79

static s32 e1000_phy_ife_get_info(struct e1000_hw *hw,

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				  struct e1000_phy_info *phy_info);

    81

static s32 e1000_phy_igp_get_info(struct e1000_hw *hw,

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				  struct e1000_phy_info *phy_info);

    83

static s32 e1000_read_eeprom_eerd(struct e1000_hw *hw, u16 offset, u16 words,

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				  u16 *data);

    85

static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words,

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				   u16 *data);

    87

static s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);

    88

static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,

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				  struct e1000_phy_info *phy_info);

    90

static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);

    91

static s32 e1000_read_ich8_byte(struct e1000_hw *hw, u32 index, u8 *data);

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static s32 e1000_verify_write_ich8_byte(struct e1000_hw *hw, u32 index,

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					u8 byte);

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static s32 e1000_write_ich8_byte(struct e1000_hw *hw, u32 index, u8 byte);

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static s32 e1000_read_ich8_word(struct e1000_hw *hw, u32 index, u16 *data);

    96

static s32 e1000_read_ich8_data(struct e1000_hw *hw, u32 index, u32 size,

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				u16 *data);

    98

static s32 e1000_write_ich8_data(struct e1000_hw *hw, u32 index, u32 size,

    99

				 u16 data);

   100

static s32 e1000_read_eeprom_ich8(struct e1000_hw *hw, u16 offset, u16 words,

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				  u16 *data);

   102

static s32 e1000_write_eeprom_ich8(struct e1000_hw *hw, u16 offset, u16 words,

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				   u16 *data);

   104

static void e1000_release_software_flag(struct e1000_hw *hw);

   105

static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);

   106

static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);

   107

static s32 e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, u32 no_snoop);

   108

static void e1000_set_pci_express_master_disable(struct e1000_hw *hw);

   109

static s32 e1000_wait_autoneg(struct e1000_hw *hw);

   110

static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value);

   111

static s32 e1000_set_phy_type(struct e1000_hw *hw);

   112

static void e1000_phy_init_script(struct e1000_hw *hw);

   113

static s32 e1000_setup_copper_link(struct e1000_hw *hw);

   114

static s32 e1000_setup_fiber_serdes_link(struct e1000_hw *hw);

   115

static s32 e1000_adjust_serdes_amplitude(struct e1000_hw *hw);

   116

static s32 e1000_phy_force_speed_duplex(struct e1000_hw *hw);

   117

static s32 e1000_config_mac_to_phy(struct e1000_hw *hw);

   118

static void e1000_raise_mdi_clk(struct e1000_hw *hw, u32 *ctrl);

   119

static void e1000_lower_mdi_clk(struct e1000_hw *hw, u32 *ctrl);

   120

static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, u32 data,

   121

				     u16 count);

   122

static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw);

   123

static s32 e1000_phy_reset_dsp(struct e1000_hw *hw);

   124

static s32 e1000_write_eeprom_spi(struct e1000_hw *hw, u16 offset,

   125

                                      u16 words, u16 *data);

   126

static s32 e1000_write_eeprom_microwire(struct e1000_hw *hw, u16 offset,

   127

					u16 words, u16 *data);

   128

static s32 e1000_spi_eeprom_ready(struct e1000_hw *hw);

   129

static void e1000_raise_ee_clk(struct e1000_hw *hw, u32 *eecd);

   130

static void e1000_lower_ee_clk(struct e1000_hw *hw, u32 *eecd);

   131

static void e1000_shift_out_ee_bits(struct e1000_hw *hw, u16 data, u16 count);

   132

static s32 e1000_write_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,

   133

				  u16 phy_data);

   134

static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw,u32 reg_addr,

   135

				 u16 *phy_data);

   136

static u16 e1000_shift_in_ee_bits(struct e1000_hw *hw, u16 count);

   137

static s32 e1000_acquire_eeprom(struct e1000_hw *hw);

   138

static void e1000_release_eeprom(struct e1000_hw *hw);

   139

static void e1000_standby_eeprom(struct e1000_hw *hw);

   140

static s32 e1000_set_vco_speed(struct e1000_hw *hw);

   141

static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw);

   142

static s32 e1000_set_phy_mode(struct e1000_hw *hw);

   143

static s32 e1000_host_if_read_cookie(struct e1000_hw *hw, u8 *buffer);

   144

static u8 e1000_calculate_mng_checksum(char *buffer, u32 length);

   145

static s32 e1000_configure_kmrn_for_10_100(struct e1000_hw *hw, u16 duplex);

   146

static s32 e1000_configure_kmrn_for_1000(struct e1000_hw *hw);

   147

static s32 e1000_do_read_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

   148

static s32 e1000_do_write_eeprom(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

   149

   150

/* IGP cable length table */

   151

static const

   152

u16 e1000_igp_cable_length_table[IGP01E1000_AGC_LENGTH_TABLE_SIZE] =

   153

    { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,

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      5, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 25, 25, 25,

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      25, 25, 25, 25, 30, 30, 30, 30, 40, 40, 40, 40, 40, 40, 40, 40,

   156

      40, 50, 50, 50, 50, 50, 50, 50, 60, 60, 60, 60, 60, 60, 60, 60,

   157

      60, 70, 70, 70, 70, 70, 70, 80, 80, 80, 80, 80, 80, 90, 90, 90,

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      90, 90, 90, 90, 90, 90, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100,

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      100, 100, 100, 100, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110,

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      110, 110, 110, 110, 110, 110, 120, 120, 120, 120, 120, 120, 120, 120, 120, 120};

   161

   162

static const

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u16 e1000_igp_2_cable_length_table[IGP02E1000_AGC_LENGTH_TABLE_SIZE] =

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    { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,

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      0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41,

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      6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61,

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      21, 26, 31, 35, 40, 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82,

   168

      40, 45, 51, 56, 61, 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104,

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      60, 66, 72, 77, 82, 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121,

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      83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124,

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      104, 109, 114, 118, 121, 124};

   172

   173

static DEFINE_SPINLOCK(e1000_eeprom_lock);

   174

   175

/******************************************************************************

   176

 * Set the phy type member in the hw struct.

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 *

   178

 * hw - Struct containing variables accessed by shared code

   179

 *****************************************************************************/

   180

static s32 e1000_set_phy_type(struct e1000_hw *hw)

   181

{

   182

    DEBUGFUNC("e1000_set_phy_type");

   183

   184

    if (hw->mac_type == e1000_undefined)

   185

        return -E1000_ERR_PHY_TYPE;

   186

   187

    switch (hw->phy_id) {

   188

    case M88E1000_E_PHY_ID:

   189

    case M88E1000_I_PHY_ID:

   190

    case M88E1011_I_PHY_ID:

   191

    case M88E1111_I_PHY_ID:

   192

        hw->phy_type = e1000_phy_m88;

   193

        break;

   194

    case IGP01E1000_I_PHY_ID:

   195

        if (hw->mac_type == e1000_82541 ||

   196

            hw->mac_type == e1000_82541_rev_2 ||

   197

            hw->mac_type == e1000_82547 ||

   198

            hw->mac_type == e1000_82547_rev_2) {

   199

            hw->phy_type = e1000_phy_igp;

   200

            break;

   201

        }

   202

    case IGP03E1000_E_PHY_ID:

   203

        hw->phy_type = e1000_phy_igp_3;

   204

        break;

   205

    case IFE_E_PHY_ID:

   206

    case IFE_PLUS_E_PHY_ID:

   207

    case IFE_C_E_PHY_ID:

   208

        hw->phy_type = e1000_phy_ife;

   209

        break;

   210

    case GG82563_E_PHY_ID:

   211

        if (hw->mac_type == e1000_80003es2lan) {

   212

            hw->phy_type = e1000_phy_gg82563;

   213

            break;

   214

        }

   215

        /* Fall Through */

   216

    default:

   217

        /* Should never have loaded on this device */

   218

        hw->phy_type = e1000_phy_undefined;

   219

        return -E1000_ERR_PHY_TYPE;

   220

    }

   221

   222

    return E1000_SUCCESS;

   223

}

   224

   225

/******************************************************************************

   226

 * IGP phy init script - initializes the GbE PHY

   227

 *

   228

 * hw - Struct containing variables accessed by shared code

   229

 *****************************************************************************/

   230

static void e1000_phy_init_script(struct e1000_hw *hw)

   231

{

   232

    u32 ret_val;

   233

    u16 phy_saved_data;

   234

   235

    DEBUGFUNC("e1000_phy_init_script");

   236

   237

    if (hw->phy_init_script) {

   238

        msleep(20);

   239

   240

        /* Save off the current value of register 0x2F5B to be restored at

   241

         * the end of this routine. */

   242

        ret_val = e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);

   243

   244

        /* Disabled the PHY transmitter */

   245

        e1000_write_phy_reg(hw, 0x2F5B, 0x0003);

   246

   247

        msleep(20);

   248

   249

        e1000_write_phy_reg(hw,0x0000,0x0140);

   250

   251

        msleep(5);

   252

   253

        switch (hw->mac_type) {

   254

        case e1000_82541:

   255

        case e1000_82547:

   256

            e1000_write_phy_reg(hw, 0x1F95, 0x0001);

   257

   258

            e1000_write_phy_reg(hw, 0x1F71, 0xBD21);

   259

   260

            e1000_write_phy_reg(hw, 0x1F79, 0x0018);

   261

   262

            e1000_write_phy_reg(hw, 0x1F30, 0x1600);

   263

   264

            e1000_write_phy_reg(hw, 0x1F31, 0x0014);

   265

   266

            e1000_write_phy_reg(hw, 0x1F32, 0x161C);

   267

   268

            e1000_write_phy_reg(hw, 0x1F94, 0x0003);

   269

   270

            e1000_write_phy_reg(hw, 0x1F96, 0x003F);

   271

   272

            e1000_write_phy_reg(hw, 0x2010, 0x0008);

   273

            break;

   274

   275

        case e1000_82541_rev_2:

   276

        case e1000_82547_rev_2:

   277

            e1000_write_phy_reg(hw, 0x1F73, 0x0099);

   278

            break;

   279

        default:

   280

            break;

   281

        }

   282

   283

        e1000_write_phy_reg(hw, 0x0000, 0x3300);

   284

   285

        msleep(20);

   286

   287

        /* Now enable the transmitter */

   288

        e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);

   289

   290

        if (hw->mac_type == e1000_82547) {

   291

            u16 fused, fine, coarse;

   292

   293

            /* Move to analog registers page */

   294

            e1000_read_phy_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS, &fused);

   295

   296

            if (!(fused & IGP01E1000_ANALOG_SPARE_FUSE_ENABLED)) {

   297

                e1000_read_phy_reg(hw, IGP01E1000_ANALOG_FUSE_STATUS, &fused);

   298

   299

                fine = fused & IGP01E1000_ANALOG_FUSE_FINE_MASK;

   300

                coarse = fused & IGP01E1000_ANALOG_FUSE_COARSE_MASK;

   301

   302

                if (coarse > IGP01E1000_ANALOG_FUSE_COARSE_THRESH) {

   303

                    coarse -= IGP01E1000_ANALOG_FUSE_COARSE_10;

   304

                    fine -= IGP01E1000_ANALOG_FUSE_FINE_1;

   305

                } else if (coarse == IGP01E1000_ANALOG_FUSE_COARSE_THRESH)

   306

                    fine -= IGP01E1000_ANALOG_FUSE_FINE_10;

   307

   308

                fused = (fused & IGP01E1000_ANALOG_FUSE_POLY_MASK) |

   309

                        (fine & IGP01E1000_ANALOG_FUSE_FINE_MASK) |

   310

                        (coarse & IGP01E1000_ANALOG_FUSE_COARSE_MASK);

   311

   312

                e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_CONTROL, fused);

   313

                e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_BYPASS,

   314

                                    IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL);

   315

            }

   316

        }

   317

    }

   318

}

   319

   320

/******************************************************************************

   321

 * Set the mac type member in the hw struct.

   322

 *

   323

 * hw - Struct containing variables accessed by shared code

   324

 *****************************************************************************/

   325

s32 e1000_set_mac_type(struct e1000_hw *hw)

   326

{

   327

	DEBUGFUNC("e1000_set_mac_type");

   328

   329

	switch (hw->device_id) {

   330

	case E1000_DEV_ID_82542:

   331

		switch (hw->revision_id) {

   332

		case E1000_82542_2_0_REV_ID:

   333

			hw->mac_type = e1000_82542_rev2_0;

   334

			break;

   335

		case E1000_82542_2_1_REV_ID:

   336

			hw->mac_type = e1000_82542_rev2_1;

   337

			break;

   338

		default:

   339

			/* Invalid 82542 revision ID */

   340

			return -E1000_ERR_MAC_TYPE;

   341

		}

   342

		break;

   343

	case E1000_DEV_ID_82543GC_FIBER:

   344

	case E1000_DEV_ID_82543GC_COPPER:

   345

		hw->mac_type = e1000_82543;

   346

		break;

   347

	case E1000_DEV_ID_82544EI_COPPER:

   348

	case E1000_DEV_ID_82544EI_FIBER:

   349

	case E1000_DEV_ID_82544GC_COPPER:

   350

	case E1000_DEV_ID_82544GC_LOM:

   351

		hw->mac_type = e1000_82544;

   352

		break;

   353

	case E1000_DEV_ID_82540EM:

   354

	case E1000_DEV_ID_82540EM_LOM:

   355

	case E1000_DEV_ID_82540EP:

   356

	case E1000_DEV_ID_82540EP_LOM:

   357

	case E1000_DEV_ID_82540EP_LP:

   358

		hw->mac_type = e1000_82540;

   359

		break;

   360

	case E1000_DEV_ID_82545EM_COPPER:

   361

	case E1000_DEV_ID_82545EM_FIBER:

   362

		hw->mac_type = e1000_82545;

   363

		break;

   364

	case E1000_DEV_ID_82545GM_COPPER:

   365

	case E1000_DEV_ID_82545GM_FIBER:

   366

	case E1000_DEV_ID_82545GM_SERDES:

   367

		hw->mac_type = e1000_82545_rev_3;

   368

		break;

   369

	case E1000_DEV_ID_82546EB_COPPER:

   370

	case E1000_DEV_ID_82546EB_FIBER:

   371

	case E1000_DEV_ID_82546EB_QUAD_COPPER:

   372

		hw->mac_type = e1000_82546;

   373

		break;

   374

	case E1000_DEV_ID_82546GB_COPPER:

   375

	case E1000_DEV_ID_82546GB_FIBER:

   376

	case E1000_DEV_ID_82546GB_SERDES:

   377

	case E1000_DEV_ID_82546GB_PCIE:

   378

	case E1000_DEV_ID_82546GB_QUAD_COPPER:

   379

	case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:

   380

		hw->mac_type = e1000_82546_rev_3;

   381

		break;

   382

	case E1000_DEV_ID_82541EI:

   383

	case E1000_DEV_ID_82541EI_MOBILE:

   384

	case E1000_DEV_ID_82541ER_LOM:

   385

		hw->mac_type = e1000_82541;

   386

		break;

   387

	case E1000_DEV_ID_82541ER:

   388

	case E1000_DEV_ID_82541GI:

   389

	case E1000_DEV_ID_82541GI_LF:

   390

	case E1000_DEV_ID_82541GI_MOBILE:

   391

		hw->mac_type = e1000_82541_rev_2;

   392

		break;

   393

	case E1000_DEV_ID_82547EI:

   394

	case E1000_DEV_ID_82547EI_MOBILE:

   395

		hw->mac_type = e1000_82547;

   396

		break;

   397

	case E1000_DEV_ID_82547GI:

   398

		hw->mac_type = e1000_82547_rev_2;

   399

		break;

   400

	case E1000_DEV_ID_82571EB_COPPER:

   401

	case E1000_DEV_ID_82571EB_FIBER:

   402

	case E1000_DEV_ID_82571EB_SERDES:

   403

	case E1000_DEV_ID_82571EB_SERDES_DUAL:

   404

	case E1000_DEV_ID_82571EB_SERDES_QUAD:

   405

	case E1000_DEV_ID_82571EB_QUAD_COPPER:

   406

	case E1000_DEV_ID_82571PT_QUAD_COPPER:

   407

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   408

	case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:

   409

		hw->mac_type = e1000_82571;

   410

		break;

   411

	case E1000_DEV_ID_82572EI_COPPER:

   412

	case E1000_DEV_ID_82572EI_FIBER:

   413

	case E1000_DEV_ID_82572EI_SERDES:

   414

	case E1000_DEV_ID_82572EI:

   415

		hw->mac_type = e1000_82572;

   416

		break;

   417

	case E1000_DEV_ID_82573E:

   418

	case E1000_DEV_ID_82573E_IAMT:

   419

	case E1000_DEV_ID_82573L:

   420

		hw->mac_type = e1000_82573;

   421

		break;

   422

	case E1000_DEV_ID_80003ES2LAN_COPPER_SPT:

   423

	case E1000_DEV_ID_80003ES2LAN_SERDES_SPT:

   424

	case E1000_DEV_ID_80003ES2LAN_COPPER_DPT:

   425

	case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:

   426

		hw->mac_type = e1000_80003es2lan;

   427

		break;

   428

	case E1000_DEV_ID_ICH8_IGP_M_AMT:

   429

	case E1000_DEV_ID_ICH8_IGP_AMT:

   430

	case E1000_DEV_ID_ICH8_IGP_C:

   431

	case E1000_DEV_ID_ICH8_IFE:

   432

	case E1000_DEV_ID_ICH8_IFE_GT:

   433

	case E1000_DEV_ID_ICH8_IFE_G:

   434

	case E1000_DEV_ID_ICH8_IGP_M:

   435

		hw->mac_type = e1000_ich8lan;

   436

		break;

   437

	default:

   438

		/* Should never have loaded on this device */

   439

		return -E1000_ERR_MAC_TYPE;

   440

	}

   441

   442

	switch (hw->mac_type) {

   443

	case e1000_ich8lan:

   444

		hw->swfwhw_semaphore_present = true;

   445

		hw->asf_firmware_present = true;

   446

		break;

   447

	case e1000_80003es2lan:

   448

		hw->swfw_sync_present = true;

   449

		/* fall through */

   450

	case e1000_82571:

   451

	case e1000_82572:

   452

	case e1000_82573:

   453

		hw->eeprom_semaphore_present = true;

   454

		/* fall through */

   455

	case e1000_82541:

   456

	case e1000_82547:

   457

	case e1000_82541_rev_2:

   458

	case e1000_82547_rev_2:

   459

		hw->asf_firmware_present = true;

   460

		break;

   461

	default:

   462

		break;

   463

	}

   464

   465

	/* The 82543 chip does not count tx_carrier_errors properly in

   466

	 * FD mode

   467

	 */

   468

	if (hw->mac_type == e1000_82543)

   469

		hw->bad_tx_carr_stats_fd = true;

   470

   471

	/* capable of receiving management packets to the host */

   472

	if (hw->mac_type >= e1000_82571)

   473

		hw->has_manc2h = true;

   474

   475

	/* In rare occasions, ESB2 systems would end up started without

   476

	 * the RX unit being turned on.

   477

	 */

   478

	if (hw->mac_type == e1000_80003es2lan)

   479

		hw->rx_needs_kicking = true;

   480

   481

	if (hw->mac_type > e1000_82544)

   482

		hw->has_smbus = true;

   483

   484

	return E1000_SUCCESS;

   485

}

   486

   487

/*****************************************************************************

   488

 * Set media type and TBI compatibility.

   489

 *

   490

 * hw - Struct containing variables accessed by shared code

   491

 * **************************************************************************/

   492

void e1000_set_media_type(struct e1000_hw *hw)

   493

{

   494

    u32 status;

   495

   496

    DEBUGFUNC("e1000_set_media_type");

   497

   498

    if (hw->mac_type != e1000_82543) {

   499

        /* tbi_compatibility is only valid on 82543 */

   500

        hw->tbi_compatibility_en = false;

   501

    }

   502

   503

    switch (hw->device_id) {

   504

    case E1000_DEV_ID_82545GM_SERDES:

   505

    case E1000_DEV_ID_82546GB_SERDES:

   506

    case E1000_DEV_ID_82571EB_SERDES:

   507

    case E1000_DEV_ID_82571EB_SERDES_DUAL:

   508

    case E1000_DEV_ID_82571EB_SERDES_QUAD:

   509

    case E1000_DEV_ID_82572EI_SERDES:

   510

    case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:

   511

        hw->media_type = e1000_media_type_internal_serdes;

   512

        break;

   513

    default:

   514

        switch (hw->mac_type) {

   515

        case e1000_82542_rev2_0:

   516

        case e1000_82542_rev2_1:

   517

            hw->media_type = e1000_media_type_fiber;

   518

            break;

   519

        case e1000_ich8lan:

   520

        case e1000_82573:

   521

            /* The STATUS_TBIMODE bit is reserved or reused for the this

   522

             * device.

   523

             */

   524

            hw->media_type = e1000_media_type_copper;

   525

            break;

   526

        default:

   527

            status = er32(STATUS);

   528

            if (status & E1000_STATUS_TBIMODE) {

   529

                hw->media_type = e1000_media_type_fiber;