tool/CommandCrc.cpp
author Edouard Tisserant <edouard.tisserant@gmail.com>
Fri, 14 Sep 2018 17:59:33 +0200
branchstable-1.5
changeset 2710 05359dee3578
parent 2674 3be68a020748
permissions -rw-r--r--
rtdmnet module should follow same (un)loading rules as generic module
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/*****************************************************************************
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 *
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 *  Copyright (C) 2006-2017  Florian Pose, Ingenieurgemeinschaft IgH
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 *
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 *  This file is part of the IgH EtherCAT Master.
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 *
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 *  The IgH EtherCAT Master is free software; you can redistribute it and/or
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 *  modify it under the terms of the GNU General Public License version 2, as
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 *  published by the Free Software Foundation.
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 *
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 *  The IgH EtherCAT Master is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General
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 *  Public License for more details.
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 *
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 *  You should have received a copy of the GNU General Public License along
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 *  with the IgH EtherCAT Master; if not, write to the Free Software
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 *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
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 *
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 *  ---
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 *
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 *  The license mentioned above concerns the source code only. Using the
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 *  EtherCAT technology and brand is only permitted in compliance with the
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 *  industrial property and similar rights of Beckhoff Automation GmbH.
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 *
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 ****************************************************************************/
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#include <iostream>
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#include <iomanip>
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#include <algorithm>
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using namespace std;
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#include "CommandCrc.h"
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#include "MasterDevice.h"
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/*****************************************************************************/
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CommandCrc::CommandCrc():
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    Command("crc", "CRC error register diagnosis.")
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{
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}
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/*****************************************************************************/
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string CommandCrc::helpString(const string &binaryBaseName) const
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{
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    stringstream str;
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    str
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        << binaryBaseName << " " << getName() << endl
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        << binaryBaseName << " " << getName() << " reset" << endl
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        << endl
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        << getBriefDescription() << endl
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        << endl
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        << "CRC - CRC Error Counter                0x300, 0x302, 0x304, 0x306"
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        << endl
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        << "PHY - Physical Interface Error Counter 0x301, 0x303, 0x305, 0x307"
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        << endl
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        << "FWD - Forwarded RX Error Counter       0x308, 0x309, 0x30a, 0x30b"
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        << endl
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        << "NXT - Next slave" << endl
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        << endl;
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    return str.str();
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}
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/****************************************************************************/
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#define REG_SIZE  (20)
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void CommandCrc::execute(const StringVector &args)
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{
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    bool reset = false;
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    if (args.size() > 1) {
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        stringstream err;
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        err << "'" << getName() << "' takes either no or 'reset' argument!";
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        throwInvalidUsageException(err);
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    }
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    if (args.size() == 1) {
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        string arg = args[0];
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        transform(arg.begin(), arg.end(),
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                arg.begin(), (int (*) (int)) std::tolower);
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        if (arg != "reset") {
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            stringstream err;
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            err << "'" << getName() << "' takes either no or 'reset' argument!";
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            throwInvalidUsageException(err);
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        }
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        reset = true;
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    }
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    MasterDevice m(getSingleMasterIndex());
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    m.open(reset ? MasterDevice::ReadWrite : MasterDevice::Read);
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    ec_ioctl_master_t master;
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    m.getMaster(&master);
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    uint8_t data[REG_SIZE];
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    ec_ioctl_slave_reg_t io;
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    io.emergency = 0;
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    io.address = 0x0300;
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    io.size = REG_SIZE;
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    io.data = data;
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    if (reset) {
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        for (int j = 0; j < REG_SIZE; j++) {
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            data[j] = 0x00;
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        }
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        for (unsigned int i = 0; i < master.slave_count; i++) {
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            io.slave_position = i;
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            try {
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                m.writeReg(&io);
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            } catch (MasterDeviceException &e) {
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                throw e;
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            }
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        }
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        return;
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    }
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    cout << "   |";
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    for (unsigned int port = 0; port < EC_MAX_PORTS; port++) {
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        cout << "Port " << port << "         |";
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    }
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    cout << endl;
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    cout << "   |";
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    for (unsigned int port = 0; port < EC_MAX_PORTS; port++) {
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        cout << "CRC PHY FWD NXT|";
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    }
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    cout << endl;
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    for (unsigned int i = 0; i < master.slave_count; i++) {
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        ec_ioctl_slave_t slave;
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        m.getSlave(&slave, i);
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        io.slave_position = i;
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        try {
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            m.readReg(&io);
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        } catch (MasterDeviceException &e) {
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            throw e;
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        }
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        cout << setw(3) << i << "|";
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        for (int port = 0; port < 4; port++) {
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            if (slave.ports[port].link.loop_closed) {
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                cout << "               |";
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                continue;
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            }
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            cout << setw(3) << (unsigned int) io.data[ 0 + port * 2]; // CRC
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            cout << setw(4) << (unsigned int) io.data[ 1 + port * 2]; // PHY
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            cout << setw(4) << (unsigned int) io.data[ 8 + port]; // FWD
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            if (slave.ports[port].next_slave == i - 1) {
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                cout << "   ↑";
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            }
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            else if (slave.ports[port].next_slave == i + 1) {
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                cout << "   ↓";
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            }
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            else if (slave.ports[port].next_slave != 0xffff) {
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                cout << setw(4) << slave.ports[port].next_slave;
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            }
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            else {
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                cout << "    ";
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            }
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            cout << "|";
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        }
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        std::string slaveName(slave.name);
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        slaveName = slaveName.substr(0, 11);
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        cout << slaveName << endl;
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    }
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}
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/*****************************************************************************/