author | Edouard Tisserant |
Fri, 22 Jul 2022 09:24:12 +0200 | |
changeset 1099 | cdb045e8be20 |
parent 0 | fb772792efd1 |
permissions | -rwxr-xr-x |
0
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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1 |
FUNCTION_BLOCK TRANSFER |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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2 |
VAR_INPUT |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
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3 |
AUTO : BOOL ; (* 1 - track X0, 0 - ramp or hold *) |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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4 |
XIN : REAL ; (* Typically from PID Function Block *) |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
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5 |
FAST_RATE, SLOW_RATE : REAL ; (* Up/down ramp slopes *) |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
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6 |
FAST_UP, SLOW_UP, (* Typically pushbuttons *) |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
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7 |
FAST_DOWN, SLOW_DOWN : BOOL; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
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8 |
CYCLE : TIME ; (* Sampling period *) |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
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9 |
END_VAR |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
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10 |
VAR_OUTPUT XOUT : REAL ; END_VAR |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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11 |
VAR XFER_RAMP : INTEGRAL ; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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12 |
RAMP_RATE : REAL ; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
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13 |
END_VAR |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
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14 |
RAMP_RATE := 0.0 ; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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15 |
IF NOT AUTO THEN |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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16 |
IF FAST_UP THEN RAMP_RATE := FAST_RATE; END_IF; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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17 |
IF SLOW_UP THEN RAMP_RATE := RAMP_RATE + SLOW_RATE; END_IF; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
|
18 |
IF FAST_DOWN THEN RAMP_RATE := RAMP_RATE - FAST_RATE; END_IF; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
|
19 |
IF SLOW_DOWN THEN RAMP_RATE := RAMP_RATE - SLOW_RATE; END_IF; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
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20 |
END_IF ; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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21 |
XFER_RAMP (RUN := 1, CYCLE := CYCLE, R1 := AUTO, |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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22 |
XIN := RAMP_RATE, X0 := XIN) ; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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23 |
XOUT := XFER_RAMP.XOUT; |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
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24 |
END_FUNCTION_BLOCK |
fb772792efd1
Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff
changeset
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25 |