AnnexF/hysteresis_st.txt
author etisserant
Fri, 05 Oct 2007 10:24:39 +0200
changeset 64 ab704568fa25
parent 0 fb772792efd1
permissions -rwxr-xr-x
Fixed Bitwise negation in ST
0
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
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FUNCTION_BLOCK HYSTERESIS
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    (* Boolean hysteresis on difference *)
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    (* of REAL inputs, XIN1 - XIN2      *)
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  VAR_INPUT XIN1, XIN2, EPS : REAL; END_VAR
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  VAR_OUTPUT Q : BOOL := 0; END_VAR
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  IF Q THEN IF XIN1 < (XIN2 - EPS) THEN Q := 0; END_IF ;
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
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  ELSIF XIN1 > (XIN2 + EPS) THEN Q := 1 ;
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  END_IF ;
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END_FUNCTION_BLOCK
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
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