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AnnexF/hysteresis_st.txt
author Andrey Skvortsov <andrej.skvortzov@gmail.com>
Fri, 06 May 2016 11:48:02 +0300
changeset 1008 59435d4c5e0c
parent 0 fb772792efd1
permissions -rwxr-xr-x
fix compilation error about missing braces

IEC_TIMESPEC has two fields tv_sec and tv_nsec.

Compilation error:
./build/POUS.c:600:45: error: missing braces around initializer [-Werror=missing-braces]
static const STEP temp_step = {{0, 0}, 0, {0, 0}};
^
compilation terminated due to -Wfatal-errors.
0
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
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FUNCTION_BLOCK HYSTERESIS
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
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    (* Boolean hysteresis on difference *)
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    (* of REAL inputs, XIN1 - XIN2      *)
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  VAR_INPUT XIN1, XIN2, EPS : REAL; END_VAR
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  VAR_OUTPUT Q : BOOL := 0; END_VAR
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
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  IF Q THEN IF XIN1 < (XIN2 - EPS) THEN Q := 0; END_IF ;
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
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  ELSIF XIN1 > (XIN2 + EPS) THEN Q := 1 ;
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  END_IF ;
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END_FUNCTION_BLOCK
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    10
 












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