AnnexF/lag1_st.txt
author Mario de Sousa <msousa@fe.up.pt>
Wed, 14 Mar 2012 10:26:03 +0000
changeset 481 16f943328696
parent 0 fb772792efd1
permissions -rwxr-xr-x
Add 'widen' tables for AND, OR and XOR operations.
0
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     1
 FUNCTION_BLOCK LAG1
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     2
   VAR_INPUT
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     3
     RUN : BOOL ;     (* 1 = run, 0 = reset *)
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     4
     XIN : REAL ;     (* Input variable *)
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     5
     TAU : TIME ;     (* Filter time constant *)
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     6
     CYCLE : TIME ;   (* Sampling time interval *)
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     7
   END_VAR
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     8
   VAR_OUTPUT XOUT : REAL ; END_VAR  (* Filtered output *)
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
     9
   VAR K : REAL ;     (* Smoothing constant, 0.0<=K<1.0 *)
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
    10
   END_VAR
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
    11
   IF RUN THEN XOUT := XOUT + K * (XIN - XOUT) ;
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
    12
   ELSE XOUT := XIN ;
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
    13
        K := TIME_TO_REAL(CYCLE) / TIME_TO_REAL(CYCLE + TAU) ;
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
    14
   END_IF ;
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
    15
 END_FUNCTION_BLOCK
fb772792efd1 Initial commit. Last MatPLC CVS with some makefile inclusion removed in order to compile fine out of MatPLC.
etisserant
parents:
diff changeset
    16