--- a/configure.ac Mon Oct 27 14:19:49 2014 +0100
+++ b/configure.ac Mon Oct 27 14:33:03 2014 +0100
@@ -41,7 +41,7 @@
#
AC_INIT([ethercat],[1.5.2],[fp@igh-essen.com])
AC_CONFIG_AUX_DIR([autoconf])
-AM_INIT_AUTOMAKE([-Wall -Werror dist-bzip2])
+AM_INIT_AUTOMAKE([-Wall -Werror dist-bzip2 subdir-objects])
AC_PREFIX_DEFAULT([/opt/etherlab])
AC_CONFIG_HEADERS([config.h])
AC_CONFIG_SRCDIR([config.h.in])
--- a/devices/ccat/CCatDefinitions.h Mon Oct 27 14:19:49 2014 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,193 +0,0 @@
-/**
- Network Driver for Beckhoff CCAT communication controller
- Copyright (C) 2014 Beckhoff Automation GmbH
- Author: Patrick Bruenn <p.bruenn@beckhoff.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-*/
-#ifndef _CCAT_DEFINITIONS_H_
-#define _CCAT_DEFINITIONS_H_
-
-#ifndef WINDOWS
-#include <linux/kernel.h>
-typedef uint8_t BYTE;
-typedef uint32_t ULONG;
-typedef uint16_t USHORT;
-typedef uint8_t UINT8;
-typedef uint16_t UINT16;
-typedef uint32_t UINT32;
-typedef uint64_t UINT64;
-#endif
-
-#define CCAT_DMA_FRAME_HEADER_LENGTH (196 / 8) // 196 bit
-
-typedef struct _ETHERNET_ADDRESS
-{
- UINT8 b[6];
-}ETHERNET_ADDRESS;
-
-typedef enum CCatInfoTypes
-{
- CCATINFO_NOTUSED = 0,
- CCATINFO_BLOCK = 1,
- CCATINFO_ETHERCAT_SLAVE = 2,
- CCATINFO_ETHERCAT_MASTER = 3,
- CCATINFO_ETHERNET_MAC = 4,
- CCATINFO_ETHERNET_SWITCH = 5,
- CCATINFO_SERCOS3 = 6,
- CCATINFO_PROFIBUS = 7,
- CCATINFO_CAN_CONTROLLER = 8,
- CCATINFO_KBUS_MASTER = 9,
- CCATINFO_IP_LINK = 10,
- CCATINFO_SPI_MASTER = 11,
- CCATINFO_I2C_MASTER = 12,
- CCATINFO_GPIO = 13,
- CCATINFO_DRIVEIP = 14,
- CCATINFO_EPCS_PROM = 15,
- CCATINFO_SYSTIME = 16,
- CCATINFO_INTCTRL = 17,
- CCATINFO_EEPROM = 18,
- CCATINFO_DMA = 19,
- CCATINFO_ETHERCAT_MASTER_DMA = 20,
- CCATINFO_ETHERNET_MAC_DMA = 21,
- CCATINFO_SRAM = 22,
- CCATINFO_COPY_BLOCK = 23,
- CCATINFO_MAX
-} _CCatInfoTypes;
-
-typedef struct
-{
- USHORT eCCatInfoType;
- USHORT nRevision;
- union
- {
- ULONG nParam;
- struct
- {
- BYTE nMaxEntries;
- BYTE compileDay;
- BYTE compileMonth;
- BYTE compileYear;
- };
- struct
- {
- BYTE txDmaChn;
- BYTE rxDmaChn;
- };
- struct
- {
- BYTE nExternalDataSize : 2;
- BYTE reserved1 : 6;
- BYTE nRamSize; //size = 2^ramSize
- USHORT reserved2;
- };
- };
- ULONG nAddr;
- ULONG nSize;
-} CCatInfoBlock, *PCCatInfoBlock;
-
-typedef struct _CCatMacRegs
-{
- union
- {
- struct
- {
- UINT8 frameLenErrCnt;
- UINT8 rxErrCnt;
- UINT8 crcErrCnt;
- UINT8 linkLostErrCnt;
- };
- UINT32 errCnt;
- };
- UINT32 reserved1;
- UINT8 dropFrameErrCnt; // 0x08
- UINT8 reserved2[7];
- UINT32 txFrameCnt; // 0x10
- UINT32 rxFrameCnt; // 0x14
- UINT32 reserved3[2];
- UINT8 txFifoLevel : 7;
- UINT8 reserved4 : 1;
- UINT8 reserved5[7];
- UINT8 txErrMemFull;
- UINT8 reserved6[7];
- UINT32 reserved8[18];
- UINT8 miiConnected;
-}CCatMacRegs;
-
-typedef struct _CCatMii
-{
- USHORT startMiCycle : 1;
- USHORT reserved1 : 6;
- USHORT cmdErr : 1;
-#define MII_CMD_READ 1
-#define MII_CMD_WRITE 2
- USHORT cmd : 2;
- USHORT reserved2 : 6;
- USHORT phyAddr : 5;
- USHORT reserved3 : 3;
- USHORT phyReg : 5;
- USHORT reserved4 : 3;
- USHORT phyWriteData;
- USHORT phyReadData;
- ETHERNET_ADDRESS macAddr;
- USHORT macFilterEnabled : 1;
- USHORT reserved6 : 7;
- USHORT linkStatus : 1;
- USHORT reserved7 : 7;
- ULONG led0;
- ULONG led1;
- ULONG led2[2];
- ULONG systimeInsertion[4];
- ULONG interruptState[2];
- ULONG interruptMask[2];
-}CCatMii;
-
-typedef struct _CCatDmaTxFifo
-{
- UINT32 startAddr : 24;
- UINT32 numQuadWords : 8;
- UINT32 reserved1;
- UINT8 fifoReset;
- UINT8 reserved2[7];
-}CCatDmaTxFifo;
-
-typedef union _CCatDmaRxActBuf
-{
- struct
- {
- UINT32 startAddr : 24;
- UINT32 reserved1 : 7;
- UINT32 nextValid : 1;
- UINT32 lastAddr : 24;
- UINT32 reserved2 : 8;
- UINT32 FifoLevel : 24;
- UINT32 bufferLevel : 8;
- UINT32 nextAddr;
- };
- UINT32 rxActBuf;
-}CCatDmaRxActBuf;
-
-typedef struct _CCatInfoBlockOffs
-{
- UINT32 reserved;
- UINT32 nMMIOffs;
- UINT32 nTxFifoOffs;
- UINT32 nMacRegOffs;
- UINT32 nRxMemOffs;
- UINT32 nTxMemOffs;
- UINT32 nMiscOffs;
-} CCatInfoBlockOffs;
-#endif /* #ifndef _CCAT_DEFINITIONS_H_ */
-
--- a/devices/ccat/COPYING Mon Oct 27 14:19:49 2014 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,339 +0,0 @@
- GNU GENERAL PUBLIC LICENSE
- Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
- Preamble
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- The licenses for most software are designed to take away your
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--- a/devices/ccat/Kbuild.in Mon Oct 27 14:19:49 2014 +0100
+++ b/devices/ccat/Kbuild.in Mon Oct 27 14:33:03 2014 +0100
@@ -37,7 +37,6 @@
EC_CCAT_OBJ := \
module.o \
netdev.o \
- print.o \
update.o
obj-m += ec_ccat.o
ec_ccat-objs := $(EC_CCAT_OBJ)
--- a/devices/ccat/Makefile.am Mon Oct 27 14:19:49 2014 +0100
+++ b/devices/ccat/Makefile.am Mon Oct 27 14:33:03 2014 +0100
@@ -28,11 +28,9 @@
#------------------------------------------------------------------------------
EXTRA_DIST = \
- COPYING \
Kbuild.in \
module.h \
netdev.h \
- print.h \
update.h
BUILT_SOURCES = \
--- a/devices/ccat/compat.h Mon Oct 27 14:19:49 2014 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,48 +0,0 @@
-/**
- Network Driver for Beckhoff CCAT communication controller
- Copyright (C) 2014 Beckhoff Automation GmbH
- Author: Patrick Bruenn <p.bruenn@beckhoff.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-*/
-
-#ifndef _CCAT_COMPAT_H_
-#define _CCAT_COMPAT_H_
-#include <linux/dma-mapping.h>
-#include <linux/sched.h>
-#include <linux/version.h>
-
-#if LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 32)
-#define pr_warn pr_info
-
-#define netdev_info(DEV, ...) pr_info(__VA_ARGS__)
-#define netdev_err netdev_info
-
-static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
- dma_addr_t * dma_handle, gfp_t flag)
-{
- void *result =
- dma_alloc_coherent(dev, size, dma_handle, flag | __GFP_ZERO);
- if (result)
- memset(result, 0, size);
- return result;
-}
-
-static inline void usleep_range(unsigned long min, unsigned long max)
-{
- msleep(min / 1000);
-}
-#endif
-#endif /* #ifndef _CCAT_COMPAT_H_ */
--- a/devices/ccat/module.c Mon Oct 27 14:19:49 2014 +0100
+++ b/devices/ccat/module.c Mon Oct 27 14:33:03 2014 +0100
@@ -22,7 +22,6 @@
#include <linux/etherdevice.h>
#include <linux/module.h>
#include <linux/netdevice.h>
-#include "compat.h"
#include "module.h"
#include "netdev.h"
#include "update.h"
@@ -56,38 +55,38 @@
struct pci_dev *pdev)
{
struct resource *res;
+
bar->start = pci_resource_start(pdev, index);
bar->end = pci_resource_end(pdev, index);
bar->len = pci_resource_len(pdev, index);
bar->flags = pci_resource_flags(pdev, index);
if (!(IORESOURCE_MEM & bar->flags)) {
- pr_info("bar%llu is no mem_region -> abort.\n",
- (uint64_t) index);
- return -EIO;
- }
-
- res = request_mem_region(bar->start, bar->len, DRV_NAME);
+ pr_info("bar%llu is no mem_region -> abort.\n", (u64) index);
+ return -EIO;
+ }
+
+ res = request_mem_region(bar->start, bar->len, KBUILD_MODNAME);
if (!res) {
pr_info("allocate mem_region failed.\n");
return -EIO;
}
- pr_debug("bar%llu at [%lx,%lx] len=%lu res: %p.\n", (uint64_t) index,
+ pr_debug("bar%llu at [%lx,%lx] len=%lu res: %p.\n", (u64) index,
bar->start, bar->end, bar->len, res);
bar->ioaddr = ioremap(bar->start, bar->len);
if (!bar->ioaddr) {
- pr_info("bar%llu ioremap failed.\n", (uint64_t) index);
+ pr_info("bar%llu ioremap failed.\n", (u64) index);
release_mem_region(bar->start, bar->len);
return -EIO;
}
- pr_debug("bar%llu I/O mem mapped to %p.\n", (uint64_t) index,
- bar->ioaddr);
+ pr_debug("bar%llu I/O mem mapped to %p.\n", (u64) index, bar->ioaddr);
return 0;
}
void ccat_dma_free(struct ccat_dma *const dma)
{
const struct ccat_dma tmp = *dma;
+
free_dma(dma->channel);
memset(dma, 0, sizeof(*dma));
dma_free_coherent(tmp.dev, tmp.size, tmp.virt, tmp.phys);
@@ -104,12 +103,12 @@
void __iomem * const ioaddr, struct device *const dev)
{
void *frame;
- uint64_t addr;
- uint32_t translateAddr;
- uint32_t memTranslate;
- uint32_t memSize;
- uint32_t data = 0xffffffff;
- uint32_t offset = (sizeof(uint64_t) * channel) + 0x1000;
+ u64 addr;
+ u32 translateAddr;
+ u32 memTranslate;
+ u32 memSize;
+ u32 data = 0xffffffff;
+ u32 offset = (sizeof(u64) * channel) + 0x1000;
dma->channel = channel;
dma->dev = dev;
@@ -123,13 +122,12 @@
dma->size = 2 * memSize - PAGE_SIZE;
dma->virt = dma_zalloc_coherent(dev, dma->size, &dma->phys, GFP_KERNEL);
if (!dma->virt || !dma->phys) {
- pr_info("init DMA%llu memory failed.\n", (uint64_t) channel);
+ pr_info("init DMA%llu memory failed.\n", (u64) channel);
return -1;
}
- if (request_dma(channel, DRV_NAME)) {
- pr_info("request dma channel %llu failed\n",
- (uint64_t) channel);
+ if (request_dma(channel, KBUILD_MODNAME)) {
+ pr_info("request dma channel %llu failed\n", (u64) channel);
ccat_dma_free(dma);
return -1;
}
@@ -140,9 +138,9 @@
frame = dma->virt + translateAddr - dma->phys;
pr_debug
("DMA%llu mem initialized\n virt: 0x%p\n phys: 0x%llx\n translated: 0x%llx\n pci addr: 0x%08x%x\n memTranslate: 0x%x\n size: %llu bytes.\n",
- (uint64_t) channel, dma->virt, (uint64_t) (dma->phys), addr,
+ (u64) channel, dma->virt, (u64) (dma->phys), addr,
ioread32(ioaddr + offset + 4), ioread32(ioaddr + offset),
- memTranslate, (uint64_t) dma->size);
+ memTranslate, (u64) dma->size);
return 0;
}
@@ -153,14 +151,14 @@
*/
static int ccat_functions_init(struct ccat_device *const ccatdev)
{
- /* read CCatInfoBlock.nMaxEntries from ccat */
- const uint8_t num_func = ioread8(ccatdev->bar[0].ioaddr + 4);
- void __iomem *addr = ccatdev->bar[0].ioaddr;
- const void __iomem *end = addr + (sizeof(CCatInfoBlock) * num_func);
- int status = 0; //count init function failures
+ static const size_t block_size = sizeof(struct ccat_info_block);
+ void __iomem *addr = ccatdev->bar[0].ioaddr; /** first block is the CCAT information block entry */
+ const u8 num_func = ioread8(addr + 4); /** number of CCAT function blocks is at offset 0x4 */
+ const void __iomem *end = addr + (block_size * num_func);
+ int status = 0; /** count init function failures */
while (addr < end) {
- const uint8_t type = ioread16(addr);
+ const u8 type = ioread16(addr);
switch (type) {
case CCATINFO_NOTUSED:
break;
@@ -178,7 +176,7 @@
pr_info("Found: 0x%04x not supported\n", type);
break;
}
- addr += sizeof(CCatInfoBlock);
+ addr += block_size;
}
return status;
}
@@ -209,6 +207,7 @@
int status;
u8 revision;
struct ccat_device *ccatdev = kmalloc(sizeof(*ccatdev), GFP_KERNEL);
+
if (!ccatdev) {
pr_err("%s() out of memory.\n", __FUNCTION__);
return -ENOMEM;
@@ -229,13 +228,9 @@
return status;
}
- /* FIXME upgrade to a newer kernel to get support of dma_set_mask_and_coherent()
- * (!dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64))) {
- */
- if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+ if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
pr_debug("64 bit DMA supported, pci rev: %u\n", revision);
- /*} else if (!dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32))) { */
- } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
+ } else if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) {
pr_debug("32 bit DMA supported, pci rev: %u\n", revision);
} else {
pr_warn("No suitable DMA available, pci rev: %u\n", revision);
@@ -261,6 +256,7 @@
static void ccat_remove(struct pci_dev *pdev)
{
struct ccat_device *ccatdev = pci_get_drvdata(pdev);
+
if (ccatdev) {
ccat_functions_remove(ccatdev);
ccat_bar_free(&ccatdev->bar[2]);
@@ -285,21 +281,19 @@
#endif
static struct pci_driver pci_driver = {
- .name = DRV_NAME,
+ .name = KBUILD_MODNAME,
.id_table = pci_ids,
.probe = ccat_probe,
.remove = ccat_remove,
};
-static void ccat_exit_module(void)
+static void __exit ccat_exit_module(void)
{
pci_unregister_driver(&pci_driver);
}
-static int ccat_init_module(void)
-{
- BUILD_BUG_ON(offsetof(struct ccat_eth_frame, data) !=
- CCAT_DMA_FRAME_HEADER_LENGTH);
+static int __init ccat_init_module(void)
+{
pr_info("%s, %s\n", DRV_DESCRIPTION, DRV_VERSION);
return pci_register_driver(&pci_driver);
}
--- a/devices/ccat/module.h Mon Oct 27 14:19:49 2014 +0100
+++ b/devices/ccat/module.h Mon Oct 27 14:33:03 2014 +0100
@@ -22,20 +22,30 @@
#define _CCAT_H_
#include <linux/cdev.h>
+#include <linux/hrtimer.h>
#include <linux/kernel.h>
#include <linux/pci.h>
-#include "CCatDefinitions.h"
#include "../ecdev.h"
-#define DRV_NAME "ec_ccat"
#define DRV_EXTRAVERSION "-ec"
-#define DRV_VERSION "0.8" DRV_EXTRAVERSION
+#define DRV_VERSION "0.10" DRV_EXTRAVERSION
#define DRV_DESCRIPTION "Beckhoff CCAT Ethernet/EtherCAT Network Driver"
#undef pr_fmt
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
/**
+ * CCAT function type identifiers (u16)
+ */
+enum ccat_info_t {
+ CCATINFO_NOTUSED = 0,
+ CCATINFO_EPCS_PROM = 0xf,
+ CCATINFO_ETHERCAT_MASTER_DMA = 0x14,
+ CCATINFO_COPY_BLOCK = 0x17,
+ CCATINFO_MAX
+};
+
+/**
* struct ccat_bar - CCAT PCI Base Address Register(BAR) configuration
* @start: start address of this BAR
* @end: end address of this BAR
@@ -81,15 +91,16 @@
* @data: the bytes of the ethernet frame
*/
struct ccat_eth_frame {
- uint32_t reserved1;
- uint32_t received:1;
- uint32_t reserved2:31;
- uint16_t length;
- uint16_t reserved3;
- uint32_t sent:1;
- uint32_t reserved4:31;
- uint64_t timestamp;
- uint8_t data[0x800 - 3 * sizeof(uint64_t)];
+ __le32 reserved1;
+ __le32 rx_flags;
+#define CCAT_FRAME_RECEIVED 0x1
+ __le16 length;
+ __le16 reserved3;
+ __le32 tx_flags;
+#define CCAT_FRAME_SENT 0x1
+ __le64 timestamp;
+ u8 data[0x800 - 3 * sizeof(u64)];
+#define CCAT_ETH_FRAME_HEAD_LEN offsetof(struct ccat_eth_frame, data)
};
/**
@@ -119,8 +130,10 @@
* @dma: information about the associated DMA memory
*/
struct ccat_eth_dma_fifo {
- void (*add) (struct ccat_eth_frame *, struct ccat_eth_dma_fifo *);
+ void (*add) (struct ccat_eth_dma_fifo *, struct ccat_eth_frame *);
void __iomem *reg;
+ const struct ccat_eth_frame *end;
+ struct ccat_eth_frame *next;
struct ccat_dma dma;
};
@@ -145,18 +158,29 @@
struct ccat_bar bar[3]; //TODO optimize this
};
+struct ccat_info_block {
+ u16 type;
+ u16 rev;
+ union {
+ u32 config;
+ struct {
+ u8 tx_dma_chan;
+ u8 rx_dma_chan;
+ };
+ };
+ u32 addr;
+ u32 size;
+};
+
/**
* struct ccat_eth_priv - CCAT Ethernet/EtherCAT Master function (netdev)
* @ccatdev: pointer to the parent struct ccat_device
* @netdev: the net_device structure used by the kernel networking stack
- * @poll_thread: is used to poll status registers like link state
- * @rx_thread: thread which does housekeeping of RX DMA descriptors
- * @tx_thread: thread which does housekeeping of TX DMA descriptors
- * @next_tx_frame: pointer to the next TX DMA descriptor, which the tx_thread should check for availablity
* @info: holds a copy of the CCAT Ethernet/EtherCAT Master function information block (read from PCI config space)
* @reg: register addresses in PCI config space of the Ethernet/EtherCAT Master function
* @rx_fifo: DMA fifo used for RX DMA descriptors
* @tx_fifo: DMA fifo used for TX DMA descriptors
+ * @poll_timer: interval timer used to poll CCAT for events like link changed, rx done, tx done
* @rx_bytes: number of bytes received -> reported with ndo_get_stats64()
* @rx_dropped: number of received frames, which were dropped -> reported with ndo_get_stats64()
* @tx_bytes: number of bytes send -> reported with ndo_get_stats64()
@@ -165,27 +189,63 @@
struct ccat_eth_priv {
const struct ccat_device *ccatdev;
struct net_device *netdev;
- struct task_struct *poll_thread;
- struct task_struct *rx_thread;
- struct task_struct *tx_thread;
- const struct ccat_eth_frame *next_tx_frame; /* next frame the tx_thread should check for availability */
- CCatInfoBlock info;
+ struct ccat_info_block info;
struct ccat_eth_register reg;
struct ccat_eth_dma_fifo rx_fifo;
struct ccat_eth_dma_fifo tx_fifo;
+ struct hrtimer poll_timer;
atomic64_t rx_bytes;
atomic64_t rx_dropped;
atomic64_t tx_bytes;
atomic64_t tx_dropped;
ec_device_t *ecdev;
- void (*carrier_off) (struct net_device * const netdev);
- void (*carrier_on) (struct net_device * const netdev);
+ void (*carrier_off) (struct net_device * netdev);
+ bool (*carrier_ok) (const struct net_device * netdev);
+ void (*carrier_on) (struct net_device * netdev);
void (*kfree_skb_any) (struct sk_buff * skb);
- void (*start_queue) (struct net_device * const netdev);
- void (*stop_queue) (struct net_device * const netdev);
- void (*tx_fifo_full) (struct net_device * const dev,
- const struct ccat_eth_frame * const frame);
- void (*unregister) (struct net_device * const netdev);
+ void (*start_queue) (struct net_device * netdev);
+ void (*stop_queue) (struct net_device * netdev);
+ void (*unregister) (struct net_device * netdev);
+};
+
+/**
+ * same as: typedef struct _CCatInfoBlockOffs from CCatDefinitions.h
+ * TODO add some checking facility outside of the linux tree
+ */
+struct ccat_mac_infoblock {
+ u32 reserved;
+ u32 mii;
+ u32 tx_fifo;
+ u32 mac;
+ u32 rx_mem;
+ u32 tx_mem;
+ u32 misc;
+};
+
+struct ccat_mac_register {
+ /** MAC error register @+0x0 */
+ u8 frame_len_err;
+ u8 rx_err;
+ u8 crc_err;
+ u8 link_lost_err;
+ u32 reserved1;
+ /** Buffer overflow errors @+0x8 */
+ u8 rx_mem_full;
+ u8 reserved2[7];
+ /** MAC frame counter @+0x10 */
+ u32 tx_frames;
+ u32 rx_frames;
+ u64 reserved3;
+ /** MAC fifo level @+0x20 */
+ u8 tx_fifo_level:7;
+ u8 reserved4:1;
+ u8 reserved5[7];
+ /** TX memory full error @+0x28 */
+ u8 tx_mem_full;
+ u8 reserved6[7];
+ u64 reserved8[9];
+ /** Connection @+0x78 */
+ u8 mii_connected;
};
/**
@@ -203,6 +263,6 @@
dev_t dev;
struct cdev cdev;
struct class *class;
- CCatInfoBlock info;
+ struct ccat_info_block info;
};
#endif /* #ifndef _CCAT_H_ */
--- a/devices/ccat/netdev.c Mon Oct 27 14:19:49 2014 +0100
+++ b/devices/ccat/netdev.c Mon Oct 27 14:33:03 2014 +0100
@@ -19,23 +19,17 @@
*/
#include <linux/etherdevice.h>
-#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/kfifo.h>
-#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/netdevice.h>
-#include <linux/spinlock.h>
-
-#include "compat.h"
+
#include "module.h"
#include "netdev.h"
-#include "print.h"
/**
* EtherCAT frame to enable forwarding on EtherCAT Terminals
*/
-static const UINT8 frameForwardEthernetFrames[] = {
+static const u8 frameForwardEthernetFrames[] = {
0x01, 0x01, 0x05, 0x01, 0x00, 0x00,
0x00, 0x1b, 0x21, 0x36, 0x1b, 0xce,
0x88, 0xa4, 0x0e, 0x10,
@@ -50,39 +44,36 @@
};
#define FIFO_LENGTH 64
-#define DMA_POLL_DELAY_RANGE_USECS 100, 100 /* time to sleep between rx/tx DMA polls */
-#define POLL_DELAY_RANGE_USECS 500, 1000 /* time to sleep between link state polls */
-
-static void ec_poll(struct net_device *dev);
-static int run_poll_thread(void *data);
-static int run_rx_thread(void *data);
-static int run_tx_thread(void *data);
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)
-static struct rtnl_link_stats64 *ccat_eth_get_stats64(struct net_device *dev, struct rtnl_link_stats64
- *storage);
-#endif
-static int ccat_eth_open(struct net_device *dev);
-static netdev_tx_t ccat_eth_start_xmit(struct sk_buff *skb,
- struct net_device *dev);
-static int ccat_eth_stop(struct net_device *dev);
-static void ccat_eth_xmit_raw(struct net_device *dev, const char *data,
- size_t len);
-
-static const struct net_device_ops ccat_eth_netdev_ops = {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)
- .ndo_get_stats64 = ccat_eth_get_stats64,
-#endif
- .ndo_open = ccat_eth_open,
- .ndo_start_xmit = ccat_eth_start_xmit,
- .ndo_stop = ccat_eth_stop,
-};
+#define POLL_TIME ktime_set(0, 100 * NSEC_PER_USEC)
+
+/**
+ * Helper to check if frame in tx dma memory was already marked as sent by CCAT
+ */
+static inline bool ccat_eth_frame_sent(const struct ccat_eth_frame *const frame)
+{
+ return le32_to_cpu(frame->tx_flags) & CCAT_FRAME_SENT;
+}
+
+/**
+ * Helper to check if frame in tx dma memory was already marked as sent by CCAT
+ */
+static inline bool ccat_eth_frame_received(const struct ccat_eth_frame *const
+ frame)
+{
+ return le32_to_cpu(frame->rx_flags) & CCAT_FRAME_RECEIVED;
+}
static void ecdev_kfree_skb_any(struct sk_buff *skb)
{
/* never release a skb in EtherCAT mode */
}
+static bool ecdev_carrier_ok(const struct net_device *const netdev)
+{
+ struct ccat_eth_priv *const priv = netdev_priv(netdev);
+ return ecdev_get_link(priv->ecdev);
+}
+
static void ecdev_carrier_on(struct net_device *const netdev)
{
struct ccat_eth_priv *const priv = netdev_priv(netdev);
@@ -100,12 +91,6 @@
/* dummy called if nothing has to be done in EtherCAT operation mode */
}
-static void ecdev_tx_fifo_full(struct net_device *const dev,
- const struct ccat_eth_frame *const frame)
-{
- /* we are polled -> there is nothing we can do in EtherCAT mode */
-}
-
static void unregister_ecdev(struct net_device *const netdev)
{
struct ccat_eth_priv *const priv = netdev_priv(netdev);
@@ -113,48 +98,44 @@
ecdev_withdraw(priv->ecdev);
}
-typedef void (*fifo_add_function) (struct ccat_eth_frame *,
- struct ccat_eth_dma_fifo *);
-
-static void ccat_eth_rx_fifo_add(struct ccat_eth_frame *frame,
- struct ccat_eth_dma_fifo *fifo)
+static void ccat_eth_fifo_inc(struct ccat_eth_dma_fifo *fifo)
+{
+ if (++fifo->next >= fifo->end)
+ fifo->next = fifo->dma.virt;
+}
+
+typedef void (*fifo_add_function) (struct ccat_eth_dma_fifo *,
+ struct ccat_eth_frame *);
+
+static void ccat_eth_rx_fifo_add(struct ccat_eth_dma_fifo *fifo,
+ struct ccat_eth_frame *frame)
{
const size_t offset = ((void *)(frame) - fifo->dma.virt);
- const uint32_t addr_and_length = (1 << 31) | offset;
- frame->received = 0;
+ const u32 addr_and_length = (1 << 31) | offset;
+
+ frame->rx_flags = cpu_to_le32(0);
iowrite32(addr_and_length, fifo->reg);
}
-static void ccat_eth_tx_fifo_add_free(struct ccat_eth_frame *frame,
- struct ccat_eth_dma_fifo *fifo)
+static void ccat_eth_tx_fifo_add_free(struct ccat_eth_dma_fifo *fifo,
+ struct ccat_eth_frame *frame)
{
/* mark frame as ready to use for tx */
- frame->sent = 1;
-}
-
-static void ccat_eth_tx_fifo_full(struct net_device *const dev,
- const struct ccat_eth_frame *const frame)
-{
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- netif_stop_queue(dev);
- priv->next_tx_frame = frame;
- wake_up_process(priv->tx_thread);
+ frame->tx_flags = cpu_to_le32(CCAT_FRAME_SENT);
}
static void ccat_eth_dma_fifo_reset(struct ccat_eth_dma_fifo *fifo)
{
- struct ccat_eth_frame *frame = fifo->dma.virt;
- const struct ccat_eth_frame *const end = frame + FIFO_LENGTH;
-
/* reset hw fifo */
iowrite32(0, fifo->reg + 0x8);
wmb();
if (fifo->add) {
- while (frame < end) {
- fifo->add(frame, fifo);
- ++frame;
- }
+ fifo->next = fifo->dma.virt;
+ do {
+ fifo->add(fifo, fifo->next);
+ ccat_eth_fifo_inc(fifo);
+ } while (fifo->next != fifo->dma.virt);
}
}
@@ -166,10 +147,11 @@
if (0 !=
ccat_dma_init(&fifo->dma, channel, priv->ccatdev->bar[2].ioaddr,
&priv->ccatdev->pdev->dev)) {
- pr_info("init DMA%llu memory failed.\n", (uint64_t) channel);
+ pr_info("init DMA%llu memory failed.\n", (u64) channel);
return -1;
}
fifo->add = add;
+ fifo->end = ((struct ccat_eth_frame *)fifo->dma.virt) + FIFO_LENGTH;
fifo->reg = fifo_reg;
return 0;
}
@@ -187,7 +169,6 @@
/* release dma */
ccat_dma_free(&priv->rx_fifo.dma);
ccat_dma_free(&priv->tx_fifo.dma);
- pr_debug("DMA fifo's stopped.\n");
}
/**
@@ -197,14 +178,14 @@
{
if (ccat_eth_dma_fifo_init
(&priv->rx_fifo, priv->reg.rx_fifo, ccat_eth_rx_fifo_add,
- priv->info.rxDmaChn, priv)) {
+ priv->info.rx_dma_chan, priv)) {
pr_warn("init Rx DMA fifo failed.\n");
return -1;
}
if (ccat_eth_dma_fifo_init
(&priv->tx_fifo, priv->reg.tx_fifo, ccat_eth_tx_fifo_add_free,
- priv->info.txDmaChn, priv)) {
+ priv->info.tx_dma_chan, priv)) {
pr_warn("init Tx DMA fifo failed.\n");
ccat_dma_free(&priv->rx_fifo.dma);
return -1;
@@ -222,17 +203,137 @@
*/
static void ccat_eth_priv_init_mappings(struct ccat_eth_priv *priv)
{
- CCatInfoBlockOffs offsets;
+ struct ccat_mac_infoblock offsets;
void __iomem *const func_base =
- priv->ccatdev->bar[0].ioaddr + priv->info.nAddr;
+ priv->ccatdev->bar[0].ioaddr + priv->info.addr;
+
memcpy_fromio(&offsets, func_base, sizeof(offsets));
- priv->reg.mii = func_base + offsets.nMMIOffs;
- priv->reg.tx_fifo = func_base + offsets.nTxFifoOffs;
- priv->reg.rx_fifo = func_base + offsets.nTxFifoOffs + 0x10;
- priv->reg.mac = func_base + offsets.nMacRegOffs;
- priv->reg.rx_mem = func_base + offsets.nRxMemOffs;
- priv->reg.tx_mem = func_base + offsets.nTxMemOffs;
- priv->reg.misc = func_base + offsets.nMiscOffs;
+ priv->reg.mii = func_base + offsets.mii;
+ priv->reg.tx_fifo = func_base + offsets.tx_fifo;
+ priv->reg.rx_fifo = func_base + offsets.tx_fifo + 0x10;
+ priv->reg.mac = func_base + offsets.mac;
+ priv->reg.rx_mem = func_base + offsets.rx_mem;
+ priv->reg.tx_mem = func_base + offsets.tx_mem;
+ priv->reg.misc = func_base + offsets.misc;
+}
+
+static netdev_tx_t ccat_eth_start_xmit(struct sk_buff *skb,
+ struct net_device *dev)
+{
+ struct ccat_eth_priv *const priv = netdev_priv(dev);
+ struct ccat_eth_dma_fifo *const fifo = &priv->tx_fifo;
+ u32 addr_and_length;
+
+ if (skb_is_nonlinear(skb)) {
+ pr_warn("Non linear skb not supported -> drop frame.\n");
+ atomic64_inc(&priv->tx_dropped);
+ priv->kfree_skb_any(skb);
+ return NETDEV_TX_OK;
+ }
+
+ if (skb->len > sizeof(fifo->next->data)) {
+ pr_warn("skb.len %llu exceeds dma buffer %llu -> drop frame.\n",
+ (u64) skb->len, (u64) sizeof(fifo->next->data));
+ atomic64_inc(&priv->tx_dropped);
+ priv->kfree_skb_any(skb);
+ return NETDEV_TX_OK;
+ }
+
+ if (!ccat_eth_frame_sent(fifo->next)) {
+ netdev_err(dev, "BUG! Tx Ring full when queue awake!\n");
+ priv->stop_queue(priv->netdev);
+ return NETDEV_TX_BUSY;
+ }
+
+ /* prepare frame in DMA memory */
+ fifo->next->tx_flags = cpu_to_le32(0);
+ fifo->next->length = cpu_to_le16(skb->len);
+ memcpy(fifo->next->data, skb->data, skb->len);
+
+ /* Queue frame into CCAT TX-FIFO, CCAT ignores the first 8 bytes of the tx descriptor */
+ addr_and_length = offsetof(struct ccat_eth_frame, length);
+ addr_and_length += ((void *)fifo->next - fifo->dma.virt);
+ addr_and_length += ((skb->len + CCAT_ETH_FRAME_HEAD_LEN) / 8) << 24;
+ iowrite32(addr_and_length, priv->reg.tx_fifo);
+
+ /* update stats */
+ atomic64_add(skb->len, &priv->tx_bytes);
+
+ priv->kfree_skb_any(skb);
+
+ ccat_eth_fifo_inc(fifo);
+ /* stop queue if tx ring is full */
+ if (!ccat_eth_frame_sent(fifo->next)) {
+ priv->stop_queue(priv->netdev);
+ }
+ return NETDEV_TX_OK;
+}
+
+/**
+ * Function to transmit a raw buffer to the network (f.e. frameForwardEthernetFrames)
+ * @dev a valid net_device
+ * @data pointer to your raw buffer
+ * @len number of bytes in the raw buffer to transmit
+ */
+static void ccat_eth_xmit_raw(struct net_device *dev, const char *const data,
+ size_t len)
+{
+ struct sk_buff *skb = dev_alloc_skb(len);
+
+ skb->dev = dev;
+ skb_copy_to_linear_data(skb, data, len);
+ skb_put(skb, len);
+ ccat_eth_start_xmit(skb, dev);
+}
+
+static void ccat_eth_receive(struct net_device *const dev,
+ const void *const data, const size_t len)
+{
+ struct sk_buff *const skb = dev_alloc_skb(len + NET_IP_ALIGN);
+ struct ccat_eth_priv *const priv = netdev_priv(dev);
+
+ if (!skb) {
+ pr_info("%s() out of memory :-(\n", __FUNCTION__);
+ atomic64_inc(&priv->rx_dropped);
+ return;
+ }
+ skb->dev = dev;
+ skb_reserve(skb, NET_IP_ALIGN);
+ skb_copy_to_linear_data(skb, data, len);
+ skb_put(skb, len);
+ skb->protocol = eth_type_trans(skb, dev);
+ skb->ip_summed = CHECKSUM_UNNECESSARY;
+ atomic64_add(len, &priv->rx_bytes);
+ netif_rx(skb);
+}
+
+static void ccat_eth_link_down(struct net_device *const dev)
+{
+ struct ccat_eth_priv *const priv = netdev_priv(dev);
+
+ priv->stop_queue(dev);
+ priv->carrier_off(dev);
+ netdev_info(dev, "NIC Link is Down\n");
+}
+
+static void ccat_eth_link_up(struct net_device *const dev)
+{
+ struct ccat_eth_priv *const priv = netdev_priv(dev);
+
+ netdev_info(dev, "NIC Link is Up\n");
+ /* TODO netdev_info(dev, "NIC Link is Up %u Mbps %s Duplex\n",
+ speed == SPEED_100 ? 100 : 10,
+ cmd.duplex == DUPLEX_FULL ? "Full" : "Half"); */
+
+ ccat_eth_dma_fifo_reset(&priv->rx_fifo);
+ ccat_eth_dma_fifo_reset(&priv->tx_fifo);
+
+ /* TODO reset CCAT MAC register */
+
+ ccat_eth_xmit_raw(dev, frameForwardEthernetFrames,
+ sizeof(frameForwardEthernetFrames));
+ priv->carrier_on(dev);
+ priv->start_queue(dev);
}
/**
@@ -245,30 +346,99 @@
return (1 << 24) == (ioread32(priv->reg.mii + 0x8 + 4) & (1 << 24));
}
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)
+/**
+ * Poll for link state changes
+ */
+static void poll_link(struct ccat_eth_priv *const priv)
+{
+ const size_t link = ccat_eth_priv_read_link_state(priv);
+
+ if (link != priv->carrier_ok(priv->netdev)) {
+ if (link)
+ ccat_eth_link_up(priv->netdev);
+ else
+ ccat_eth_link_down(priv->netdev);
+ }
+}
+
+/**
+ * Poll for available rx dma descriptors in ethernet operating mode
+ */
+static void poll_rx(struct ccat_eth_priv *const priv)
+{
+ static const size_t overhead = CCAT_ETH_FRAME_HEAD_LEN - 4;
+ struct ccat_eth_dma_fifo *const fifo = &priv->rx_fifo;
+
+ /* TODO omit possible deadlock in situations with heavy traffic */
+ while (ccat_eth_frame_received(fifo->next)) {
+ const size_t len = le16_to_cpu(fifo->next->length) - overhead;
+ if (priv->ecdev) {
+ ecdev_receive(priv->ecdev, fifo->next->data, len);
+ } else {
+ ccat_eth_receive(priv->netdev, fifo->next->data, len);
+ }
+ ccat_eth_rx_fifo_add(fifo, fifo->next);
+ ccat_eth_fifo_inc(fifo);
+ }
+}
+
+static void ec_poll_rx(struct net_device *dev)
+{
+ struct ccat_eth_priv *const priv = netdev_priv(dev);
+ poll_rx(priv);
+}
+
+/**
+ * Poll for available tx dma descriptors in ethernet operating mode
+ */
+static void poll_tx(struct ccat_eth_priv *const priv)
+{
+ if (ccat_eth_frame_sent(priv->tx_fifo.next)) {
+ netif_wake_queue(priv->netdev);
+ }
+}
+
+/**
+ * Since CCAT doesn't support interrupts until now, we have to poll
+ * some status bits to recognize things like link change etc.
+ */
+static enum hrtimer_restart poll_timer_callback(struct hrtimer *timer)
+{
+ struct ccat_eth_priv *const priv =
+ container_of(timer, struct ccat_eth_priv, poll_timer);
+
+ poll_link(priv);
+ if(!priv->ecdev) {
+ poll_rx(priv);
+ poll_tx(priv);
+ }
+ hrtimer_forward_now(timer, POLL_TIME);
+ return HRTIMER_RESTART;
+}
+
static struct rtnl_link_stats64 *ccat_eth_get_stats64(struct net_device *dev, struct rtnl_link_stats64
*storage)
{
struct ccat_eth_priv *const priv = netdev_priv(dev);
- CCatMacRegs mac;
+ struct ccat_mac_register mac;
memcpy_fromio(&mac, priv->reg.mac, sizeof(mac));
- storage->rx_packets = mac.rxFrameCnt; /* total packets received */
- storage->tx_packets = mac.txFrameCnt; /* total packets transmitted */
+ storage->rx_packets = mac.rx_frames; /* total packets received */
+ storage->tx_packets = mac.tx_frames; /* total packets transmitted */
storage->rx_bytes = atomic64_read(&priv->rx_bytes); /* total bytes received */
storage->tx_bytes = atomic64_read(&priv->tx_bytes); /* total bytes transmitted */
- storage->rx_errors = mac.frameLenErrCnt + mac.dropFrameErrCnt + mac.crcErrCnt + mac.rxErrCnt; /* bad packets received */
- //TODO __u64 tx_errors; /* packet transmit problems */
+ storage->rx_errors = mac.frame_len_err + mac.rx_mem_full + mac.crc_err + mac.rx_err; /* bad packets received */
+ storage->tx_errors = mac.tx_mem_full; /* packet transmit problems */
storage->rx_dropped = atomic64_read(&priv->rx_dropped); /* no space in linux buffers */
storage->tx_dropped = atomic64_read(&priv->tx_dropped); /* no space available in linux */
//TODO __u64 multicast; /* multicast packets received */
//TODO __u64 collisions;
/* detailed rx_errors: */
- storage->rx_length_errors = mac.frameLenErrCnt;
- storage->rx_over_errors = mac.dropFrameErrCnt; /* receiver ring buff overflow */
- storage->rx_crc_errors = mac.crcErrCnt; /* recved pkt with crc error */
- storage->rx_frame_errors = mac.rxErrCnt; /* recv'd frame alignment error */
- storage->rx_fifo_errors = mac.dropFrameErrCnt; /* recv'r fifo overrun */
+ storage->rx_length_errors = mac.frame_len_err;
+ storage->rx_over_errors = mac.rx_mem_full; /* receiver ring buff overflow */
+ storage->rx_crc_errors = mac.crc_err; /* recved pkt with crc error */
+ storage->rx_frame_errors = mac.rx_err; /* recv'd frame alignment error */
+ storage->rx_fifo_errors = mac.rx_mem_full; /* recv'r fifo overrun */
//TODO __u64 rx_missed_errors; /* receiver missed packet */
/* detailed tx_errors */
@@ -283,13 +453,39 @@
//TODO __u64 tx_compressed;
return storage;
}
-#endif
+
+static int ccat_eth_open(struct net_device *dev)
+{
+ struct ccat_eth_priv *const priv = netdev_priv(dev);
+
+ hrtimer_init(&priv->poll_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ priv->poll_timer.function = poll_timer_callback;
+ hrtimer_start(&priv->poll_timer, POLL_TIME, HRTIMER_MODE_REL);
+ return 0;
+}
+
+static int ccat_eth_stop(struct net_device *dev)
+{
+ struct ccat_eth_priv *const priv = netdev_priv(dev);
+
+ priv->stop_queue(dev);
+ hrtimer_cancel(&priv->poll_timer);
+ return 0;
+}
+
+static const struct net_device_ops ccat_eth_netdev_ops = {
+ .ndo_get_stats64 = ccat_eth_get_stats64,
+ .ndo_open = ccat_eth_open,
+ .ndo_start_xmit = ccat_eth_start_xmit,
+ .ndo_stop = ccat_eth_stop,
+};
struct ccat_eth_priv *ccat_eth_init(const struct ccat_device *const ccatdev,
const void __iomem * const addr)
{
struct ccat_eth_priv *priv;
struct net_device *const netdev = alloc_etherdev(sizeof(*priv));
+
priv = netdev_priv(netdev);
priv->netdev = netdev;
priv->ccatdev = ccatdev;
@@ -297,7 +493,6 @@
/* ccat register mappings */
memcpy_fromio(&priv->info, addr, sizeof(priv->info));
ccat_eth_priv_init_mappings(priv);
- ccat_print_function_info(priv);
if (ccat_eth_priv_init_dma(priv)) {
pr_warn("%s(): DMA initialization failed.\n", __FUNCTION__);
@@ -306,19 +501,21 @@
}
/* init netdev with MAC and stack callbacks */
- memcpy_fromio(netdev->dev_addr, priv->reg.mii + 8, 6);
+ memcpy_fromio(netdev->dev_addr, priv->reg.mii + 8, netdev->addr_len);
netdev->netdev_ops = &ccat_eth_netdev_ops;
/* use as EtherCAT device? */
- priv->ecdev = ecdev_offer(netdev, ec_poll, THIS_MODULE);
+ priv->ecdev = ecdev_offer(netdev, ec_poll_rx, THIS_MODULE);
if (priv->ecdev) {
priv->carrier_off = ecdev_carrier_off;
+ priv->carrier_ok = ecdev_carrier_ok;
priv->carrier_on = ecdev_carrier_on;
priv->kfree_skb_any = ecdev_kfree_skb_any;
priv->start_queue = ecdev_nop;
priv->stop_queue = ecdev_nop;
- priv->tx_fifo_full = ecdev_tx_fifo_full;
priv->unregister = unregister_ecdev;
+
+ priv->carrier_off(netdev);
if (ecdev_open(priv->ecdev)) {
pr_info("unable to register network device.\n");
ecdev_withdraw(priv->ecdev);
@@ -331,12 +528,14 @@
/* EtherCAT disabled -> prepare normal ethernet mode */
priv->carrier_off = netif_carrier_off;
+ priv->carrier_ok = netif_carrier_ok;
priv->carrier_on = netif_carrier_on;
priv->kfree_skb_any = dev_kfree_skb_any;
priv->start_queue = netif_start_queue;
priv->stop_queue = netif_stop_queue;
- priv->tx_fifo_full = ccat_eth_tx_fifo_full;
priv->unregister = unregister_netdev;
+
+ priv->carrier_off(netdev);
if (register_netdev(netdev)) {
pr_info("unable to register network device.\n");
ccat_eth_priv_free_dma(priv);
@@ -344,252 +543,12 @@
return NULL;
}
pr_info("registered %s as network device.\n", netdev->name);
- priv->rx_thread = kthread_run(run_rx_thread, netdev, "%s_rx", DRV_NAME);
- priv->tx_thread = kthread_run(run_tx_thread, netdev, "%s_tx", DRV_NAME);
return priv;
}
void ccat_eth_remove(struct ccat_eth_priv *const priv)
{
- if (priv->rx_thread) {
- kthread_stop(priv->rx_thread);
- }
- if (priv->tx_thread) {
- kthread_stop(priv->tx_thread);
- }
priv->unregister(priv->netdev);
ccat_eth_priv_free_dma(priv);
free_netdev(priv->netdev);
- pr_debug("%s(): done\n", __FUNCTION__);
-}
-
-static int ccat_eth_open(struct net_device *dev)
-{
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- priv->carrier_off(dev);
- priv->poll_thread =
- kthread_run(run_poll_thread, dev, "%s_poll", DRV_NAME);
-
- //TODO
- return 0;
-}
-
-static const size_t CCATRXDESC_HEADER_LEN = 20;
-static void ccat_eth_receive(struct net_device *const dev,
- const struct ccat_eth_frame *const frame)
-{
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- const size_t len = frame->length - CCATRXDESC_HEADER_LEN;
- struct sk_buff *skb = dev_alloc_skb(len + NET_IP_ALIGN);
- if (!skb) {
- pr_info("%s() out of memory :-(\n", __FUNCTION__);
- atomic64_inc(&priv->rx_dropped);
- return;
- }
- skb->dev = dev;
- skb_reserve(skb, NET_IP_ALIGN);
- skb_copy_to_linear_data(skb, frame->data, len);
- skb_put(skb, len);
- skb->protocol = eth_type_trans(skb, dev);
- skb->ip_summed = CHECKSUM_UNNECESSARY;
- atomic64_add(len, &priv->rx_bytes);
- netif_rx(skb);
-}
-
-/**
- * Rx handler in EtherCAT operation mode
- * priv->ecdev should always be valid!
- */
-static void ec_poll(struct net_device *dev)
-{
- static size_t next = 0;
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- struct ccat_eth_frame *frame =
- ((struct ccat_eth_frame *)priv->rx_fifo.dma.virt) + next;
- if (frame->received) {
- ecdev_receive(priv->ecdev, frame->data,
- frame->length - CCATRXDESC_HEADER_LEN);
- frame->received = 0;
- ccat_eth_rx_fifo_add(frame, &priv->rx_fifo);
- next = (next + 1) % FIFO_LENGTH;
- } else {
- //TODO dev_warn(&dev->dev, "%s(): frame was not ready\n", __FUNCTION__);
- }
-}
-
-static netdev_tx_t ccat_eth_start_xmit(struct sk_buff *skb,
- struct net_device *dev)
-{
- static size_t next = 0;
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- struct ccat_eth_frame *const frame =
- ((struct ccat_eth_frame *)priv->tx_fifo.dma.virt);
- uint32_t addr_and_length;
-
- if (skb_is_nonlinear(skb)) {
- pr_warn("Non linear skb not supported -> drop frame.\n");
- atomic64_inc(&priv->tx_dropped);
- priv->kfree_skb_any(skb);
- return NETDEV_TX_OK;
- }
-
- if (skb->len > sizeof(frame->data)) {
- pr_warn("skb.len %llu exceeds dma buffer %llu -> drop frame.\n",
- (uint64_t) skb->len, (uint64_t) sizeof(frame->data));
- atomic64_inc(&priv->tx_dropped);
- priv->kfree_skb_any(skb);
- return NETDEV_TX_OK;
- }
-
- if (!frame[next].sent) {
- netdev_err(dev, "BUG! Tx Ring full when queue awake!\n");
- ccat_eth_tx_fifo_full(dev, &frame[next]);
- return NETDEV_TX_BUSY;
- }
-
- /* prepare frame in DMA memory */
- frame[next].sent = 0;
- frame[next].length = skb->len;
- memcpy(frame[next].data, skb->data, skb->len);
-
- priv->kfree_skb_any(skb);
-
- addr_and_length = 8 + (next * sizeof(*frame));
- addr_and_length +=
- ((frame[next].length + CCAT_DMA_FRAME_HEADER_LENGTH) / 8) << 24;
- iowrite32(addr_and_length, priv->reg.tx_fifo); /* add to DMA fifo */
- atomic64_add(frame[next].length, &priv->tx_bytes); /* update stats */
-
- next = (next + 1) % FIFO_LENGTH;
- /* stop queue if tx ring is full */
- if (!frame[next].sent) {
- ccat_eth_tx_fifo_full(dev, &frame[next]);
- }
- return NETDEV_TX_OK;
-}
-
-static int ccat_eth_stop(struct net_device *dev)
-{
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- priv->stop_queue(dev);
- if (priv->poll_thread) {
- /* TODO care about smp context? */
- kthread_stop(priv->poll_thread);
- priv->poll_thread = NULL;
- }
- netdev_info(dev, "stopped.\n");
- return 0;
-}
-
-static void ccat_eth_link_down(struct net_device *dev)
-{
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- priv->stop_queue(dev);
- priv->carrier_off(dev);
- netdev_info(dev, "NIC Link is Down\n");
-}
-
-static void ccat_eth_link_up(struct net_device *const dev)
-{
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- netdev_info(dev, "NIC Link is Up\n");
- /* TODO netdev_info(dev, "NIC Link is Up %u Mbps %s Duplex\n",
- speed == SPEED_100 ? 100 : 10,
- cmd.duplex == DUPLEX_FULL ? "Full" : "Half"); */
-
- ccat_eth_dma_fifo_reset(&priv->rx_fifo);
- ccat_eth_dma_fifo_reset(&priv->tx_fifo);
- ccat_eth_xmit_raw(dev, frameForwardEthernetFrames,
- sizeof(frameForwardEthernetFrames));
- priv->carrier_on(dev);
- priv->start_queue(dev);
-}
-
-/**
- * Function to transmit a raw buffer to the network (f.e. frameForwardEthernetFrames)
- * @dev a valid net_device
- * @data pointer to your raw buffer
- * @len number of bytes in the raw buffer to transmit
- */
-static void ccat_eth_xmit_raw(struct net_device *dev, const char *const data,
- size_t len)
-{
- struct sk_buff *skb = dev_alloc_skb(len);
- skb->dev = dev;
- skb_copy_to_linear_data(skb, data, len);
- skb_put(skb, len);
- ccat_eth_start_xmit(skb, dev);
-}
-
-/**
- * Since CCAT doesn't support interrupts until now, we have to poll
- * some status bits to recognize things like link change etc.
- */
-static int run_poll_thread(void *data)
-{
- struct net_device *const dev = (struct net_device *)data;
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- size_t link = 0;
-
- while (!kthread_should_stop()) {
- if (ccat_eth_priv_read_link_state(priv) != link) {
- link = !link;
- link ? ccat_eth_link_up(dev) : ccat_eth_link_down(dev);
- }
- usleep_range(POLL_DELAY_RANGE_USECS);
- }
- pr_debug("%s() stopped.\n", __FUNCTION__);
- return 0;
-}
-
-static int run_rx_thread(void *data)
-{
- struct net_device *const dev = (struct net_device *)data;
- struct ccat_eth_priv *const priv = netdev_priv(dev);
- struct ccat_eth_frame *frame = priv->rx_fifo.dma.virt;
- const struct ccat_eth_frame *const end = frame + FIFO_LENGTH;
-
- while (!kthread_should_stop()) {
- /* wait until frame was used by DMA for Rx */
- while (!kthread_should_stop() && !frame->received) {
- usleep_range(DMA_POLL_DELAY_RANGE_USECS);
- }
-
- /* can be NULL, if we are asked to stop! */
- if (frame->received) {
- ccat_eth_receive(dev, frame);
- frame->received = 0;
- ccat_eth_rx_fifo_add(frame, &priv->rx_fifo);
- }
- if (++frame >= end) {
- frame = priv->rx_fifo.dma.virt;
- }
- }
- pr_debug("%s() stopped.\n", __FUNCTION__);
- return 0;
-}
-
-/**
- * Polling of tx dma descriptors in ethernet operating mode
- */
-static int run_tx_thread(void *data)
-{
- struct net_device *const dev = (struct net_device *)data;
- struct ccat_eth_priv *const priv = netdev_priv(dev);
-
- set_current_state(TASK_INTERRUPTIBLE);
- while (!kthread_should_stop()) {
- const struct ccat_eth_frame *const frame = priv->next_tx_frame;
- if (frame) {
- while (!kthread_should_stop() && !frame->sent) {
- usleep_range(DMA_POLL_DELAY_RANGE_USECS);
- }
- }
- netif_wake_queue(dev);
- schedule();
- set_current_state(TASK_INTERRUPTIBLE);
- }
- set_current_state(TASK_RUNNING);
- pr_debug("%s() stopped.\n", __FUNCTION__);
- return 0;
-}
+}
--- a/devices/ccat/print.c Mon Oct 27 14:19:49 2014 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,180 +0,0 @@
-/**
- Network Driver for Beckhoff CCAT communication controller
- Copyright (C) 2014 Beckhoff Automation GmbH
- Author: Patrick Bruenn <p.bruenn@beckhoff.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-*/
-
-#include <linux/kernel.h>
-#include "CCatDefinitions.h"
-#include "module.h"
-#include "print.h"
-
-#define TESTING_ENABLED 1
-void print_mem(const unsigned char *p, size_t lines)
-{
-#if TESTING_ENABLED
- pr_info("mem at: %p\n", p);
- pr_info(" 0 1 2 3 4 5 6 7 8 9 A B C D E F\n");
- while (lines > 0) {
- pr_info
- ("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
- p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9],
- p[10], p[11], p[12], p[13], p[14], p[15]);
- p += 16;
- --lines;
- }
-#endif /* #if TESTING_ENABLED */
-}
-
-static const char *CCatFunctionTypes[CCATINFO_MAX + 1] = {
- "not used",
- "Informationblock",
- "EtherCAT Slave",
- "EtherCAT Master without DMA",
- "Ethernet MAC without DMA",
- "Ethernet Switch",
- "Sercos III",
- "Profibus",
- "CAN Controller",
- "KBUS Master",
- "IP-Link Master (planned)",
- "SPI Master",
- "I²C",
- "GPIO",
- "Drive",
- "CCAT Update",
- "Systemtime",
- "Interrupt Controller",
- "EEPROM Controller",
- "DMA Controller",
- "EtherCAT Master with DMA",
- "Ethernet MAC with DMA",
- "SRAM Interface",
- "Internal Copy block",
- "unknown"
-};
-
-static void print_CCatDmaRxActBuf(const struct ccat_eth_priv *const priv)
-{
- CCatDmaRxActBuf rx_fifo;
- memcpy_fromio(&rx_fifo, priv->reg.rx_fifo, sizeof(rx_fifo));
- pr_debug("Rx FIFO base address: %p\n", priv->reg.rx_fifo);
- pr_debug(" Rx Frame Header start: 0x%08x\n", rx_fifo.startAddr);
- pr_debug(" reserved: 0x%08x\n", rx_fifo.reserved1);
- pr_debug(" Rx start address valid: %8u\n", rx_fifo.nextValid);
- pr_debug(" reserved: 0x%08x\n", rx_fifo.reserved2);
- pr_debug(" FIFO level: 0x%08x\n", rx_fifo.FifoLevel);
- pr_debug(" Buffer level: 0x%08x\n", rx_fifo.bufferLevel);
- pr_debug(" next address: 0x%08x\n", rx_fifo.nextAddr);
-}
-
-static void print_CCatDmaTxFifo(const struct ccat_eth_priv *const priv)
-{
- CCatDmaTxFifo tx_fifo;
- memcpy_fromio(&tx_fifo, priv->reg.tx_fifo, sizeof(tx_fifo));
- pr_debug("Tx FIFO base address: %p\n", priv->reg.tx_fifo);
- pr_debug(" Tx Frame Header start: 0x%08x\n", tx_fifo.startAddr);
- pr_debug(" # 64 bit words: %10d\n", tx_fifo.numQuadWords);
- pr_debug(" reserved: 0x%08x\n", tx_fifo.reserved1);
- pr_debug(" FIFO reset: 0x%08x\n", tx_fifo.fifoReset);
-}
-
-static void print_CCatInfoBlock(const CCatInfoBlock * info,
- const void __iomem * const base_addr)
-{
- const size_t index = min((int)info->eCCatInfoType, CCATINFO_MAX);
- pr_debug("%s\n", CCatFunctionTypes[index]);
- pr_debug(" revision: 0x%x\n", info->nRevision);
- pr_debug(" RX channel: %d\n", info->rxDmaChn);
- pr_debug(" TX channel: %d\n", info->txDmaChn);
- pr_debug(" baseaddr: 0x%x\n", info->nAddr);
- pr_debug(" size: 0x%x\n", info->nSize);
- pr_debug(" subfunction: %p\n", base_addr);
-}
-
-static void print_CCatMacRegs(const struct ccat_eth_priv *const priv)
-{
- CCatMacRegs mac;
- memcpy_fromio(&mac, priv->reg.mac, sizeof(mac));
- pr_debug("MAC base address: %p\n", priv->reg.mac);
- pr_debug(" frame length error count: %10d\n", mac.frameLenErrCnt);
- pr_debug(" RX error count: %10d\n", mac.rxErrCnt);
- pr_debug(" CRC error count: %10d\n", mac.crcErrCnt);
- pr_debug(" Link lost error count: %10d\n", mac.linkLostErrCnt);
- pr_debug(" reserved: 0x%08x\n", mac.reserved1);
- pr_debug(" RX overflow count: %10d\n",
- mac.dropFrameErrCnt);
- pr_debug(" DMA overflow count: %10d\n", mac.reserved2[0]);
- //pr_debug(" reserverd: %10d\n", DRV_NAME, mac.reserved2[1]);
- pr_debug(" TX frame counter: %10d\n", mac.txFrameCnt);
- pr_debug(" RX frame counter: %10d\n", mac.rxFrameCnt);
- pr_debug(" TX-FIFO level: 0x%08x\n", mac.txFifoLevel);
- pr_debug(" MII connection: 0x%08x\n", mac.miiConnected);
-}
-
-static void print_CCatMii(const struct ccat_eth_priv *const priv)
-{
- CCatMii mii;
- memcpy_fromio(&mii, priv->reg.mii, sizeof(mii));
- pr_debug("MII base address: %p\n", priv->reg.mii);
- pr_debug(" MII cycle: %s\n",
- mii.startMiCycle ? "running" : "no cycle");
- pr_debug(" reserved: 0x%x\n", mii.reserved1);
- pr_debug(" cmd valid: %s\n", mii.cmdErr ? "no" : "yes");
- pr_debug(" cmd: 0x%x\n", mii.cmd);
- pr_debug(" reserved: 0x%x\n", mii.reserved2);
- pr_debug(" PHY addr: 0x%x\n", mii.phyAddr);
- pr_debug(" reserved: 0x%x\n", mii.reserved3);
- pr_debug(" PHY reg: 0x%x\n", mii.phyReg);
- pr_debug(" reserved: 0x%x\n", mii.reserved4);
- pr_debug(" PHY write: 0x%x\n", mii.phyWriteData);
- pr_debug(" PHY read: 0x%x\n", mii.phyReadData);
- pr_debug(" MAC addr: %02x:%02x:%02x:%02x:%02x:%02x\n",
- mii.macAddr.b[0], mii.macAddr.b[1], mii.macAddr.b[2],
- mii.macAddr.b[3], mii.macAddr.b[4], mii.macAddr.b[5]);
- pr_debug(" MAC filter enable: %s\n",
- mii.macFilterEnabled ? "enabled" : "disabled");
- pr_debug(" reserved: 0x%x\n", mii.reserved6);
- pr_debug(" Link State: %s\n",
- mii.linkStatus ? "link" : "no link");
- pr_debug(" reserved: 0x%x\n", mii.reserved7);
- //pr_debug(" reserved: 0x%x\n", DRV_NAME, mii.reserved8);
- //TODO add leds, systemtime insertion and interrupts
-}
-
-void ccat_print_function_info(struct ccat_eth_priv *priv)
-{
- print_CCatInfoBlock(&priv->info, priv->ccatdev->bar[0].ioaddr);
- print_CCatMii(priv);
- print_CCatDmaTxFifo(priv);
- print_CCatDmaRxActBuf(priv);
- print_CCatMacRegs(priv);
- pr_debug(" RX window: %p\n", priv->reg.rx_mem);
- pr_debug(" TX memory: %p\n", priv->reg.tx_mem);
- pr_debug(" misc: %p\n", priv->reg.misc);
-}
-
-void print_update_info(const CCatInfoBlock * const info,
- void __iomem * const ioaddr)
-{
- const size_t index = min((int)info->eCCatInfoType, CCATINFO_MAX);
- pr_debug("%s\n", CCatFunctionTypes[index]);
- pr_debug(" revision: 0x%x\n", info->nRevision);
- pr_debug(" baseaddr: 0x%x\n", info->nAddr);
- pr_debug(" size: 0x%x\n", info->nSize);
- pr_debug(" PROM ID is: 0x%x\n", ccat_get_prom_id(ioaddr));
-}
--- a/devices/ccat/print.h Mon Oct 27 14:19:49 2014 +0100
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,30 +0,0 @@
-/**
- Network Driver for Beckhoff CCAT communication controller
- Copyright (C) 2014 Beckhoff Automation GmbH
- Author: Patrick Bruenn <p.bruenn@beckhoff.com>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-*/
-
-#ifndef _PRINT_H_
-#define _PRINT_H_
-
-#include "update.h"
-
-extern void ccat_print_function_info(struct ccat_eth_priv *priv);
-extern void print_mem(const unsigned char *p, size_t lines);
-extern void print_update_info(const CCatInfoBlock * const info,
- void __iomem * const ioaddr);
-#endif /* #ifndef _PRINT_H_ */
--- a/devices/ccat/update.c Mon Oct 27 14:19:49 2014 +0100
+++ b/devices/ccat/update.c Mon Oct 27 14:33:03 2014 +0100
@@ -23,9 +23,7 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/uaccess.h>
-#include "compat.h"
#include "module.h"
-#include "print.h"
#include "update.h"
#define CCAT_DATA_IN_4 0x038
@@ -59,14 +57,6 @@
size_t size;
};
-static void ccat_wait_status_cleared(void __iomem * const ioaddr);
-static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,
- uint32_t len, loff_t * off);
-static void ccat_write_flash(const struct update_buffer *const buf);
-static void ccat_update_cmd(void __iomem * const ioaddr, uint8_t cmd,
- uint16_t clocks);
-static void ccat_update_destroy(struct kref *ref);
-
/**
* wait_until_busy_reset() - wait until the busy flag was reset
* @ioaddr: address of the CCAT Update function in PCI config space
@@ -79,11 +69,221 @@
}
}
+/**
+ * __ccat_update_cmd() - Helper to issue a FPGA flash command
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ * @cmd: the command identifier
+ * @clocks: the number of clocks associated with the specified command
+ *
+ * no write memory barrier is called and the busy flag is not evaluated
+ */
+static inline void __ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,
+ u16 clocks)
+{
+ iowrite8((0xff00 & clocks) >> 8, ioaddr);
+ iowrite8(0x00ff & clocks, ioaddr + 0x8);
+ iowrite8(cmd, ioaddr + 0x10);
+}
+
+/**
+ * ccat_update_cmd() - Helper to issue a FPGA flash command
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ * @cmd: the command identifier
+ * @clocks: the number of clocks associated with the specified command
+ *
+ * Triggers a full flash command cycle with write memory barrier and
+ * command activate. This call blocks until the busy flag is reset.
+ */
+static inline void ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,
+ u16 clocks)
+{
+ __ccat_update_cmd(ioaddr, cmd, clocks);
+ wmb();
+ iowrite8(0xff, ioaddr + 0x7f8);
+ wait_until_busy_reset(ioaddr);
+}
+
+/**
+ * ccat_update_cmd_addr() - Helper to issue a FPGA flash command with address parameter
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ * @cmd: the command identifier
+ * @clocks: the number of clocks associated with the specified command
+ * @addr: 24 bit address associated with the specified command
+ *
+ * Triggers a full flash command cycle with write memory barrier and
+ * command activate. This call blocks until the busy flag is reset.
+ */
+static inline void ccat_update_cmd_addr(void __iomem * const ioaddr,
+ u8 cmd, u16 clocks, u32 addr)
+{
+ const u8 addr_0 = SWAP_BITS(addr & 0xff);
+ const u8 addr_1 = SWAP_BITS((addr & 0xff00) >> 8);
+ const u8 addr_2 = SWAP_BITS((addr & 0xff0000) >> 16);
+
+ __ccat_update_cmd(ioaddr, cmd, clocks);
+ iowrite8(addr_2, ioaddr + 0x18);
+ iowrite8(addr_1, ioaddr + 0x20);
+ iowrite8(addr_0, ioaddr + 0x28);
+ wmb();
+ iowrite8(0xff, ioaddr + 0x7f8);
+ wait_until_busy_reset(ioaddr);
+}
+
+/**
+ * ccat_get_status() - Read CCAT Update status
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ *
+ * Return: the current status of the CCAT Update function
+ */
+static u8 ccat_get_status(void __iomem * const ioaddr)
+{
+ ccat_update_cmd(ioaddr, CCAT_READ_STATUS);
+ return ioread8(ioaddr + 0x20);
+}
+
+/**
+ * ccat_read_flash_block() - Read a block of CCAT configuration data from flash
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ * @addr: 24 bit address of the block to read
+ * @len: number of bytes to read from this block, len <= CCAT_DATA_BLOCK_SIZE
+ * @buf: output buffer in user space
+ *
+ * Copies one block of configuration data from the CCAT FPGA's flash to
+ * the user space buffer.
+ * Note that the size of the FPGA's firmware is not known exactly so it
+ * is very possible that the overall buffer ends with a lot of 0xff.
+ *
+ * Return: the number of bytes copied
+ */
+static int ccat_read_flash_block(void __iomem * const ioaddr,
+ const u32 addr, const u16 len,
+ char __user * const buf)
+{
+ u16 i;
+ const u16 clocks = 8 * len;
+
+ ccat_update_cmd_addr(ioaddr, CCAT_READ_FLASH + clocks, addr);
+ for (i = 0; i < len; i++) {
+ put_user(ioread8(ioaddr + CCAT_DATA_IN_4 + 8 * i), buf + i);
+ }
+ return len;
+}
+
+/**
+ * ccat_read_flash() - Read a chunk of CCAT configuration data from flash
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ * @buf: output buffer in user space
+ * @len: number of bytes to read
+ * @off: offset in the configuration data
+ *
+ * Copies multiple blocks of configuration data from the CCAT FPGA's
+ * flash to the user space buffer.
+ *
+ * Return: the number of bytes copied
+ */
+static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,
+ u32 len, loff_t * off)
+{
+ const loff_t start = *off;
+
+ while (len > CCAT_DATA_BLOCK_SIZE) {
+ *off +=
+ ccat_read_flash_block(ioaddr, *off, CCAT_DATA_BLOCK_SIZE,
+ buf);
+ buf += CCAT_DATA_BLOCK_SIZE;
+ len -= CCAT_DATA_BLOCK_SIZE;
+ }
+ *off += ccat_read_flash_block(ioaddr, *off, len, buf);
+ return *off - start;
+}
+
+/**
+ * ccat_wait_status_cleared() - wait until CCAT status is cleared
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ *
+ * Blocks until bit 7 of the CCAT Update status is reset
+ */
+static void ccat_wait_status_cleared(void __iomem * const ioaddr)
+{
+ u8 status;
+
+ do {
+ status = ccat_get_status(ioaddr);
+ } while (status & (1 << 7));
+}
+
+/**
+ * ccat_write_flash_block() - Write a block of CCAT configuration data to flash
+ * @ioaddr: address of the CCAT Update function in PCI config space
+ * @addr: 24 bit start address in the CCAT FPGA's flash
+ * @len: number of bytes to write in this block, len <= CCAT_WRITE_BLOCK_SIZE
+ * @buf: input buffer
+ *
+ * Copies one block of configuration data to the CCAT FPGA's flash
+ *
+ * Return: the number of bytes copied
+ */
+static int ccat_write_flash_block(void __iomem * const ioaddr,
+ const u32 addr, const u16 len,
+ const char *const buf)
+{
+ const u16 clocks = 8 * len;
+ u16 i;
+
+ ccat_update_cmd(ioaddr, CCAT_WRITE_ENABLE);
+ for (i = 0; i < len; i++) {
+ iowrite8(buf[i], ioaddr + CCAT_DATA_OUT_4 + 8 * i);
+ }
+ ccat_update_cmd_addr(ioaddr, CCAT_WRITE_FLASH + clocks, addr);
+ ccat_wait_status_cleared(ioaddr);
+ return len;
+}
+
+/**
+ * ccat_write_flash() - Write a new CCAT configuration to FPGA's flash
+ * @update: a CCAT Update buffer containing the new FPGA configuration
+ */
+static void ccat_write_flash(const struct update_buffer *const update)
+{
+ const char *buf = update->data;
+ u32 off = 0;
+ size_t len = update->size;
+
+ while (len > CCAT_WRITE_BLOCK_SIZE) {
+ ccat_write_flash_block(update->update->ioaddr, off,
+ (u16) CCAT_WRITE_BLOCK_SIZE, buf);
+ off += CCAT_WRITE_BLOCK_SIZE;
+ buf += CCAT_WRITE_BLOCK_SIZE;
+ len -= CCAT_WRITE_BLOCK_SIZE;
+ }
+ ccat_write_flash_block(update->update->ioaddr, off, (u16) len, buf);
+}
+
+/**
+ * ccat_update_destroy() - Cleanup the CCAT Update function
+ * @ref: pointer to a struct kref embedded into a struct ccat_update, which we intend to destroy
+ *
+ * Retrieves the parent struct ccat_update and destroys it.
+ */
+static void ccat_update_destroy(struct kref *ref)
+{
+ struct ccat_update *update =
+ container_of(ref, struct ccat_update, refcount);
+
+ cdev_del(&update->cdev);
+ device_destroy(update->class, update->dev);
+ class_destroy(update->class);
+ unregister_chrdev_region(update->dev, 1);
+ kfree(update);
+ pr_debug("%s(): done\n", __FUNCTION__);
+}
+
static int ccat_update_open(struct inode *const i, struct file *const f)
{
struct ccat_update *update =
container_of(i->i_cdev, struct ccat_update, cdev);
struct update_buffer *buf;
+
kref_get(&update->refcount);
if (atomic_read(&update->refcount.refcount) > 2) {
kref_put(&update->refcount, ccat_update_destroy);
@@ -105,6 +305,7 @@
{
const struct update_buffer *const buf = f->private_data;
struct ccat_update *const update = buf->update;
+
if (buf->size > 0) {
ccat_update_cmd(update->ioaddr, CCAT_WRITE_ENABLE);
ccat_update_cmd(update->ioaddr, CCAT_BULK_ERASE);
@@ -133,6 +334,7 @@
size_t len, loff_t * off)
{
struct update_buffer *update = f->private_data;
+
if (!buf || !off) {
return -EINVAL;
}
@@ -162,6 +364,7 @@
size_t len, loff_t * off)
{
struct update_buffer *const update = f->private_data;
+
if (*off + len > sizeof(update->data))
return 0;
@@ -183,226 +386,39 @@
};
/**
- * __ccat_update_cmd() - Helper to issue a FPGA flash command
- * @ioaddr: address of the CCAT Update function in PCI config space
- * @cmd: the command identifier
- * @clocks: the number of clocks associated with the specified command
- *
- * no write memory barrier is called and the busy flag is not evaluated
- */
-static inline void __ccat_update_cmd(void __iomem * const ioaddr, uint8_t cmd,
- uint16_t clocks)
-{
- iowrite8((0xff00 & clocks) >> 8, ioaddr);
- iowrite8(0x00ff & clocks, ioaddr + 0x8);
- iowrite8(cmd, ioaddr + 0x10);
-}
-
-/**
- * ccat_update_cmd() - Helper to issue a FPGA flash command
- * @ioaddr: address of the CCAT Update function in PCI config space
- * @cmd: the command identifier
- * @clocks: the number of clocks associated with the specified command
- *
- * Triggers a full flash command cycle with write memory barrier and
- * command activate. This call blocks until the busy flag is reset.
- */
-static inline void ccat_update_cmd(void __iomem * const ioaddr, uint8_t cmd,
- uint16_t clocks)
-{
- __ccat_update_cmd(ioaddr, cmd, clocks);
- wmb();
- iowrite8(0xff, ioaddr + 0x7f8);
- wait_until_busy_reset(ioaddr);
-}
-
-/**
- * ccat_update_cmd_addr() - Helper to issue a FPGA flash command with address parameter
- * @ioaddr: address of the CCAT Update function in PCI config space
- * @cmd: the command identifier
- * @clocks: the number of clocks associated with the specified command
- * @addr: 24 bit address associated with the specified command
- *
- * Triggers a full flash command cycle with write memory barrier and
- * command activate. This call blocks until the busy flag is reset.
- */
-static inline void ccat_update_cmd_addr(void __iomem * const ioaddr,
- uint8_t cmd, uint16_t clocks,
- uint32_t addr)
-{
- const uint8_t addr_0 = SWAP_BITS(addr & 0xff);
- const uint8_t addr_1 = SWAP_BITS((addr & 0xff00) >> 8);
- const uint8_t addr_2 = SWAP_BITS((addr & 0xff0000) >> 16);
- __ccat_update_cmd(ioaddr, cmd, clocks);
- iowrite8(addr_2, ioaddr + 0x18);
- iowrite8(addr_1, ioaddr + 0x20);
- iowrite8(addr_0, ioaddr + 0x28);
- wmb();
- iowrite8(0xff, ioaddr + 0x7f8);
- wait_until_busy_reset(ioaddr);
-}
-
-/**
* ccat_get_prom_id() - Read CCAT PROM ID
* @ioaddr: address of the CCAT Update function in PCI config space
*
* Return: the CCAT FPGA's PROM identifier
*/
-uint8_t ccat_get_prom_id(void __iomem * const ioaddr)
+u8 ccat_get_prom_id(void __iomem * const ioaddr)
{
ccat_update_cmd(ioaddr, CCAT_GET_PROM_ID);
return ioread8(ioaddr + 0x38);
}
/**
- * ccat_get_status() - Read CCAT Update status
- * @ioaddr: address of the CCAT Update function in PCI config space
- *
- * Return: the current status of the CCAT Update function
- */
-static uint8_t ccat_get_status(void __iomem * const ioaddr)
-{
- ccat_update_cmd(ioaddr, CCAT_READ_STATUS);
- return ioread8(ioaddr + 0x20);
-}
-
-/**
- * ccat_wait_status_cleared() - wait until CCAT status is cleared
- * @ioaddr: address of the CCAT Update function in PCI config space
- *
- * Blocks until bit 7 of the CCAT Update status is reset
- */
-
-static void ccat_wait_status_cleared(void __iomem * const ioaddr)
-{
- uint8_t status;
- do {
- status = ccat_get_status(ioaddr);
- } while (status & (1 << 7));
-}
-
-/**
- * ccat_read_flash_block() - Read a block of CCAT configuration data from flash
- * @ioaddr: address of the CCAT Update function in PCI config space
- * @addr: 24 bit address of the block to read
- * @len: number of bytes to read from this block, len <= CCAT_DATA_BLOCK_SIZE
- * @buf: output buffer in user space
- *
- * Copies one block of configuration data from the CCAT FPGA's flash to
- * the user space buffer.
- * Note that the size of the FPGA's firmware is not known exactly so it
- * is very possible that the overall buffer ends with a lot of 0xff.
- *
- * Return: the number of bytes copied
- */
-static int ccat_read_flash_block(void __iomem * const ioaddr,
- const uint32_t addr, const uint16_t len,
- char __user * const buf)
-{
- uint16_t i;
- const uint16_t clocks = 8 * len;
- ccat_update_cmd_addr(ioaddr, CCAT_READ_FLASH + clocks, addr);
- for (i = 0; i < len; i++) {
- put_user(ioread8(ioaddr + CCAT_DATA_IN_4 + 8 * i), buf + i);
- }
- return len;
-}
-
-/**
- * ccat_read_flash() - Read a chunk of CCAT configuration data from flash
- * @ioaddr: address of the CCAT Update function in PCI config space
- * @buf: output buffer in user space
- * @len: number of bytes to read
- * @off: offset in the configuration data
- *
- * Copies multiple blocks of configuration data from the CCAT FPGA's
- * flash to the user space buffer.
- *
- * Return: the number of bytes copied
- */
-static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,
- uint32_t len, loff_t * off)
-{
- const loff_t start = *off;
- while (len > CCAT_DATA_BLOCK_SIZE) {
- *off +=
- ccat_read_flash_block(ioaddr, *off, CCAT_DATA_BLOCK_SIZE,
- buf);
- buf += CCAT_DATA_BLOCK_SIZE;
- len -= CCAT_DATA_BLOCK_SIZE;
- }
- *off += ccat_read_flash_block(ioaddr, *off, len, buf);
- return *off - start;
-}
-
-/**
- * ccat_write_flash_block() - Write a block of CCAT configuration data to flash
- * @ioaddr: address of the CCAT Update function in PCI config space
- * @addr: 24 bit start address in the CCAT FPGA's flash
- * @len: number of bytes to write in this block, len <= CCAT_WRITE_BLOCK_SIZE
- * @buf: input buffer
- *
- * Copies one block of configuration data to the CCAT FPGA's flash
- *
- * Return: the number of bytes copied
- */
-static int ccat_write_flash_block(void __iomem * const ioaddr,
- const uint32_t addr, const uint16_t len,
- const char *const buf)
-{
- const uint16_t clocks = 8 * len;
- uint16_t i;
- ccat_update_cmd(ioaddr, CCAT_WRITE_ENABLE);
- for (i = 0; i < len; i++) {
- iowrite8(buf[i], ioaddr + CCAT_DATA_OUT_4 + 8 * i);
- }
- ccat_update_cmd_addr(ioaddr, CCAT_WRITE_FLASH + clocks, addr);
- ccat_wait_status_cleared(ioaddr);
- return len;
-}
-
-/**
- * ccat_write_flash() - Write a new CCAT configuration to FPGA's flash
- * @update: a CCAT Update buffer containing the new FPGA configuration
- */
-static void ccat_write_flash(const struct update_buffer *const update)
-{
- const char *buf = update->data;
- uint32_t off = 0;
- size_t len = update->size;
- while (len > CCAT_WRITE_BLOCK_SIZE) {
- ccat_write_flash_block(update->update->ioaddr, off,
- (uint16_t) CCAT_WRITE_BLOCK_SIZE, buf);
- off += CCAT_WRITE_BLOCK_SIZE;
- buf += CCAT_WRITE_BLOCK_SIZE;
- len -= CCAT_WRITE_BLOCK_SIZE;
- }
- ccat_write_flash_block(update->update->ioaddr, off, (uint16_t) len,
- buf);
-}
-
-/**
* ccat_update_init() - Initialize the CCAT Update function
*/
struct ccat_update *ccat_update_init(const struct ccat_device *const ccatdev,
void __iomem * const addr)
{
struct ccat_update *const update = kzalloc(sizeof(*update), GFP_KERNEL);
+
if (!update) {
return NULL;
}
kref_init(&update->refcount);
update->ioaddr = ccatdev->bar[0].ioaddr + ioread32(addr + 0x8);
memcpy_fromio(&update->info, addr, sizeof(update->info));
- print_update_info(&update->info, update->ioaddr);
-
- if (0x00 != update->info.nRevision) {
+
+ if (0x00 != update->info.rev) {
pr_warn("CCAT Update rev. %d not supported\n",
- update->info.nRevision);
+ update->info.rev);
goto cleanup;
}
- if (alloc_chrdev_region(&update->dev, 0, 1, DRV_NAME)) {
+ if (alloc_chrdev_region(&update->dev, 0, 1, KBUILD_MODNAME)) {
pr_warn("alloc_chrdev_region() failed\n");
goto cleanup;
}
@@ -434,24 +450,6 @@
}
/**
- * ccat_update_destroy() - Cleanup the CCAT Update function
- * @ref: pointer to a struct kref embedded into a struct ccat_update, which we intend to destroy
- *
- * Retrieves the parent struct ccat_update and destroys it.
- */
-static void ccat_update_destroy(struct kref *ref)
-{
- struct ccat_update *update =
- container_of(ref, struct ccat_update, refcount);
- cdev_del(&update->cdev);
- device_destroy(update->class, update->dev);
- class_destroy(update->class);
- unregister_chrdev_region(update->dev, 1);
- kfree(update);
- pr_debug("%s(): done\n", __FUNCTION__);
-}
-
-/**
* ccat_update_remove() - Prepare the CCAT Update function for removal
*/
void ccat_update_remove(struct ccat_update *update)
--- a/devices/ccat/update.h Mon Oct 27 14:19:49 2014 +0100
+++ b/devices/ccat/update.h Mon Oct 27 14:33:03 2014 +0100
@@ -20,7 +20,7 @@
#ifndef _UPDATE_H_
#define _UPDATE_H_
-extern uint8_t ccat_get_prom_id(void __iomem * const ioaddr);
+extern u8 ccat_get_prom_id(void __iomem * const ioaddr);
extern struct ccat_update *ccat_update_init(const struct ccat_device *ccatdev,
void __iomem * addr);
extern void ccat_update_remove(struct ccat_update *update);
--- a/examples/user/main.c Mon Oct 27 14:19:49 2014 +0100
+++ b/examples/user/main.c Mon Oct 27 14:33:03 2014 +0100
@@ -44,7 +44,11 @@
// Application parameters
#define FREQUENCY 100
-#define PRIORITY 0
+#define PRIORITY 1
+
+// Optional features
+#define CONFIGURE_PDOS 1
+#define SDO_ACCESS 0
/****************************************************************************/
@@ -67,82 +71,107 @@
// process data
static uint8_t *domain1_pd = NULL;
-#define BusCouplerPos 0, 3
-#define DigOutSlavePos 0, 0
-
-//#define Beckhoff_EK1100 0x00000002, 0x044c2c52
-#define Beckhoff_EK1100 0x00000002, 0x04562c52
-#define Beckhoff_EL1008 0x00000002, 0x03f03052
+#define BusCouplerPos 0, 0
+#define DigOutSlavePos 0, 2
+#define AnaInSlavePos 0, 3
+#define AnaOutSlavePos 0, 4
+
+#define Beckhoff_EK1100 0x00000002, 0x044c2c52
#define Beckhoff_EL2004 0x00000002, 0x07d43052
-#define Beckhoff_EL2008 0x00000002, 0x07d83052
#define Beckhoff_EL2032 0x00000002, 0x07f03052
#define Beckhoff_EL3152 0x00000002, 0x0c503052
#define Beckhoff_EL3102 0x00000002, 0x0c1e3052
#define Beckhoff_EL4102 0x00000002, 0x10063052
// offsets for PDO entries
-static unsigned int off_dig_in[1];
-static unsigned int off_dig_out[2];
-
-
-/*****************************************************************************/
-// Digital in ------------------------
-static ec_pdo_entry_info_t el1008_channels[] = {
- {0x6000, 1, 1},
- {0x6010, 1, 1},
- {0x6020, 1, 1},
- {0x6030, 1, 1},
- {0x6040, 1, 1},
- {0x6050, 1, 1},
- {0x6060, 1, 1},
- {0x6070, 1, 1},
-};
-
-static ec_pdo_info_t el1008_pdos[] = {
- {0x1a00, 1, &el1008_channels[0]},
- {0x1a01, 1, &el1008_channels[1]},
- {0x1a02, 1, &el1008_channels[2]},
- {0x1a03, 1, &el1008_channels[3]},
- {0x1a04, 1, &el1008_channels[4]},
- {0x1a05, 1, &el1008_channels[5]},
- {0x1a06, 1, &el1008_channels[6]},
- {0x1a07, 1, &el1008_channels[7]}
-};
-
-static ec_sync_info_t el1008_syncs[] = {
+static unsigned int off_ana_in_status;
+static unsigned int off_ana_in_value;
+static unsigned int off_ana_out;
+static unsigned int off_dig_out;
+
+const static ec_pdo_entry_reg_t domain1_regs[] = {
+ {AnaInSlavePos, Beckhoff_EL3102, 0x3101, 1, &off_ana_in_status},
+ {AnaInSlavePos, Beckhoff_EL3102, 0x3101, 2, &off_ana_in_value},
+ {AnaOutSlavePos, Beckhoff_EL4102, 0x3001, 1, &off_ana_out},
+ {DigOutSlavePos, Beckhoff_EL2032, 0x3001, 1, &off_dig_out},
+ {}
+};
+
+static unsigned int counter = 0;
+static unsigned int blink = 0;
+
+/*****************************************************************************/
+
+#if CONFIGURE_PDOS
+
+// Analog in --------------------------
+
+static ec_pdo_entry_info_t el3102_pdo_entries[] = {
+ {0x3101, 1, 8}, // channel 1 status
+ {0x3101, 2, 16}, // channel 1 value
+ {0x3102, 1, 8}, // channel 2 status
+ {0x3102, 2, 16}, // channel 2 value
+ {0x6401, 1, 16}, // channel 1 value (alt.)
+ {0x6401, 2, 16} // channel 2 value (alt.)
+};
+
+static ec_pdo_info_t el3102_pdos[] = {
+ {0x1A00, 2, el3102_pdo_entries},
+ {0x1A01, 2, el3102_pdo_entries + 2}
+};
+
+static ec_sync_info_t el3102_syncs[] = {
{2, EC_DIR_OUTPUT},
- {3, EC_DIR_INPUT, 8, el1008_pdos},
+ {3, EC_DIR_INPUT, 2, el3102_pdos},
{0xff}
};
+// Analog out -------------------------
+
+static ec_pdo_entry_info_t el4102_pdo_entries[] = {
+ {0x3001, 1, 16}, // channel 1 value
+ {0x3002, 1, 16}, // channel 2 value
+};
+
+static ec_pdo_info_t el4102_pdos[] = {
+ {0x1600, 1, el4102_pdo_entries},
+ {0x1601, 1, el4102_pdo_entries + 1}
+};
+
+static ec_sync_info_t el4102_syncs[] = {
+ {2, EC_DIR_OUTPUT, 2, el4102_pdos},
+ {3, EC_DIR_INPUT},
+ {0xff}
+};
+
// Digital out ------------------------
-static ec_pdo_entry_info_t el2008_channels[] = {
- {0x7000, 1, 1},
- {0x7010, 1, 1},
- {0x7020, 1, 1},
- {0x7030, 1, 1},
- {0x7040, 1, 1},
- {0x7050, 1, 1},
- {0x7060, 1, 1},
- {0x7070, 1, 1},
-};
-
-static ec_pdo_info_t el2008_pdos[] = {
- {0x1600, 1, &el2008_channels[0]},
- {0x1601, 1, &el2008_channels[1]},
- {0x1602, 1, &el2008_channels[2]},
- {0x1603, 1, &el2008_channels[3]},
- {0x1604, 1, &el2008_channels[4]},
- {0x1605, 1, &el2008_channels[5]},
- {0x1606, 1, &el2008_channels[6]},
- {0x1607, 1, &el2008_channels[7]}
-};
-
-static ec_sync_info_t el2008_syncs[] = {
- {0, EC_DIR_OUTPUT, 8, el2008_pdos},
+
+static ec_pdo_entry_info_t el2004_channels[] = {
+ {0x3001, 1, 1}, // Value 1
+ {0x3001, 2, 1}, // Value 2
+ {0x3001, 3, 1}, // Value 3
+ {0x3001, 4, 1} // Value 4
+};
+
+static ec_pdo_info_t el2004_pdos[] = {
+ {0x1600, 1, &el2004_channels[0]},
+ {0x1601, 1, &el2004_channels[1]},
+ {0x1602, 1, &el2004_channels[2]},
+ {0x1603, 1, &el2004_channels[3]}
+};
+
+static ec_sync_info_t el2004_syncs[] = {
+ {0, EC_DIR_OUTPUT, 4, el2004_pdos},
{1, EC_DIR_INPUT},
{0xff}
};
+#endif
+
+/*****************************************************************************/
+
+#if SDO_ACCESS
+static ec_sdo_request_t *sdo;
+#endif
/*****************************************************************************/
@@ -197,59 +226,74 @@
sc_ana_in_state = s;
}
+/*****************************************************************************/
+
+#if SDO_ACCESS
+void read_sdo(void)
+{
+ switch (ecrt_sdo_request_state(sdo)) {
+ case EC_REQUEST_UNUSED: // request was not used yet
+ ecrt_sdo_request_read(sdo); // trigger first read
+ break;
+ case EC_REQUEST_BUSY:
+ fprintf(stderr, "Still busy...\n");
+ break;
+ case EC_REQUEST_SUCCESS:
+ fprintf(stderr, "SDO value: 0x%04X\n",
+ EC_READ_U16(ecrt_sdo_request_data(sdo)));
+ ecrt_sdo_request_read(sdo); // trigger next read
+ break;
+ case EC_REQUEST_ERROR:
+ fprintf(stderr, "Failed to read SDO!\n");
+ ecrt_sdo_request_read(sdo); // retry reading
+ break;
+ }
+}
+#endif
+
/****************************************************************************/
void cyclic_task()
{
- static unsigned int counter = 10;
- static uint8_t outputValue = 0;
- static int numAsyncCycles = 0;
- uint8_t inputValue = 0;
- static uint8_t error = 0;
-
// receive process data
ecrt_master_receive(master);
ecrt_domain_process(domain1);
// check process data state (optional)
check_domain1_state();
-
-
- inputValue = EC_READ_U8(domain1_pd + off_dig_in[0]);
-
- if(inputValue != outputValue) {
- numAsyncCycles++;
- } else {
- numAsyncCycles = 0;
- }
-
- if(numAsyncCycles > 2) {
- if(error != 0xff) {
- error++;
- }
- }
-
-
+
if (counter) {
counter--;
- } else {
- counter = 5; //update delay
-
-
+ } else { // do this at 1 Hz
+ counter = FREQUENCY;
// calculate new process data
- outputValue++;
+ blink = !blink;
// check for master state (optional)
check_master_state();
// check for islave configuration state(s) (optional)
check_slave_config_states();
- }
-
+
+#if SDO_ACCESS
+ // read process data SDO
+ read_sdo();
+#endif
+
+ }
+
+#if 0
+ // read process data
+ printf("AnaIn: state %u value %u\n",
+ EC_READ_U8(domain1_pd + off_ana_in_status),
+ EC_READ_U16(domain1_pd + off_ana_in_value));
+#endif
+
+#if 1
// write process data
- EC_WRITE_U8(domain1_pd + off_dig_out[1], outputValue);
- EC_WRITE_U8(domain1_pd + off_dig_out[0], error);
+ EC_WRITE_U8(domain1_pd + off_dig_out, blink ? 0x06 : 0x09);
+#endif
// send process data
ecrt_domain_queue(domain1);
@@ -268,31 +312,11 @@
/****************************************************************************/
-int Init_EL2008(uint16_t position)
-{
- ec_slave_config_t *sc;
- if (!(sc = ecrt_master_slave_config(master, 0, position, Beckhoff_EL2008))) {
- fprintf(stderr, "Failed to get EL2008 configuration #%u.\n", position);
- return -1;
- }
- if (ecrt_slave_config_pdos(sc, EC_END, el2008_syncs)) {
- fprintf(stderr, "Failed to configure PDOs #%u.\n", position);
- return -1;
- }
- if (0 > (off_dig_out[position] = ecrt_slave_config_reg_pdo_entry(sc, 0x7000, 1, domain1, NULL))) {
- fprintf(stderr, "Failed to configure reg PDOs #%u.\n", position);
- return -1;
- }
- fprintf(stderr, "EL2008 #%u configured offset: %d.\n", position, off_dig_out[position]);
- return 0;
-}
-
int main(int argc, char **argv)
{
ec_slave_config_t *sc;
struct sigaction sa;
struct itimerval tv;
- uint16_t i;
master = ecrt_request_master(0);
if (!master)
@@ -302,33 +326,60 @@
if (!domain1)
return -1;
+ if (!(sc_ana_in = ecrt_master_slave_config(
+ master, AnaInSlavePos, Beckhoff_EL3102))) {
+ fprintf(stderr, "Failed to get slave configuration.\n");
+ return -1;
+ }
+
+#if SDO_ACCESS
+ fprintf(stderr, "Creating SDO requests...\n");
+ if (!(sdo = ecrt_slave_config_create_sdo_request(sc_ana_in, 0x3102, 2, 2))) {
+ fprintf(stderr, "Failed to create SDO request.\n");
+ return -1;
+ }
+ ecrt_sdo_request_timeout(sdo, 500); // ms
+#endif
+
+#if CONFIGURE_PDOS
printf("Configuring PDOs...\n");
- if (!(sc_ana_in = ecrt_master_slave_config(master, 0, 2, Beckhoff_EL1008))) {
- fprintf(stderr, "Failed to get digital in configuration.\n");
- return -1;
- }
- if (ecrt_slave_config_pdos(sc_ana_in, EC_END, el1008_syncs)) {
+ if (ecrt_slave_config_pdos(sc_ana_in, EC_END, el3102_syncs)) {
fprintf(stderr, "Failed to configure PDOs.\n");
return -1;
}
- if (0 > (off_dig_in[0] = ecrt_slave_config_reg_pdo_entry(sc_ana_in, 0x6000, 1, domain1, NULL))) {
- fprintf(stderr, "Failed to configure reg PDOs.\n");
- return -1;
- }
- printf("EL1008 configured.\n");
-
- for(i = 0; i < 2; ++i) {
- if(Init_EL2008(i)) {
- fprintf(stderr, "Failed to initialize EL2008 #%u.\n", i);
- return -1;
- }
- }
+
+ if (!(sc = ecrt_master_slave_config(
+ master, AnaOutSlavePos, Beckhoff_EL4102))) {
+ fprintf(stderr, "Failed to get slave configuration.\n");
+ return -1;
+ }
+
+ if (ecrt_slave_config_pdos(sc, EC_END, el4102_syncs)) {
+ fprintf(stderr, "Failed to configure PDOs.\n");
+ return -1;
+ }
+
+ if (!(sc = ecrt_master_slave_config(
+ master, DigOutSlavePos, Beckhoff_EL2032))) {
+ fprintf(stderr, "Failed to get slave configuration.\n");
+ return -1;
+ }
+
+ if (ecrt_slave_config_pdos(sc, EC_END, el2004_syncs)) {
+ fprintf(stderr, "Failed to configure PDOs.\n");
+ return -1;
+ }
+#endif
// Create configuration for bus coupler
sc = ecrt_master_slave_config(master, BusCouplerPos, Beckhoff_EK1100);
if (!sc)
return -1;
- fprintf(stderr, "EK1100 configured.\n");
+
+ if (ecrt_domain_reg_pdo_entry_list(domain1, domain1_regs)) {
+ fprintf(stderr, "PDO entry registration failed!\n");
+ return -1;
+ }
printf("Activating master...\n");
if (ecrt_master_activate(master))