# HG changeset patch
# User Florian Pose <fp@igh-essen.com>
# Date 1241699110 0
# Node ID bba02b6a4492e4ea9a8e5349937c258684b07873
# Parent  ec3ad6641d65dde9f18d28e3c6f835905b7f69a6
Debugging output.

diff -r ec3ad6641d65 -r bba02b6a4492 master/fsm_slave_config.c
--- a/master/fsm_slave_config.c	Thu May 07 11:41:45 2009 +0000
+++ b/master/fsm_slave_config.c	Thu May 07 12:25:10 2009 +0000
@@ -1043,6 +1043,12 @@
                     slave->ring_position);
         }
 
+        if (slave->master->debug_level)
+            EC_DBG("Slave %u: Setting DC cycle times to %u / %u.\n",
+                    slave->ring_position,
+                    config->dc_sync[0].cycle_time,
+                    config->dc_sync[1].cycle_time);
+
         // set DC cycle times
         ec_datagram_fpwr(datagram, slave->station_address, 0x09A0, 8);
         EC_WRITE_U32(datagram->data, config->dc_sync[0].cycle_time);
@@ -1122,7 +1128,7 @@
             start_time = start;
         } else {
             EC_WARN("No application time supplied. Cyclic start time will "
-                    "not be in phase for slave %u.", slave->ring_position);
+                    "not be in phase for slave %u.\n", slave->ring_position);
         }
     }
 
@@ -1173,6 +1179,10 @@
         return;
     }
 
+    if (slave->master->debug_level)
+        EC_DBG("Slave %u: Setting DC AssignActivate to 0x%04x.\n",
+                slave->ring_position, config->dc_assign_activate);
+
     // assign sync unit to EtherCAT or PDI
     ec_datagram_fpwr(datagram, slave->station_address, 0x0980, 2);
     EC_WRITE_U16(datagram->data, config->dc_assign_activate);