# HG changeset patch
# User Florian Pose <fp@igh-essen.com>
# Date 1474019821 -7200
# Node ID bb2163e6b145ea1b777ecdeb16d27e086ae322f4
# Parent  ad1199dd73e129e6e1eae19ee16303b80525414a# Parent  b3f6b3e5ef29f7c96bc58ad69bd72a485181a943
merge

diff -r ad1199dd73e1 -r bb2163e6b145 devices/ccat/module.h
--- a/devices/ccat/module.h	Fri Sep 16 11:56:53 2016 +0200
+++ b/devices/ccat/module.h	Fri Sep 16 11:57:01 2016 +0200
@@ -29,7 +29,7 @@
 #include "../ecdev.h"
 
 #define DRV_EXTRAVERSION "-ec"
-#define DRV_VERSION      "0.14" DRV_EXTRAVERSION
+#define DRV_VERSION      "0.15" DRV_EXTRAVERSION
 #define DRV_DESCRIPTION  "Beckhoff CCAT Ethernet/EtherCAT Network Driver"
 
 #undef pr_fmt
diff -r ad1199dd73e1 -r bb2163e6b145 devices/ccat/netdev.c
--- a/devices/ccat/netdev.c	Fri Sep 16 11:56:53 2016 +0200
+++ b/devices/ccat/netdev.c	Fri Sep 16 11:57:01 2016 +0200
@@ -291,7 +291,7 @@
 	iowrite32((u32) phys | ((phys_hi) > 0), ioaddr);
 	iowrite32(phys_hi, ioaddr + 4);
 
-	pr_debug
+	pr_info
 	    ("DMA%llu mem initialized\n base:         0x%p\n start:        0x%p\n phys:         0x%09llx\n pci addr:     0x%01x%08x\n size:         %llu |%llx bytes.\n",
 	     (u64) channel, dma->base, fifo->dma.start, (u64) dma->phys,
 	     ioread32(ioaddr + 4), ioread32(ioaddr),
@@ -749,12 +749,14 @@
 static void poll_rx(struct ccat_eth_priv *const priv)
 {
 	struct ccat_eth_fifo *const fifo = &priv->rx_fifo;
-	const size_t len = fifo->ops->ready(fifo);
-
-	if (len) {
+	size_t rx_per_poll = FIFO_LENGTH / 2;
+	size_t len = fifo->ops->ready(fifo);
+
+	while (len && --rx_per_poll) {
 		priv->receive(priv, len);
 		fifo->ops->add(fifo);
 		ccat_eth_fifo_inc(fifo);
+		len = fifo->ops->ready(fifo);
 	}
 }