fp@2685: /* PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580
fp@2685:  *
fp@2685:  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
fp@2685:  *
fp@2685:  * This program is free software; you can redistribute it and/or modify
fp@2685:  * it under the terms of the GNU General Public License as published by
fp@2685:  * the Free Software Foundation; either version 2 of the License, or
fp@2685:  * (at your option) any later version.
fp@2685:  *
fp@2685:  * This program is distributed in the hope that it will be useful,
fp@2685:  * but WITHOUT ANY WARRANTY; without even the implied warranty of
fp@2685:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
fp@2685:  * GNU General Public License for more details.
fp@2685:  *
fp@2685:  * You should have received a copy of the GNU General Public License along with
fp@2685:  * this program; if not, see <http://www.gnu.org/licenses/>.
fp@2685:  */
fp@2685: #include <linux/module.h>
fp@2685: #include <linux/device.h>
fp@2685: #include <linux/pci.h>
fp@2685: #include <linux/ptp_classify.h>
fp@2685: 
fp@2685: #include "igb.h"
fp@2685: 
fp@2685: #define INCVALUE_MASK		0x7fffffff
fp@2685: #define ISGN			0x80000000
fp@2685: 
fp@2685: /* The 82580 timesync updates the system timer every 8ns by 8ns,
fp@2685:  * and this update value cannot be reprogrammed.
fp@2685:  *
fp@2685:  * Neither the 82576 nor the 82580 offer registers wide enough to hold
fp@2685:  * nanoseconds time values for very long. For the 82580, SYSTIM always
fp@2685:  * counts nanoseconds, but the upper 24 bits are not availible. The
fp@2685:  * frequency is adjusted by changing the 32 bit fractional nanoseconds
fp@2685:  * register, TIMINCA.
fp@2685:  *
fp@2685:  * For the 82576, the SYSTIM register time unit is affect by the
fp@2685:  * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
fp@2685:  * field are needed to provide the nominal 16 nanosecond period,
fp@2685:  * leaving 19 bits for fractional nanoseconds.
fp@2685:  *
fp@2685:  * We scale the NIC clock cycle by a large factor so that relatively
fp@2685:  * small clock corrections can be added or subtracted at each clock
fp@2685:  * tick. The drawbacks of a large factor are a) that the clock
fp@2685:  * register overflows more quickly (not such a big deal) and b) that
fp@2685:  * the increment per tick has to fit into 24 bits.  As a result we
fp@2685:  * need to use a shift of 19 so we can fit a value of 16 into the
fp@2685:  * TIMINCA register.
fp@2685:  *
fp@2685:  *
fp@2685:  *             SYSTIMH            SYSTIML
fp@2685:  *        +--------------+   +---+---+------+
fp@2685:  *  82576 |      32      |   | 8 | 5 |  19  |
fp@2685:  *        +--------------+   +---+---+------+
fp@2685:  *         \________ 45 bits _______/  fract
fp@2685:  *
fp@2685:  *        +----------+---+   +--------------+
fp@2685:  *  82580 |    24    | 8 |   |      32      |
fp@2685:  *        +----------+---+   +--------------+
fp@2685:  *          reserved  \______ 40 bits _____/
fp@2685:  *
fp@2685:  *
fp@2685:  * The 45 bit 82576 SYSTIM overflows every
fp@2685:  *   2^45 * 10^-9 / 3600 = 9.77 hours.
fp@2685:  *
fp@2685:  * The 40 bit 82580 SYSTIM overflows every
fp@2685:  *   2^40 * 10^-9 /  60  = 18.3 minutes.
fp@2685:  */
fp@2685: 
fp@2685: #define IGB_SYSTIM_OVERFLOW_PERIOD	(HZ * 60 * 9)
fp@2685: #define IGB_PTP_TX_TIMEOUT		(HZ * 15)
fp@2685: #define INCPERIOD_82576			(1 << E1000_TIMINCA_16NS_SHIFT)
fp@2685: #define INCVALUE_82576_MASK		((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
fp@2685: #define INCVALUE_82576			(16 << IGB_82576_TSYNC_SHIFT)
fp@2685: #define IGB_NBITS_82580			40
fp@2685: 
fp@2685: static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
fp@2685: 
fp@2685: /* SYSTIM read access for the 82576 */
fp@2685: static cycle_t igb_ptp_read_82576(const struct cyclecounter *cc)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
fp@2685: 	struct e1000_hw *hw = &igb->hw;
fp@2685: 	u64 val;
fp@2685: 	u32 lo, hi;
fp@2685: 
fp@2685: 	lo = rd32(E1000_SYSTIML);
fp@2685: 	hi = rd32(E1000_SYSTIMH);
fp@2685: 
fp@2685: 	val = ((u64) hi) << 32;
fp@2685: 	val |= lo;
fp@2685: 
fp@2685: 	return val;
fp@2685: }
fp@2685: 
fp@2685: /* SYSTIM read access for the 82580 */
fp@2685: static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
fp@2685: 	struct e1000_hw *hw = &igb->hw;
fp@2685: 	u32 lo, hi;
fp@2685: 	u64 val;
fp@2685: 
fp@2685: 	/* The timestamp latches on lowest register read. For the 82580
fp@2685: 	 * the lowest register is SYSTIMR instead of SYSTIML.  However we only
fp@2685: 	 * need to provide nanosecond resolution, so we just ignore it.
fp@2685: 	 */
fp@2685: 	rd32(E1000_SYSTIMR);
fp@2685: 	lo = rd32(E1000_SYSTIML);
fp@2685: 	hi = rd32(E1000_SYSTIMH);
fp@2685: 
fp@2685: 	val = ((u64) hi) << 32;
fp@2685: 	val |= lo;
fp@2685: 
fp@2685: 	return val;
fp@2685: }
fp@2685: 
fp@2685: /* SYSTIM read access for I210/I211 */
fp@2685: static void igb_ptp_read_i210(struct igb_adapter *adapter, struct timespec *ts)
fp@2685: {
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 	u32 sec, nsec;
fp@2685: 
fp@2685: 	/* The timestamp latches on lowest register read. For I210/I211, the
fp@2685: 	 * lowest register is SYSTIMR. Since we only need to provide nanosecond
fp@2685: 	 * resolution, we can ignore it.
fp@2685: 	 */
fp@2685: 	rd32(E1000_SYSTIMR);
fp@2685: 	nsec = rd32(E1000_SYSTIML);
fp@2685: 	sec = rd32(E1000_SYSTIMH);
fp@2685: 
fp@2685: 	ts->tv_sec = sec;
fp@2685: 	ts->tv_nsec = nsec;
fp@2685: }
fp@2685: 
fp@2685: static void igb_ptp_write_i210(struct igb_adapter *adapter,
fp@2685: 			       const struct timespec *ts)
fp@2685: {
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 
fp@2685: 	/* Writing the SYSTIMR register is not necessary as it only provides
fp@2685: 	 * sub-nanosecond resolution.
fp@2685: 	 */
fp@2685: 	wr32(E1000_SYSTIML, ts->tv_nsec);
fp@2685: 	wr32(E1000_SYSTIMH, ts->tv_sec);
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
fp@2685:  * @adapter: board private structure
fp@2685:  * @hwtstamps: timestamp structure to update
fp@2685:  * @systim: unsigned 64bit system time value.
fp@2685:  *
fp@2685:  * We need to convert the system time value stored in the RX/TXSTMP registers
fp@2685:  * into a hwtstamp which can be used by the upper level timestamping functions.
fp@2685:  *
fp@2685:  * The 'tmreg_lock' spinlock is used to protect the consistency of the
fp@2685:  * system time value. This is needed because reading the 64 bit time
fp@2685:  * value involves reading two (or three) 32 bit registers. The first
fp@2685:  * read latches the value. Ditto for writing.
fp@2685:  *
fp@2685:  * In addition, here have extended the system time with an overflow
fp@2685:  * counter in software.
fp@2685:  **/
fp@2685: static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
fp@2685: 				       struct skb_shared_hwtstamps *hwtstamps,
fp@2685: 				       u64 systim)
fp@2685: {
fp@2685: 	unsigned long flags;
fp@2685: 	u64 ns;
fp@2685: 
fp@2685: 	switch (adapter->hw.mac.type) {
fp@2685: 	case e1000_82576:
fp@2685: 	case e1000_82580:
fp@2685: 	case e1000_i354:
fp@2685: 	case e1000_i350:
fp@2685: 		spin_lock_irqsave(&adapter->tmreg_lock, flags);
fp@2685: 
fp@2685: 		ns = timecounter_cyc2time(&adapter->tc, systim);
fp@2685: 
fp@2685: 		spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
fp@2685: 
fp@2685: 		memset(hwtstamps, 0, sizeof(*hwtstamps));
fp@2685: 		hwtstamps->hwtstamp = ns_to_ktime(ns);
fp@2685: 		break;
fp@2685: 	case e1000_i210:
fp@2685: 	case e1000_i211:
fp@2685: 		memset(hwtstamps, 0, sizeof(*hwtstamps));
fp@2685: 		/* Upper 32 bits contain s, lower 32 bits contain ns. */
fp@2685: 		hwtstamps->hwtstamp = ktime_set(systim >> 32,
fp@2685: 						systim & 0xFFFFFFFF);
fp@2685: 		break;
fp@2685: 	default:
fp@2685: 		break;
fp@2685: 	}
fp@2685: }
fp@2685: 
fp@2685: /* PTP clock operations */
fp@2685: static int igb_ptp_adjfreq_82576(struct ptp_clock_info *ptp, s32 ppb)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	struct e1000_hw *hw = &igb->hw;
fp@2685: 	int neg_adj = 0;
fp@2685: 	u64 rate;
fp@2685: 	u32 incvalue;
fp@2685: 
fp@2685: 	if (ppb < 0) {
fp@2685: 		neg_adj = 1;
fp@2685: 		ppb = -ppb;
fp@2685: 	}
fp@2685: 	rate = ppb;
fp@2685: 	rate <<= 14;
fp@2685: 	rate = div_u64(rate, 1953125);
fp@2685: 
fp@2685: 	incvalue = 16 << IGB_82576_TSYNC_SHIFT;
fp@2685: 
fp@2685: 	if (neg_adj)
fp@2685: 		incvalue -= rate;
fp@2685: 	else
fp@2685: 		incvalue += rate;
fp@2685: 
fp@2685: 	wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK));
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_adjfreq_82580(struct ptp_clock_info *ptp, s32 ppb)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	struct e1000_hw *hw = &igb->hw;
fp@2685: 	int neg_adj = 0;
fp@2685: 	u64 rate;
fp@2685: 	u32 inca;
fp@2685: 
fp@2685: 	if (ppb < 0) {
fp@2685: 		neg_adj = 1;
fp@2685: 		ppb = -ppb;
fp@2685: 	}
fp@2685: 	rate = ppb;
fp@2685: 	rate <<= 26;
fp@2685: 	rate = div_u64(rate, 1953125);
fp@2685: 
fp@2685: 	inca = rate & INCVALUE_MASK;
fp@2685: 	if (neg_adj)
fp@2685: 		inca |= ISGN;
fp@2685: 
fp@2685: 	wr32(E1000_TIMINCA, inca);
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	unsigned long flags;
fp@2685: 	s64 now;
fp@2685: 
fp@2685: 	spin_lock_irqsave(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	now = timecounter_read(&igb->tc);
fp@2685: 	now += delta;
fp@2685: 	timecounter_init(&igb->tc, &igb->cc, now);
fp@2685: 
fp@2685: 	spin_unlock_irqrestore(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	unsigned long flags;
fp@2685: 	struct timespec now, then = ns_to_timespec(delta);
fp@2685: 
fp@2685: 	spin_lock_irqsave(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	igb_ptp_read_i210(igb, &now);
fp@2685: 	now = timespec_add(now, then);
fp@2685: 	igb_ptp_write_i210(igb, (const struct timespec *)&now);
fp@2685: 
fp@2685: 	spin_unlock_irqrestore(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
fp@2685: 				 struct timespec *ts)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	unsigned long flags;
fp@2685: 	u64 ns;
fp@2685: 	u32 remainder;
fp@2685: 
fp@2685: 	spin_lock_irqsave(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	ns = timecounter_read(&igb->tc);
fp@2685: 
fp@2685: 	spin_unlock_irqrestore(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
fp@2685: 	ts->tv_nsec = remainder;
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
fp@2685: 				struct timespec *ts)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	unsigned long flags;
fp@2685: 
fp@2685: 	spin_lock_irqsave(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	igb_ptp_read_i210(igb, ts);
fp@2685: 
fp@2685: 	spin_unlock_irqrestore(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
fp@2685: 				 const struct timespec *ts)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	unsigned long flags;
fp@2685: 	u64 ns;
fp@2685: 
fp@2685: 	ns = ts->tv_sec * 1000000000ULL;
fp@2685: 	ns += ts->tv_nsec;
fp@2685: 
fp@2685: 	spin_lock_irqsave(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	timecounter_init(&igb->tc, &igb->cc, ns);
fp@2685: 
fp@2685: 	spin_unlock_irqrestore(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
fp@2685: 				const struct timespec *ts)
fp@2685: {
fp@2685: 	struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
fp@2685: 					       ptp_caps);
fp@2685: 	unsigned long flags;
fp@2685: 
fp@2685: 	spin_lock_irqsave(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	igb_ptp_write_i210(igb, ts);
fp@2685: 
fp@2685: 	spin_unlock_irqrestore(&igb->tmreg_lock, flags);
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: static int igb_ptp_feature_enable(struct ptp_clock_info *ptp,
fp@2685: 				  struct ptp_clock_request *rq, int on)
fp@2685: {
fp@2685: 	return -EOPNOTSUPP;
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_tx_work
fp@2685:  * @work: pointer to work struct
fp@2685:  *
fp@2685:  * This work function polls the TSYNCTXCTL valid bit to determine when a
fp@2685:  * timestamp has been taken for the current stored skb.
fp@2685:  **/
fp@2685: static void igb_ptp_tx_work(struct work_struct *work)
fp@2685: {
fp@2685: 	struct igb_adapter *adapter = container_of(work, struct igb_adapter,
fp@2685: 						   ptp_tx_work);
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 	u32 tsynctxctl;
fp@2685: 
fp@2685: 	if (!adapter->ptp_tx_skb)
fp@2685: 		return;
fp@2685: 
fp@2685: 	if (time_is_before_jiffies(adapter->ptp_tx_start +
fp@2685: 				   IGB_PTP_TX_TIMEOUT)) {
fp@2685: 		dev_kfree_skb_any(adapter->ptp_tx_skb);
fp@2685: 		adapter->ptp_tx_skb = NULL;
fp@2685: 		clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
fp@2685: 		adapter->tx_hwtstamp_timeouts++;
fp@2685: 		dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
fp@2685: 		return;
fp@2685: 	}
fp@2685: 
fp@2685: 	tsynctxctl = rd32(E1000_TSYNCTXCTL);
fp@2685: 	if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
fp@2685: 		igb_ptp_tx_hwtstamp(adapter);
fp@2685: 	else
fp@2685: 		/* reschedule to check later */
fp@2685: 		schedule_work(&adapter->ptp_tx_work);
fp@2685: }
fp@2685: 
fp@2685: static void igb_ptp_overflow_check(struct work_struct *work)
fp@2685: {
fp@2685: 	struct igb_adapter *igb =
fp@2685: 		container_of(work, struct igb_adapter, ptp_overflow_work.work);
fp@2685: 	struct timespec ts;
fp@2685: 
fp@2685: 	igb->ptp_caps.gettime(&igb->ptp_caps, &ts);
fp@2685: 
fp@2685: 	pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
fp@2685: 
fp@2685: 	schedule_delayed_work(&igb->ptp_overflow_work,
fp@2685: 			      IGB_SYSTIM_OVERFLOW_PERIOD);
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
fp@2685:  * @adapter: private network adapter structure
fp@2685:  *
fp@2685:  * This watchdog task is scheduled to detect error case where hardware has
fp@2685:  * dropped an Rx packet that was timestamped when the ring is full. The
fp@2685:  * particular error is rare but leaves the device in a state unable to timestamp
fp@2685:  * any future packets.
fp@2685:  **/
fp@2685: void igb_ptp_rx_hang(struct igb_adapter *adapter)
fp@2685: {
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 	u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);
fp@2685: 	unsigned long rx_event;
fp@2685: 
fp@2685: 	if (hw->mac.type != e1000_82576)
fp@2685: 		return;
fp@2685: 
fp@2685: 	/* If we don't have a valid timestamp in the registers, just update the
fp@2685: 	 * timeout counter and exit
fp@2685: 	 */
fp@2685: 	if (!(tsyncrxctl & E1000_TSYNCRXCTL_VALID)) {
fp@2685: 		adapter->last_rx_ptp_check = jiffies;
fp@2685: 		return;
fp@2685: 	}
fp@2685: 
fp@2685: 	/* Determine the most recent watchdog or rx_timestamp event */
fp@2685: 	rx_event = adapter->last_rx_ptp_check;
fp@2685: 	if (time_after(adapter->last_rx_timestamp, rx_event))
fp@2685: 		rx_event = adapter->last_rx_timestamp;
fp@2685: 
fp@2685: 	/* Only need to read the high RXSTMP register to clear the lock */
fp@2685: 	if (time_is_before_jiffies(rx_event + 5 * HZ)) {
fp@2685: 		rd32(E1000_RXSTMPH);
fp@2685: 		adapter->last_rx_ptp_check = jiffies;
fp@2685: 		adapter->rx_hwtstamp_cleared++;
fp@2685: 		dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang\n");
fp@2685: 	}
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
fp@2685:  * @adapter: Board private structure.
fp@2685:  *
fp@2685:  * If we were asked to do hardware stamping and such a time stamp is
fp@2685:  * available, then it must have been for this skb here because we only
fp@2685:  * allow only one such packet into the queue.
fp@2685:  **/
fp@2685: static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
fp@2685: {
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 	struct skb_shared_hwtstamps shhwtstamps;
fp@2685: 	u64 regval;
fp@2685: 
fp@2685: 	regval = rd32(E1000_TXSTMPL);
fp@2685: 	regval |= (u64)rd32(E1000_TXSTMPH) << 32;
fp@2685: 
fp@2685: 	igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
fp@2685: 	skb_tstamp_tx(adapter->ptp_tx_skb, &shhwtstamps);
fp@2685: 	dev_kfree_skb_any(adapter->ptp_tx_skb);
fp@2685: 	adapter->ptp_tx_skb = NULL;
fp@2685: 	clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_rx_pktstamp - retrieve Rx per packet timestamp
fp@2685:  * @q_vector: Pointer to interrupt specific structure
fp@2685:  * @va: Pointer to address containing Rx buffer
fp@2685:  * @skb: Buffer containing timestamp and packet
fp@2685:  *
fp@2685:  * This function is meant to retrieve a timestamp from the first buffer of an
fp@2685:  * incoming frame.  The value is stored in little endian format starting on
fp@2685:  * byte 8.
fp@2685:  **/
fp@2685: void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector,
fp@2685: 			 unsigned char *va,
fp@2685: 			 struct sk_buff *skb)
fp@2685: {
fp@2685: 	__le64 *regval = (__le64 *)va;
fp@2685: 
fp@2685: 	/* The timestamp is recorded in little endian format.
fp@2685: 	 * DWORD: 0        1        2        3
fp@2685: 	 * Field: Reserved Reserved SYSTIML  SYSTIMH
fp@2685: 	 */
fp@2685: 	igb_ptp_systim_to_hwtstamp(q_vector->adapter, skb_hwtstamps(skb),
fp@2685: 				   le64_to_cpu(regval[1]));
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
fp@2685:  * @q_vector: Pointer to interrupt specific structure
fp@2685:  * @skb: Buffer containing timestamp and packet
fp@2685:  *
fp@2685:  * This function is meant to retrieve a timestamp from the internal registers
fp@2685:  * of the adapter and store it in the skb.
fp@2685:  **/
fp@2685: void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
fp@2685: 			 struct sk_buff *skb)
fp@2685: {
fp@2685: 	struct igb_adapter *adapter = q_vector->adapter;
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 	u64 regval;
fp@2685: 
fp@2685: 	/* If this bit is set, then the RX registers contain the time stamp. No
fp@2685: 	 * other packet will be time stamped until we read these registers, so
fp@2685: 	 * read the registers to make them available again. Because only one
fp@2685: 	 * packet can be time stamped at a time, we know that the register
fp@2685: 	 * values must belong to this one here and therefore we don't need to
fp@2685: 	 * compare any of the additional attributes stored for it.
fp@2685: 	 *
fp@2685: 	 * If nothing went wrong, then it should have a shared tx_flags that we
fp@2685: 	 * can turn into a skb_shared_hwtstamps.
fp@2685: 	 */
fp@2685: 	if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
fp@2685: 		return;
fp@2685: 
fp@2685: 	regval = rd32(E1000_RXSTMPL);
fp@2685: 	regval |= (u64)rd32(E1000_RXSTMPH) << 32;
fp@2685: 
fp@2685: 	igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
fp@2685: 
fp@2685: 	/* Update the last_rx_timestamp timer in order to enable watchdog check
fp@2685: 	 * for error case of latched timestamp on a dropped packet.
fp@2685: 	 */
fp@2685: 	adapter->last_rx_timestamp = jiffies;
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_get_ts_config - get hardware time stamping config
fp@2685:  * @netdev:
fp@2685:  * @ifreq:
fp@2685:  *
fp@2685:  * Get the hwtstamp_config settings to return to the user. Rather than attempt
fp@2685:  * to deconstruct the settings from the registers, just return a shadow copy
fp@2685:  * of the last known settings.
fp@2685:  **/
fp@2685: int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
fp@2685: {
fp@2685: 	struct igb_adapter *adapter = netdev_priv(netdev);
fp@2685: 	struct hwtstamp_config *config = &adapter->tstamp_config;
fp@2685: 
fp@2685: 	return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
fp@2685: 		-EFAULT : 0;
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_set_timestamp_mode - setup hardware for timestamping
fp@2685:  * @adapter: networking device structure
fp@2685:  * @config: hwtstamp configuration
fp@2685:  *
fp@2685:  * Outgoing time stamping can be enabled and disabled. Play nice and
fp@2685:  * disable it when requested, although it shouldn't case any overhead
fp@2685:  * when no packet needs it. At most one packet in the queue may be
fp@2685:  * marked for time stamping, otherwise it would be impossible to tell
fp@2685:  * for sure to which packet the hardware time stamp belongs.
fp@2685:  *
fp@2685:  * Incoming time stamping has to be configured via the hardware
fp@2685:  * filters. Not all combinations are supported, in particular event
fp@2685:  * type has to be specified. Matching the kind of event packet is
fp@2685:  * not supported, with the exception of "all V2 events regardless of
fp@2685:  * level 2 or 4".
fp@2685:  */
fp@2685: static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter,
fp@2685: 				      struct hwtstamp_config *config)
fp@2685: {
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 	u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
fp@2685: 	u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
fp@2685: 	u32 tsync_rx_cfg = 0;
fp@2685: 	bool is_l4 = false;
fp@2685: 	bool is_l2 = false;
fp@2685: 	u32 regval;
fp@2685: 
fp@2685: 	/* reserved for future extensions */
fp@2685: 	if (config->flags)
fp@2685: 		return -EINVAL;
fp@2685: 
fp@2685: 	switch (config->tx_type) {
fp@2685: 	case HWTSTAMP_TX_OFF:
fp@2685: 		tsync_tx_ctl = 0;
fp@2685: 	case HWTSTAMP_TX_ON:
fp@2685: 		break;
fp@2685: 	default:
fp@2685: 		return -ERANGE;
fp@2685: 	}
fp@2685: 
fp@2685: 	switch (config->rx_filter) {
fp@2685: 	case HWTSTAMP_FILTER_NONE:
fp@2685: 		tsync_rx_ctl = 0;
fp@2685: 		break;
fp@2685: 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
fp@2685: 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
fp@2685: 		tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
fp@2685: 		is_l4 = true;
fp@2685: 		break;
fp@2685: 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
fp@2685: 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
fp@2685: 		tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
fp@2685: 		is_l4 = true;
fp@2685: 		break;
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
fp@2685: 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
fp@2685: 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
fp@2685: 		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
fp@2685: 		is_l2 = true;
fp@2685: 		is_l4 = true;
fp@2685: 		break;
fp@2685: 	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
fp@2685: 	case HWTSTAMP_FILTER_ALL:
fp@2685: 		/* 82576 cannot timestamp all packets, which it needs to do to
fp@2685: 		 * support both V1 Sync and Delay_Req messages
fp@2685: 		 */
fp@2685: 		if (hw->mac.type != e1000_82576) {
fp@2685: 			tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
fp@2685: 			config->rx_filter = HWTSTAMP_FILTER_ALL;
fp@2685: 			break;
fp@2685: 		}
fp@2685: 		/* fall through */
fp@2685: 	default:
fp@2685: 		config->rx_filter = HWTSTAMP_FILTER_NONE;
fp@2685: 		return -ERANGE;
fp@2685: 	}
fp@2685: 
fp@2685: 	if (hw->mac.type == e1000_82575) {
fp@2685: 		if (tsync_rx_ctl | tsync_tx_ctl)
fp@2685: 			return -EINVAL;
fp@2685: 		return 0;
fp@2685: 	}
fp@2685: 
fp@2685: 	/* Per-packet timestamping only works if all packets are
fp@2685: 	 * timestamped, so enable timestamping in all packets as
fp@2685: 	 * long as one Rx filter was configured.
fp@2685: 	 */
fp@2685: 	if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
fp@2685: 		tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
fp@2685: 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
fp@2685: 		config->rx_filter = HWTSTAMP_FILTER_ALL;
fp@2685: 		is_l2 = true;
fp@2685: 		is_l4 = true;
fp@2685: 
fp@2685: 		if ((hw->mac.type == e1000_i210) ||
fp@2685: 		    (hw->mac.type == e1000_i211)) {
fp@2685: 			regval = rd32(E1000_RXPBS);
fp@2685: 			regval |= E1000_RXPBS_CFG_TS_EN;
fp@2685: 			wr32(E1000_RXPBS, regval);
fp@2685: 		}
fp@2685: 	}
fp@2685: 
fp@2685: 	/* enable/disable TX */
fp@2685: 	regval = rd32(E1000_TSYNCTXCTL);
fp@2685: 	regval &= ~E1000_TSYNCTXCTL_ENABLED;
fp@2685: 	regval |= tsync_tx_ctl;
fp@2685: 	wr32(E1000_TSYNCTXCTL, regval);
fp@2685: 
fp@2685: 	/* enable/disable RX */
fp@2685: 	regval = rd32(E1000_TSYNCRXCTL);
fp@2685: 	regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
fp@2685: 	regval |= tsync_rx_ctl;
fp@2685: 	wr32(E1000_TSYNCRXCTL, regval);
fp@2685: 
fp@2685: 	/* define which PTP packets are time stamped */
fp@2685: 	wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
fp@2685: 
fp@2685: 	/* define ethertype filter for timestamped packets */
fp@2685: 	if (is_l2)
fp@2685: 		wr32(E1000_ETQF(3),
fp@2685: 		     (E1000_ETQF_FILTER_ENABLE | /* enable filter */
fp@2685: 		      E1000_ETQF_1588 | /* enable timestamping */
fp@2685: 		      ETH_P_1588));     /* 1588 eth protocol type */
fp@2685: 	else
fp@2685: 		wr32(E1000_ETQF(3), 0);
fp@2685: 
fp@2685: 	/* L4 Queue Filter[3]: filter by destination port and protocol */
fp@2685: 	if (is_l4) {
fp@2685: 		u32 ftqf = (IPPROTO_UDP /* UDP */
fp@2685: 			| E1000_FTQF_VF_BP /* VF not compared */
fp@2685: 			| E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
fp@2685: 			| E1000_FTQF_MASK); /* mask all inputs */
fp@2685: 		ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
fp@2685: 
fp@2685: 		wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
fp@2685: 		wr32(E1000_IMIREXT(3),
fp@2685: 		     (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
fp@2685: 		if (hw->mac.type == e1000_82576) {
fp@2685: 			/* enable source port check */
fp@2685: 			wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
fp@2685: 			ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
fp@2685: 		}
fp@2685: 		wr32(E1000_FTQF(3), ftqf);
fp@2685: 	} else {
fp@2685: 		wr32(E1000_FTQF(3), E1000_FTQF_MASK);
fp@2685: 	}
fp@2685: 	wrfl();
fp@2685: 
fp@2685: 	/* clear TX/RX time stamp registers, just to be sure */
fp@2685: 	regval = rd32(E1000_TXSTMPL);
fp@2685: 	regval = rd32(E1000_TXSTMPH);
fp@2685: 	regval = rd32(E1000_RXSTMPL);
fp@2685: 	regval = rd32(E1000_RXSTMPH);
fp@2685: 
fp@2685: 	return 0;
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_set_ts_config - set hardware time stamping config
fp@2685:  * @netdev:
fp@2685:  * @ifreq:
fp@2685:  *
fp@2685:  **/
fp@2685: int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
fp@2685: {
fp@2685: 	struct igb_adapter *adapter = netdev_priv(netdev);
fp@2685: 	struct hwtstamp_config config;
fp@2685: 	int err;
fp@2685: 
fp@2685: 	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
fp@2685: 		return -EFAULT;
fp@2685: 
fp@2685: 	err = igb_ptp_set_timestamp_mode(adapter, &config);
fp@2685: 	if (err)
fp@2685: 		return err;
fp@2685: 
fp@2685: 	/* save these settings for future reference */
fp@2685: 	memcpy(&adapter->tstamp_config, &config,
fp@2685: 	       sizeof(adapter->tstamp_config));
fp@2685: 
fp@2685: 	return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
fp@2685: 		-EFAULT : 0;
fp@2685: }
fp@2685: 
fp@2685: void igb_ptp_init(struct igb_adapter *adapter)
fp@2685: {
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 	struct net_device *netdev = adapter->netdev;
fp@2685: 
fp@2685: 	switch (hw->mac.type) {
fp@2685: 	case e1000_82576:
fp@2685: 		snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
fp@2685: 		adapter->ptp_caps.owner = THIS_MODULE;
fp@2685: 		adapter->ptp_caps.max_adj = 999999881;
fp@2685: 		adapter->ptp_caps.n_ext_ts = 0;
fp@2685: 		adapter->ptp_caps.pps = 0;
fp@2685: 		adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
fp@2685: 		adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
fp@2685: 		adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
fp@2685: 		adapter->ptp_caps.settime = igb_ptp_settime_82576;
fp@2685: 		adapter->ptp_caps.enable = igb_ptp_feature_enable;
fp@2685: 		adapter->cc.read = igb_ptp_read_82576;
fp@2685: 		adapter->cc.mask = CLOCKSOURCE_MASK(64);
fp@2685: 		adapter->cc.mult = 1;
fp@2685: 		adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
fp@2685: 		/* Dial the nominal frequency. */
fp@2685: 		wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
fp@2685: 		break;
fp@2685: 	case e1000_82580:
fp@2685: 	case e1000_i354:
fp@2685: 	case e1000_i350:
fp@2685: 		snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
fp@2685: 		adapter->ptp_caps.owner = THIS_MODULE;
fp@2685: 		adapter->ptp_caps.max_adj = 62499999;
fp@2685: 		adapter->ptp_caps.n_ext_ts = 0;
fp@2685: 		adapter->ptp_caps.pps = 0;
fp@2685: 		adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
fp@2685: 		adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
fp@2685: 		adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
fp@2685: 		adapter->ptp_caps.settime = igb_ptp_settime_82576;
fp@2685: 		adapter->ptp_caps.enable = igb_ptp_feature_enable;
fp@2685: 		adapter->cc.read = igb_ptp_read_82580;
fp@2685: 		adapter->cc.mask = CLOCKSOURCE_MASK(IGB_NBITS_82580);
fp@2685: 		adapter->cc.mult = 1;
fp@2685: 		adapter->cc.shift = 0;
fp@2685: 		/* Enable the timer functions by clearing bit 31. */
fp@2685: 		wr32(E1000_TSAUXC, 0x0);
fp@2685: 		break;
fp@2685: 	case e1000_i210:
fp@2685: 	case e1000_i211:
fp@2685: 		snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
fp@2685: 		adapter->ptp_caps.owner = THIS_MODULE;
fp@2685: 		adapter->ptp_caps.max_adj = 62499999;
fp@2685: 		adapter->ptp_caps.n_ext_ts = 0;
fp@2685: 		adapter->ptp_caps.pps = 0;
fp@2685: 		adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
fp@2685: 		adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
fp@2685: 		adapter->ptp_caps.gettime = igb_ptp_gettime_i210;
fp@2685: 		adapter->ptp_caps.settime = igb_ptp_settime_i210;
fp@2685: 		adapter->ptp_caps.enable = igb_ptp_feature_enable;
fp@2685: 		/* Enable the timer functions by clearing bit 31. */
fp@2685: 		wr32(E1000_TSAUXC, 0x0);
fp@2685: 		break;
fp@2685: 	default:
fp@2685: 		adapter->ptp_clock = NULL;
fp@2685: 		return;
fp@2685: 	}
fp@2685: 
fp@2685: 	wrfl();
fp@2685: 
fp@2685: 	spin_lock_init(&adapter->tmreg_lock);
fp@2685: 	INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
fp@2685: 
fp@2685: 	/* Initialize the clock and overflow work for devices that need it. */
fp@2685: 	if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
fp@2685: 		struct timespec ts = ktime_to_timespec(ktime_get_real());
fp@2685: 
fp@2685: 		igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
fp@2685: 	} else {
fp@2685: 		timecounter_init(&adapter->tc, &adapter->cc,
fp@2685: 				 ktime_to_ns(ktime_get_real()));
fp@2685: 
fp@2685: 		INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
fp@2685: 				  igb_ptp_overflow_check);
fp@2685: 
fp@2685: 		schedule_delayed_work(&adapter->ptp_overflow_work,
fp@2685: 				      IGB_SYSTIM_OVERFLOW_PERIOD);
fp@2685: 	}
fp@2685: 
fp@2685: 	/* Initialize the time sync interrupts for devices that support it. */
fp@2685: 	if (hw->mac.type >= e1000_82580) {
fp@2685: 		wr32(E1000_TSIM, TSYNC_INTERRUPTS);
fp@2685: 		wr32(E1000_IMS, E1000_IMS_TS);
fp@2685: 	}
fp@2685: 
fp@2685: 	adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
fp@2685: 	adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
fp@2685: 
fp@2685: 	adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
fp@2685: 						&adapter->pdev->dev);
fp@2685: 	if (IS_ERR(adapter->ptp_clock)) {
fp@2685: 		adapter->ptp_clock = NULL;
fp@2685: 		dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
fp@2685: 	} else {
fp@2685: 		dev_info(&adapter->pdev->dev, "added PHC on %s\n",
fp@2685: 			 adapter->netdev->name);
fp@2685: 		adapter->flags |= IGB_FLAG_PTP;
fp@2685: 	}
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_stop - Disable PTP device and stop the overflow check.
fp@2685:  * @adapter: Board private structure.
fp@2685:  *
fp@2685:  * This function stops the PTP support and cancels the delayed work.
fp@2685:  **/
fp@2685: void igb_ptp_stop(struct igb_adapter *adapter)
fp@2685: {
fp@2685: 	switch (adapter->hw.mac.type) {
fp@2685: 	case e1000_82576:
fp@2685: 	case e1000_82580:
fp@2685: 	case e1000_i354:
fp@2685: 	case e1000_i350:
fp@2685: 		cancel_delayed_work_sync(&adapter->ptp_overflow_work);
fp@2685: 		break;
fp@2685: 	case e1000_i210:
fp@2685: 	case e1000_i211:
fp@2685: 		/* No delayed work to cancel. */
fp@2685: 		break;
fp@2685: 	default:
fp@2685: 		return;
fp@2685: 	}
fp@2685: 
fp@2685: 	cancel_work_sync(&adapter->ptp_tx_work);
fp@2685: 	if (adapter->ptp_tx_skb) {
fp@2685: 		dev_kfree_skb_any(adapter->ptp_tx_skb);
fp@2685: 		adapter->ptp_tx_skb = NULL;
fp@2685: 		clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
fp@2685: 	}
fp@2685: 
fp@2685: 	if (adapter->ptp_clock) {
fp@2685: 		ptp_clock_unregister(adapter->ptp_clock);
fp@2685: 		dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
fp@2685: 			 adapter->netdev->name);
fp@2685: 		adapter->flags &= ~IGB_FLAG_PTP;
fp@2685: 	}
fp@2685: }
fp@2685: 
fp@2685: /**
fp@2685:  * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
fp@2685:  * @adapter: Board private structure.
fp@2685:  *
fp@2685:  * This function handles the reset work required to re-enable the PTP device.
fp@2685:  **/
fp@2685: void igb_ptp_reset(struct igb_adapter *adapter)
fp@2685: {
fp@2685: 	struct e1000_hw *hw = &adapter->hw;
fp@2685: 
fp@2685: 	if (!(adapter->flags & IGB_FLAG_PTP))
fp@2685: 		return;
fp@2685: 
fp@2685: 	/* reset the tstamp_config */
fp@2685: 	igb_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
fp@2685: 
fp@2685: 	switch (adapter->hw.mac.type) {
fp@2685: 	case e1000_82576:
fp@2685: 		/* Dial the nominal frequency. */
fp@2685: 		wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
fp@2685: 		break;
fp@2685: 	case e1000_82580:
fp@2685: 	case e1000_i354:
fp@2685: 	case e1000_i350:
fp@2685: 	case e1000_i210:
fp@2685: 	case e1000_i211:
fp@2685: 		/* Enable the timer functions and interrupts. */
fp@2685: 		wr32(E1000_TSAUXC, 0x0);
fp@2685: 		wr32(E1000_TSIM, TSYNC_INTERRUPTS);
fp@2685: 		wr32(E1000_IMS, E1000_IMS_TS);
fp@2685: 		break;
fp@2685: 	default:
fp@2685: 		/* No work to do. */
fp@2685: 		return;
fp@2685: 	}
fp@2685: 
fp@2685: 	/* Re-initialize the timer. */
fp@2685: 	if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
fp@2685: 		struct timespec ts = ktime_to_timespec(ktime_get_real());
fp@2685: 
fp@2685: 		igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
fp@2685: 	} else {
fp@2685: 		timecounter_init(&adapter->tc, &adapter->cc,
fp@2685: 				 ktime_to_ns(ktime_get_real()));
fp@2685: 	}
fp@2685: }