fp@2585: /******************************************************************************* fp@2585: fp@2585: Intel PRO/1000 Linux driver fp@2585: Copyright(c) 1999 - 2013 Intel Corporation. fp@2585: fp@2585: This program is free software; you can redistribute it and/or modify it fp@2585: under the terms and conditions of the GNU General Public License, fp@2585: version 2, as published by the Free Software Foundation. fp@2585: fp@2585: This program is distributed in the hope it will be useful, but WITHOUT fp@2585: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or fp@2585: FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for fp@2585: more details. fp@2585: fp@2585: You should have received a copy of the GNU General Public License along with fp@2585: this program; if not, write to the Free Software Foundation, Inc., fp@2585: 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. fp@2585: fp@2585: The full GNU General Public License is included in this distribution in fp@2585: the file called "COPYING". fp@2585: fp@2585: Contact Information: fp@2585: Linux NICS fp@2585: e1000-devel Mailing List fp@2585: Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 fp@2585: fp@2585: *******************************************************************************/ fp@2585: fp@2585: #ifndef _E1000_HW_H_ fp@2585: #define _E1000_HW_H_ fp@2585: fp@2585: #include "regs.h" fp@2585: #include "defines.h" fp@2585: fp@2585: struct e1000_hw; fp@2585: fp@2585: #define E1000_DEV_ID_82571EB_COPPER 0x105E fp@2585: #define E1000_DEV_ID_82571EB_FIBER 0x105F fp@2585: #define E1000_DEV_ID_82571EB_SERDES 0x1060 fp@2585: #define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4 fp@2585: #define E1000_DEV_ID_82571PT_QUAD_COPPER 0x10D5 fp@2585: #define E1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5 fp@2585: #define E1000_DEV_ID_82571EB_QUAD_COPPER_LP 0x10BC fp@2585: #define E1000_DEV_ID_82571EB_SERDES_DUAL 0x10D9 fp@2585: #define E1000_DEV_ID_82571EB_SERDES_QUAD 0x10DA fp@2585: #define E1000_DEV_ID_82572EI_COPPER 0x107D fp@2585: #define E1000_DEV_ID_82572EI_FIBER 0x107E fp@2585: #define E1000_DEV_ID_82572EI_SERDES 0x107F fp@2585: #define E1000_DEV_ID_82572EI 0x10B9 fp@2585: #define E1000_DEV_ID_82573E 0x108B fp@2585: #define E1000_DEV_ID_82573E_IAMT 0x108C fp@2585: #define E1000_DEV_ID_82573L 0x109A fp@2585: #define E1000_DEV_ID_82574L 0x10D3 fp@2585: #define E1000_DEV_ID_82574LA 0x10F6 fp@2585: #define E1000_DEV_ID_82583V 0x150C fp@2585: #define E1000_DEV_ID_80003ES2LAN_COPPER_DPT 0x1096 fp@2585: #define E1000_DEV_ID_80003ES2LAN_SERDES_DPT 0x1098 fp@2585: #define E1000_DEV_ID_80003ES2LAN_COPPER_SPT 0x10BA fp@2585: #define E1000_DEV_ID_80003ES2LAN_SERDES_SPT 0x10BB fp@2585: #define E1000_DEV_ID_ICH8_82567V_3 0x1501 fp@2585: #define E1000_DEV_ID_ICH8_IGP_M_AMT 0x1049 fp@2585: #define E1000_DEV_ID_ICH8_IGP_AMT 0x104A fp@2585: #define E1000_DEV_ID_ICH8_IGP_C 0x104B fp@2585: #define E1000_DEV_ID_ICH8_IFE 0x104C fp@2585: #define E1000_DEV_ID_ICH8_IFE_GT 0x10C4 fp@2585: #define E1000_DEV_ID_ICH8_IFE_G 0x10C5 fp@2585: #define E1000_DEV_ID_ICH8_IGP_M 0x104D fp@2585: #define E1000_DEV_ID_ICH9_IGP_AMT 0x10BD fp@2585: #define E1000_DEV_ID_ICH9_BM 0x10E5 fp@2585: #define E1000_DEV_ID_ICH9_IGP_M_AMT 0x10F5 fp@2585: #define E1000_DEV_ID_ICH9_IGP_M 0x10BF fp@2585: #define E1000_DEV_ID_ICH9_IGP_M_V 0x10CB fp@2585: #define E1000_DEV_ID_ICH9_IGP_C 0x294C fp@2585: #define E1000_DEV_ID_ICH9_IFE 0x10C0 fp@2585: #define E1000_DEV_ID_ICH9_IFE_GT 0x10C3 fp@2585: #define E1000_DEV_ID_ICH9_IFE_G 0x10C2 fp@2585: #define E1000_DEV_ID_ICH10_R_BM_LM 0x10CC fp@2585: #define E1000_DEV_ID_ICH10_R_BM_LF 0x10CD fp@2585: #define E1000_DEV_ID_ICH10_R_BM_V 0x10CE fp@2585: #define E1000_DEV_ID_ICH10_D_BM_LM 0x10DE fp@2585: #define E1000_DEV_ID_ICH10_D_BM_LF 0x10DF fp@2585: #define E1000_DEV_ID_ICH10_D_BM_V 0x1525 fp@2585: #define E1000_DEV_ID_PCH_M_HV_LM 0x10EA fp@2585: #define E1000_DEV_ID_PCH_M_HV_LC 0x10EB fp@2585: #define E1000_DEV_ID_PCH_D_HV_DM 0x10EF fp@2585: #define E1000_DEV_ID_PCH_D_HV_DC 0x10F0 fp@2585: #define E1000_DEV_ID_PCH2_LV_LM 0x1502 fp@2585: #define E1000_DEV_ID_PCH2_LV_V 0x1503 fp@2585: #define E1000_DEV_ID_PCH_LPT_I217_LM 0x153A fp@2585: #define E1000_DEV_ID_PCH_LPT_I217_V 0x153B fp@2585: #define E1000_DEV_ID_PCH_LPTLP_I218_LM 0x155A fp@2585: #define E1000_DEV_ID_PCH_LPTLP_I218_V 0x1559 fp@2585: fp@2585: #define E1000_REVISION_4 4 fp@2585: fp@2585: #define E1000_FUNC_1 1 fp@2585: fp@2585: #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0 fp@2585: #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3 fp@2585: fp@2585: enum e1000_mac_type { fp@2585: e1000_82571, fp@2585: e1000_82572, fp@2585: e1000_82573, fp@2585: e1000_82574, fp@2585: e1000_82583, fp@2585: e1000_80003es2lan, fp@2585: e1000_ich8lan, fp@2585: e1000_ich9lan, fp@2585: e1000_ich10lan, fp@2585: e1000_pchlan, fp@2585: e1000_pch2lan, fp@2585: e1000_pch_lpt, fp@2585: }; fp@2585: fp@2585: enum e1000_media_type { fp@2585: e1000_media_type_unknown = 0, fp@2585: e1000_media_type_copper = 1, fp@2585: e1000_media_type_fiber = 2, fp@2585: e1000_media_type_internal_serdes = 3, fp@2585: e1000_num_media_types fp@2585: }; fp@2585: fp@2585: enum e1000_nvm_type { fp@2585: e1000_nvm_unknown = 0, fp@2585: e1000_nvm_none, fp@2585: e1000_nvm_eeprom_spi, fp@2585: e1000_nvm_flash_hw, fp@2585: e1000_nvm_flash_sw fp@2585: }; fp@2585: fp@2585: enum e1000_nvm_override { fp@2585: e1000_nvm_override_none = 0, fp@2585: e1000_nvm_override_spi_small, fp@2585: e1000_nvm_override_spi_large fp@2585: }; fp@2585: fp@2585: enum e1000_phy_type { fp@2585: e1000_phy_unknown = 0, fp@2585: e1000_phy_none, fp@2585: e1000_phy_m88, fp@2585: e1000_phy_igp, fp@2585: e1000_phy_igp_2, fp@2585: e1000_phy_gg82563, fp@2585: e1000_phy_igp_3, fp@2585: e1000_phy_ife, fp@2585: e1000_phy_bm, fp@2585: e1000_phy_82578, fp@2585: e1000_phy_82577, fp@2585: e1000_phy_82579, fp@2585: e1000_phy_i217, fp@2585: }; fp@2585: fp@2585: enum e1000_bus_width { fp@2585: e1000_bus_width_unknown = 0, fp@2585: e1000_bus_width_pcie_x1, fp@2585: e1000_bus_width_pcie_x2, fp@2585: e1000_bus_width_pcie_x4 = 4, fp@2585: e1000_bus_width_32, fp@2585: e1000_bus_width_64, fp@2585: e1000_bus_width_reserved fp@2585: }; fp@2585: fp@2585: enum e1000_1000t_rx_status { fp@2585: e1000_1000t_rx_status_not_ok = 0, fp@2585: e1000_1000t_rx_status_ok, fp@2585: e1000_1000t_rx_status_undefined = 0xFF fp@2585: }; fp@2585: fp@2585: enum e1000_rev_polarity { fp@2585: e1000_rev_polarity_normal = 0, fp@2585: e1000_rev_polarity_reversed, fp@2585: e1000_rev_polarity_undefined = 0xFF fp@2585: }; fp@2585: fp@2585: enum e1000_fc_mode { fp@2585: e1000_fc_none = 0, fp@2585: e1000_fc_rx_pause, fp@2585: e1000_fc_tx_pause, fp@2585: e1000_fc_full, fp@2585: e1000_fc_default = 0xFF fp@2585: }; fp@2585: fp@2585: enum e1000_ms_type { fp@2585: e1000_ms_hw_default = 0, fp@2585: e1000_ms_force_master, fp@2585: e1000_ms_force_slave, fp@2585: e1000_ms_auto fp@2585: }; fp@2585: fp@2585: enum e1000_smart_speed { fp@2585: e1000_smart_speed_default = 0, fp@2585: e1000_smart_speed_on, fp@2585: e1000_smart_speed_off fp@2585: }; fp@2585: fp@2585: enum e1000_serdes_link_state { fp@2585: e1000_serdes_link_down = 0, fp@2585: e1000_serdes_link_autoneg_progress, fp@2585: e1000_serdes_link_autoneg_complete, fp@2585: e1000_serdes_link_forced_up fp@2585: }; fp@2585: fp@2585: /* Receive Descriptor - Extended */ fp@2585: union e1000_rx_desc_extended { fp@2585: struct { fp@2585: __le64 buffer_addr; fp@2585: __le64 reserved; fp@2585: } read; fp@2585: struct { fp@2585: struct { fp@2585: __le32 mrq; /* Multiple Rx Queues */ fp@2585: union { fp@2585: __le32 rss; /* RSS Hash */ fp@2585: struct { fp@2585: __le16 ip_id; /* IP id */ fp@2585: __le16 csum; /* Packet Checksum */ fp@2585: } csum_ip; fp@2585: } hi_dword; fp@2585: } lower; fp@2585: struct { fp@2585: __le32 status_error; /* ext status/error */ fp@2585: __le16 length; fp@2585: __le16 vlan; /* VLAN tag */ fp@2585: } upper; fp@2585: } wb; /* writeback */ fp@2585: }; fp@2585: fp@2585: #define MAX_PS_BUFFERS 4 fp@2585: /* Receive Descriptor - Packet Split */ fp@2585: union e1000_rx_desc_packet_split { fp@2585: struct { fp@2585: /* one buffer for protocol header(s), three data buffers */ fp@2585: __le64 buffer_addr[MAX_PS_BUFFERS]; fp@2585: } read; fp@2585: struct { fp@2585: struct { fp@2585: __le32 mrq; /* Multiple Rx Queues */ fp@2585: union { fp@2585: __le32 rss; /* RSS Hash */ fp@2585: struct { fp@2585: __le16 ip_id; /* IP id */ fp@2585: __le16 csum; /* Packet Checksum */ fp@2585: } csum_ip; fp@2585: } hi_dword; fp@2585: } lower; fp@2585: struct { fp@2585: __le32 status_error; /* ext status/error */ fp@2585: __le16 length0; /* length of buffer 0 */ fp@2585: __le16 vlan; /* VLAN tag */ fp@2585: } middle; fp@2585: struct { fp@2585: __le16 header_status; fp@2585: __le16 length[3]; /* length of buffers 1-3 */ fp@2585: } upper; fp@2585: __le64 reserved; fp@2585: } wb; /* writeback */ fp@2585: }; fp@2585: fp@2585: /* Transmit Descriptor */ fp@2585: struct e1000_tx_desc { fp@2585: __le64 buffer_addr; /* Address of the descriptor's data buffer */ fp@2585: union { fp@2585: __le32 data; fp@2585: struct { fp@2585: __le16 length; /* Data buffer length */ fp@2585: u8 cso; /* Checksum offset */ fp@2585: u8 cmd; /* Descriptor control */ fp@2585: } flags; fp@2585: } lower; fp@2585: union { fp@2585: __le32 data; fp@2585: struct { fp@2585: u8 status; /* Descriptor status */ fp@2585: u8 css; /* Checksum start */ fp@2585: __le16 special; fp@2585: } fields; fp@2585: } upper; fp@2585: }; fp@2585: fp@2585: /* Offload Context Descriptor */ fp@2585: struct e1000_context_desc { fp@2585: union { fp@2585: __le32 ip_config; fp@2585: struct { fp@2585: u8 ipcss; /* IP checksum start */ fp@2585: u8 ipcso; /* IP checksum offset */ fp@2585: __le16 ipcse; /* IP checksum end */ fp@2585: } ip_fields; fp@2585: } lower_setup; fp@2585: union { fp@2585: __le32 tcp_config; fp@2585: struct { fp@2585: u8 tucss; /* TCP checksum start */ fp@2585: u8 tucso; /* TCP checksum offset */ fp@2585: __le16 tucse; /* TCP checksum end */ fp@2585: } tcp_fields; fp@2585: } upper_setup; fp@2585: __le32 cmd_and_length; fp@2585: union { fp@2585: __le32 data; fp@2585: struct { fp@2585: u8 status; /* Descriptor status */ fp@2585: u8 hdr_len; /* Header length */ fp@2585: __le16 mss; /* Maximum segment size */ fp@2585: } fields; fp@2585: } tcp_seg_setup; fp@2585: }; fp@2585: fp@2585: /* Offload data descriptor */ fp@2585: struct e1000_data_desc { fp@2585: __le64 buffer_addr; /* Address of the descriptor's buffer address */ fp@2585: union { fp@2585: __le32 data; fp@2585: struct { fp@2585: __le16 length; /* Data buffer length */ fp@2585: u8 typ_len_ext; fp@2585: u8 cmd; fp@2585: } flags; fp@2585: } lower; fp@2585: union { fp@2585: __le32 data; fp@2585: struct { fp@2585: u8 status; /* Descriptor status */ fp@2585: u8 popts; /* Packet Options */ fp@2585: __le16 special; fp@2585: } fields; fp@2585: } upper; fp@2585: }; fp@2585: fp@2585: /* Statistics counters collected by the MAC */ fp@2585: struct e1000_hw_stats { fp@2585: u64 crcerrs; fp@2585: u64 algnerrc; fp@2585: u64 symerrs; fp@2585: u64 rxerrc; fp@2585: u64 mpc; fp@2585: u64 scc; fp@2585: u64 ecol; fp@2585: u64 mcc; fp@2585: u64 latecol; fp@2585: u64 colc; fp@2585: u64 dc; fp@2585: u64 tncrs; fp@2585: u64 sec; fp@2585: u64 cexterr; fp@2585: u64 rlec; fp@2585: u64 xonrxc; fp@2585: u64 xontxc; fp@2585: u64 xoffrxc; fp@2585: u64 xofftxc; fp@2585: u64 fcruc; fp@2585: u64 prc64; fp@2585: u64 prc127; fp@2585: u64 prc255; fp@2585: u64 prc511; fp@2585: u64 prc1023; fp@2585: u64 prc1522; fp@2585: u64 gprc; fp@2585: u64 bprc; fp@2585: u64 mprc; fp@2585: u64 gptc; fp@2585: u64 gorc; fp@2585: u64 gotc; fp@2585: u64 rnbc; fp@2585: u64 ruc; fp@2585: u64 rfc; fp@2585: u64 roc; fp@2585: u64 rjc; fp@2585: u64 mgprc; fp@2585: u64 mgpdc; fp@2585: u64 mgptc; fp@2585: u64 tor; fp@2585: u64 tot; fp@2585: u64 tpr; fp@2585: u64 tpt; fp@2585: u64 ptc64; fp@2585: u64 ptc127; fp@2585: u64 ptc255; fp@2585: u64 ptc511; fp@2585: u64 ptc1023; fp@2585: u64 ptc1522; fp@2585: u64 mptc; fp@2585: u64 bptc; fp@2585: u64 tsctc; fp@2585: u64 tsctfc; fp@2585: u64 iac; fp@2585: u64 icrxptc; fp@2585: u64 icrxatc; fp@2585: u64 ictxptc; fp@2585: u64 ictxatc; fp@2585: u64 ictxqec; fp@2585: u64 ictxqmtc; fp@2585: u64 icrxdmtc; fp@2585: u64 icrxoc; fp@2585: }; fp@2585: fp@2585: struct e1000_phy_stats { fp@2585: u32 idle_errors; fp@2585: u32 receive_errors; fp@2585: }; fp@2585: fp@2585: struct e1000_host_mng_dhcp_cookie { fp@2585: u32 signature; fp@2585: u8 status; fp@2585: u8 reserved0; fp@2585: u16 vlan_id; fp@2585: u32 reserved1; fp@2585: u16 reserved2; fp@2585: u8 reserved3; fp@2585: u8 checksum; fp@2585: }; fp@2585: fp@2585: /* Host Interface "Rev 1" */ fp@2585: struct e1000_host_command_header { fp@2585: u8 command_id; fp@2585: u8 command_length; fp@2585: u8 command_options; fp@2585: u8 checksum; fp@2585: }; fp@2585: fp@2585: #define E1000_HI_MAX_DATA_LENGTH 252 fp@2585: struct e1000_host_command_info { fp@2585: struct e1000_host_command_header command_header; fp@2585: u8 command_data[E1000_HI_MAX_DATA_LENGTH]; fp@2585: }; fp@2585: fp@2585: /* Host Interface "Rev 2" */ fp@2585: struct e1000_host_mng_command_header { fp@2585: u8 command_id; fp@2585: u8 checksum; fp@2585: u16 reserved1; fp@2585: u16 reserved2; fp@2585: u16 command_length; fp@2585: }; fp@2585: fp@2585: #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8 fp@2585: struct e1000_host_mng_command_info { fp@2585: struct e1000_host_mng_command_header command_header; fp@2585: u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH]; fp@2585: }; fp@2585: fp@2585: #include "mac.h" fp@2585: #include "phy.h" fp@2585: #include "nvm.h" fp@2585: #include "manage.h" fp@2585: fp@2585: /* Function pointers for the MAC. */ fp@2585: struct e1000_mac_operations { fp@2585: s32 (*id_led_init)(struct e1000_hw *); fp@2585: s32 (*blink_led)(struct e1000_hw *); fp@2585: bool (*check_mng_mode)(struct e1000_hw *); fp@2585: s32 (*check_for_link)(struct e1000_hw *); fp@2585: s32 (*cleanup_led)(struct e1000_hw *); fp@2585: void (*clear_hw_cntrs)(struct e1000_hw *); fp@2585: void (*clear_vfta)(struct e1000_hw *); fp@2585: s32 (*get_bus_info)(struct e1000_hw *); fp@2585: void (*set_lan_id)(struct e1000_hw *); fp@2585: s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *); fp@2585: s32 (*led_on)(struct e1000_hw *); fp@2585: s32 (*led_off)(struct e1000_hw *); fp@2585: void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32); fp@2585: s32 (*reset_hw)(struct e1000_hw *); fp@2585: s32 (*init_hw)(struct e1000_hw *); fp@2585: s32 (*setup_link)(struct e1000_hw *); fp@2585: s32 (*setup_physical_interface)(struct e1000_hw *); fp@2585: s32 (*setup_led)(struct e1000_hw *); fp@2585: void (*write_vfta)(struct e1000_hw *, u32, u32); fp@2585: void (*config_collision_dist)(struct e1000_hw *); fp@2585: void (*rar_set)(struct e1000_hw *, u8 *, u32); fp@2585: s32 (*read_mac_addr)(struct e1000_hw *); fp@2585: }; fp@2585: fp@2585: /* When to use various PHY register access functions: fp@2585: * fp@2585: * Func Caller fp@2585: * Function Does Does When to use fp@2585: * ~~~~~~~~~~~~ ~~~~~ ~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ fp@2585: * X_reg L,P,A n/a for simple PHY reg accesses fp@2585: * X_reg_locked P,A L for multiple accesses of different regs fp@2585: * on different pages fp@2585: * X_reg_page A L,P for multiple accesses of different regs fp@2585: * on the same page fp@2585: * fp@2585: * Where X=[read|write], L=locking, P=sets page, A=register access fp@2585: * fp@2585: */ fp@2585: struct e1000_phy_operations { fp@2585: s32 (*acquire)(struct e1000_hw *); fp@2585: s32 (*cfg_on_link_up)(struct e1000_hw *); fp@2585: s32 (*check_polarity)(struct e1000_hw *); fp@2585: s32 (*check_reset_block)(struct e1000_hw *); fp@2585: s32 (*commit)(struct e1000_hw *); fp@2585: s32 (*force_speed_duplex)(struct e1000_hw *); fp@2585: s32 (*get_cfg_done)(struct e1000_hw *hw); fp@2585: s32 (*get_cable_length)(struct e1000_hw *); fp@2585: s32 (*get_info)(struct e1000_hw *); fp@2585: s32 (*set_page)(struct e1000_hw *, u16); fp@2585: s32 (*read_reg)(struct e1000_hw *, u32, u16 *); fp@2585: s32 (*read_reg_locked)(struct e1000_hw *, u32, u16 *); fp@2585: s32 (*read_reg_page)(struct e1000_hw *, u32, u16 *); fp@2585: void (*release)(struct e1000_hw *); fp@2585: s32 (*reset)(struct e1000_hw *); fp@2585: s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); fp@2585: s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); fp@2585: s32 (*write_reg)(struct e1000_hw *, u32, u16); fp@2585: s32 (*write_reg_locked)(struct e1000_hw *, u32, u16); fp@2585: s32 (*write_reg_page)(struct e1000_hw *, u32, u16); fp@2585: void (*power_up)(struct e1000_hw *); fp@2585: void (*power_down)(struct e1000_hw *); fp@2585: }; fp@2585: fp@2585: /* Function pointers for the NVM. */ fp@2585: struct e1000_nvm_operations { fp@2585: s32 (*acquire)(struct e1000_hw *); fp@2585: s32 (*read)(struct e1000_hw *, u16, u16, u16 *); fp@2585: void (*release)(struct e1000_hw *); fp@2585: void (*reload)(struct e1000_hw *); fp@2585: s32 (*update)(struct e1000_hw *); fp@2585: s32 (*valid_led_default)(struct e1000_hw *, u16 *); fp@2585: s32 (*validate)(struct e1000_hw *); fp@2585: s32 (*write)(struct e1000_hw *, u16, u16, u16 *); fp@2585: }; fp@2585: fp@2585: struct e1000_mac_info { fp@2585: struct e1000_mac_operations ops; fp@2585: u8 addr[ETH_ALEN]; fp@2585: u8 perm_addr[ETH_ALEN]; fp@2585: fp@2585: enum e1000_mac_type type; fp@2585: fp@2585: u32 collision_delta; fp@2585: u32 ledctl_default; fp@2585: u32 ledctl_mode1; fp@2585: u32 ledctl_mode2; fp@2585: u32 mc_filter_type; fp@2585: u32 tx_packet_delta; fp@2585: u32 txcw; fp@2585: fp@2585: u16 current_ifs_val; fp@2585: u16 ifs_max_val; fp@2585: u16 ifs_min_val; fp@2585: u16 ifs_ratio; fp@2585: u16 ifs_step_size; fp@2585: u16 mta_reg_count; fp@2585: fp@2585: /* Maximum size of the MTA register table in all supported adapters */ fp@2585: #define MAX_MTA_REG 128 fp@2585: u32 mta_shadow[MAX_MTA_REG]; fp@2585: u16 rar_entry_count; fp@2585: fp@2585: u8 forced_speed_duplex; fp@2585: fp@2585: bool adaptive_ifs; fp@2585: bool has_fwsm; fp@2585: bool arc_subsystem_valid; fp@2585: bool autoneg; fp@2585: bool autoneg_failed; fp@2585: bool get_link_status; fp@2585: bool in_ifs_mode; fp@2585: bool serdes_has_link; fp@2585: bool tx_pkt_filtering; fp@2585: enum e1000_serdes_link_state serdes_link_state; fp@2585: }; fp@2585: fp@2585: struct e1000_phy_info { fp@2585: struct e1000_phy_operations ops; fp@2585: fp@2585: enum e1000_phy_type type; fp@2585: fp@2585: enum e1000_1000t_rx_status local_rx; fp@2585: enum e1000_1000t_rx_status remote_rx; fp@2585: enum e1000_ms_type ms_type; fp@2585: enum e1000_ms_type original_ms_type; fp@2585: enum e1000_rev_polarity cable_polarity; fp@2585: enum e1000_smart_speed smart_speed; fp@2585: fp@2585: u32 addr; fp@2585: u32 id; fp@2585: u32 reset_delay_us; /* in usec */ fp@2585: u32 revision; fp@2585: fp@2585: enum e1000_media_type media_type; fp@2585: fp@2585: u16 autoneg_advertised; fp@2585: u16 autoneg_mask; fp@2585: u16 cable_length; fp@2585: u16 max_cable_length; fp@2585: u16 min_cable_length; fp@2585: fp@2585: u8 mdix; fp@2585: fp@2585: bool disable_polarity_correction; fp@2585: bool is_mdix; fp@2585: bool polarity_correction; fp@2585: bool speed_downgraded; fp@2585: bool autoneg_wait_to_complete; fp@2585: }; fp@2585: fp@2585: struct e1000_nvm_info { fp@2585: struct e1000_nvm_operations ops; fp@2585: fp@2585: enum e1000_nvm_type type; fp@2585: enum e1000_nvm_override override; fp@2585: fp@2585: u32 flash_bank_size; fp@2585: u32 flash_base_addr; fp@2585: fp@2585: u16 word_size; fp@2585: u16 delay_usec; fp@2585: u16 address_bits; fp@2585: u16 opcode_bits; fp@2585: u16 page_size; fp@2585: }; fp@2585: fp@2585: struct e1000_bus_info { fp@2585: enum e1000_bus_width width; fp@2585: fp@2585: u16 func; fp@2585: }; fp@2585: fp@2585: struct e1000_fc_info { fp@2585: u32 high_water; /* Flow control high-water mark */ fp@2585: u32 low_water; /* Flow control low-water mark */ fp@2585: u16 pause_time; /* Flow control pause timer */ fp@2585: u16 refresh_time; /* Flow control refresh timer */ fp@2585: bool send_xon; /* Flow control send XON */ fp@2585: bool strict_ieee; /* Strict IEEE mode */ fp@2585: enum e1000_fc_mode current_mode; /* FC mode in effect */ fp@2585: enum e1000_fc_mode requested_mode; /* FC mode requested by caller */ fp@2585: }; fp@2585: fp@2585: struct e1000_dev_spec_82571 { fp@2585: bool laa_is_present; fp@2585: u32 smb_counter; fp@2585: }; fp@2585: fp@2585: struct e1000_dev_spec_80003es2lan { fp@2585: bool mdic_wa_enable; fp@2585: }; fp@2585: fp@2585: struct e1000_shadow_ram { fp@2585: u16 value; fp@2585: bool modified; fp@2585: }; fp@2585: fp@2585: #define E1000_ICH8_SHADOW_RAM_WORDS 2048 fp@2585: fp@2585: struct e1000_dev_spec_ich8lan { fp@2585: bool kmrn_lock_loss_workaround_enabled; fp@2585: struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS]; fp@2585: bool nvm_k1_enabled; fp@2585: bool eee_disable; fp@2585: u16 eee_lp_ability; fp@2585: }; fp@2585: fp@2585: struct e1000_hw { fp@2585: struct e1000_adapter *adapter; fp@2585: fp@2585: void __iomem *hw_addr; fp@2585: void __iomem *flash_address; fp@2585: fp@2585: struct e1000_mac_info mac; fp@2585: struct e1000_fc_info fc; fp@2585: struct e1000_phy_info phy; fp@2585: struct e1000_nvm_info nvm; fp@2585: struct e1000_bus_info bus; fp@2585: struct e1000_host_mng_dhcp_cookie mng_cookie; fp@2585: fp@2585: union { fp@2585: struct e1000_dev_spec_82571 e82571; fp@2585: struct e1000_dev_spec_80003es2lan e80003es2lan; fp@2585: struct e1000_dev_spec_ich8lan ich8lan; fp@2585: } dev_spec; fp@2585: }; fp@2585: fp@2585: #include "82571.h" fp@2585: #include "80003es2lan.h" fp@2585: #include "ich8lan.h" fp@2585: fp@2585: #endif