fp@2491: /******************************************************************************* fp@2491: fp@2491: Intel PRO/1000 Linux driver fp@2491: Copyright(c) 1999 - 2012 Intel Corporation. fp@2491: fp@2491: This program is free software; you can redistribute it and/or modify it fp@2491: under the terms and conditions of the GNU General Public License, fp@2491: version 2, as published by the Free Software Foundation. fp@2491: fp@2491: This program is distributed in the hope it will be useful, but WITHOUT fp@2491: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or fp@2491: FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for fp@2491: more details. fp@2491: fp@2491: You should have received a copy of the GNU General Public License along with fp@2491: this program; if not, write to the Free Software Foundation, Inc., fp@2491: 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. fp@2491: fp@2491: The full GNU General Public License is included in this distribution in fp@2491: the file called "COPYING". fp@2491: fp@2491: Contact Information: fp@2491: Linux NICS fp@2491: e1000-devel Mailing List fp@2491: Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 fp@2491: fp@2491: *******************************************************************************/ fp@2491: fp@2491: /* Linux PRO/1000 Ethernet Driver main header file */ fp@2491: fp@2491: #ifndef _E1000_H_ fp@2491: #define _E1000_H_ fp@2491: fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: #include fp@2491: fp@2491: #include "hw.h" fp@2491: fp@2491: struct e1000_info; fp@2491: fp@2491: #define e_dbg(format, arg...) \ fp@2491: netdev_dbg(hw->adapter->netdev, format, ## arg) fp@2491: #define e_err(format, arg...) \ fp@2491: netdev_err(adapter->netdev, format, ## arg) fp@2491: #define e_info(format, arg...) \ fp@2491: netdev_info(adapter->netdev, format, ## arg) fp@2491: #define e_warn(format, arg...) \ fp@2491: netdev_warn(adapter->netdev, format, ## arg) fp@2491: #define e_notice(format, arg...) \ fp@2491: netdev_notice(adapter->netdev, format, ## arg) fp@2491: fp@2491: fp@2491: /* Interrupt modes, as used by the IntMode parameter */ fp@2491: #define E1000E_INT_MODE_LEGACY 0 fp@2491: #define E1000E_INT_MODE_MSI 1 fp@2491: #define E1000E_INT_MODE_MSIX 2 fp@2491: fp@2491: /* Tx/Rx descriptor defines */ fp@2491: #define E1000_DEFAULT_TXD 256 fp@2491: #define E1000_MAX_TXD 4096 fp@2491: #define E1000_MIN_TXD 64 fp@2491: fp@2491: #define E1000_DEFAULT_RXD 256 fp@2491: #define E1000_MAX_RXD 4096 fp@2491: #define E1000_MIN_RXD 64 fp@2491: fp@2491: #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */ fp@2491: #define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */ fp@2491: fp@2491: /* Early Receive defines */ fp@2491: #define E1000_ERT_2048 0x100 fp@2491: fp@2491: #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */ fp@2491: fp@2491: /* How many Tx Descriptors do we need to call netif_wake_queue ? */ fp@2491: /* How many Rx Buffers do we bundle into one write to the hardware ? */ fp@2491: #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */ fp@2491: fp@2491: #define AUTO_ALL_MODES 0 fp@2491: #define E1000_EEPROM_APME 0x0400 fp@2491: fp@2491: #define E1000_MNG_VLAN_NONE (-1) fp@2491: fp@2491: /* Number of packet split data buffers (not including the header buffer) */ fp@2491: #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1) fp@2491: fp@2491: #define DEFAULT_JUMBO 9234 fp@2491: fp@2491: /* BM/HV Specific Registers */ fp@2491: #define BM_PORT_CTRL_PAGE 769 fp@2491: fp@2491: #define PHY_UPPER_SHIFT 21 fp@2491: #define BM_PHY_REG(page, reg) \ fp@2491: (((reg) & MAX_PHY_REG_ADDRESS) |\ fp@2491: (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\ fp@2491: (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT))) fp@2491: fp@2491: /* PHY Wakeup Registers and defines */ fp@2491: #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17) fp@2491: #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0) fp@2491: #define BM_WUC PHY_REG(BM_WUC_PAGE, 1) fp@2491: #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2) fp@2491: #define BM_WUS PHY_REG(BM_WUC_PAGE, 3) fp@2491: #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2))) fp@2491: #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2))) fp@2491: #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2))) fp@2491: #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2))) fp@2491: #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1))) fp@2491: fp@2491: #define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */ fp@2491: #define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */ fp@2491: #define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */ fp@2491: #define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */ fp@2491: #define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */ fp@2491: #define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */ fp@2491: #define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */ fp@2491: fp@2491: #define HV_STATS_PAGE 778 fp@2491: #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */ fp@2491: #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17) fp@2491: #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */ fp@2491: #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19) fp@2491: #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */ fp@2491: #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21) fp@2491: #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */ fp@2491: #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24) fp@2491: #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */ fp@2491: #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26) fp@2491: #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */ fp@2491: #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28) fp@2491: #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */ fp@2491: #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30) fp@2491: fp@2491: #define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */ fp@2491: fp@2491: /* BM PHY Copper Specific Status */ fp@2491: #define BM_CS_STATUS 17 fp@2491: #define BM_CS_STATUS_LINK_UP 0x0400 fp@2491: #define BM_CS_STATUS_RESOLVED 0x0800 fp@2491: #define BM_CS_STATUS_SPEED_MASK 0xC000 fp@2491: #define BM_CS_STATUS_SPEED_1000 0x8000 fp@2491: fp@2491: /* 82577 Mobile Phy Status Register */ fp@2491: #define HV_M_STATUS 26 fp@2491: #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 fp@2491: #define HV_M_STATUS_SPEED_MASK 0x0300 fp@2491: #define HV_M_STATUS_SPEED_1000 0x0200 fp@2491: #define HV_M_STATUS_LINK_UP 0x0040 fp@2491: fp@2491: #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */ fp@2491: #define E1000_ICH_FWSM_PCIM2PCI_COUNT 2000 fp@2491: fp@2491: /* Time to wait before putting the device into D3 if there's no link (in ms). */ fp@2491: #define LINK_TIMEOUT 100 fp@2491: fp@2491: /* fp@2491: * Count for polling __E1000_RESET condition every 10-20msec. fp@2491: * Experimentation has shown the reset can take approximately 210msec. fp@2491: */ fp@2491: #define E1000_CHECK_RESET_COUNT 25 fp@2491: fp@2491: #define DEFAULT_RDTR 0 fp@2491: #define DEFAULT_RADV 8 fp@2491: #define BURST_RDTR 0x20 fp@2491: #define BURST_RADV 0x20 fp@2491: fp@2491: /* fp@2491: * in the case of WTHRESH, it appears at least the 82571/2 hardware fp@2491: * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when fp@2491: * WTHRESH=4, so a setting of 5 gives the most efficient bus fp@2491: * utilization but to avoid possible Tx stalls, set it to 1 fp@2491: */ fp@2491: #define E1000_TXDCTL_DMA_BURST_ENABLE \ fp@2491: (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \ fp@2491: E1000_TXDCTL_COUNT_DESC | \ fp@2491: (1 << 16) | /* wthresh must be +1 more than desired */\ fp@2491: (1 << 8) | /* hthresh */ \ fp@2491: 0x1f) /* pthresh */ fp@2491: fp@2491: #define E1000_RXDCTL_DMA_BURST_ENABLE \ fp@2491: (0x01000000 | /* set descriptor granularity */ \ fp@2491: (4 << 16) | /* set writeback threshold */ \ fp@2491: (4 << 8) | /* set prefetch threshold */ \ fp@2491: 0x20) /* set hthresh */ fp@2491: fp@2491: #define E1000_TIDV_FPD (1 << 31) fp@2491: #define E1000_RDTR_FPD (1 << 31) fp@2491: fp@2491: enum e1000_boards { fp@2491: board_82571, fp@2491: board_82572, fp@2491: board_82573, fp@2491: board_82574, fp@2491: board_82583, fp@2491: board_80003es2lan, fp@2491: board_ich8lan, fp@2491: board_ich9lan, fp@2491: board_ich10lan, fp@2491: board_pchlan, fp@2491: board_pch2lan, fp@2491: }; fp@2491: fp@2491: struct e1000_ps_page { fp@2491: struct page *page; fp@2491: u64 dma; /* must be u64 - written to hw */ fp@2491: }; fp@2491: fp@2491: /* fp@2491: * wrappers around a pointer to a socket buffer, fp@2491: * so a DMA handle can be stored along with the buffer fp@2491: */ fp@2491: struct e1000_buffer { fp@2491: dma_addr_t dma; fp@2491: struct sk_buff *skb; fp@2491: union { fp@2491: /* Tx */ fp@2491: struct { fp@2491: unsigned long time_stamp; fp@2491: u16 length; fp@2491: u16 next_to_watch; fp@2491: unsigned int segs; fp@2491: unsigned int bytecount; fp@2491: u16 mapped_as_page; fp@2491: }; fp@2491: /* Rx */ fp@2491: struct { fp@2491: /* arrays of page information for packet split */ fp@2491: struct e1000_ps_page *ps_pages; fp@2491: struct page *page; fp@2491: }; fp@2491: }; fp@2491: }; fp@2491: fp@2491: struct e1000_ring { fp@2491: struct e1000_adapter *adapter; /* back pointer to adapter */ fp@2491: void *desc; /* pointer to ring memory */ fp@2491: dma_addr_t dma; /* phys address of ring */ fp@2491: unsigned int size; /* length of ring in bytes */ fp@2491: unsigned int count; /* number of desc. in ring */ fp@2491: fp@2491: u16 next_to_use; fp@2491: u16 next_to_clean; fp@2491: fp@2491: void __iomem *head; fp@2491: void __iomem *tail; fp@2491: fp@2491: /* array of buffer information structs */ fp@2491: struct e1000_buffer *buffer_info; fp@2491: fp@2491: char name[IFNAMSIZ + 5]; fp@2491: u32 ims_val; fp@2491: u32 itr_val; fp@2491: void __iomem *itr_register; fp@2491: int set_itr; fp@2491: fp@2491: struct sk_buff *rx_skb_top; fp@2491: }; fp@2491: fp@2491: /* PHY register snapshot values */ fp@2491: struct e1000_phy_regs { fp@2491: u16 bmcr; /* basic mode control register */ fp@2491: u16 bmsr; /* basic mode status register */ fp@2491: u16 advertise; /* auto-negotiation advertisement */ fp@2491: u16 lpa; /* link partner ability register */ fp@2491: u16 expansion; /* auto-negotiation expansion reg */ fp@2491: u16 ctrl1000; /* 1000BASE-T control register */ fp@2491: u16 stat1000; /* 1000BASE-T status register */ fp@2491: u16 estatus; /* extended status register */ fp@2491: }; fp@2491: fp@2491: /* board specific private data structure */ fp@2491: struct e1000_adapter { fp@2491: struct timer_list watchdog_timer; fp@2491: struct timer_list phy_info_timer; fp@2491: struct timer_list blink_timer; fp@2491: fp@2491: struct work_struct reset_task; fp@2491: struct work_struct watchdog_task; fp@2491: fp@2491: const struct e1000_info *ei; fp@2491: fp@2491: unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; fp@2491: u32 bd_number; fp@2491: u32 rx_buffer_len; fp@2491: u16 mng_vlan_id; fp@2491: u16 link_speed; fp@2491: u16 link_duplex; fp@2491: u16 eeprom_vers; fp@2491: fp@2491: /* track device up/down/testing state */ fp@2491: unsigned long state; fp@2491: fp@2491: /* Interrupt Throttle Rate */ fp@2491: u32 itr; fp@2491: u32 itr_setting; fp@2491: u16 tx_itr; fp@2491: u16 rx_itr; fp@2491: fp@2491: /* fp@2491: * Tx fp@2491: */ fp@2491: struct e1000_ring *tx_ring /* One per active queue */ fp@2491: ____cacheline_aligned_in_smp; fp@2491: fp@2491: struct napi_struct napi; fp@2491: fp@2491: unsigned int restart_queue; fp@2491: u32 txd_cmd; fp@2491: fp@2491: bool detect_tx_hung; fp@2491: bool tx_hang_recheck; fp@2491: u8 tx_timeout_factor; fp@2491: fp@2491: u32 tx_int_delay; fp@2491: u32 tx_abs_int_delay; fp@2491: fp@2491: unsigned int total_tx_bytes; fp@2491: unsigned int total_tx_packets; fp@2491: unsigned int total_rx_bytes; fp@2491: unsigned int total_rx_packets; fp@2491: fp@2491: /* Tx stats */ fp@2491: u64 tpt_old; fp@2491: u64 colc_old; fp@2491: u32 gotc; fp@2491: u64 gotc_old; fp@2491: u32 tx_timeout_count; fp@2491: u32 tx_fifo_head; fp@2491: u32 tx_head_addr; fp@2491: u32 tx_fifo_size; fp@2491: u32 tx_dma_failed; fp@2491: fp@2491: /* fp@2491: * Rx fp@2491: */ fp@2491: bool (*clean_rx) (struct e1000_ring *ring, int *work_done, fp@2491: int work_to_do) ____cacheline_aligned_in_smp; fp@2491: void (*alloc_rx_buf) (struct e1000_ring *ring, int cleaned_count, fp@2491: gfp_t gfp); fp@2491: struct e1000_ring *rx_ring; fp@2491: fp@2491: u32 rx_int_delay; fp@2491: u32 rx_abs_int_delay; fp@2491: fp@2491: /* Rx stats */ fp@2491: u64 hw_csum_err; fp@2491: u64 hw_csum_good; fp@2491: u64 rx_hdr_split; fp@2491: u32 gorc; fp@2491: u64 gorc_old; fp@2491: u32 alloc_rx_buff_failed; fp@2491: u32 rx_dma_failed; fp@2491: fp@2491: unsigned int rx_ps_pages; fp@2491: u16 rx_ps_bsize0; fp@2491: u32 max_frame_size; fp@2491: u32 min_frame_size; fp@2491: fp@2491: /* OS defined structs */ fp@2491: struct net_device *netdev; fp@2491: struct pci_dev *pdev; fp@2491: fp@2491: /* structs defined in e1000_hw.h */ fp@2491: struct e1000_hw hw; fp@2491: fp@2491: spinlock_t stats64_lock; fp@2491: struct e1000_hw_stats stats; fp@2491: struct e1000_phy_info phy_info; fp@2491: struct e1000_phy_stats phy_stats; fp@2491: fp@2491: /* Snapshot of PHY registers */ fp@2491: struct e1000_phy_regs phy_regs; fp@2491: fp@2491: struct e1000_ring test_tx_ring; fp@2491: struct e1000_ring test_rx_ring; fp@2491: u32 test_icr; fp@2491: fp@2491: u32 msg_enable; fp@2491: unsigned int num_vectors; fp@2491: struct msix_entry *msix_entries; fp@2491: int int_mode; fp@2491: u32 eiac_mask; fp@2491: fp@2491: u32 eeprom_wol; fp@2491: u32 wol; fp@2491: u32 pba; fp@2491: u32 max_hw_frame_size; fp@2491: fp@2491: bool fc_autoneg; fp@2491: fp@2491: unsigned int flags; fp@2491: unsigned int flags2; fp@2491: struct work_struct downshift_task; fp@2491: struct work_struct update_phy_task; fp@2491: struct work_struct print_hang_task; fp@2491: fp@2491: bool idle_check; fp@2491: int phy_hang_count; fp@2491: fp@2491: u16 tx_ring_count; fp@2491: u16 rx_ring_count; fp@2491: }; fp@2491: fp@2491: struct e1000_info { fp@2491: enum e1000_mac_type mac; fp@2491: unsigned int flags; fp@2491: unsigned int flags2; fp@2491: u32 pba; fp@2491: u32 max_hw_frame_size; fp@2491: s32 (*get_variants)(struct e1000_adapter *); fp@2491: const struct e1000_mac_operations *mac_ops; fp@2491: const struct e1000_phy_operations *phy_ops; fp@2491: const struct e1000_nvm_operations *nvm_ops; fp@2491: }; fp@2491: fp@2491: /* hardware capability, feature, and workaround flags */ fp@2491: #define FLAG_HAS_AMT (1 << 0) fp@2491: #define FLAG_HAS_FLASH (1 << 1) fp@2491: #define FLAG_HAS_HW_VLAN_FILTER (1 << 2) fp@2491: #define FLAG_HAS_WOL (1 << 3) fp@2491: /* reserved bit4 */ fp@2491: #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) fp@2491: #define FLAG_HAS_SWSM_ON_LOAD (1 << 6) fp@2491: #define FLAG_HAS_JUMBO_FRAMES (1 << 7) fp@2491: #define FLAG_READ_ONLY_NVM (1 << 8) fp@2491: #define FLAG_IS_ICH (1 << 9) fp@2491: #define FLAG_HAS_MSIX (1 << 10) fp@2491: #define FLAG_HAS_SMART_POWER_DOWN (1 << 11) fp@2491: #define FLAG_IS_QUAD_PORT_A (1 << 12) fp@2491: #define FLAG_IS_QUAD_PORT (1 << 13) fp@2491: /* reserved bit14 */ fp@2491: #define FLAG_APME_IN_WUC (1 << 15) fp@2491: #define FLAG_APME_IN_CTRL3 (1 << 16) fp@2491: #define FLAG_APME_CHECK_PORT_B (1 << 17) fp@2491: #define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18) fp@2491: #define FLAG_NO_WAKE_UCAST (1 << 19) fp@2491: #define FLAG_MNG_PT_ENABLED (1 << 20) fp@2491: #define FLAG_RESET_OVERWRITES_LAA (1 << 21) fp@2491: #define FLAG_TARC_SPEED_MODE_BIT (1 << 22) fp@2491: #define FLAG_TARC_SET_BIT_ZERO (1 << 23) fp@2491: #define FLAG_RX_NEEDS_RESTART (1 << 24) fp@2491: #define FLAG_LSC_GIG_SPEED_DROP (1 << 25) fp@2491: #define FLAG_SMART_POWER_DOWN (1 << 26) fp@2491: #define FLAG_MSI_ENABLED (1 << 27) fp@2491: /* reserved (1 << 28) */ fp@2491: #define FLAG_TSO_FORCE (1 << 29) fp@2491: #define FLAG_RX_RESTART_NOW (1 << 30) fp@2491: #define FLAG_MSI_TEST_FAILED (1 << 31) fp@2491: fp@2491: #define FLAG2_CRC_STRIPPING (1 << 0) fp@2491: #define FLAG2_HAS_PHY_WAKEUP (1 << 1) fp@2491: #define FLAG2_IS_DISCARDING (1 << 2) fp@2491: #define FLAG2_DISABLE_ASPM_L1 (1 << 3) fp@2491: #define FLAG2_HAS_PHY_STATS (1 << 4) fp@2491: #define FLAG2_HAS_EEE (1 << 5) fp@2491: #define FLAG2_DMA_BURST (1 << 6) fp@2491: #define FLAG2_DISABLE_ASPM_L0S (1 << 7) fp@2491: #define FLAG2_DISABLE_AIM (1 << 8) fp@2491: #define FLAG2_CHECK_PHY_HANG (1 << 9) fp@2491: #define FLAG2_NO_DISABLE_RX (1 << 10) fp@2491: #define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11) fp@2491: #define FLAG2_DFLT_CRC_STRIPPING (1 << 12) fp@2491: fp@2491: #define E1000_RX_DESC_PS(R, i) \ fp@2491: (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) fp@2491: #define E1000_RX_DESC_EXT(R, i) \ fp@2491: (&(((union e1000_rx_desc_extended *)((R).desc))[i])) fp@2491: #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) fp@2491: #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc) fp@2491: #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc) fp@2491: fp@2491: enum e1000_state_t { fp@2491: __E1000_TESTING, fp@2491: __E1000_RESETTING, fp@2491: __E1000_ACCESS_SHARED_RESOURCE, fp@2491: __E1000_DOWN fp@2491: }; fp@2491: fp@2491: enum latency_range { fp@2491: lowest_latency = 0, fp@2491: low_latency = 1, fp@2491: bulk_latency = 2, fp@2491: latency_invalid = 255 fp@2491: }; fp@2491: fp@2491: extern char e1000e_driver_name[]; fp@2491: extern const char e1000e_driver_version[]; fp@2491: fp@2491: extern void e1000e_check_options(struct e1000_adapter *adapter); fp@2491: extern void e1000e_set_ethtool_ops(struct net_device *netdev); fp@2491: fp@2491: extern int e1000e_up(struct e1000_adapter *adapter); fp@2491: extern void e1000e_down(struct e1000_adapter *adapter); fp@2491: extern void e1000e_reinit_locked(struct e1000_adapter *adapter); fp@2491: extern void e1000e_reset(struct e1000_adapter *adapter); fp@2491: extern void e1000e_power_up_phy(struct e1000_adapter *adapter); fp@2491: extern int e1000e_setup_rx_resources(struct e1000_ring *ring); fp@2491: extern int e1000e_setup_tx_resources(struct e1000_ring *ring); fp@2491: extern void e1000e_free_rx_resources(struct e1000_ring *ring); fp@2491: extern void e1000e_free_tx_resources(struct e1000_ring *ring); fp@2491: extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, fp@2491: struct rtnl_link_stats64 fp@2491: *stats); fp@2491: extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter); fp@2491: extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter); fp@2491: extern void e1000e_get_hw_control(struct e1000_adapter *adapter); fp@2491: extern void e1000e_release_hw_control(struct e1000_adapter *adapter); fp@2491: fp@2491: extern unsigned int copybreak; fp@2491: fp@2491: extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw); fp@2491: fp@2491: extern const struct e1000_info e1000_82571_info; fp@2491: extern const struct e1000_info e1000_82572_info; fp@2491: extern const struct e1000_info e1000_82573_info; fp@2491: extern const struct e1000_info e1000_82574_info; fp@2491: extern const struct e1000_info e1000_82583_info; fp@2491: extern const struct e1000_info e1000_ich8_info; fp@2491: extern const struct e1000_info e1000_ich9_info; fp@2491: extern const struct e1000_info e1000_ich10_info; fp@2491: extern const struct e1000_info e1000_pch_info; fp@2491: extern const struct e1000_info e1000_pch2_info; fp@2491: extern const struct e1000_info e1000_es2_info; fp@2491: fp@2491: extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, fp@2491: u32 pba_num_size); fp@2491: fp@2491: extern s32 e1000e_commit_phy(struct e1000_hw *hw); fp@2491: fp@2491: extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw); fp@2491: fp@2491: extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw); fp@2491: extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state); fp@2491: fp@2491: extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw); fp@2491: extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, fp@2491: bool state); fp@2491: extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); fp@2491: extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); fp@2491: extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw); fp@2491: extern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw); fp@2491: extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable); fp@2491: extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable); fp@2491: extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw); fp@2491: fp@2491: extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw); fp@2491: extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw); fp@2491: extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw); fp@2491: extern s32 e1000e_setup_led_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_led_on_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_led_off_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw); fp@2491: extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw); fp@2491: extern void e1000_set_lan_id_single_port(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex); fp@2491: extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex); fp@2491: extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw); fp@2491: extern s32 e1000e_id_led_init_generic(struct e1000_hw *hw); fp@2491: extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw); fp@2491: extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw); fp@2491: extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw); fp@2491: extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw); fp@2491: extern s32 e1000e_setup_link_generic(struct e1000_hw *hw); fp@2491: extern void e1000_clear_vfta_generic(struct e1000_hw *hw); fp@2491: extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count); fp@2491: extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw, fp@2491: u8 *mc_addr_list, fp@2491: u32 mc_addr_count); fp@2491: extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index); fp@2491: extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw); fp@2491: extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop); fp@2491: extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw); fp@2491: extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data); fp@2491: extern void e1000e_config_collision_dist_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw); fp@2491: extern s32 e1000e_force_mac_fc(struct e1000_hw *hw); fp@2491: extern s32 e1000e_blink_led_generic(struct e1000_hw *hw); fp@2491: extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value); fp@2491: extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw); fp@2491: extern void e1000e_reset_adaptive(struct e1000_hw *hw); fp@2491: extern void e1000e_update_adaptive(struct e1000_hw *hw); fp@2491: fp@2491: extern s32 e1000e_setup_copper_link(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_phy_id(struct e1000_hw *hw); fp@2491: extern void e1000e_put_hw_semaphore(struct e1000_hw *hw); fp@2491: extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); fp@2491: extern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page); fp@2491: extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); fp@2491: extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, fp@2491: u16 *data); fp@2491: extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); fp@2491: extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); fp@2491: extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, fp@2491: u16 data); fp@2491: extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); fp@2491: extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_cfg_done(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw); fp@2491: extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw); fp@2491: extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); fp@2491: extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); fp@2491: extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw); fp@2491: extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); fp@2491: extern s32 e1000e_determine_phy_address(struct e1000_hw *hw); fp@2491: extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); fp@2491: extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); fp@2491: extern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, fp@2491: u16 *phy_reg); fp@2491: extern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, fp@2491: u16 *phy_reg); fp@2491: extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); fp@2491: extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); fp@2491: extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); fp@2491: extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); fp@2491: extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, fp@2491: u16 data); fp@2491: extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); fp@2491: extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, fp@2491: u16 *data); fp@2491: extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, fp@2491: u32 usec_interval, bool *success); fp@2491: extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); fp@2491: extern void e1000_power_up_phy_copper(struct e1000_hw *hw); fp@2491: extern void e1000_power_down_phy_copper(struct e1000_hw *hw); fp@2491: extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); fp@2491: extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); fp@2491: extern s32 e1000e_check_downshift(struct e1000_hw *hw); fp@2491: extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); fp@2491: extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, fp@2491: u16 *data); fp@2491: extern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, fp@2491: u16 *data); fp@2491: extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); fp@2491: extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, fp@2491: u16 data); fp@2491: extern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, fp@2491: u16 data); fp@2491: extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); fp@2491: extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); fp@2491: extern s32 e1000_check_polarity_82577(struct e1000_hw *hw); fp@2491: extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw); fp@2491: extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw); fp@2491: extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw); fp@2491: fp@2491: extern s32 e1000_check_polarity_m88(struct e1000_hw *hw); fp@2491: extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw); fp@2491: extern s32 e1000_check_polarity_ife(struct e1000_hw *hw); fp@2491: extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); fp@2491: extern s32 e1000_check_polarity_igp(struct e1000_hw *hw); fp@2491: extern bool e1000_check_phy_82574(struct e1000_hw *hw); fp@2491: fp@2491: static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) fp@2491: { fp@2491: return hw->phy.ops.reset(hw); fp@2491: } fp@2491: fp@2491: static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data) fp@2491: { fp@2491: return hw->phy.ops.read_reg(hw, offset, data); fp@2491: } fp@2491: fp@2491: static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data) fp@2491: { fp@2491: return hw->phy.ops.write_reg(hw, offset, data); fp@2491: } fp@2491: fp@2491: static inline s32 e1000_get_cable_length(struct e1000_hw *hw) fp@2491: { fp@2491: return hw->phy.ops.get_cable_length(hw); fp@2491: } fp@2491: fp@2491: extern s32 e1000e_acquire_nvm(struct e1000_hw *hw); fp@2491: extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); fp@2491: extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg); fp@2491: extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); fp@2491: extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw); fp@2491: extern void e1000e_release_nvm(struct e1000_hw *hw); fp@2491: extern void e1000e_reload_nvm_generic(struct e1000_hw *hw); fp@2491: extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw); fp@2491: fp@2491: static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw) fp@2491: { fp@2491: if (hw->mac.ops.read_mac_addr) fp@2491: return hw->mac.ops.read_mac_addr(hw); fp@2491: fp@2491: return e1000_read_mac_addr_generic(hw); fp@2491: } fp@2491: fp@2491: static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw) fp@2491: { fp@2491: return hw->nvm.ops.validate(hw); fp@2491: } fp@2491: fp@2491: static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw) fp@2491: { fp@2491: return hw->nvm.ops.update(hw); fp@2491: } fp@2491: fp@2491: static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) fp@2491: { fp@2491: return hw->nvm.ops.read(hw, offset, words, data); fp@2491: } fp@2491: fp@2491: static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) fp@2491: { fp@2491: return hw->nvm.ops.write(hw, offset, words, data); fp@2491: } fp@2491: fp@2491: static inline s32 e1000_get_phy_info(struct e1000_hw *hw) fp@2491: { fp@2491: return hw->phy.ops.get_info(hw); fp@2491: } fp@2491: fp@2491: extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw); fp@2491: extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); fp@2491: extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); fp@2491: fp@2491: static inline u32 __er32(struct e1000_hw *hw, unsigned long reg) fp@2491: { fp@2491: return readl(hw->hw_addr + reg); fp@2491: } fp@2491: fp@2491: static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val) fp@2491: { fp@2491: writel(val, hw->hw_addr + reg); fp@2491: } fp@2491: fp@2491: #endif /* _E1000_H_ */