fp@2217: /*******************************************************************************
fp@2217: 
fp@2217:   Intel PRO/1000 Linux driver
fp@2217:   Copyright(c) 1999 - 2008 Intel Corporation.
fp@2217: 
fp@2217:   This program is free software; you can redistribute it and/or modify it
fp@2217:   under the terms and conditions of the GNU General Public License,
fp@2217:   version 2, as published by the Free Software Foundation.
fp@2217: 
fp@2217:   This program is distributed in the hope it will be useful, but WITHOUT
fp@2217:   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
fp@2217:   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
fp@2217:   more details.
fp@2217: 
fp@2217:   You should have received a copy of the GNU General Public License along with
fp@2217:   this program; if not, write to the Free Software Foundation, Inc.,
fp@2217:   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
fp@2217: 
fp@2217:   The full GNU General Public License is included in this distribution in
fp@2217:   the file called "COPYING".
fp@2217: 
fp@2217:   Contact Information:
fp@2217:   Linux NICS <linux.nics@intel.com>
fp@2217:   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
fp@2217:   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
fp@2217: 
fp@2217: *******************************************************************************/
fp@2217: 
fp@2217: /*
fp@2217:  * 82571EB Gigabit Ethernet Controller
fp@2217:  * 82571EB Gigabit Ethernet Controller (Copper)
fp@2217:  * 82571EB Gigabit Ethernet Controller (Fiber)
fp@2217:  * 82571EB Dual Port Gigabit Mezzanine Adapter
fp@2217:  * 82571EB Quad Port Gigabit Mezzanine Adapter
fp@2217:  * 82571PT Gigabit PT Quad Port Server ExpressModule
fp@2217:  * 82572EI Gigabit Ethernet Controller (Copper)
fp@2217:  * 82572EI Gigabit Ethernet Controller (Fiber)
fp@2217:  * 82572EI Gigabit Ethernet Controller
fp@2217:  * 82573V Gigabit Ethernet Controller (Copper)
fp@2217:  * 82573E Gigabit Ethernet Controller (Copper)
fp@2217:  * 82573L Gigabit Ethernet Controller
fp@2217:  * 82574L Gigabit Network Connection
fp@2217:  * 82583V Gigabit Network Connection
fp@2217:  */
fp@2217: 
fp@2217: #include <linux/netdevice.h>
fp@2217: #include <linux/delay.h>
fp@2217: #include <linux/pci.h>
fp@2217: 
fp@2217: #include "e1000-2.6.32-ethercat.h"
fp@2217: 
fp@2217: #define ID_LED_RESERVED_F746 0xF746
fp@2217: #define ID_LED_DEFAULT_82573 ((ID_LED_DEF1_DEF2 << 12) | \
fp@2217: 			      (ID_LED_OFF1_ON2  <<  8) | \
fp@2217: 			      (ID_LED_DEF1_DEF2 <<  4) | \
fp@2217: 			      (ID_LED_DEF1_DEF2))
fp@2217: 
fp@2217: #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
fp@2217: 
fp@2217: #define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */
fp@2217: 
fp@2217: static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
fp@2217: static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
fp@2217: static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
fp@2217: static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);
fp@2217: static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
fp@2217: 				      u16 words, u16 *data);
fp@2217: static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
fp@2217: static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
fp@2217: static s32 e1000_setup_link_82571(struct e1000_hw *hw);
fp@2217: static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);
fp@2217: static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);
fp@2217: static s32 e1000_led_on_82574(struct e1000_hw *hw);
fp@2217: static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_init_phy_params_82571 - Init PHY func ptrs.
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  This is a function pointer entry point called by the api module.
fp@2217:  **/
fp@2217: static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	struct e1000_phy_info *phy = &hw->phy;
fp@2217: 	s32 ret_val;
fp@2217: 
fp@2217: 	if (hw->phy.media_type != e1000_media_type_copper) {
fp@2217: 		phy->type = e1000_phy_none;
fp@2217: 		return 0;
fp@2217: 	}
fp@2217: 
fp@2217: 	phy->addr			 = 1;
fp@2217: 	phy->autoneg_mask		 = AUTONEG_ADVERTISE_SPEED_DEFAULT;
fp@2217: 	phy->reset_delay_us		 = 100;
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		phy->type		 = e1000_phy_igp_2;
fp@2217: 		break;
fp@2217: 	case e1000_82573:
fp@2217: 		phy->type		 = e1000_phy_m88;
fp@2217: 		break;
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		phy->type		 = e1000_phy_bm;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		return -E1000_ERR_PHY;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	/* This can only be done after all function pointers are setup. */
fp@2217: 	ret_val = e1000_get_phy_id_82571(hw);
fp@2217: 
fp@2217: 	/* Verify phy id */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		if (phy->id != IGP01E1000_I_PHY_ID)
fp@2217: 			return -E1000_ERR_PHY;
fp@2217: 		break;
fp@2217: 	case e1000_82573:
fp@2217: 		if (phy->id != M88E1111_I_PHY_ID)
fp@2217: 			return -E1000_ERR_PHY;
fp@2217: 		break;
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		if (phy->id != BME1000_E_PHY_ID_R2)
fp@2217: 			return -E1000_ERR_PHY;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		return -E1000_ERR_PHY;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_init_nvm_params_82571 - Init NVM func ptrs.
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  This is a function pointer entry point called by the api module.
fp@2217:  **/
fp@2217: static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	struct e1000_nvm_info *nvm = &hw->nvm;
fp@2217: 	u32 eecd = er32(EECD);
fp@2217: 	u16 size;
fp@2217: 
fp@2217: 	nvm->opcode_bits = 8;
fp@2217: 	nvm->delay_usec = 1;
fp@2217: 	switch (nvm->override) {
fp@2217: 	case e1000_nvm_override_spi_large:
fp@2217: 		nvm->page_size = 32;
fp@2217: 		nvm->address_bits = 16;
fp@2217: 		break;
fp@2217: 	case e1000_nvm_override_spi_small:
fp@2217: 		nvm->page_size = 8;
fp@2217: 		nvm->address_bits = 8;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
fp@2217: 		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		if (((eecd >> 15) & 0x3) == 0x3) {
fp@2217: 			nvm->type = e1000_nvm_flash_hw;
fp@2217: 			nvm->word_size = 2048;
fp@2217: 			/*
fp@2217: 			 * Autonomous Flash update bit must be cleared due
fp@2217: 			 * to Flash update issue.
fp@2217: 			 */
fp@2217: 			eecd &= ~E1000_EECD_AUPDEN;
fp@2217: 			ew32(EECD, eecd);
fp@2217: 			break;
fp@2217: 		}
fp@2217: 		/* Fall Through */
fp@2217: 	default:
fp@2217: 		nvm->type = e1000_nvm_eeprom_spi;
fp@2217: 		size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
fp@2217: 				  E1000_EECD_SIZE_EX_SHIFT);
fp@2217: 		/*
fp@2217: 		 * Added to a constant, "size" becomes the left-shift value
fp@2217: 		 * for setting word_size.
fp@2217: 		 */
fp@2217: 		size += NVM_WORD_SIZE_BASE_SHIFT;
fp@2217: 
fp@2217: 		/* EEPROM access above 16k is unsupported */
fp@2217: 		if (size > 14)
fp@2217: 			size = 14;
fp@2217: 		nvm->word_size	= 1 << size;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_init_mac_params_82571 - Init MAC func ptrs.
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  This is a function pointer entry point called by the api module.
fp@2217:  **/
fp@2217: static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
fp@2217: {
fp@2217: 	struct e1000_hw *hw = &adapter->hw;
fp@2217: 	struct e1000_mac_info *mac = &hw->mac;
fp@2217: 	struct e1000_mac_operations *func = &mac->ops;
fp@2217: 	u32 swsm = 0;
fp@2217: 	u32 swsm2 = 0;
fp@2217: 	bool force_clear_smbi = false;
fp@2217: 
fp@2217: 	/* Set media type */
fp@2217: 	switch (adapter->pdev->device) {
fp@2217: 	case E1000_DEV_ID_82571EB_FIBER:
fp@2217: 	case E1000_DEV_ID_82572EI_FIBER:
fp@2217: 	case E1000_DEV_ID_82571EB_QUAD_FIBER:
fp@2217: 		hw->phy.media_type = e1000_media_type_fiber;
fp@2217: 		break;
fp@2217: 	case E1000_DEV_ID_82571EB_SERDES:
fp@2217: 	case E1000_DEV_ID_82572EI_SERDES:
fp@2217: 	case E1000_DEV_ID_82571EB_SERDES_DUAL:
fp@2217: 	case E1000_DEV_ID_82571EB_SERDES_QUAD:
fp@2217: 		hw->phy.media_type = e1000_media_type_internal_serdes;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		hw->phy.media_type = e1000_media_type_copper;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	/* Set mta register count */
fp@2217: 	mac->mta_reg_count = 128;
fp@2217: 	/* Set rar entry count */
fp@2217: 	mac->rar_entry_count = E1000_RAR_ENTRIES;
fp@2217: 	/* Set if manageability features are enabled. */
fp@2217: 	mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK) ? 1 : 0;
fp@2217: 
fp@2217: 	/* check for link */
fp@2217: 	switch (hw->phy.media_type) {
fp@2217: 	case e1000_media_type_copper:
fp@2217: 		func->setup_physical_interface = e1000_setup_copper_link_82571;
fp@2217: 		func->check_for_link = e1000e_check_for_copper_link;
fp@2217: 		func->get_link_up_info = e1000e_get_speed_and_duplex_copper;
fp@2217: 		break;
fp@2217: 	case e1000_media_type_fiber:
fp@2217: 		func->setup_physical_interface =
fp@2217: 			e1000_setup_fiber_serdes_link_82571;
fp@2217: 		func->check_for_link = e1000e_check_for_fiber_link;
fp@2217: 		func->get_link_up_info =
fp@2217: 			e1000e_get_speed_and_duplex_fiber_serdes;
fp@2217: 		break;
fp@2217: 	case e1000_media_type_internal_serdes:
fp@2217: 		func->setup_physical_interface =
fp@2217: 			e1000_setup_fiber_serdes_link_82571;
fp@2217: 		func->check_for_link = e1000_check_for_serdes_link_82571;
fp@2217: 		func->get_link_up_info =
fp@2217: 			e1000e_get_speed_and_duplex_fiber_serdes;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		return -E1000_ERR_CONFIG;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		func->check_mng_mode = e1000_check_mng_mode_82574;
fp@2217: 		func->led_on = e1000_led_on_82574;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		func->check_mng_mode = e1000e_check_mng_mode_generic;
fp@2217: 		func->led_on = e1000e_led_on_generic;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * Ensure that the inter-port SWSM.SMBI lock bit is clear before
fp@2217: 	 * first NVM or PHY acess. This should be done for single-port
fp@2217: 	 * devices, and for one port only on dual-port devices so that
fp@2217: 	 * for those devices we can still use the SMBI lock to synchronize
fp@2217: 	 * inter-port accesses to the PHY & NVM.
fp@2217: 	 */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		swsm2 = er32(SWSM2);
fp@2217: 
fp@2217: 		if (!(swsm2 & E1000_SWSM2_LOCK)) {
fp@2217: 			/* Only do this for the first interface on this card */
fp@2217: 			ew32(SWSM2,
fp@2217: 			    swsm2 | E1000_SWSM2_LOCK);
fp@2217: 			force_clear_smbi = true;
fp@2217: 		} else
fp@2217: 			force_clear_smbi = false;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		force_clear_smbi = true;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	if (force_clear_smbi) {
fp@2217: 		/* Make sure SWSM.SMBI is clear */
fp@2217: 		swsm = er32(SWSM);
fp@2217: 		if (swsm & E1000_SWSM_SMBI) {
fp@2217: 			/* This bit should not be set on a first interface, and
fp@2217: 			 * indicates that the bootagent or EFI code has
fp@2217: 			 * improperly left this bit enabled
fp@2217: 			 */
fp@2217: 			hw_dbg(hw, "Please update your 82571 Bootagent\n");
fp@2217: 		}
fp@2217: 		ew32(SWSM, swsm & ~E1000_SWSM_SMBI);
fp@2217: 	}
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * Initialze device specific counter of SMBI acquisition
fp@2217: 	 * timeouts.
fp@2217: 	 */
fp@2217: 	 hw->dev_spec.e82571.smb_counter = 0;
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)
fp@2217: {
fp@2217: 	struct e1000_hw *hw = &adapter->hw;
fp@2217: 	static int global_quad_port_a; /* global port a indication */
fp@2217: 	struct pci_dev *pdev = adapter->pdev;
fp@2217: 	u16 eeprom_data = 0;
fp@2217: 	int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;
fp@2217: 	s32 rc;
fp@2217: 
fp@2217: 	rc = e1000_init_mac_params_82571(adapter);
fp@2217: 	if (rc)
fp@2217: 		return rc;
fp@2217: 
fp@2217: 	rc = e1000_init_nvm_params_82571(hw);
fp@2217: 	if (rc)
fp@2217: 		return rc;
fp@2217: 
fp@2217: 	rc = e1000_init_phy_params_82571(hw);
fp@2217: 	if (rc)
fp@2217: 		return rc;
fp@2217: 
fp@2217: 	/* tag quad port adapters first, it's used below */
fp@2217: 	switch (pdev->device) {
fp@2217: 	case E1000_DEV_ID_82571EB_QUAD_COPPER:
fp@2217: 	case E1000_DEV_ID_82571EB_QUAD_FIBER:
fp@2217: 	case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
fp@2217: 	case E1000_DEV_ID_82571PT_QUAD_COPPER:
fp@2217: 		adapter->flags |= FLAG_IS_QUAD_PORT;
fp@2217: 		/* mark the first port */
fp@2217: 		if (global_quad_port_a == 0)
fp@2217: 			adapter->flags |= FLAG_IS_QUAD_PORT_A;
fp@2217: 		/* Reset for multiple quad port adapters */
fp@2217: 		global_quad_port_a++;
fp@2217: 		if (global_quad_port_a == 4)
fp@2217: 			global_quad_port_a = 0;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	switch (adapter->hw.mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 		/* these dual ports don't have WoL on port B at all */
fp@2217: 		if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||
fp@2217: 		     (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||
fp@2217: 		     (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&
fp@2217: 		    (is_port_b))
fp@2217: 			adapter->flags &= ~FLAG_HAS_WOL;
fp@2217: 		/* quad ports only support WoL on port A */
fp@2217: 		if (adapter->flags & FLAG_IS_QUAD_PORT &&
fp@2217: 		    (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))
fp@2217: 			adapter->flags &= ~FLAG_HAS_WOL;
fp@2217: 		/* Does not support WoL on any port */
fp@2217: 		if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)
fp@2217: 			adapter->flags &= ~FLAG_HAS_WOL;
fp@2217: 		break;
fp@2217: 
fp@2217: 	case e1000_82573:
fp@2217: 		if (pdev->device == E1000_DEV_ID_82573L) {
fp@2217: 			if (e1000_read_nvm(&adapter->hw, NVM_INIT_3GIO_3, 1,
fp@2217: 				       &eeprom_data) < 0)
fp@2217: 				break;
fp@2217: 			if (!(eeprom_data & NVM_WORD1A_ASPM_MASK)) {
fp@2217: 				adapter->flags |= FLAG_HAS_JUMBO_FRAMES;
fp@2217: 				adapter->max_hw_frame_size = DEFAULT_JUMBO;
fp@2217: 			}
fp@2217: 		}
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_get_phy_id_82571 - Retrieve the PHY ID and revision
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Reads the PHY registers and stores the PHY ID and possibly the PHY
fp@2217:  *  revision in the hardware structure.
fp@2217:  **/
fp@2217: static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	struct e1000_phy_info *phy = &hw->phy;
fp@2217: 	s32 ret_val;
fp@2217: 	u16 phy_id = 0;
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		/*
fp@2217: 		 * The 82571 firmware may still be configuring the PHY.
fp@2217: 		 * In this case, we cannot access the PHY until the
fp@2217: 		 * configuration is done.  So we explicitly set the
fp@2217: 		 * PHY ID.
fp@2217: 		 */
fp@2217: 		phy->id = IGP01E1000_I_PHY_ID;
fp@2217: 		break;
fp@2217: 	case e1000_82573:
fp@2217: 		return e1000e_get_phy_id(hw);
fp@2217: 		break;
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);
fp@2217: 		if (ret_val)
fp@2217: 			return ret_val;
fp@2217: 
fp@2217: 		phy->id = (u32)(phy_id << 16);
fp@2217: 		udelay(20);
fp@2217: 		ret_val = e1e_rphy(hw, PHY_ID2, &phy_id);
fp@2217: 		if (ret_val)
fp@2217: 			return ret_val;
fp@2217: 
fp@2217: 		phy->id |= (u32)(phy_id);
fp@2217: 		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		return -E1000_ERR_PHY;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_get_hw_semaphore_82571 - Acquire hardware semaphore
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Acquire the HW semaphore to access the PHY or NVM
fp@2217:  **/
fp@2217: static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 swsm;
fp@2217: 	s32 sw_timeout = hw->nvm.word_size + 1;
fp@2217: 	s32 fw_timeout = hw->nvm.word_size + 1;
fp@2217: 	s32 i = 0;
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * If we have timedout 3 times on trying to acquire
fp@2217: 	 * the inter-port SMBI semaphore, there is old code
fp@2217: 	 * operating on the other port, and it is not
fp@2217: 	 * releasing SMBI. Modify the number of times that
fp@2217: 	 * we try for the semaphore to interwork with this
fp@2217: 	 * older code.
fp@2217: 	 */
fp@2217: 	if (hw->dev_spec.e82571.smb_counter > 2)
fp@2217: 		sw_timeout = 1;
fp@2217: 
fp@2217: 	/* Get the SW semaphore */
fp@2217: 	while (i < sw_timeout) {
fp@2217: 		swsm = er32(SWSM);
fp@2217: 		if (!(swsm & E1000_SWSM_SMBI))
fp@2217: 			break;
fp@2217: 
fp@2217: 		udelay(50);
fp@2217: 		i++;
fp@2217: 	}
fp@2217: 
fp@2217: 	if (i == sw_timeout) {
fp@2217: 		hw_dbg(hw, "Driver can't access device - SMBI bit is set.\n");
fp@2217: 		hw->dev_spec.e82571.smb_counter++;
fp@2217: 	}
fp@2217: 	/* Get the FW semaphore. */
fp@2217: 	for (i = 0; i < fw_timeout; i++) {
fp@2217: 		swsm = er32(SWSM);
fp@2217: 		ew32(SWSM, swsm | E1000_SWSM_SWESMBI);
fp@2217: 
fp@2217: 		/* Semaphore acquired if bit latched */
fp@2217: 		if (er32(SWSM) & E1000_SWSM_SWESMBI)
fp@2217: 			break;
fp@2217: 
fp@2217: 		udelay(50);
fp@2217: 	}
fp@2217: 
fp@2217: 	if (i == fw_timeout) {
fp@2217: 		/* Release semaphores */
fp@2217: 		e1000_put_hw_semaphore_82571(hw);
fp@2217: 		hw_dbg(hw, "Driver can't access the NVM\n");
fp@2217: 		return -E1000_ERR_NVM;
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_put_hw_semaphore_82571 - Release hardware semaphore
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Release hardware semaphore used to access the PHY or NVM
fp@2217:  **/
fp@2217: static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 swsm;
fp@2217: 
fp@2217: 	swsm = er32(SWSM);
fp@2217: 	swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
fp@2217: 	ew32(SWSM, swsm);
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_acquire_nvm_82571 - Request for access to the EEPROM
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  To gain access to the EEPROM, first we must obtain a hardware semaphore.
fp@2217:  *  Then for non-82573 hardware, set the EEPROM access request bit and wait
fp@2217:  *  for EEPROM access grant bit.  If the access grant bit is not set, release
fp@2217:  *  hardware semaphore.
fp@2217:  **/
fp@2217: static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	s32 ret_val;
fp@2217: 
fp@2217: 	ret_val = e1000_get_hw_semaphore_82571(hw);
fp@2217: 	if (ret_val)
fp@2217: 		return ret_val;
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		ret_val = e1000e_acquire_nvm(hw);
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	if (ret_val)
fp@2217: 		e1000_put_hw_semaphore_82571(hw);
fp@2217: 
fp@2217: 	return ret_val;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_release_nvm_82571 - Release exclusive access to EEPROM
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
fp@2217:  **/
fp@2217: static void e1000_release_nvm_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	e1000e_release_nvm(hw);
fp@2217: 	e1000_put_hw_semaphore_82571(hw);
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_write_nvm_82571 - Write to EEPROM using appropriate interface
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *  @offset: offset within the EEPROM to be written to
fp@2217:  *  @words: number of words to write
fp@2217:  *  @data: 16 bit word(s) to be written to the EEPROM
fp@2217:  *
fp@2217:  *  For non-82573 silicon, write data to EEPROM at offset using SPI interface.
fp@2217:  *
fp@2217:  *  If e1000e_update_nvm_checksum is not called after this function, the
fp@2217:  *  EEPROM will most likely contain an invalid checksum.
fp@2217:  **/
fp@2217: static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
fp@2217: 				 u16 *data)
fp@2217: {
fp@2217: 	s32 ret_val;
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);
fp@2217: 		break;
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		ret_val = e1000e_write_nvm_spi(hw, offset, words, data);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		ret_val = -E1000_ERR_NVM;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return ret_val;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_update_nvm_checksum_82571 - Update EEPROM checksum
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
fp@2217:  *  up to the checksum.  Then calculates the EEPROM checksum and writes the
fp@2217:  *  value to the EEPROM.
fp@2217:  **/
fp@2217: static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 eecd;
fp@2217: 	s32 ret_val;
fp@2217: 	u16 i;
fp@2217: 
fp@2217: 	ret_val = e1000e_update_nvm_checksum_generic(hw);
fp@2217: 	if (ret_val)
fp@2217: 		return ret_val;
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * If our nvm is an EEPROM, then we're done
fp@2217: 	 * otherwise, commit the checksum to the flash NVM.
fp@2217: 	 */
fp@2217: 	if (hw->nvm.type != e1000_nvm_flash_hw)
fp@2217: 		return ret_val;
fp@2217: 
fp@2217: 	/* Check for pending operations. */
fp@2217: 	for (i = 0; i < E1000_FLASH_UPDATES; i++) {
fp@2217: 		msleep(1);
fp@2217: 		if ((er32(EECD) & E1000_EECD_FLUPD) == 0)
fp@2217: 			break;
fp@2217: 	}
fp@2217: 
fp@2217: 	if (i == E1000_FLASH_UPDATES)
fp@2217: 		return -E1000_ERR_NVM;
fp@2217: 
fp@2217: 	/* Reset the firmware if using STM opcode. */
fp@2217: 	if ((er32(FLOP) & 0xFF00) == E1000_STM_OPCODE) {
fp@2217: 		/*
fp@2217: 		 * The enabling of and the actual reset must be done
fp@2217: 		 * in two write cycles.
fp@2217: 		 */
fp@2217: 		ew32(HICR, E1000_HICR_FW_RESET_ENABLE);
fp@2217: 		e1e_flush();
fp@2217: 		ew32(HICR, E1000_HICR_FW_RESET);
fp@2217: 	}
fp@2217: 
fp@2217: 	/* Commit the write to flash */
fp@2217: 	eecd = er32(EECD) | E1000_EECD_FLUPD;
fp@2217: 	ew32(EECD, eecd);
fp@2217: 
fp@2217: 	for (i = 0; i < E1000_FLASH_UPDATES; i++) {
fp@2217: 		msleep(1);
fp@2217: 		if ((er32(EECD) & E1000_EECD_FLUPD) == 0)
fp@2217: 			break;
fp@2217: 	}
fp@2217: 
fp@2217: 	if (i == E1000_FLASH_UPDATES)
fp@2217: 		return -E1000_ERR_NVM;
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_validate_nvm_checksum_82571 - Validate EEPROM checksum
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
fp@2217:  *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
fp@2217:  **/
fp@2217: static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	if (hw->nvm.type == e1000_nvm_flash_hw)
fp@2217: 		e1000_fix_nvm_checksum_82571(hw);
fp@2217: 
fp@2217: 	return e1000e_validate_nvm_checksum_generic(hw);
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_write_nvm_eewr_82571 - Write to EEPROM for 82573 silicon
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *  @offset: offset within the EEPROM to be written to
fp@2217:  *  @words: number of words to write
fp@2217:  *  @data: 16 bit word(s) to be written to the EEPROM
fp@2217:  *
fp@2217:  *  After checking for invalid values, poll the EEPROM to ensure the previous
fp@2217:  *  command has completed before trying to write the next word.  After write
fp@2217:  *  poll for completion.
fp@2217:  *
fp@2217:  *  If e1000e_update_nvm_checksum is not called after this function, the
fp@2217:  *  EEPROM will most likely contain an invalid checksum.
fp@2217:  **/
fp@2217: static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
fp@2217: 				      u16 words, u16 *data)
fp@2217: {
fp@2217: 	struct e1000_nvm_info *nvm = &hw->nvm;
fp@2217: 	u32 i;
fp@2217: 	u32 eewr = 0;
fp@2217: 	s32 ret_val = 0;
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * A check for invalid values:  offset too large, too many words,
fp@2217: 	 * and not enough words.
fp@2217: 	 */
fp@2217: 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
fp@2217: 	    (words == 0)) {
fp@2217: 		hw_dbg(hw, "nvm parameter(s) out of bounds\n");
fp@2217: 		return -E1000_ERR_NVM;
fp@2217: 	}
fp@2217: 
fp@2217: 	for (i = 0; i < words; i++) {
fp@2217: 		eewr = (data[i] << E1000_NVM_RW_REG_DATA) |
fp@2217: 		       ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
fp@2217: 		       E1000_NVM_RW_REG_START;
fp@2217: 
fp@2217: 		ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);
fp@2217: 		if (ret_val)
fp@2217: 			break;
fp@2217: 
fp@2217: 		ew32(EEWR, eewr);
fp@2217: 
fp@2217: 		ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);
fp@2217: 		if (ret_val)
fp@2217: 			break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return ret_val;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_get_cfg_done_82571 - Poll for configuration done
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Reads the management control register for the config done bit to be set.
fp@2217:  **/
fp@2217: static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	s32 timeout = PHY_CFG_TIMEOUT;
fp@2217: 
fp@2217: 	while (timeout) {
fp@2217: 		if (er32(EEMNGCTL) &
fp@2217: 		    E1000_NVM_CFG_DONE_PORT_0)
fp@2217: 			break;
fp@2217: 		msleep(1);
fp@2217: 		timeout--;
fp@2217: 	}
fp@2217: 	if (!timeout) {
fp@2217: 		hw_dbg(hw, "MNG configuration cycle has not completed.\n");
fp@2217: 		return -E1000_ERR_RESET;
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *  @active: TRUE to enable LPLU, FALSE to disable
fp@2217:  *
fp@2217:  *  Sets the LPLU D0 state according to the active flag.  When activating LPLU
fp@2217:  *  this function also disables smart speed and vice versa.  LPLU will not be
fp@2217:  *  activated unless the device autonegotiation advertisement meets standards
fp@2217:  *  of either 10 or 10/100 or 10/100/1000 at all duplexes.  This is a function
fp@2217:  *  pointer entry point only called by PHY setup routines.
fp@2217:  **/
fp@2217: static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
fp@2217: {
fp@2217: 	struct e1000_phy_info *phy = &hw->phy;
fp@2217: 	s32 ret_val;
fp@2217: 	u16 data;
fp@2217: 
fp@2217: 	ret_val = e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &data);
fp@2217: 	if (ret_val)
fp@2217: 		return ret_val;
fp@2217: 
fp@2217: 	if (active) {
fp@2217: 		data |= IGP02E1000_PM_D0_LPLU;
fp@2217: 		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data);
fp@2217: 		if (ret_val)
fp@2217: 			return ret_val;
fp@2217: 
fp@2217: 		/* When LPLU is enabled, we should disable SmartSpeed */
fp@2217: 		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data);
fp@2217: 		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
fp@2217: 		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);
fp@2217: 		if (ret_val)
fp@2217: 			return ret_val;
fp@2217: 	} else {
fp@2217: 		data &= ~IGP02E1000_PM_D0_LPLU;
fp@2217: 		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data);
fp@2217: 		/*
fp@2217: 		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
fp@2217: 		 * during Dx states where the power conservation is most
fp@2217: 		 * important.  During driver activity we should enable
fp@2217: 		 * SmartSpeed, so performance is maintained.
fp@2217: 		 */
fp@2217: 		if (phy->smart_speed == e1000_smart_speed_on) {
fp@2217: 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
fp@2217: 					   &data);
fp@2217: 			if (ret_val)
fp@2217: 				return ret_val;
fp@2217: 
fp@2217: 			data |= IGP01E1000_PSCFR_SMART_SPEED;
fp@2217: 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
fp@2217: 					   data);
fp@2217: 			if (ret_val)
fp@2217: 				return ret_val;
fp@2217: 		} else if (phy->smart_speed == e1000_smart_speed_off) {
fp@2217: 			ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
fp@2217: 					   &data);
fp@2217: 			if (ret_val)
fp@2217: 				return ret_val;
fp@2217: 
fp@2217: 			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
fp@2217: 			ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
fp@2217: 					   data);
fp@2217: 			if (ret_val)
fp@2217: 				return ret_val;
fp@2217: 		}
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_reset_hw_82571 - Reset hardware
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  This resets the hardware into a known state.  This is a
fp@2217:  *  function pointer entry point called by the api module.
fp@2217:  **/
fp@2217: static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 ctrl;
fp@2217: 	u32 extcnf_ctrl;
fp@2217: 	u32 ctrl_ext;
fp@2217: 	u32 icr;
fp@2217: 	s32 ret_val;
fp@2217: 	u16 i = 0;
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * Prevent the PCI-E bus from sticking if there is no TLP connection
fp@2217: 	 * on the last TLP read/write transaction when MAC is reset.
fp@2217: 	 */
fp@2217: 	ret_val = e1000e_disable_pcie_master(hw);
fp@2217: 	if (ret_val)
fp@2217: 		hw_dbg(hw, "PCI-E Master disable polling has failed.\n");
fp@2217: 
fp@2217: 	hw_dbg(hw, "Masking off all interrupts\n");
fp@2217: 	ew32(IMC, 0xffffffff);
fp@2217: 
fp@2217: 	ew32(RCTL, 0);
fp@2217: 	ew32(TCTL, E1000_TCTL_PSP);
fp@2217: 	e1e_flush();
fp@2217: 
fp@2217: 	msleep(10);
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * Must acquire the MDIO ownership before MAC reset.
fp@2217: 	 * Ownership defaults to firmware after a reset.
fp@2217: 	 */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		extcnf_ctrl = er32(EXTCNF_CTRL);
fp@2217: 		extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
fp@2217: 
fp@2217: 		do {
fp@2217: 			ew32(EXTCNF_CTRL, extcnf_ctrl);
fp@2217: 			extcnf_ctrl = er32(EXTCNF_CTRL);
fp@2217: 
fp@2217: 			if (extcnf_ctrl & E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP)
fp@2217: 				break;
fp@2217: 
fp@2217: 			extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
fp@2217: 
fp@2217: 			msleep(2);
fp@2217: 			i++;
fp@2217: 		} while (i < MDIO_OWNERSHIP_TIMEOUT);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	ctrl = er32(CTRL);
fp@2217: 
fp@2217: 	hw_dbg(hw, "Issuing a global reset to MAC\n");
fp@2217: 	ew32(CTRL, ctrl | E1000_CTRL_RST);
fp@2217: 
fp@2217: 	if (hw->nvm.type == e1000_nvm_flash_hw) {
fp@2217: 		udelay(10);
fp@2217: 		ctrl_ext = er32(CTRL_EXT);
fp@2217: 		ctrl_ext |= E1000_CTRL_EXT_EE_RST;
fp@2217: 		ew32(CTRL_EXT, ctrl_ext);
fp@2217: 		e1e_flush();
fp@2217: 	}
fp@2217: 
fp@2217: 	ret_val = e1000e_get_auto_rd_done(hw);
fp@2217: 	if (ret_val)
fp@2217: 		/* We don't want to continue accessing MAC registers. */
fp@2217: 		return ret_val;
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * Phy configuration from NVM just starts after EECD_AUTO_RD is set.
fp@2217: 	 * Need to wait for Phy configuration completion before accessing
fp@2217: 	 * NVM and Phy.
fp@2217: 	 */
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		msleep(25);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	/* Clear any pending interrupt events. */
fp@2217: 	ew32(IMC, 0xffffffff);
fp@2217: 	icr = er32(ICR);
fp@2217: 
fp@2217: 	if (hw->mac.type == e1000_82571 &&
fp@2217: 		hw->dev_spec.e82571.alt_mac_addr_is_present)
fp@2217: 			e1000e_set_laa_state_82571(hw, true);
fp@2217: 
fp@2217: 	/* Reinitialize the 82571 serdes link state machine */
fp@2217: 	if (hw->phy.media_type == e1000_media_type_internal_serdes)
fp@2217: 		hw->mac.serdes_link_state = e1000_serdes_link_down;
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_init_hw_82571 - Initialize hardware
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  This inits the hardware readying it for operation.
fp@2217:  **/
fp@2217: static s32 e1000_init_hw_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	struct e1000_mac_info *mac = &hw->mac;
fp@2217: 	u32 reg_data;
fp@2217: 	s32 ret_val;
fp@2217: 	u16 i;
fp@2217: 	u16 rar_count = mac->rar_entry_count;
fp@2217: 
fp@2217: 	e1000_initialize_hw_bits_82571(hw);
fp@2217: 
fp@2217: 	/* Initialize identification LED */
fp@2217: 	ret_val = e1000e_id_led_init(hw);
fp@2217: 	if (ret_val) {
fp@2217: 		hw_dbg(hw, "Error initializing identification LED\n");
fp@2217: 		return ret_val;
fp@2217: 	}
fp@2217: 
fp@2217: 	/* Disabling VLAN filtering */
fp@2217: 	hw_dbg(hw, "Initializing the IEEE VLAN\n");
fp@2217: 	e1000e_clear_vfta(hw);
fp@2217: 
fp@2217: 	/* Setup the receive address. */
fp@2217: 	/*
fp@2217: 	 * If, however, a locally administered address was assigned to the
fp@2217: 	 * 82571, we must reserve a RAR for it to work around an issue where
fp@2217: 	 * resetting one port will reload the MAC on the other port.
fp@2217: 	 */
fp@2217: 	if (e1000e_get_laa_state_82571(hw))
fp@2217: 		rar_count--;
fp@2217: 	e1000e_init_rx_addrs(hw, rar_count);
fp@2217: 
fp@2217: 	/* Zero out the Multicast HASH table */
fp@2217: 	hw_dbg(hw, "Zeroing the MTA\n");
fp@2217: 	for (i = 0; i < mac->mta_reg_count; i++)
fp@2217: 		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
fp@2217: 
fp@2217: 	/* Setup link and flow control */
fp@2217: 	ret_val = e1000_setup_link_82571(hw);
fp@2217: 
fp@2217: 	/* Set the transmit descriptor write-back policy */
fp@2217: 	reg_data = er32(TXDCTL(0));
fp@2217: 	reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
fp@2217: 		   E1000_TXDCTL_FULL_TX_DESC_WB |
fp@2217: 		   E1000_TXDCTL_COUNT_DESC;
fp@2217: 	ew32(TXDCTL(0), reg_data);
fp@2217: 
fp@2217: 	/* ...for both queues. */
fp@2217: 	switch (mac->type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		e1000e_enable_tx_pkt_filtering(hw);
fp@2217: 		reg_data = er32(GCR);
fp@2217: 		reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
fp@2217: 		ew32(GCR, reg_data);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		reg_data = er32(TXDCTL(1));
fp@2217: 		reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
fp@2217: 			   E1000_TXDCTL_FULL_TX_DESC_WB |
fp@2217: 			   E1000_TXDCTL_COUNT_DESC;
fp@2217: 		ew32(TXDCTL(1), reg_data);
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * Clear all of the statistics registers (clear on read).  It is
fp@2217: 	 * important that we do this after we have tried to establish link
fp@2217: 	 * because the symbol error count will increment wildly if there
fp@2217: 	 * is no link.
fp@2217: 	 */
fp@2217: 	e1000_clear_hw_cntrs_82571(hw);
fp@2217: 
fp@2217: 	return ret_val;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_initialize_hw_bits_82571 - Initialize hardware-dependent bits
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Initializes required hardware-dependent bits needed for normal operation.
fp@2217:  **/
fp@2217: static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 reg;
fp@2217: 
fp@2217: 	/* Transmit Descriptor Control 0 */
fp@2217: 	reg = er32(TXDCTL(0));
fp@2217: 	reg |= (1 << 22);
fp@2217: 	ew32(TXDCTL(0), reg);
fp@2217: 
fp@2217: 	/* Transmit Descriptor Control 1 */
fp@2217: 	reg = er32(TXDCTL(1));
fp@2217: 	reg |= (1 << 22);
fp@2217: 	ew32(TXDCTL(1), reg);
fp@2217: 
fp@2217: 	/* Transmit Arbitration Control 0 */
fp@2217: 	reg = er32(TARC(0));
fp@2217: 	reg &= ~(0xF << 27); /* 30:27 */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		reg |= (1 << 23) | (1 << 24) | (1 << 25) | (1 << 26);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 	ew32(TARC(0), reg);
fp@2217: 
fp@2217: 	/* Transmit Arbitration Control 1 */
fp@2217: 	reg = er32(TARC(1));
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		reg &= ~((1 << 29) | (1 << 30));
fp@2217: 		reg |= (1 << 22) | (1 << 24) | (1 << 25) | (1 << 26);
fp@2217: 		if (er32(TCTL) & E1000_TCTL_MULR)
fp@2217: 			reg &= ~(1 << 28);
fp@2217: 		else
fp@2217: 			reg |= (1 << 28);
fp@2217: 		ew32(TARC(1), reg);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	/* Device Control */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		reg = er32(CTRL);
fp@2217: 		reg &= ~(1 << 29);
fp@2217: 		ew32(CTRL, reg);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	/* Extended Device Control */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		reg = er32(CTRL_EXT);
fp@2217: 		reg &= ~(1 << 23);
fp@2217: 		reg |= (1 << 22);
fp@2217: 		ew32(CTRL_EXT, reg);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	if (hw->mac.type == e1000_82571) {
fp@2217: 		reg = er32(PBA_ECC);
fp@2217: 		reg |= E1000_PBA_ECC_CORR_EN;
fp@2217: 		ew32(PBA_ECC, reg);
fp@2217: 	}
fp@2217: 	/*
fp@2217: 	 * Workaround for hardware errata.
fp@2217: 	 * Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572
fp@2217: 	 */
fp@2217: 
fp@2217:         if ((hw->mac.type == e1000_82571) ||
fp@2217:            (hw->mac.type == e1000_82572)) {
fp@2217:                 reg = er32(CTRL_EXT);
fp@2217:                 reg &= ~E1000_CTRL_EXT_DMA_DYN_CLK_EN;
fp@2217:                 ew32(CTRL_EXT, reg);
fp@2217:         }
fp@2217: 
fp@2217: 
fp@2217: 	/* PCI-Ex Control Registers */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		reg = er32(GCR);
fp@2217: 		reg |= (1 << 22);
fp@2217: 		ew32(GCR, reg);
fp@2217: 
fp@2217: 		reg = er32(GCR2);
fp@2217: 		reg |= 1;
fp@2217: 		ew32(GCR2, reg);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000e_clear_vfta - Clear VLAN filter table
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Clears the register array which contains the VLAN filter table by
fp@2217:  *  setting all the values to 0.
fp@2217:  **/
fp@2217: void e1000e_clear_vfta(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 offset;
fp@2217: 	u32 vfta_value = 0;
fp@2217: 	u32 vfta_offset = 0;
fp@2217: 	u32 vfta_bit_in_reg = 0;
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		if (hw->mng_cookie.vlan_id != 0) {
fp@2217: 			/*
fp@2217: 			 * The VFTA is a 4096b bit-field, each identifying
fp@2217: 			 * a single VLAN ID.  The following operations
fp@2217: 			 * determine which 32b entry (i.e. offset) into the
fp@2217: 			 * array we want to set the VLAN ID (i.e. bit) of
fp@2217: 			 * the manageability unit.
fp@2217: 			 */
fp@2217: 			vfta_offset = (hw->mng_cookie.vlan_id >>
fp@2217: 				       E1000_VFTA_ENTRY_SHIFT) &
fp@2217: 				      E1000_VFTA_ENTRY_MASK;
fp@2217: 			vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id &
fp@2217: 					       E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
fp@2217: 		}
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 	for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
fp@2217: 		/*
fp@2217: 		 * If the offset we want to clear is the same offset of the
fp@2217: 		 * manageability VLAN ID, then clear all bits except that of
fp@2217: 		 * the manageability unit.
fp@2217: 		 */
fp@2217: 		vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0;
fp@2217: 		E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, vfta_value);
fp@2217: 		e1e_flush();
fp@2217: 	}
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_check_mng_mode_82574 - Check manageability is enabled
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Reads the NVM Initialization Control Word 2 and returns true
fp@2217:  *  (>0) if any manageability is enabled, else false (0).
fp@2217:  **/
fp@2217: static bool e1000_check_mng_mode_82574(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u16 data;
fp@2217: 
fp@2217: 	e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
fp@2217: 	return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_led_on_82574 - Turn LED on
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Turn LED on.
fp@2217:  **/
fp@2217: static s32 e1000_led_on_82574(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 ctrl;
fp@2217: 	u32 i;
fp@2217: 
fp@2217: 	ctrl = hw->mac.ledctl_mode2;
fp@2217: 	if (!(E1000_STATUS_LU & er32(STATUS))) {
fp@2217: 		/*
fp@2217: 		 * If no link, then turn LED on by setting the invert bit
fp@2217: 		 * for each LED that's "on" (0x0E) in ledctl_mode2.
fp@2217: 		 */
fp@2217: 		for (i = 0; i < 4; i++)
fp@2217: 			if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
fp@2217: 			    E1000_LEDCTL_MODE_LED_ON)
fp@2217: 				ctrl |= (E1000_LEDCTL_LED0_IVRT << (i * 8));
fp@2217: 	}
fp@2217: 	ew32(LEDCTL, ctrl);
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_update_mc_addr_list_82571 - Update Multicast addresses
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *  @mc_addr_list: array of multicast addresses to program
fp@2217:  *  @mc_addr_count: number of multicast addresses to program
fp@2217:  *  @rar_used_count: the first RAR register free to program
fp@2217:  *  @rar_count: total number of supported Receive Address Registers
fp@2217:  *
fp@2217:  *  Updates the Receive Address Registers and Multicast Table Array.
fp@2217:  *  The caller must have a packed mc_addr_list of multicast addresses.
fp@2217:  *  The parameter rar_count will usually be hw->mac.rar_entry_count
fp@2217:  *  unless there are workarounds that change this.
fp@2217:  **/
fp@2217: static void e1000_update_mc_addr_list_82571(struct e1000_hw *hw,
fp@2217: 					    u8 *mc_addr_list,
fp@2217: 					    u32 mc_addr_count,
fp@2217: 					    u32 rar_used_count,
fp@2217: 					    u32 rar_count)
fp@2217: {
fp@2217: 	if (e1000e_get_laa_state_82571(hw))
fp@2217: 		rar_count--;
fp@2217: 
fp@2217: 	e1000e_update_mc_addr_list_generic(hw, mc_addr_list, mc_addr_count,
fp@2217: 					   rar_used_count, rar_count);
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_setup_link_82571 - Setup flow control and link settings
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Determines which flow control settings to use, then configures flow
fp@2217:  *  control.  Calls the appropriate media-specific link configuration
fp@2217:  *  function.  Assuming the adapter has a valid link partner, a valid link
fp@2217:  *  should be established.  Assumes the hardware has previously been reset
fp@2217:  *  and the transmitter and receiver are not enabled.
fp@2217:  **/
fp@2217: static s32 e1000_setup_link_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	/*
fp@2217: 	 * 82573 does not have a word in the NVM to determine
fp@2217: 	 * the default flow control setting, so we explicitly
fp@2217: 	 * set it to full.
fp@2217: 	 */
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		if (hw->fc.requested_mode == e1000_fc_default)
fp@2217: 			hw->fc.requested_mode = e1000_fc_full;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return e1000e_setup_link(hw);
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_setup_copper_link_82571 - Configure copper link settings
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Configures the link for auto-neg or forced speed and duplex.  Then we check
fp@2217:  *  for link, once link is established calls to configure collision distance
fp@2217:  *  and flow control are called.
fp@2217:  **/
fp@2217: static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 ctrl;
fp@2217: 	u32 led_ctrl;
fp@2217: 	s32 ret_val;
fp@2217: 
fp@2217: 	ctrl = er32(CTRL);
fp@2217: 	ctrl |= E1000_CTRL_SLU;
fp@2217: 	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
fp@2217: 	ew32(CTRL, ctrl);
fp@2217: 
fp@2217: 	switch (hw->phy.type) {
fp@2217: 	case e1000_phy_m88:
fp@2217: 	case e1000_phy_bm:
fp@2217: 		ret_val = e1000e_copper_link_setup_m88(hw);
fp@2217: 		break;
fp@2217: 	case e1000_phy_igp_2:
fp@2217: 		ret_val = e1000e_copper_link_setup_igp(hw);
fp@2217: 		/* Setup activity LED */
fp@2217: 		led_ctrl = er32(LEDCTL);
fp@2217: 		led_ctrl &= IGP_ACTIVITY_LED_MASK;
fp@2217: 		led_ctrl |= (IGP_ACTIVITY_LED_ENABLE | IGP_LED3_MODE);
fp@2217: 		ew32(LEDCTL, led_ctrl);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		return -E1000_ERR_PHY;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	if (ret_val)
fp@2217: 		return ret_val;
fp@2217: 
fp@2217: 	ret_val = e1000e_setup_copper_link(hw);
fp@2217: 
fp@2217: 	return ret_val;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_setup_fiber_serdes_link_82571 - Setup link for fiber/serdes
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Configures collision distance and flow control for fiber and serdes links.
fp@2217:  *  Upon successful setup, poll for link.
fp@2217:  **/
fp@2217: static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82571:
fp@2217: 	case e1000_82572:
fp@2217: 		/*
fp@2217: 		 * If SerDes loopback mode is entered, there is no form
fp@2217: 		 * of reset to take the adapter out of that mode.  So we
fp@2217: 		 * have to explicitly take the adapter out of loopback
fp@2217: 		 * mode.  This prevents drivers from twiddling their thumbs
fp@2217: 		 * if another tool failed to take it out of loopback mode.
fp@2217: 		 */
fp@2217: 		ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return e1000e_setup_fiber_serdes_link(hw);
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_check_for_serdes_link_82571 - Check for link (Serdes)
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Checks for link up on the hardware.  If link is not up and we have
fp@2217:  *  a signal, then we need to force link up.
fp@2217:  **/
fp@2217: static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	struct e1000_mac_info *mac = &hw->mac;
fp@2217: 	u32 rxcw;
fp@2217: 	u32 ctrl;
fp@2217: 	u32 status;
fp@2217: 	s32 ret_val = 0;
fp@2217: 
fp@2217: 	ctrl = er32(CTRL);
fp@2217: 	status = er32(STATUS);
fp@2217: 	rxcw = er32(RXCW);
fp@2217: 
fp@2217: 	if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) {
fp@2217: 
fp@2217: 		/* Receiver is synchronized with no invalid bits.  */
fp@2217: 		switch (mac->serdes_link_state) {
fp@2217: 		case e1000_serdes_link_autoneg_complete:
fp@2217: 			if (!(status & E1000_STATUS_LU)) {
fp@2217: 				/*
fp@2217: 				 * We have lost link, retry autoneg before
fp@2217: 				 * reporting link failure
fp@2217: 				 */
fp@2217: 				mac->serdes_link_state =
fp@2217: 				    e1000_serdes_link_autoneg_progress;
fp@2217: 				hw_dbg(hw, "AN_UP     -> AN_PROG\n");
fp@2217: 			}
fp@2217: 		break;
fp@2217: 
fp@2217: 		case e1000_serdes_link_forced_up:
fp@2217: 			/*
fp@2217: 			 * If we are receiving /C/ ordered sets, re-enable
fp@2217: 			 * auto-negotiation in the TXCW register and disable
fp@2217: 			 * forced link in the Device Control register in an
fp@2217: 			 * attempt to auto-negotiate with our link partner.
fp@2217: 			 */
fp@2217: 			if (rxcw & E1000_RXCW_C) {
fp@2217: 				/* Enable autoneg, and unforce link up */
fp@2217: 				ew32(TXCW, mac->txcw);
fp@2217: 				ew32(CTRL,
fp@2217: 				    (ctrl & ~E1000_CTRL_SLU));
fp@2217: 				mac->serdes_link_state =
fp@2217: 				    e1000_serdes_link_autoneg_progress;
fp@2217: 				hw_dbg(hw, "FORCED_UP -> AN_PROG\n");
fp@2217: 			}
fp@2217: 			break;
fp@2217: 
fp@2217: 		case e1000_serdes_link_autoneg_progress:
fp@2217: 			/*
fp@2217: 			 * If the LU bit is set in the STATUS register,
fp@2217: 			 * autoneg has completed sucessfully. If not,
fp@2217: 			 * try foring the link because the far end may be
fp@2217: 			 * available but not capable of autonegotiation.
fp@2217: 			 */
fp@2217: 			if (status & E1000_STATUS_LU)  {
fp@2217: 				mac->serdes_link_state =
fp@2217: 				    e1000_serdes_link_autoneg_complete;
fp@2217: 				hw_dbg(hw, "AN_PROG   -> AN_UP\n");
fp@2217: 			} else {
fp@2217: 				/*
fp@2217: 				 * Disable autoneg, force link up and
fp@2217: 				 * full duplex, and change state to forced
fp@2217: 				 */
fp@2217: 				ew32(TXCW,
fp@2217: 				    (mac->txcw & ~E1000_TXCW_ANE));
fp@2217: 				ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
fp@2217: 				ew32(CTRL, ctrl);
fp@2217: 
fp@2217: 				/* Configure Flow Control after link up. */
fp@2217: 				ret_val =
fp@2217: 				    e1000e_config_fc_after_link_up(hw);
fp@2217: 				if (ret_val) {
fp@2217: 					hw_dbg(hw, "Error config flow control\n");
fp@2217: 					break;
fp@2217: 				}
fp@2217: 				mac->serdes_link_state =
fp@2217: 				    e1000_serdes_link_forced_up;
fp@2217: 				hw_dbg(hw, "AN_PROG   -> FORCED_UP\n");
fp@2217: 			}
fp@2217: 			mac->serdes_has_link = true;
fp@2217: 			break;
fp@2217: 
fp@2217: 		case e1000_serdes_link_down:
fp@2217: 		default:
fp@2217: 			/* The link was down but the receiver has now gained
fp@2217: 			 * valid sync, so lets see if we can bring the link
fp@2217: 			 * up. */
fp@2217: 			ew32(TXCW, mac->txcw);
fp@2217: 			ew32(CTRL,
fp@2217: 			    (ctrl & ~E1000_CTRL_SLU));
fp@2217: 			mac->serdes_link_state =
fp@2217: 			    e1000_serdes_link_autoneg_progress;
fp@2217: 			hw_dbg(hw, "DOWN      -> AN_PROG\n");
fp@2217: 			break;
fp@2217: 		}
fp@2217: 	} else {
fp@2217: 		if (!(rxcw & E1000_RXCW_SYNCH)) {
fp@2217: 			mac->serdes_has_link = false;
fp@2217: 			mac->serdes_link_state = e1000_serdes_link_down;
fp@2217: 			hw_dbg(hw, "ANYSTATE  -> DOWN\n");
fp@2217: 		} else {
fp@2217: 			/*
fp@2217: 			 * We have sync, and can tolerate one
fp@2217: 			 * invalid (IV) codeword before declaring
fp@2217: 			 * link down, so reread to look again
fp@2217: 			 */
fp@2217: 			udelay(10);
fp@2217: 			rxcw = er32(RXCW);
fp@2217: 			if (rxcw & E1000_RXCW_IV) {
fp@2217: 				mac->serdes_link_state = e1000_serdes_link_down;
fp@2217: 				mac->serdes_has_link = false;
fp@2217: 				hw_dbg(hw, "ANYSTATE  -> DOWN\n");
fp@2217: 			}
fp@2217: 		}
fp@2217: 	}
fp@2217: 
fp@2217: 	return ret_val;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_valid_led_default_82571 - Verify a valid default LED config
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *  @data: pointer to the NVM (EEPROM)
fp@2217:  *
fp@2217:  *  Read the EEPROM for the current default LED configuration.  If the
fp@2217:  *  LED configuration is not valid, set to a valid LED configuration.
fp@2217:  **/
fp@2217: static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
fp@2217: {
fp@2217: 	s32 ret_val;
fp@2217: 
fp@2217: 	ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
fp@2217: 	if (ret_val) {
fp@2217: 		hw_dbg(hw, "NVM Read Error\n");
fp@2217: 		return ret_val;
fp@2217: 	}
fp@2217: 
fp@2217: 	switch (hw->mac.type) {
fp@2217: 	case e1000_82573:
fp@2217: 	case e1000_82574:
fp@2217: 	case e1000_82583:
fp@2217: 		if (*data == ID_LED_RESERVED_F746)
fp@2217: 			*data = ID_LED_DEFAULT_82573;
fp@2217: 		break;
fp@2217: 	default:
fp@2217: 		if (*data == ID_LED_RESERVED_0000 ||
fp@2217: 		    *data == ID_LED_RESERVED_FFFF)
fp@2217: 			*data = ID_LED_DEFAULT;
fp@2217: 		break;
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000e_get_laa_state_82571 - Get locally administered address state
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Retrieve and return the current locally administered address state.
fp@2217:  **/
fp@2217: bool e1000e_get_laa_state_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	if (hw->mac.type != e1000_82571)
fp@2217: 		return 0;
fp@2217: 
fp@2217: 	return hw->dev_spec.e82571.laa_is_present;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000e_set_laa_state_82571 - Set locally administered address state
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *  @state: enable/disable locally administered address
fp@2217:  *
fp@2217:  *  Enable/Disable the current locally administers address state.
fp@2217:  **/
fp@2217: void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state)
fp@2217: {
fp@2217: 	if (hw->mac.type != e1000_82571)
fp@2217: 		return;
fp@2217: 
fp@2217: 	hw->dev_spec.e82571.laa_is_present = state;
fp@2217: 
fp@2217: 	/* If workaround is activated... */
fp@2217: 	if (state)
fp@2217: 		/*
fp@2217: 		 * Hold a copy of the LAA in RAR[14] This is done so that
fp@2217: 		 * between the time RAR[0] gets clobbered and the time it
fp@2217: 		 * gets fixed, the actual LAA is in one of the RARs and no
fp@2217: 		 * incoming packets directed to this port are dropped.
fp@2217: 		 * Eventually the LAA will be in RAR[0] and RAR[14].
fp@2217: 		 */
fp@2217: 		e1000e_rar_set(hw, hw->mac.addr, hw->mac.rar_entry_count - 1);
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_fix_nvm_checksum_82571 - Fix EEPROM checksum
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Verifies that the EEPROM has completed the update.  After updating the
fp@2217:  *  EEPROM, we need to check bit 15 in work 0x23 for the checksum fix.  If
fp@2217:  *  the checksum fix is not implemented, we need to set the bit and update
fp@2217:  *  the checksum.  Otherwise, if bit 15 is set and the checksum is incorrect,
fp@2217:  *  we need to return bad checksum.
fp@2217:  **/
fp@2217: static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	struct e1000_nvm_info *nvm = &hw->nvm;
fp@2217: 	s32 ret_val;
fp@2217: 	u16 data;
fp@2217: 
fp@2217: 	if (nvm->type != e1000_nvm_flash_hw)
fp@2217: 		return 0;
fp@2217: 
fp@2217: 	/*
fp@2217: 	 * Check bit 4 of word 10h.  If it is 0, firmware is done updating
fp@2217: 	 * 10h-12h.  Checksum may need to be fixed.
fp@2217: 	 */
fp@2217: 	ret_val = e1000_read_nvm(hw, 0x10, 1, &data);
fp@2217: 	if (ret_val)
fp@2217: 		return ret_val;
fp@2217: 
fp@2217: 	if (!(data & 0x10)) {
fp@2217: 		/*
fp@2217: 		 * Read 0x23 and check bit 15.  This bit is a 1
fp@2217: 		 * when the checksum has already been fixed.  If
fp@2217: 		 * the checksum is still wrong and this bit is a
fp@2217: 		 * 1, we need to return bad checksum.  Otherwise,
fp@2217: 		 * we need to set this bit to a 1 and update the
fp@2217: 		 * checksum.
fp@2217: 		 */
fp@2217: 		ret_val = e1000_read_nvm(hw, 0x23, 1, &data);
fp@2217: 		if (ret_val)
fp@2217: 			return ret_val;
fp@2217: 
fp@2217: 		if (!(data & 0x8000)) {
fp@2217: 			data |= 0x8000;
fp@2217: 			ret_val = e1000_write_nvm(hw, 0x23, 1, &data);
fp@2217: 			if (ret_val)
fp@2217: 				return ret_val;
fp@2217: 			ret_val = e1000e_update_nvm_checksum(hw);
fp@2217: 		}
fp@2217: 	}
fp@2217: 
fp@2217: 	return 0;
fp@2217: }
fp@2217: 
fp@2217: /**
fp@2217:  *  e1000_clear_hw_cntrs_82571 - Clear device specific hardware counters
fp@2217:  *  @hw: pointer to the HW structure
fp@2217:  *
fp@2217:  *  Clears the hardware counters by reading the counter registers.
fp@2217:  **/
fp@2217: static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw)
fp@2217: {
fp@2217: 	u32 temp;
fp@2217: 
fp@2217: 	e1000e_clear_hw_cntrs_base(hw);
fp@2217: 
fp@2217: 	temp = er32(PRC64);
fp@2217: 	temp = er32(PRC127);
fp@2217: 	temp = er32(PRC255);
fp@2217: 	temp = er32(PRC511);
fp@2217: 	temp = er32(PRC1023);
fp@2217: 	temp = er32(PRC1522);
fp@2217: 	temp = er32(PTC64);
fp@2217: 	temp = er32(PTC127);
fp@2217: 	temp = er32(PTC255);
fp@2217: 	temp = er32(PTC511);
fp@2217: 	temp = er32(PTC1023);
fp@2217: 	temp = er32(PTC1522);
fp@2217: 
fp@2217: 	temp = er32(ALGNERRC);
fp@2217: 	temp = er32(RXERRC);
fp@2217: 	temp = er32(TNCRS);
fp@2217: 	temp = er32(CEXTERR);
fp@2217: 	temp = er32(TSCTC);
fp@2217: 	temp = er32(TSCTFC);
fp@2217: 
fp@2217: 	temp = er32(MGTPRC);
fp@2217: 	temp = er32(MGTPDC);
fp@2217: 	temp = er32(MGTPTC);
fp@2217: 
fp@2217: 	temp = er32(IAC);
fp@2217: 	temp = er32(ICRXOC);
fp@2217: 
fp@2217: 	temp = er32(ICRXPTC);
fp@2217: 	temp = er32(ICRXATC);
fp@2217: 	temp = er32(ICTXPTC);
fp@2217: 	temp = er32(ICTXATC);
fp@2217: 	temp = er32(ICTXQEC);
fp@2217: 	temp = er32(ICTXQMTC);
fp@2217: 	temp = er32(ICRXDMTC);
fp@2217: }
fp@2217: 
fp@2217: static struct e1000_mac_operations e82571_mac_ops = {
fp@2217: 	/* .check_mng_mode: mac type dependent */
fp@2217: 	/* .check_for_link: media type dependent */
fp@2217: 	.id_led_init		= e1000e_id_led_init,
fp@2217: 	.cleanup_led		= e1000e_cleanup_led_generic,
fp@2217: 	.clear_hw_cntrs		= e1000_clear_hw_cntrs_82571,
fp@2217: 	.get_bus_info		= e1000e_get_bus_info_pcie,
fp@2217: 	/* .get_link_up_info: media type dependent */
fp@2217: 	/* .led_on: mac type dependent */
fp@2217: 	.led_off		= e1000e_led_off_generic,
fp@2217: 	.update_mc_addr_list	= e1000_update_mc_addr_list_82571,
fp@2217: 	.reset_hw		= e1000_reset_hw_82571,
fp@2217: 	.init_hw		= e1000_init_hw_82571,
fp@2217: 	.setup_link		= e1000_setup_link_82571,
fp@2217: 	/* .setup_physical_interface: media type dependent */
fp@2217: 	.setup_led		= e1000e_setup_led_generic,
fp@2217: };
fp@2217: 
fp@2217: static struct e1000_phy_operations e82_phy_ops_igp = {
fp@2217: 	.acquire_phy		= e1000_get_hw_semaphore_82571,
fp@2217: 	.check_reset_block	= e1000e_check_reset_block_generic,
fp@2217: 	.commit_phy		= NULL,
fp@2217: 	.force_speed_duplex	= e1000e_phy_force_speed_duplex_igp,
fp@2217: 	.get_cfg_done		= e1000_get_cfg_done_82571,
fp@2217: 	.get_cable_length	= e1000e_get_cable_length_igp_2,
fp@2217: 	.get_phy_info		= e1000e_get_phy_info_igp,
fp@2217: 	.read_phy_reg		= e1000e_read_phy_reg_igp,
fp@2217: 	.release_phy		= e1000_put_hw_semaphore_82571,
fp@2217: 	.reset_phy		= e1000e_phy_hw_reset_generic,
fp@2217: 	.set_d0_lplu_state	= e1000_set_d0_lplu_state_82571,
fp@2217: 	.set_d3_lplu_state	= e1000e_set_d3_lplu_state,
fp@2217: 	.write_phy_reg		= e1000e_write_phy_reg_igp,
fp@2217: 	.cfg_on_link_up      	= NULL,
fp@2217: };
fp@2217: 
fp@2217: static struct e1000_phy_operations e82_phy_ops_m88 = {
fp@2217: 	.acquire_phy		= e1000_get_hw_semaphore_82571,
fp@2217: 	.check_reset_block	= e1000e_check_reset_block_generic,
fp@2217: 	.commit_phy		= e1000e_phy_sw_reset,
fp@2217: 	.force_speed_duplex	= e1000e_phy_force_speed_duplex_m88,
fp@2217: 	.get_cfg_done		= e1000e_get_cfg_done,
fp@2217: 	.get_cable_length	= e1000e_get_cable_length_m88,
fp@2217: 	.get_phy_info		= e1000e_get_phy_info_m88,
fp@2217: 	.read_phy_reg		= e1000e_read_phy_reg_m88,
fp@2217: 	.release_phy		= e1000_put_hw_semaphore_82571,
fp@2217: 	.reset_phy		= e1000e_phy_hw_reset_generic,
fp@2217: 	.set_d0_lplu_state	= e1000_set_d0_lplu_state_82571,
fp@2217: 	.set_d3_lplu_state	= e1000e_set_d3_lplu_state,
fp@2217: 	.write_phy_reg		= e1000e_write_phy_reg_m88,
fp@2217: 	.cfg_on_link_up      	= NULL,
fp@2217: };
fp@2217: 
fp@2217: static struct e1000_phy_operations e82_phy_ops_bm = {
fp@2217: 	.acquire_phy		= e1000_get_hw_semaphore_82571,
fp@2217: 	.check_reset_block	= e1000e_check_reset_block_generic,
fp@2217: 	.commit_phy		= e1000e_phy_sw_reset,
fp@2217: 	.force_speed_duplex	= e1000e_phy_force_speed_duplex_m88,
fp@2217: 	.get_cfg_done		= e1000e_get_cfg_done,
fp@2217: 	.get_cable_length	= e1000e_get_cable_length_m88,
fp@2217: 	.get_phy_info		= e1000e_get_phy_info_m88,
fp@2217: 	.read_phy_reg		= e1000e_read_phy_reg_bm2,
fp@2217: 	.release_phy		= e1000_put_hw_semaphore_82571,
fp@2217: 	.reset_phy		= e1000e_phy_hw_reset_generic,
fp@2217: 	.set_d0_lplu_state	= e1000_set_d0_lplu_state_82571,
fp@2217: 	.set_d3_lplu_state	= e1000e_set_d3_lplu_state,
fp@2217: 	.write_phy_reg		= e1000e_write_phy_reg_bm2,
fp@2217: 	.cfg_on_link_up      	= NULL,
fp@2217: };
fp@2217: 
fp@2217: static struct e1000_nvm_operations e82571_nvm_ops = {
fp@2217: 	.acquire_nvm		= e1000_acquire_nvm_82571,
fp@2217: 	.read_nvm		= e1000e_read_nvm_eerd,
fp@2217: 	.release_nvm		= e1000_release_nvm_82571,
fp@2217: 	.update_nvm		= e1000_update_nvm_checksum_82571,
fp@2217: 	.valid_led_default	= e1000_valid_led_default_82571,
fp@2217: 	.validate_nvm		= e1000_validate_nvm_checksum_82571,
fp@2217: 	.write_nvm		= e1000_write_nvm_82571,
fp@2217: };
fp@2217: 
fp@2217: struct e1000_info e1000_82571_info = {
fp@2217: 	.mac			= e1000_82571,
fp@2217: 	.flags			= FLAG_HAS_HW_VLAN_FILTER
fp@2217: 				  | FLAG_HAS_JUMBO_FRAMES
fp@2217: 				  | FLAG_HAS_WOL
fp@2217: 				  | FLAG_APME_IN_CTRL3
fp@2217: 				  | FLAG_RX_CSUM_ENABLED
fp@2217: 				  | FLAG_HAS_CTRLEXT_ON_LOAD
fp@2217: 				  | FLAG_HAS_SMART_POWER_DOWN
fp@2217: 				  | FLAG_RESET_OVERWRITES_LAA /* errata */
fp@2217: 				  | FLAG_TARC_SPEED_MODE_BIT /* errata */
fp@2217: 				  | FLAG_APME_CHECK_PORT_B,
fp@2217: 	.pba			= 38,
fp@2217: 	.max_hw_frame_size	= DEFAULT_JUMBO,
fp@2217: 	.get_variants		= e1000_get_variants_82571,
fp@2217: 	.mac_ops		= &e82571_mac_ops,
fp@2217: 	.phy_ops		= &e82_phy_ops_igp,
fp@2217: 	.nvm_ops		= &e82571_nvm_ops,
fp@2217: };
fp@2217: 
fp@2217: struct e1000_info e1000_82572_info = {
fp@2217: 	.mac			= e1000_82572,
fp@2217: 	.flags			= FLAG_HAS_HW_VLAN_FILTER
fp@2217: 				  | FLAG_HAS_JUMBO_FRAMES
fp@2217: 				  | FLAG_HAS_WOL
fp@2217: 				  | FLAG_APME_IN_CTRL3
fp@2217: 				  | FLAG_RX_CSUM_ENABLED
fp@2217: 				  | FLAG_HAS_CTRLEXT_ON_LOAD
fp@2217: 				  | FLAG_TARC_SPEED_MODE_BIT, /* errata */
fp@2217: 	.pba			= 38,
fp@2217: 	.max_hw_frame_size	= DEFAULT_JUMBO,
fp@2217: 	.get_variants		= e1000_get_variants_82571,
fp@2217: 	.mac_ops		= &e82571_mac_ops,
fp@2217: 	.phy_ops		= &e82_phy_ops_igp,
fp@2217: 	.nvm_ops		= &e82571_nvm_ops,
fp@2217: };
fp@2217: 
fp@2217: struct e1000_info e1000_82573_info = {
fp@2217: 	.mac			= e1000_82573,
fp@2217: 	.flags			= FLAG_HAS_HW_VLAN_FILTER
fp@2217: 				  | FLAG_HAS_JUMBO_FRAMES
fp@2217: 				  | FLAG_HAS_WOL
fp@2217: 				  | FLAG_APME_IN_CTRL3
fp@2217: 				  | FLAG_RX_CSUM_ENABLED
fp@2217: 				  | FLAG_HAS_SMART_POWER_DOWN
fp@2217: 				  | FLAG_HAS_AMT
fp@2217: 				  | FLAG_HAS_ERT
fp@2217: 				  | FLAG_HAS_SWSM_ON_LOAD,
fp@2217: 	.pba			= 20,
fp@2217: 	.max_hw_frame_size	= ETH_FRAME_LEN + ETH_FCS_LEN,
fp@2217: 	.get_variants		= e1000_get_variants_82571,
fp@2217: 	.mac_ops		= &e82571_mac_ops,
fp@2217: 	.phy_ops		= &e82_phy_ops_m88,
fp@2217: 	.nvm_ops		= &e82571_nvm_ops,
fp@2217: };
fp@2217: 
fp@2217: struct e1000_info e1000_82574_info = {
fp@2217: 	.mac			= e1000_82574,
fp@2217: 	.flags			= FLAG_HAS_HW_VLAN_FILTER
fp@2217: 				  | FLAG_HAS_MSIX
fp@2217: 				  | FLAG_HAS_JUMBO_FRAMES
fp@2217: 				  | FLAG_HAS_WOL
fp@2217: 				  | FLAG_APME_IN_CTRL3
fp@2217: 				  | FLAG_RX_CSUM_ENABLED
fp@2217: 				  | FLAG_HAS_SMART_POWER_DOWN
fp@2217: 				  | FLAG_HAS_AMT
fp@2217: 				  | FLAG_HAS_CTRLEXT_ON_LOAD,
fp@2217: 	.pba			= 20,
fp@2217: 	.max_hw_frame_size	= DEFAULT_JUMBO,
fp@2217: 	.get_variants		= e1000_get_variants_82571,
fp@2217: 	.mac_ops		= &e82571_mac_ops,
fp@2217: 	.phy_ops		= &e82_phy_ops_bm,
fp@2217: 	.nvm_ops		= &e82571_nvm_ops,
fp@2217: };
fp@2217: 
fp@2217: struct e1000_info e1000_82583_info = {
fp@2217: 	.mac			= e1000_82583,
fp@2217: 	.flags			= FLAG_HAS_HW_VLAN_FILTER
fp@2217: 				  | FLAG_HAS_WOL
fp@2217: 				  | FLAG_APME_IN_CTRL3
fp@2217: 				  | FLAG_RX_CSUM_ENABLED
fp@2217: 				  | FLAG_HAS_SMART_POWER_DOWN
fp@2217: 				  | FLAG_HAS_AMT
fp@2217: 				  | FLAG_HAS_CTRLEXT_ON_LOAD,
fp@2217: 	.pba			= 20,
fp@2217: 	.max_hw_frame_size	= ETH_FRAME_LEN + ETH_FCS_LEN,
fp@2217: 	.get_variants		= e1000_get_variants_82571,
fp@2217: 	.mac_ops		= &e82571_mac_ops,
fp@2217: 	.phy_ops		= &e82_phy_ops_bm,
fp@2217: 	.nvm_ops		= &e82571_nvm_ops,
fp@2217: };
fp@2217: