fp@2586: /*******************************************************************************
fp@2586: 
fp@2586:   Intel PRO/1000 Linux driver
fp@2586:   Copyright(c) 1999 - 2013 Intel Corporation.
fp@2586: 
fp@2586:   This program is free software; you can redistribute it and/or modify it
fp@2586:   under the terms and conditions of the GNU General Public License,
fp@2586:   version 2, as published by the Free Software Foundation.
fp@2586: 
fp@2586:   This program is distributed in the hope it will be useful, but WITHOUT
fp@2586:   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
fp@2586:   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
fp@2586:   more details.
fp@2586: 
fp@2586:   You should have received a copy of the GNU General Public License along with
fp@2586:   this program; if not, write to the Free Software Foundation, Inc.,
fp@2586:   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
fp@2586: 
fp@2586:   The full GNU General Public License is included in this distribution in
fp@2586:   the file called "COPYING".
fp@2586: 
fp@2586:   Contact Information:
fp@2586:   Linux NICS <linux.nics@intel.com>
fp@2586:   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
fp@2586:   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
fp@2586: 
fp@2586: *******************************************************************************/
fp@2586: 
fp@2586: #ifndef _E1000E_80003ES2LAN_H_
fp@2586: #define _E1000E_80003ES2LAN_H_
fp@2586: 
fp@2586: #define E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL	0x00
fp@2586: #define E1000_KMRNCTRLSTA_OFFSET_INB_CTRL	0x02
fp@2586: #define E1000_KMRNCTRLSTA_OFFSET_HD_CTRL	0x10
fp@2586: #define E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE	0x1F
fp@2586: 
fp@2586: #define E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS	0x0008
fp@2586: #define E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS	0x0800
fp@2586: #define E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING	0x0010
fp@2586: 
fp@2586: #define E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT 0x0004
fp@2586: #define E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT	0x0000
fp@2586: #define E1000_KMRNCTRLSTA_OPMODE_E_IDLE		0x2000
fp@2586: 
fp@2586: #define E1000_KMRNCTRLSTA_OPMODE_MASK		0x000C
fp@2586: #define E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO	0x0004
fp@2586: 
fp@2586: #define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00	/* Gig Carry Extend Padding */
fp@2586: #define DEFAULT_TCTL_EXT_GCEX_80003ES2LAN	0x00010000
fp@2586: 
fp@2586: #define DEFAULT_TIPG_IPGT_1000_80003ES2LAN	0x8
fp@2586: #define DEFAULT_TIPG_IPGT_10_100_80003ES2LAN	0x9
fp@2586: 
fp@2586: /* GG82563 PHY Specific Status Register (Page 0, Register 16 */
fp@2586: #define GG82563_PSCR_POLARITY_REVERSAL_DISABLE	0x0002	/* 1=Reversal Dis */
fp@2586: #define GG82563_PSCR_CROSSOVER_MODE_MASK	0x0060
fp@2586: #define GG82563_PSCR_CROSSOVER_MODE_MDI		0x0000	/* 00=Manual MDI */
fp@2586: #define GG82563_PSCR_CROSSOVER_MODE_MDIX	0x0020	/* 01=Manual MDIX */
fp@2586: #define GG82563_PSCR_CROSSOVER_MODE_AUTO	0x0060	/* 11=Auto crossover */
fp@2586: 
fp@2586: /* PHY Specific Control Register 2 (Page 0, Register 26) */
fp@2586: #define GG82563_PSCR2_REVERSE_AUTO_NEG		0x2000	/* 1=Reverse Auto-Neg */
fp@2586: 
fp@2586: /* MAC Specific Control Register (Page 2, Register 21) */
fp@2586: /* Tx clock speed for Link Down and 1000BASE-T for the following speeds */
fp@2586: #define GG82563_MSCR_TX_CLK_MASK		0x0007
fp@2586: #define GG82563_MSCR_TX_CLK_10MBPS_2_5		0x0004
fp@2586: #define GG82563_MSCR_TX_CLK_100MBPS_25		0x0005
fp@2586: #define GG82563_MSCR_TX_CLK_1000MBPS_25		0x0007
fp@2586: 
fp@2586: #define GG82563_MSCR_ASSERT_CRS_ON_TX		0x0010	/* 1=Assert */
fp@2586: 
fp@2586: /* DSP Distance Register (Page 5, Register 26)
fp@2586:  * 0 = <50M
fp@2586:  * 1 = 50-80M
fp@2586:  * 2 = 80-100M
fp@2586:  * 3 = 110-140M
fp@2586:  * 4 = >140M
fp@2586:  */
fp@2586: #define GG82563_DSPD_CABLE_LENGTH		0x0007
fp@2586: 
fp@2586: /* Kumeran Mode Control Register (Page 193, Register 16) */
fp@2586: #define GG82563_KMCR_PASS_FALSE_CARRIER		0x0800
fp@2586: 
fp@2586: /* Max number of times Kumeran read/write should be validated */
fp@2586: #define GG82563_MAX_KMRN_RETRY			0x5
fp@2586: 
fp@2586: /* Power Management Control Register (Page 193, Register 20) */
fp@2586: /* 1=Enable SERDES Electrical Idle */
fp@2586: #define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE	0x0001
fp@2586: 
fp@2586: /* In-Band Control Register (Page 194, Register 18) */
fp@2586: #define GG82563_ICR_DIS_PADDING			0x0010	/* Disable Padding */
fp@2586: 
fp@2586: #endif