fp@667: /******************************************************************************* fp@667: fp@667: fp@667: Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. fp@667: fp@667: This program is free software; you can redistribute it and/or modify it fp@667: under the terms of the GNU General Public License as published by the Free fp@667: Software Foundation; either version 2 of the License, or (at your option) fp@667: any later version. fp@667: fp@667: This program is distributed in the hope that it will be useful, but WITHOUT fp@667: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or fp@667: FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for fp@667: more details. fp@667: fp@667: You should have received a copy of the GNU General Public License along with fp@667: this program; if not, write to the Free Software Foundation, Inc., 59 fp@667: Temple Place - Suite 330, Boston, MA 02111-1307, USA. fp@667: fp@667: The full GNU General Public License is included in this distribution in the fp@667: file called LICENSE. fp@667: fp@667: Contact Information: fp@667: Linux NICS fp@667: e1000-devel Mailing List fp@667: Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 fp@667: fp@667: *******************************************************************************/ fp@667: fp@667: fp@667: /* glue for the OS independent part of e1000 fp@667: * includes register access macros fp@667: */ fp@667: fp@667: #ifndef _E1000_OSDEP_H_ fp@667: #define _E1000_OSDEP_H_ fp@667: fp@667: #include fp@667: #include fp@667: #include fp@667: #include fp@667: #include fp@667: #include fp@667: fp@667: #ifndef msec_delay fp@667: #define msec_delay(x) do { if(in_interrupt()) { \ fp@667: /* Don't mdelay in interrupt context! */ \ fp@667: BUG(); \ fp@667: } else { \ fp@667: msleep(x); \ fp@667: } } while (0) fp@667: fp@667: /* Some workarounds require millisecond delays and are run during interrupt fp@667: * context. Most notably, when establishing link, the phy may need tweaking fp@667: * but cannot process phy register reads/writes faster than millisecond fp@667: * intervals...and we establish link due to a "link status change" interrupt. fp@667: */ fp@667: #define msec_delay_irq(x) mdelay(x) fp@667: #endif fp@667: fp@667: #define PCI_COMMAND_REGISTER PCI_COMMAND fp@667: #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE fp@667: fp@667: typedef enum { fp@667: #undef FALSE fp@667: FALSE = 0, fp@667: #undef TRUE fp@667: TRUE = 1 fp@667: } boolean_t; fp@667: fp@667: #define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B) fp@667: fp@667: #ifdef DBG fp@667: #define DEBUGOUT(S) printk(KERN_DEBUG S "\n") fp@667: #define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A) fp@667: #else fp@667: #define DEBUGOUT(S) fp@667: #define DEBUGOUT1(S, A...) fp@667: #endif fp@667: fp@667: #define DEBUGFUNC(F) DEBUGOUT(F) fp@667: #define DEBUGOUT2 DEBUGOUT1 fp@667: #define DEBUGOUT3 DEBUGOUT2 fp@667: #define DEBUGOUT7 DEBUGOUT3 fp@667: fp@667: fp@667: #define E1000_WRITE_REG(a, reg, value) ( \ fp@667: writel((value), ((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg)))) fp@667: fp@667: #define E1000_READ_REG(a, reg) ( \ fp@667: readl((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg))) fp@667: fp@667: #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \ fp@667: writel((value), ((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@667: ((offset) << 2)))) fp@667: fp@667: #define E1000_READ_REG_ARRAY(a, reg, offset) ( \ fp@667: readl((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@667: ((offset) << 2))) fp@667: fp@667: #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY fp@667: #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY fp@667: fp@667: #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \ fp@667: writew((value), ((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@667: ((offset) << 1)))) fp@667: fp@667: #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \ fp@667: readw((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@667: ((offset) << 1))) fp@667: fp@667: #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \ fp@667: writeb((value), ((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@667: (offset)))) fp@667: fp@667: #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \ fp@667: readb((a)->hw_addr + \ fp@667: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@667: (offset))) fp@667: fp@667: #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS) fp@667: fp@667: #define E1000_WRITE_ICH8_REG(a, reg, value) ( \ fp@667: writel((value), ((a)->flash_address + reg))) fp@667: fp@667: #define E1000_READ_ICH8_REG(a, reg) ( \ fp@667: readl((a)->flash_address + reg)) fp@667: fp@667: #define E1000_WRITE_ICH8_REG16(a, reg, value) ( \ fp@667: writew((value), ((a)->flash_address + reg))) fp@667: fp@667: #define E1000_READ_ICH8_REG16(a, reg) ( \ fp@667: readw((a)->flash_address + reg)) fp@667: fp@667: fp@667: #endif /* _E1000_OSDEP_H_ */