ab@2201: /*******************************************************************************
ab@2201: 
ab@2201:   Intel PRO/100 Linux driver
ab@2201:   Copyright(c) 1999 - 2006 Intel Corporation.
ab@2201: 
ab@2201:   This program is free software; you can redistribute it and/or modify it
ab@2201:   under the terms and conditions of the GNU General Public License,
ab@2201:   version 2, as published by the Free Software Foundation.
ab@2201: 
ab@2201:   This program is distributed in the hope it will be useful, but WITHOUT
ab@2201:   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
ab@2201:   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
ab@2201:   more details.
ab@2201: 
ab@2201:   You should have received a copy of the GNU General Public License along with
ab@2201:   this program; if not, write to the Free Software Foundation, Inc.,
ab@2201:   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
ab@2201: 
ab@2201:   The full GNU General Public License is included in this distribution in
ab@2201:   the file called "COPYING".
ab@2201: 
ab@2201:   Contact Information:
ab@2201:   Linux NICS <linux.nics@intel.com>
ab@2201:   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
ab@2201:   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
ab@2201: 
ab@2201: *******************************************************************************/
ab@2201: 
ab@2201: /*
ab@2201:  *	e100.c: Intel(R) PRO/100 ethernet driver
ab@2201:  *
ab@2201:  *	(Re)written 2003 by scott.feldman@intel.com.  Based loosely on
ab@2201:  *	original e100 driver, but better described as a munging of
ab@2201:  *	e100, e1000, eepro100, tg3, 8139cp, and other drivers.
ab@2201:  *
ab@2201:  *	References:
ab@2201:  *		Intel 8255x 10/100 Mbps Ethernet Controller Family,
ab@2201:  *		Open Source Software Developers Manual,
ab@2201:  *		http://sourceforge.net/projects/e1000
ab@2201:  *
ab@2201:  *
ab@2201:  *	                      Theory of Operation
ab@2201:  *
ab@2201:  *	I.   General
ab@2201:  *
ab@2201:  *	The driver supports Intel(R) 10/100 Mbps PCI Fast Ethernet
ab@2201:  *	controller family, which includes the 82557, 82558, 82559, 82550,
ab@2201:  *	82551, and 82562 devices.  82558 and greater controllers
ab@2201:  *	integrate the Intel 82555 PHY.  The controllers are used in
ab@2201:  *	server and client network interface cards, as well as in
ab@2201:  *	LAN-On-Motherboard (LOM), CardBus, MiniPCI, and ICHx
ab@2201:  *	configurations.  8255x supports a 32-bit linear addressing
ab@2201:  *	mode and operates at 33Mhz PCI clock rate.
ab@2201:  *
ab@2201:  *	II.  Driver Operation
ab@2201:  *
ab@2201:  *	Memory-mapped mode is used exclusively to access the device's
ab@2201:  *	shared-memory structure, the Control/Status Registers (CSR). All
ab@2201:  *	setup, configuration, and control of the device, including queuing
ab@2201:  *	of Tx, Rx, and configuration commands is through the CSR.
ab@2201:  *	cmd_lock serializes accesses to the CSR command register.  cb_lock
ab@2201:  *	protects the shared Command Block List (CBL).
ab@2201:  *
ab@2201:  *	8255x is highly MII-compliant and all access to the PHY go
ab@2201:  *	through the Management Data Interface (MDI).  Consequently, the
ab@2201:  *	driver leverages the mii.c library shared with other MII-compliant
ab@2201:  *	devices.
ab@2201:  *
ab@2201:  *	Big- and Little-Endian byte order as well as 32- and 64-bit
ab@2201:  *	archs are supported.  Weak-ordered memory and non-cache-coherent
ab@2201:  *	archs are supported.
ab@2201:  *
ab@2201:  *	III. Transmit
ab@2201:  *
ab@2201:  *	A Tx skb is mapped and hangs off of a TCB.  TCBs are linked
ab@2201:  *	together in a fixed-size ring (CBL) thus forming the flexible mode
ab@2201:  *	memory structure.  A TCB marked with the suspend-bit indicates
ab@2201:  *	the end of the ring.  The last TCB processed suspends the
ab@2201:  *	controller, and the controller can be restarted by issue a CU
ab@2201:  *	resume command to continue from the suspend point, or a CU start
ab@2201:  *	command to start at a given position in the ring.
ab@2201:  *
ab@2201:  *	Non-Tx commands (config, multicast setup, etc) are linked
ab@2201:  *	into the CBL ring along with Tx commands.  The common structure
ab@2201:  *	used for both Tx and non-Tx commands is the Command Block (CB).
ab@2201:  *
ab@2201:  *	cb_to_use is the next CB to use for queuing a command; cb_to_clean
ab@2201:  *	is the next CB to check for completion; cb_to_send is the first
ab@2201:  *	CB to start on in case of a previous failure to resume.  CB clean
ab@2201:  *	up happens in interrupt context in response to a CU interrupt.
ab@2201:  *	cbs_avail keeps track of number of free CB resources available.
ab@2201:  *
ab@2201:  * 	Hardware padding of short packets to minimum packet size is
ab@2201:  * 	enabled.  82557 pads with 7Eh, while the later controllers pad
ab@2201:  * 	with 00h.
ab@2201:  *
ab@2201:  *	IV.  Receive
ab@2201:  *
ab@2201:  *	The Receive Frame Area (RFA) comprises a ring of Receive Frame
ab@2201:  *	Descriptors (RFD) + data buffer, thus forming the simplified mode
ab@2201:  *	memory structure.  Rx skbs are allocated to contain both the RFD
ab@2201:  *	and the data buffer, but the RFD is pulled off before the skb is
ab@2201:  *	indicated.  The data buffer is aligned such that encapsulated
ab@2201:  *	protocol headers are u32-aligned.  Since the RFD is part of the
ab@2201:  *	mapped shared memory, and completion status is contained within
ab@2201:  *	the RFD, the RFD must be dma_sync'ed to maintain a consistent
ab@2201:  *	view from software and hardware.
ab@2201:  *
ab@2201:  *	In order to keep updates to the RFD link field from colliding with
ab@2201:  *	hardware writes to mark packets complete, we use the feature that
ab@2201:  *	hardware will not write to a size 0 descriptor and mark the previous
ab@2201:  *	packet as end-of-list (EL).   After updating the link, we remove EL
ab@2201:  *	and only then restore the size such that hardware may use the
ab@2201:  *	previous-to-end RFD.
ab@2201:  *
ab@2201:  *	Under typical operation, the  receive unit (RU) is start once,
ab@2201:  *	and the controller happily fills RFDs as frames arrive.  If
ab@2201:  *	replacement RFDs cannot be allocated, or the RU goes non-active,
ab@2201:  *	the RU must be restarted.  Frame arrival generates an interrupt,
ab@2201:  *	and Rx indication and re-allocation happen in the same context,
ab@2201:  *	therefore no locking is required.  A software-generated interrupt
ab@2201:  *	is generated from the watchdog to recover from a failed allocation
ab@2201:  *	scenario where all Rx resources have been indicated and none re-
ab@2201:  *	placed.
ab@2201:  *
ab@2201:  *	V.   Miscellaneous
ab@2201:  *
ab@2201:  * 	VLAN offloading of tagging, stripping and filtering is not
ab@2201:  * 	supported, but driver will accommodate the extra 4-byte VLAN tag
ab@2201:  * 	for processing by upper layers.  Tx/Rx Checksum offloading is not
ab@2201:  * 	supported.  Tx Scatter/Gather is not supported.  Jumbo Frames is
ab@2201:  * 	not supported (hardware limitation).
ab@2201:  *
ab@2201:  * 	MagicPacket(tm) WoL support is enabled/disabled via ethtool.
ab@2201:  *
ab@2201:  * 	Thanks to JC (jchapman@katalix.com) for helping with
ab@2201:  * 	testing/troubleshooting the development driver.
ab@2201:  *
ab@2201:  * 	TODO:
ab@2201:  * 	o several entry points race with dev->close
ab@2201:  * 	o check for tx-no-resources/stop Q races with tx clean/wake Q
ab@2201:  *
ab@2201:  *	FIXES:
ab@2201:  * 2005/12/02 - Michael O'Donnell <Michael.ODonnell at stratus dot com>
ab@2201:  *	- Stratus87247: protect MDI control register manipulations
ab@2201:  * 2009/06/01 - Andreas Mohr <andi at lisas dot de>
ab@2201:  *      - add clean lowlevel I/O emulation for cards with MII-lacking PHYs
ab@2201:  */
ab@2201: 
ab@2201: #include <linux/module.h>
ab@2201: #include <linux/moduleparam.h>
ab@2201: #include <linux/kernel.h>
ab@2201: #include <linux/types.h>
ab@2201: #include <linux/sched.h>
ab@2201: #include <linux/slab.h>
ab@2201: #include <linux/delay.h>
ab@2201: #include <linux/init.h>
ab@2201: #include <linux/pci.h>
ab@2201: #include <linux/dma-mapping.h>
ab@2201: #include <linux/dmapool.h>
ab@2201: #include <linux/netdevice.h>
ab@2201: #include <linux/etherdevice.h>
ab@2201: #include <linux/mii.h>
ab@2201: #include <linux/if_vlan.h>
ab@2201: #include <linux/skbuff.h>
ab@2201: #include <linux/ethtool.h>
ab@2201: #include <linux/string.h>
ab@2201: #include <linux/firmware.h>
ab@2201: #include <asm/unaligned.h>
ab@2201: 
ab@2201: 
ab@2201: #define DRV_NAME		"e100"
ab@2201: #define DRV_EXT			"-NAPI"
ab@2201: #define DRV_VERSION		"3.5.24-k2"DRV_EXT
ab@2201: #define DRV_DESCRIPTION		"Intel(R) PRO/100 Network Driver"
ab@2201: #define DRV_COPYRIGHT		"Copyright(c) 1999-2006 Intel Corporation"
ab@2201: #define PFX			DRV_NAME ": "
ab@2201: 
ab@2201: #define E100_WATCHDOG_PERIOD	(2 * HZ)
ab@2201: #define E100_NAPI_WEIGHT	16
ab@2201: 
ab@2201: #define FIRMWARE_D101M		"e100/d101m_ucode.bin"
ab@2201: #define FIRMWARE_D101S		"e100/d101s_ucode.bin"
ab@2201: #define FIRMWARE_D102E		"e100/d102e_ucode.bin"
ab@2201: 
ab@2201: MODULE_DESCRIPTION(DRV_DESCRIPTION);
ab@2201: MODULE_AUTHOR(DRV_COPYRIGHT);
ab@2201: MODULE_LICENSE("GPL");
ab@2201: MODULE_VERSION(DRV_VERSION);
ab@2201: MODULE_FIRMWARE(FIRMWARE_D101M);
ab@2201: MODULE_FIRMWARE(FIRMWARE_D101S);
ab@2201: MODULE_FIRMWARE(FIRMWARE_D102E);
ab@2201: 
ab@2201: static int debug = 3;
ab@2201: static int eeprom_bad_csum_allow = 0;
ab@2201: static int use_io = 0;
ab@2201: module_param(debug, int, 0);
ab@2201: module_param(eeprom_bad_csum_allow, int, 0);
ab@2201: module_param(use_io, int, 0);
ab@2201: MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
ab@2201: MODULE_PARM_DESC(eeprom_bad_csum_allow, "Allow bad eeprom checksums");
ab@2201: MODULE_PARM_DESC(use_io, "Force use of i/o access mode");
ab@2201: #define DPRINTK(nlevel, klevel, fmt, args...) \
ab@2201: 	(void)((NETIF_MSG_##nlevel & nic->msg_enable) && \
ab@2201: 	printk(KERN_##klevel PFX "%s: %s: " fmt, nic->netdev->name, \
ab@2201: 		__func__ , ## args))
ab@2201: 
ab@2201: #define INTEL_8255X_ETHERNET_DEVICE(device_id, ich) {\
ab@2201: 	PCI_VENDOR_ID_INTEL, device_id, PCI_ANY_ID, PCI_ANY_ID, \
ab@2201: 	PCI_CLASS_NETWORK_ETHERNET << 8, 0xFFFF00, ich }
ab@2201: static struct pci_device_id e100_id_table[] = {
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1029, 0),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1030, 0),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1031, 3),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1032, 3),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1033, 3),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1034, 3),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1038, 3),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1039, 4),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x103A, 4),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x103B, 4),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x103C, 4),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x103D, 4),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x103E, 4),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1050, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1051, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1052, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1053, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1054, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1055, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1056, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1057, 5),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1059, 0),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1064, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1065, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1066, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1067, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1068, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1069, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x106A, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x106B, 6),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1091, 7),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1092, 7),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1093, 7),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1094, 7),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1095, 7),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x10fe, 7),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1209, 0),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x1229, 0),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x2449, 2),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x2459, 2),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x245D, 2),
ab@2201: 	INTEL_8255X_ETHERNET_DEVICE(0x27DC, 7),
ab@2201: 	{ 0, }
ab@2201: };
ab@2201: MODULE_DEVICE_TABLE(pci, e100_id_table);
ab@2201: 
ab@2201: enum mac {
ab@2201: 	mac_82557_D100_A  = 0,
ab@2201: 	mac_82557_D100_B  = 1,
ab@2201: 	mac_82557_D100_C  = 2,
ab@2201: 	mac_82558_D101_A4 = 4,
ab@2201: 	mac_82558_D101_B0 = 5,
ab@2201: 	mac_82559_D101M   = 8,
ab@2201: 	mac_82559_D101S   = 9,
ab@2201: 	mac_82550_D102    = 12,
ab@2201: 	mac_82550_D102_C  = 13,
ab@2201: 	mac_82551_E       = 14,
ab@2201: 	mac_82551_F       = 15,
ab@2201: 	mac_82551_10      = 16,
ab@2201: 	mac_unknown       = 0xFF,
ab@2201: };
ab@2201: 
ab@2201: enum phy {
ab@2201: 	phy_100a     = 0x000003E0,
ab@2201: 	phy_100c     = 0x035002A8,
ab@2201: 	phy_82555_tx = 0x015002A8,
ab@2201: 	phy_nsc_tx   = 0x5C002000,
ab@2201: 	phy_82562_et = 0x033002A8,
ab@2201: 	phy_82562_em = 0x032002A8,
ab@2201: 	phy_82562_ek = 0x031002A8,
ab@2201: 	phy_82562_eh = 0x017002A8,
ab@2201: 	phy_82552_v  = 0xd061004d,
ab@2201: 	phy_unknown  = 0xFFFFFFFF,
ab@2201: };
ab@2201: 
ab@2201: /* CSR (Control/Status Registers) */
ab@2201: struct csr {
ab@2201: 	struct {
ab@2201: 		u8 status;
ab@2201: 		u8 stat_ack;
ab@2201: 		u8 cmd_lo;
ab@2201: 		u8 cmd_hi;
ab@2201: 		u32 gen_ptr;
ab@2201: 	} scb;
ab@2201: 	u32 port;
ab@2201: 	u16 flash_ctrl;
ab@2201: 	u8 eeprom_ctrl_lo;
ab@2201: 	u8 eeprom_ctrl_hi;
ab@2201: 	u32 mdi_ctrl;
ab@2201: 	u32 rx_dma_count;
ab@2201: };
ab@2201: 
ab@2201: enum scb_status {
ab@2201: 	rus_no_res       = 0x08,
ab@2201: 	rus_ready        = 0x10,
ab@2201: 	rus_mask         = 0x3C,
ab@2201: };
ab@2201: 
ab@2201: enum ru_state  {
ab@2201: 	RU_SUSPENDED = 0,
ab@2201: 	RU_RUNNING	 = 1,
ab@2201: 	RU_UNINITIALIZED = -1,
ab@2201: };
ab@2201: 
ab@2201: enum scb_stat_ack {
ab@2201: 	stat_ack_not_ours    = 0x00,
ab@2201: 	stat_ack_sw_gen      = 0x04,
ab@2201: 	stat_ack_rnr         = 0x10,
ab@2201: 	stat_ack_cu_idle     = 0x20,
ab@2201: 	stat_ack_frame_rx    = 0x40,
ab@2201: 	stat_ack_cu_cmd_done = 0x80,
ab@2201: 	stat_ack_not_present = 0xFF,
ab@2201: 	stat_ack_rx = (stat_ack_sw_gen | stat_ack_rnr | stat_ack_frame_rx),
ab@2201: 	stat_ack_tx = (stat_ack_cu_idle | stat_ack_cu_cmd_done),
ab@2201: };
ab@2201: 
ab@2201: enum scb_cmd_hi {
ab@2201: 	irq_mask_none = 0x00,
ab@2201: 	irq_mask_all  = 0x01,
ab@2201: 	irq_sw_gen    = 0x02,
ab@2201: };
ab@2201: 
ab@2201: enum scb_cmd_lo {
ab@2201: 	cuc_nop        = 0x00,
ab@2201: 	ruc_start      = 0x01,
ab@2201: 	ruc_load_base  = 0x06,
ab@2201: 	cuc_start      = 0x10,
ab@2201: 	cuc_resume     = 0x20,
ab@2201: 	cuc_dump_addr  = 0x40,
ab@2201: 	cuc_dump_stats = 0x50,
ab@2201: 	cuc_load_base  = 0x60,
ab@2201: 	cuc_dump_reset = 0x70,
ab@2201: };
ab@2201: 
ab@2201: enum cuc_dump {
ab@2201: 	cuc_dump_complete       = 0x0000A005,
ab@2201: 	cuc_dump_reset_complete = 0x0000A007,
ab@2201: };
ab@2201: 
ab@2201: enum port {
ab@2201: 	software_reset  = 0x0000,
ab@2201: 	selftest        = 0x0001,
ab@2201: 	selective_reset = 0x0002,
ab@2201: };
ab@2201: 
ab@2201: enum eeprom_ctrl_lo {
ab@2201: 	eesk = 0x01,
ab@2201: 	eecs = 0x02,
ab@2201: 	eedi = 0x04,
ab@2201: 	eedo = 0x08,
ab@2201: };
ab@2201: 
ab@2201: enum mdi_ctrl {
ab@2201: 	mdi_write = 0x04000000,
ab@2201: 	mdi_read  = 0x08000000,
ab@2201: 	mdi_ready = 0x10000000,
ab@2201: };
ab@2201: 
ab@2201: enum eeprom_op {
ab@2201: 	op_write = 0x05,
ab@2201: 	op_read  = 0x06,
ab@2201: 	op_ewds  = 0x10,
ab@2201: 	op_ewen  = 0x13,
ab@2201: };
ab@2201: 
ab@2201: enum eeprom_offsets {
ab@2201: 	eeprom_cnfg_mdix  = 0x03,
ab@2201: 	eeprom_phy_iface  = 0x06,
ab@2201: 	eeprom_id         = 0x0A,
ab@2201: 	eeprom_config_asf = 0x0D,
ab@2201: 	eeprom_smbus_addr = 0x90,
ab@2201: };
ab@2201: 
ab@2201: enum eeprom_cnfg_mdix {
ab@2201: 	eeprom_mdix_enabled = 0x0080,
ab@2201: };
ab@2201: 
ab@2201: enum eeprom_phy_iface {
ab@2201: 	NoSuchPhy = 0,
ab@2201: 	I82553AB,
ab@2201: 	I82553C,
ab@2201: 	I82503,
ab@2201: 	DP83840,
ab@2201: 	S80C240,
ab@2201: 	S80C24,
ab@2201: 	I82555,
ab@2201: 	DP83840A = 10,
ab@2201: };
ab@2201: 
ab@2201: enum eeprom_id {
ab@2201: 	eeprom_id_wol = 0x0020,
ab@2201: };
ab@2201: 
ab@2201: enum eeprom_config_asf {
ab@2201: 	eeprom_asf = 0x8000,
ab@2201: 	eeprom_gcl = 0x4000,
ab@2201: };
ab@2201: 
ab@2201: enum cb_status {
ab@2201: 	cb_complete = 0x8000,
ab@2201: 	cb_ok       = 0x2000,
ab@2201: };
ab@2201: 
ab@2201: enum cb_command {
ab@2201: 	cb_nop    = 0x0000,
ab@2201: 	cb_iaaddr = 0x0001,
ab@2201: 	cb_config = 0x0002,
ab@2201: 	cb_multi  = 0x0003,
ab@2201: 	cb_tx     = 0x0004,
ab@2201: 	cb_ucode  = 0x0005,
ab@2201: 	cb_dump   = 0x0006,
ab@2201: 	cb_tx_sf  = 0x0008,
ab@2201: 	cb_cid    = 0x1f00,
ab@2201: 	cb_i      = 0x2000,
ab@2201: 	cb_s      = 0x4000,
ab@2201: 	cb_el     = 0x8000,
ab@2201: };
ab@2201: 
ab@2201: struct rfd {
ab@2201: 	__le16 status;
ab@2201: 	__le16 command;
ab@2201: 	__le32 link;
ab@2201: 	__le32 rbd;
ab@2201: 	__le16 actual_size;
ab@2201: 	__le16 size;
ab@2201: };
ab@2201: 
ab@2201: struct rx {
ab@2201: 	struct rx *next, *prev;
ab@2201: 	struct sk_buff *skb;
ab@2201: 	dma_addr_t dma_addr;
ab@2201: };
ab@2201: 
ab@2201: #if defined(__BIG_ENDIAN_BITFIELD)
ab@2201: #define X(a,b)	b,a
ab@2201: #else
ab@2201: #define X(a,b)	a,b
ab@2201: #endif
ab@2201: struct config {
ab@2201: /*0*/	u8 X(byte_count:6, pad0:2);
ab@2201: /*1*/	u8 X(X(rx_fifo_limit:4, tx_fifo_limit:3), pad1:1);
ab@2201: /*2*/	u8 adaptive_ifs;
ab@2201: /*3*/	u8 X(X(X(X(mwi_enable:1, type_enable:1), read_align_enable:1),
ab@2201: 	   term_write_cache_line:1), pad3:4);
ab@2201: /*4*/	u8 X(rx_dma_max_count:7, pad4:1);
ab@2201: /*5*/	u8 X(tx_dma_max_count:7, dma_max_count_enable:1);
ab@2201: /*6*/	u8 X(X(X(X(X(X(X(late_scb_update:1, direct_rx_dma:1),
ab@2201: 	   tno_intr:1), cna_intr:1), standard_tcb:1), standard_stat_counter:1),
ab@2201: 	   rx_discard_overruns:1), rx_save_bad_frames:1);
ab@2201: /*7*/	u8 X(X(X(X(X(rx_discard_short_frames:1, tx_underrun_retry:2),
ab@2201: 	   pad7:2), rx_extended_rfd:1), tx_two_frames_in_fifo:1),
ab@2201: 	   tx_dynamic_tbd:1);
ab@2201: /*8*/	u8 X(X(mii_mode:1, pad8:6), csma_disabled:1);
ab@2201: /*9*/	u8 X(X(X(X(X(rx_tcpudp_checksum:1, pad9:3), vlan_arp_tco:1),
ab@2201: 	   link_status_wake:1), arp_wake:1), mcmatch_wake:1);
ab@2201: /*10*/	u8 X(X(X(pad10:3, no_source_addr_insertion:1), preamble_length:2),
ab@2201: 	   loopback:2);
ab@2201: /*11*/	u8 X(linear_priority:3, pad11:5);
ab@2201: /*12*/	u8 X(X(linear_priority_mode:1, pad12:3), ifs:4);
ab@2201: /*13*/	u8 ip_addr_lo;
ab@2201: /*14*/	u8 ip_addr_hi;
ab@2201: /*15*/	u8 X(X(X(X(X(X(X(promiscuous_mode:1, broadcast_disabled:1),
ab@2201: 	   wait_after_win:1), pad15_1:1), ignore_ul_bit:1), crc_16_bit:1),
ab@2201: 	   pad15_2:1), crs_or_cdt:1);
ab@2201: /*16*/	u8 fc_delay_lo;
ab@2201: /*17*/	u8 fc_delay_hi;
ab@2201: /*18*/	u8 X(X(X(X(X(rx_stripping:1, tx_padding:1), rx_crc_transfer:1),
ab@2201: 	   rx_long_ok:1), fc_priority_threshold:3), pad18:1);
ab@2201: /*19*/	u8 X(X(X(X(X(X(X(addr_wake:1, magic_packet_disable:1),
ab@2201: 	   fc_disable:1), fc_restop:1), fc_restart:1), fc_reject:1),
ab@2201: 	   full_duplex_force:1), full_duplex_pin:1);
ab@2201: /*20*/	u8 X(X(X(pad20_1:5, fc_priority_location:1), multi_ia:1), pad20_2:1);
ab@2201: /*21*/	u8 X(X(pad21_1:3, multicast_all:1), pad21_2:4);
ab@2201: /*22*/	u8 X(X(rx_d102_mode:1, rx_vlan_drop:1), pad22:6);
ab@2201: 	u8 pad_d102[9];
ab@2201: };
ab@2201: 
ab@2201: #define E100_MAX_MULTICAST_ADDRS	64
ab@2201: struct multi {
ab@2201: 	__le16 count;
ab@2201: 	u8 addr[E100_MAX_MULTICAST_ADDRS * ETH_ALEN + 2/*pad*/];
ab@2201: };
ab@2201: 
ab@2201: /* Important: keep total struct u32-aligned */
ab@2201: #define UCODE_SIZE			134
ab@2201: struct cb {
ab@2201: 	__le16 status;
ab@2201: 	__le16 command;
ab@2201: 	__le32 link;
ab@2201: 	union {
ab@2201: 		u8 iaaddr[ETH_ALEN];
ab@2201: 		__le32 ucode[UCODE_SIZE];
ab@2201: 		struct config config;
ab@2201: 		struct multi multi;
ab@2201: 		struct {
ab@2201: 			u32 tbd_array;
ab@2201: 			u16 tcb_byte_count;
ab@2201: 			u8 threshold;
ab@2201: 			u8 tbd_count;
ab@2201: 			struct {
ab@2201: 				__le32 buf_addr;
ab@2201: 				__le16 size;
ab@2201: 				u16 eol;
ab@2201: 			} tbd;
ab@2201: 		} tcb;
ab@2201: 		__le32 dump_buffer_addr;
ab@2201: 	} u;
ab@2201: 	struct cb *next, *prev;
ab@2201: 	dma_addr_t dma_addr;
ab@2201: 	struct sk_buff *skb;
ab@2201: };
ab@2201: 
ab@2201: enum loopback {
ab@2201: 	lb_none = 0, lb_mac = 1, lb_phy = 3,
ab@2201: };
ab@2201: 
ab@2201: struct stats {
ab@2201: 	__le32 tx_good_frames, tx_max_collisions, tx_late_collisions,
ab@2201: 		tx_underruns, tx_lost_crs, tx_deferred, tx_single_collisions,
ab@2201: 		tx_multiple_collisions, tx_total_collisions;
ab@2201: 	__le32 rx_good_frames, rx_crc_errors, rx_alignment_errors,
ab@2201: 		rx_resource_errors, rx_overrun_errors, rx_cdt_errors,
ab@2201: 		rx_short_frame_errors;
ab@2201: 	__le32 fc_xmt_pause, fc_rcv_pause, fc_rcv_unsupported;
ab@2201: 	__le16 xmt_tco_frames, rcv_tco_frames;
ab@2201: 	__le32 complete;
ab@2201: };
ab@2201: 
ab@2201: struct mem {
ab@2201: 	struct {
ab@2201: 		u32 signature;
ab@2201: 		u32 result;
ab@2201: 	} selftest;
ab@2201: 	struct stats stats;
ab@2201: 	u8 dump_buf[596];
ab@2201: };
ab@2201: 
ab@2201: struct param_range {
ab@2201: 	u32 min;
ab@2201: 	u32 max;
ab@2201: 	u32 count;
ab@2201: };
ab@2201: 
ab@2201: struct params {
ab@2201: 	struct param_range rfds;
ab@2201: 	struct param_range cbs;
ab@2201: };
ab@2201: 
ab@2201: struct nic {
ab@2201: 	/* Begin: frequently used values: keep adjacent for cache effect */
ab@2201: 	u32 msg_enable				____cacheline_aligned;
ab@2201: 	struct net_device *netdev;
ab@2201: 	struct pci_dev *pdev;
ab@2201: 	u16 (*mdio_ctrl)(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data);
ab@2201: 
ab@2201: 	struct rx *rxs				____cacheline_aligned;
ab@2201: 	struct rx *rx_to_use;
ab@2201: 	struct rx *rx_to_clean;
ab@2201: 	struct rfd blank_rfd;
ab@2201: 	enum ru_state ru_running;
ab@2201: 
ab@2201: 	spinlock_t cb_lock			____cacheline_aligned;
ab@2201: 	spinlock_t cmd_lock;
ab@2201: 	struct csr __iomem *csr;
ab@2201: 	enum scb_cmd_lo cuc_cmd;
ab@2201: 	unsigned int cbs_avail;
ab@2201: 	struct napi_struct napi;
ab@2201: 	struct cb *cbs;
ab@2201: 	struct cb *cb_to_use;
ab@2201: 	struct cb *cb_to_send;
ab@2201: 	struct cb *cb_to_clean;
ab@2201: 	__le16 tx_command;
ab@2201: 	/* End: frequently used values: keep adjacent for cache effect */
ab@2201: 
ab@2201: 	enum {
ab@2201: 		ich                = (1 << 0),
ab@2201: 		promiscuous        = (1 << 1),
ab@2201: 		multicast_all      = (1 << 2),
ab@2201: 		wol_magic          = (1 << 3),
ab@2201: 		ich_10h_workaround = (1 << 4),
ab@2201: 	} flags					____cacheline_aligned;
ab@2201: 
ab@2201: 	enum mac mac;
ab@2201: 	enum phy phy;
ab@2201: 	struct params params;
ab@2201: 	struct timer_list watchdog;
ab@2201: 	struct timer_list blink_timer;
ab@2201: 	struct mii_if_info mii;
ab@2201: 	struct work_struct tx_timeout_task;
ab@2201: 	enum loopback loopback;
ab@2201: 
ab@2201: 	struct mem *mem;
ab@2201: 	dma_addr_t dma_addr;
ab@2201: 
ab@2201: 	struct pci_pool *cbs_pool;
ab@2201: 	dma_addr_t cbs_dma_addr;
ab@2201: 	u8 adaptive_ifs;
ab@2201: 	u8 tx_threshold;
ab@2201: 	u32 tx_frames;
ab@2201: 	u32 tx_collisions;
ab@2201: 	u32 tx_deferred;
ab@2201: 	u32 tx_single_collisions;
ab@2201: 	u32 tx_multiple_collisions;
ab@2201: 	u32 tx_fc_pause;
ab@2201: 	u32 tx_tco_frames;
ab@2201: 
ab@2201: 	u32 rx_fc_pause;
ab@2201: 	u32 rx_fc_unsupported;
ab@2201: 	u32 rx_tco_frames;
ab@2201: 	u32 rx_over_length_errors;
ab@2201: 
ab@2201: 	u16 leds;
ab@2201: 	u16 eeprom_wc;
ab@2201: 	__le16 eeprom[256];
ab@2201: 	spinlock_t mdio_lock;
ab@2201: 	const struct firmware *fw;
ab@2201: };
ab@2201: 
ab@2201: static inline void e100_write_flush(struct nic *nic)
ab@2201: {
ab@2201: 	/* Flush previous PCI writes through intermediate bridges
ab@2201: 	 * by doing a benign read */
ab@2201: 	(void)ioread8(&nic->csr->scb.status);
ab@2201: }
ab@2201: 
ab@2201: static void e100_enable_irq(struct nic *nic)
ab@2201: {
ab@2201: 	unsigned long flags;
ab@2201: 
ab@2201: 	spin_lock_irqsave(&nic->cmd_lock, flags);
ab@2201: 	iowrite8(irq_mask_none, &nic->csr->scb.cmd_hi);
ab@2201: 	e100_write_flush(nic);
ab@2201: 	spin_unlock_irqrestore(&nic->cmd_lock, flags);
ab@2201: }
ab@2201: 
ab@2201: static void e100_disable_irq(struct nic *nic)
ab@2201: {
ab@2201: 	unsigned long flags;
ab@2201: 
ab@2201: 	spin_lock_irqsave(&nic->cmd_lock, flags);
ab@2201: 	iowrite8(irq_mask_all, &nic->csr->scb.cmd_hi);
ab@2201: 	e100_write_flush(nic);
ab@2201: 	spin_unlock_irqrestore(&nic->cmd_lock, flags);
ab@2201: }
ab@2201: 
ab@2201: static void e100_hw_reset(struct nic *nic)
ab@2201: {
ab@2201: 	/* Put CU and RU into idle with a selective reset to get
ab@2201: 	 * device off of PCI bus */
ab@2201: 	iowrite32(selective_reset, &nic->csr->port);
ab@2201: 	e100_write_flush(nic); udelay(20);
ab@2201: 
ab@2201: 	/* Now fully reset device */
ab@2201: 	iowrite32(software_reset, &nic->csr->port);
ab@2201: 	e100_write_flush(nic); udelay(20);
ab@2201: 
ab@2201: 	/* Mask off our interrupt line - it's unmasked after reset */
ab@2201: 	e100_disable_irq(nic);
ab@2201: }
ab@2201: 
ab@2201: static int e100_self_test(struct nic *nic)
ab@2201: {
ab@2201: 	u32 dma_addr = nic->dma_addr + offsetof(struct mem, selftest);
ab@2201: 
ab@2201: 	/* Passing the self-test is a pretty good indication
ab@2201: 	 * that the device can DMA to/from host memory */
ab@2201: 
ab@2201: 	nic->mem->selftest.signature = 0;
ab@2201: 	nic->mem->selftest.result = 0xFFFFFFFF;
ab@2201: 
ab@2201: 	iowrite32(selftest | dma_addr, &nic->csr->port);
ab@2201: 	e100_write_flush(nic);
ab@2201: 	/* Wait 10 msec for self-test to complete */
ab@2201: 	msleep(10);
ab@2201: 
ab@2201: 	/* Interrupts are enabled after self-test */
ab@2201: 	e100_disable_irq(nic);
ab@2201: 
ab@2201: 	/* Check results of self-test */
ab@2201: 	if (nic->mem->selftest.result != 0) {
ab@2201: 		DPRINTK(HW, ERR, "Self-test failed: result=0x%08X\n",
ab@2201: 			nic->mem->selftest.result);
ab@2201: 		return -ETIMEDOUT;
ab@2201: 	}
ab@2201: 	if (nic->mem->selftest.signature == 0) {
ab@2201: 		DPRINTK(HW, ERR, "Self-test failed: timed out\n");
ab@2201: 		return -ETIMEDOUT;
ab@2201: 	}
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static void e100_eeprom_write(struct nic *nic, u16 addr_len, u16 addr, __le16 data)
ab@2201: {
ab@2201: 	u32 cmd_addr_data[3];
ab@2201: 	u8 ctrl;
ab@2201: 	int i, j;
ab@2201: 
ab@2201: 	/* Three cmds: write/erase enable, write data, write/erase disable */
ab@2201: 	cmd_addr_data[0] = op_ewen << (addr_len - 2);
ab@2201: 	cmd_addr_data[1] = (((op_write << addr_len) | addr) << 16) |
ab@2201: 		le16_to_cpu(data);
ab@2201: 	cmd_addr_data[2] = op_ewds << (addr_len - 2);
ab@2201: 
ab@2201: 	/* Bit-bang cmds to write word to eeprom */
ab@2201: 	for (j = 0; j < 3; j++) {
ab@2201: 
ab@2201: 		/* Chip select */
ab@2201: 		iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
ab@2201: 		e100_write_flush(nic); udelay(4);
ab@2201: 
ab@2201: 		for (i = 31; i >= 0; i--) {
ab@2201: 			ctrl = (cmd_addr_data[j] & (1 << i)) ?
ab@2201: 				eecs | eedi : eecs;
ab@2201: 			iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
ab@2201: 			e100_write_flush(nic); udelay(4);
ab@2201: 
ab@2201: 			iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
ab@2201: 			e100_write_flush(nic); udelay(4);
ab@2201: 		}
ab@2201: 		/* Wait 10 msec for cmd to complete */
ab@2201: 		msleep(10);
ab@2201: 
ab@2201: 		/* Chip deselect */
ab@2201: 		iowrite8(0, &nic->csr->eeprom_ctrl_lo);
ab@2201: 		e100_write_flush(nic); udelay(4);
ab@2201: 	}
ab@2201: };
ab@2201: 
ab@2201: /* General technique stolen from the eepro100 driver - very clever */
ab@2201: static __le16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr)
ab@2201: {
ab@2201: 	u32 cmd_addr_data;
ab@2201: 	u16 data = 0;
ab@2201: 	u8 ctrl;
ab@2201: 	int i;
ab@2201: 
ab@2201: 	cmd_addr_data = ((op_read << *addr_len) | addr) << 16;
ab@2201: 
ab@2201: 	/* Chip select */
ab@2201: 	iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
ab@2201: 	e100_write_flush(nic); udelay(4);
ab@2201: 
ab@2201: 	/* Bit-bang to read word from eeprom */
ab@2201: 	for (i = 31; i >= 0; i--) {
ab@2201: 		ctrl = (cmd_addr_data & (1 << i)) ? eecs | eedi : eecs;
ab@2201: 		iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo);
ab@2201: 		e100_write_flush(nic); udelay(4);
ab@2201: 
ab@2201: 		iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
ab@2201: 		e100_write_flush(nic); udelay(4);
ab@2201: 
ab@2201: 		/* Eeprom drives a dummy zero to EEDO after receiving
ab@2201: 		 * complete address.  Use this to adjust addr_len. */
ab@2201: 		ctrl = ioread8(&nic->csr->eeprom_ctrl_lo);
ab@2201: 		if (!(ctrl & eedo) && i > 16) {
ab@2201: 			*addr_len -= (i - 16);
ab@2201: 			i = 17;
ab@2201: 		}
ab@2201: 
ab@2201: 		data = (data << 1) | (ctrl & eedo ? 1 : 0);
ab@2201: 	}
ab@2201: 
ab@2201: 	/* Chip deselect */
ab@2201: 	iowrite8(0, &nic->csr->eeprom_ctrl_lo);
ab@2201: 	e100_write_flush(nic); udelay(4);
ab@2201: 
ab@2201: 	return cpu_to_le16(data);
ab@2201: };
ab@2201: 
ab@2201: /* Load entire EEPROM image into driver cache and validate checksum */
ab@2201: static int e100_eeprom_load(struct nic *nic)
ab@2201: {
ab@2201: 	u16 addr, addr_len = 8, checksum = 0;
ab@2201: 
ab@2201: 	/* Try reading with an 8-bit addr len to discover actual addr len */
ab@2201: 	e100_eeprom_read(nic, &addr_len, 0);
ab@2201: 	nic->eeprom_wc = 1 << addr_len;
ab@2201: 
ab@2201: 	for (addr = 0; addr < nic->eeprom_wc; addr++) {
ab@2201: 		nic->eeprom[addr] = e100_eeprom_read(nic, &addr_len, addr);
ab@2201: 		if (addr < nic->eeprom_wc - 1)
ab@2201: 			checksum += le16_to_cpu(nic->eeprom[addr]);
ab@2201: 	}
ab@2201: 
ab@2201: 	/* The checksum, stored in the last word, is calculated such that
ab@2201: 	 * the sum of words should be 0xBABA */
ab@2201: 	if (cpu_to_le16(0xBABA - checksum) != nic->eeprom[nic->eeprom_wc - 1]) {
ab@2201: 		DPRINTK(PROBE, ERR, "EEPROM corrupted\n");
ab@2201: 		if (!eeprom_bad_csum_allow)
ab@2201: 			return -EAGAIN;
ab@2201: 	}
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: /* Save (portion of) driver EEPROM cache to device and update checksum */
ab@2201: static int e100_eeprom_save(struct nic *nic, u16 start, u16 count)
ab@2201: {
ab@2201: 	u16 addr, addr_len = 8, checksum = 0;
ab@2201: 
ab@2201: 	/* Try reading with an 8-bit addr len to discover actual addr len */
ab@2201: 	e100_eeprom_read(nic, &addr_len, 0);
ab@2201: 	nic->eeprom_wc = 1 << addr_len;
ab@2201: 
ab@2201: 	if (start + count >= nic->eeprom_wc)
ab@2201: 		return -EINVAL;
ab@2201: 
ab@2201: 	for (addr = start; addr < start + count; addr++)
ab@2201: 		e100_eeprom_write(nic, addr_len, addr, nic->eeprom[addr]);
ab@2201: 
ab@2201: 	/* The checksum, stored in the last word, is calculated such that
ab@2201: 	 * the sum of words should be 0xBABA */
ab@2201: 	for (addr = 0; addr < nic->eeprom_wc - 1; addr++)
ab@2201: 		checksum += le16_to_cpu(nic->eeprom[addr]);
ab@2201: 	nic->eeprom[nic->eeprom_wc - 1] = cpu_to_le16(0xBABA - checksum);
ab@2201: 	e100_eeprom_write(nic, addr_len, nic->eeprom_wc - 1,
ab@2201: 		nic->eeprom[nic->eeprom_wc - 1]);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: #define E100_WAIT_SCB_TIMEOUT 20000 /* we might have to wait 100ms!!! */
ab@2201: #define E100_WAIT_SCB_FAST 20       /* delay like the old code */
ab@2201: static int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr)
ab@2201: {
ab@2201: 	unsigned long flags;
ab@2201: 	unsigned int i;
ab@2201: 	int err = 0;
ab@2201: 
ab@2201: 	spin_lock_irqsave(&nic->cmd_lock, flags);
ab@2201: 
ab@2201: 	/* Previous command is accepted when SCB clears */
ab@2201: 	for (i = 0; i < E100_WAIT_SCB_TIMEOUT; i++) {
ab@2201: 		if (likely(!ioread8(&nic->csr->scb.cmd_lo)))
ab@2201: 			break;
ab@2201: 		cpu_relax();
ab@2201: 		if (unlikely(i > E100_WAIT_SCB_FAST))
ab@2201: 			udelay(5);
ab@2201: 	}
ab@2201: 	if (unlikely(i == E100_WAIT_SCB_TIMEOUT)) {
ab@2201: 		err = -EAGAIN;
ab@2201: 		goto err_unlock;
ab@2201: 	}
ab@2201: 
ab@2201: 	if (unlikely(cmd != cuc_resume))
ab@2201: 		iowrite32(dma_addr, &nic->csr->scb.gen_ptr);
ab@2201: 	iowrite8(cmd, &nic->csr->scb.cmd_lo);
ab@2201: 
ab@2201: err_unlock:
ab@2201: 	spin_unlock_irqrestore(&nic->cmd_lock, flags);
ab@2201: 
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
ab@2201: 	void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
ab@2201: {
ab@2201: 	struct cb *cb;
ab@2201: 	unsigned long flags;
ab@2201: 	int err = 0;
ab@2201: 
ab@2201: 	spin_lock_irqsave(&nic->cb_lock, flags);
ab@2201: 
ab@2201: 	if (unlikely(!nic->cbs_avail)) {
ab@2201: 		err = -ENOMEM;
ab@2201: 		goto err_unlock;
ab@2201: 	}
ab@2201: 
ab@2201: 	cb = nic->cb_to_use;
ab@2201: 	nic->cb_to_use = cb->next;
ab@2201: 	nic->cbs_avail--;
ab@2201: 	cb->skb = skb;
ab@2201: 
ab@2201: 	if (unlikely(!nic->cbs_avail))
ab@2201: 		err = -ENOSPC;
ab@2201: 
ab@2201: 	cb_prepare(nic, cb, skb);
ab@2201: 
ab@2201: 	/* Order is important otherwise we'll be in a race with h/w:
ab@2201: 	 * set S-bit in current first, then clear S-bit in previous. */
ab@2201: 	cb->command |= cpu_to_le16(cb_s);
ab@2201: 	wmb();
ab@2201: 	cb->prev->command &= cpu_to_le16(~cb_s);
ab@2201: 
ab@2201: 	while (nic->cb_to_send != nic->cb_to_use) {
ab@2201: 		if (unlikely(e100_exec_cmd(nic, nic->cuc_cmd,
ab@2201: 			nic->cb_to_send->dma_addr))) {
ab@2201: 			/* Ok, here's where things get sticky.  It's
ab@2201: 			 * possible that we can't schedule the command
ab@2201: 			 * because the controller is too busy, so
ab@2201: 			 * let's just queue the command and try again
ab@2201: 			 * when another command is scheduled. */
ab@2201: 			if (err == -ENOSPC) {
ab@2201: 				//request a reset
ab@2201: 				schedule_work(&nic->tx_timeout_task);
ab@2201: 			}
ab@2201: 			break;
ab@2201: 		} else {
ab@2201: 			nic->cuc_cmd = cuc_resume;
ab@2201: 			nic->cb_to_send = nic->cb_to_send->next;
ab@2201: 		}
ab@2201: 	}
ab@2201: 
ab@2201: err_unlock:
ab@2201: 	spin_unlock_irqrestore(&nic->cb_lock, flags);
ab@2201: 
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: static int mdio_read(struct net_device *netdev, int addr, int reg)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	return nic->mdio_ctrl(nic, addr, mdi_read, reg, 0);
ab@2201: }
ab@2201: 
ab@2201: static void mdio_write(struct net_device *netdev, int addr, int reg, int data)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	nic->mdio_ctrl(nic, addr, mdi_write, reg, data);
ab@2201: }
ab@2201: 
ab@2201: /* the standard mdio_ctrl() function for usual MII-compliant hardware */
ab@2201: static u16 mdio_ctrl_hw(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data)
ab@2201: {
ab@2201: 	u32 data_out = 0;
ab@2201: 	unsigned int i;
ab@2201: 	unsigned long flags;
ab@2201: 
ab@2201: 
ab@2201: 	/*
ab@2201: 	 * Stratus87247: we shouldn't be writing the MDI control
ab@2201: 	 * register until the Ready bit shows True.  Also, since
ab@2201: 	 * manipulation of the MDI control registers is a multi-step
ab@2201: 	 * procedure it should be done under lock.
ab@2201: 	 */
ab@2201: 	spin_lock_irqsave(&nic->mdio_lock, flags);
ab@2201: 	for (i = 100; i; --i) {
ab@2201: 		if (ioread32(&nic->csr->mdi_ctrl) & mdi_ready)
ab@2201: 			break;
ab@2201: 		udelay(20);
ab@2201: 	}
ab@2201: 	if (unlikely(!i)) {
ab@2201: 		printk("e100.mdio_ctrl(%s) won't go Ready\n",
ab@2201: 			nic->netdev->name );
ab@2201: 		spin_unlock_irqrestore(&nic->mdio_lock, flags);
ab@2201: 		return 0;		/* No way to indicate timeout error */
ab@2201: 	}
ab@2201: 	iowrite32((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl);
ab@2201: 
ab@2201: 	for (i = 0; i < 100; i++) {
ab@2201: 		udelay(20);
ab@2201: 		if ((data_out = ioread32(&nic->csr->mdi_ctrl)) & mdi_ready)
ab@2201: 			break;
ab@2201: 	}
ab@2201: 	spin_unlock_irqrestore(&nic->mdio_lock, flags);
ab@2201: 	DPRINTK(HW, DEBUG,
ab@2201: 		"%s:addr=%d, reg=%d, data_in=0x%04X, data_out=0x%04X\n",
ab@2201: 		dir == mdi_read ? "READ" : "WRITE", addr, reg, data, data_out);
ab@2201: 	return (u16)data_out;
ab@2201: }
ab@2201: 
ab@2201: /* slightly tweaked mdio_ctrl() function for phy_82552_v specifics */
ab@2201: static u16 mdio_ctrl_phy_82552_v(struct nic *nic,
ab@2201: 				 u32 addr,
ab@2201: 				 u32 dir,
ab@2201: 				 u32 reg,
ab@2201: 				 u16 data)
ab@2201: {
ab@2201: 	if ((reg == MII_BMCR) && (dir == mdi_write)) {
ab@2201: 		if (data & (BMCR_ANRESTART | BMCR_ANENABLE)) {
ab@2201: 			u16 advert = mdio_read(nic->netdev, nic->mii.phy_id,
ab@2201: 							MII_ADVERTISE);
ab@2201: 
ab@2201: 			/*
ab@2201: 			 * Workaround Si issue where sometimes the part will not
ab@2201: 			 * autoneg to 100Mbps even when advertised.
ab@2201: 			 */
ab@2201: 			if (advert & ADVERTISE_100FULL)
ab@2201: 				data |= BMCR_SPEED100 | BMCR_FULLDPLX;
ab@2201: 			else if (advert & ADVERTISE_100HALF)
ab@2201: 				data |= BMCR_SPEED100;
ab@2201: 		}
ab@2201: 	}
ab@2201: 	return mdio_ctrl_hw(nic, addr, dir, reg, data);
ab@2201: }
ab@2201: 
ab@2201: /* Fully software-emulated mdio_ctrl() function for cards without
ab@2201:  * MII-compliant PHYs.
ab@2201:  * For now, this is mainly geared towards 80c24 support; in case of further
ab@2201:  * requirements for other types (i82503, ...?) either extend this mechanism
ab@2201:  * or split it, whichever is cleaner.
ab@2201:  */
ab@2201: static u16 mdio_ctrl_phy_mii_emulated(struct nic *nic,
ab@2201: 				      u32 addr,
ab@2201: 				      u32 dir,
ab@2201: 				      u32 reg,
ab@2201: 				      u16 data)
ab@2201: {
ab@2201: 	/* might need to allocate a netdev_priv'ed register array eventually
ab@2201: 	 * to be able to record state changes, but for now
ab@2201: 	 * some fully hardcoded register handling ought to be ok I guess. */
ab@2201: 
ab@2201: 	if (dir == mdi_read) {
ab@2201: 		switch (reg) {
ab@2201: 		case MII_BMCR:
ab@2201: 			/* Auto-negotiation, right? */
ab@2201: 			return  BMCR_ANENABLE |
ab@2201: 				BMCR_FULLDPLX;
ab@2201: 		case MII_BMSR:
ab@2201: 			return	BMSR_LSTATUS /* for mii_link_ok() */ |
ab@2201: 				BMSR_ANEGCAPABLE |
ab@2201: 				BMSR_10FULL;
ab@2201: 		case MII_ADVERTISE:
ab@2201: 			/* 80c24 is a "combo card" PHY, right? */
ab@2201: 			return	ADVERTISE_10HALF |
ab@2201: 				ADVERTISE_10FULL;
ab@2201: 		default:
ab@2201: 			DPRINTK(HW, DEBUG,
ab@2201: 		"%s:addr=%d, reg=%d, data=0x%04X: unimplemented emulation!\n",
ab@2201: 		dir == mdi_read ? "READ" : "WRITE", addr, reg, data);
ab@2201: 			return 0xFFFF;
ab@2201: 		}
ab@2201: 	} else {
ab@2201: 		switch (reg) {
ab@2201: 		default:
ab@2201: 			DPRINTK(HW, DEBUG,
ab@2201: 		"%s:addr=%d, reg=%d, data=0x%04X: unimplemented emulation!\n",
ab@2201: 		dir == mdi_read ? "READ" : "WRITE", addr, reg, data);
ab@2201: 			return 0xFFFF;
ab@2201: 		}
ab@2201: 	}
ab@2201: }
ab@2201: static inline int e100_phy_supports_mii(struct nic *nic)
ab@2201: {
ab@2201: 	/* for now, just check it by comparing whether we
ab@2201: 	   are using MII software emulation.
ab@2201: 	*/
ab@2201: 	return (nic->mdio_ctrl != mdio_ctrl_phy_mii_emulated);
ab@2201: }
ab@2201: 
ab@2201: static void e100_get_defaults(struct nic *nic)
ab@2201: {
ab@2201: 	struct param_range rfds = { .min = 16, .max = 256, .count = 256 };
ab@2201: 	struct param_range cbs  = { .min = 64, .max = 256, .count = 128 };
ab@2201: 
ab@2201: 	/* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */
ab@2201: 	nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->pdev->revision;
ab@2201: 	if (nic->mac == mac_unknown)
ab@2201: 		nic->mac = mac_82557_D100_A;
ab@2201: 
ab@2201: 	nic->params.rfds = rfds;
ab@2201: 	nic->params.cbs = cbs;
ab@2201: 
ab@2201: 	/* Quadwords to DMA into FIFO before starting frame transmit */
ab@2201: 	nic->tx_threshold = 0xE0;
ab@2201: 
ab@2201: 	/* no interrupt for every tx completion, delay = 256us if not 557 */
ab@2201: 	nic->tx_command = cpu_to_le16(cb_tx | cb_tx_sf |
ab@2201: 		((nic->mac >= mac_82558_D101_A4) ? cb_cid : cb_i));
ab@2201: 
ab@2201: 	/* Template for a freshly allocated RFD */
ab@2201: 	nic->blank_rfd.command = 0;
ab@2201: 	nic->blank_rfd.rbd = cpu_to_le32(0xFFFFFFFF);
ab@2201: 	nic->blank_rfd.size = cpu_to_le16(VLAN_ETH_FRAME_LEN);
ab@2201: 
ab@2201: 	/* MII setup */
ab@2201: 	nic->mii.phy_id_mask = 0x1F;
ab@2201: 	nic->mii.reg_num_mask = 0x1F;
ab@2201: 	nic->mii.dev = nic->netdev;
ab@2201: 	nic->mii.mdio_read = mdio_read;
ab@2201: 	nic->mii.mdio_write = mdio_write;
ab@2201: }
ab@2201: 
ab@2201: static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
ab@2201: {
ab@2201: 	struct config *config = &cb->u.config;
ab@2201: 	u8 *c = (u8 *)config;
ab@2201: 
ab@2201: 	cb->command = cpu_to_le16(cb_config);
ab@2201: 
ab@2201: 	memset(config, 0, sizeof(struct config));
ab@2201: 
ab@2201: 	config->byte_count = 0x16;		/* bytes in this struct */
ab@2201: 	config->rx_fifo_limit = 0x8;		/* bytes in FIFO before DMA */
ab@2201: 	config->direct_rx_dma = 0x1;		/* reserved */
ab@2201: 	config->standard_tcb = 0x1;		/* 1=standard, 0=extended */
ab@2201: 	config->standard_stat_counter = 0x1;	/* 1=standard, 0=extended */
ab@2201: 	config->rx_discard_short_frames = 0x1;	/* 1=discard, 0=pass */
ab@2201: 	config->tx_underrun_retry = 0x3;	/* # of underrun retries */
ab@2201: 	if (e100_phy_supports_mii(nic))
ab@2201: 		config->mii_mode = 1;           /* 1=MII mode, 0=i82503 mode */
ab@2201: 	config->pad10 = 0x6;
ab@2201: 	config->no_source_addr_insertion = 0x1;	/* 1=no, 0=yes */
ab@2201: 	config->preamble_length = 0x2;		/* 0=1, 1=3, 2=7, 3=15 bytes */
ab@2201: 	config->ifs = 0x6;			/* x16 = inter frame spacing */
ab@2201: 	config->ip_addr_hi = 0xF2;		/* ARP IP filter - not used */
ab@2201: 	config->pad15_1 = 0x1;
ab@2201: 	config->pad15_2 = 0x1;
ab@2201: 	config->crs_or_cdt = 0x0;		/* 0=CRS only, 1=CRS or CDT */
ab@2201: 	config->fc_delay_hi = 0x40;		/* time delay for fc frame */
ab@2201: 	config->tx_padding = 0x1;		/* 1=pad short frames */
ab@2201: 	config->fc_priority_threshold = 0x7;	/* 7=priority fc disabled */
ab@2201: 	config->pad18 = 0x1;
ab@2201: 	config->full_duplex_pin = 0x1;		/* 1=examine FDX# pin */
ab@2201: 	config->pad20_1 = 0x1F;
ab@2201: 	config->fc_priority_location = 0x1;	/* 1=byte#31, 0=byte#19 */
ab@2201: 	config->pad21_1 = 0x5;
ab@2201: 
ab@2201: 	config->adaptive_ifs = nic->adaptive_ifs;
ab@2201: 	config->loopback = nic->loopback;
ab@2201: 
ab@2201: 	if (nic->mii.force_media && nic->mii.full_duplex)
ab@2201: 		config->full_duplex_force = 0x1;	/* 1=force, 0=auto */
ab@2201: 
ab@2201: 	if (nic->flags & promiscuous || nic->loopback) {
ab@2201: 		config->rx_save_bad_frames = 0x1;	/* 1=save, 0=discard */
ab@2201: 		config->rx_discard_short_frames = 0x0;	/* 1=discard, 0=save */
ab@2201: 		config->promiscuous_mode = 0x1;		/* 1=on, 0=off */
ab@2201: 	}
ab@2201: 
ab@2201: 	if (nic->flags & multicast_all)
ab@2201: 		config->multicast_all = 0x1;		/* 1=accept, 0=no */
ab@2201: 
ab@2201: 	/* disable WoL when up */
ab@2201: 	if (netif_running(nic->netdev) || !(nic->flags & wol_magic))
ab@2201: 		config->magic_packet_disable = 0x1;	/* 1=off, 0=on */
ab@2201: 
ab@2201: 	if (nic->mac >= mac_82558_D101_A4) {
ab@2201: 		config->fc_disable = 0x1;	/* 1=Tx fc off, 0=Tx fc on */
ab@2201: 		config->mwi_enable = 0x1;	/* 1=enable, 0=disable */
ab@2201: 		config->standard_tcb = 0x0;	/* 1=standard, 0=extended */
ab@2201: 		config->rx_long_ok = 0x1;	/* 1=VLANs ok, 0=standard */
ab@2201: 		if (nic->mac >= mac_82559_D101M) {
ab@2201: 			config->tno_intr = 0x1;		/* TCO stats enable */
ab@2201: 			/* Enable TCO in extended config */
ab@2201: 			if (nic->mac >= mac_82551_10) {
ab@2201: 				config->byte_count = 0x20; /* extended bytes */
ab@2201: 				config->rx_d102_mode = 0x1; /* GMRC for TCO */
ab@2201: 			}
ab@2201: 		} else {
ab@2201: 			config->standard_stat_counter = 0x0;
ab@2201: 		}
ab@2201: 	}
ab@2201: 
ab@2201: 	DPRINTK(HW, DEBUG, "[00-07]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
ab@2201: 		c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7]);
ab@2201: 	DPRINTK(HW, DEBUG, "[08-15]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
ab@2201: 		c[8], c[9], c[10], c[11], c[12], c[13], c[14], c[15]);
ab@2201: 	DPRINTK(HW, DEBUG, "[16-23]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
ab@2201: 		c[16], c[17], c[18], c[19], c[20], c[21], c[22], c[23]);
ab@2201: }
ab@2201: 
ab@2201: /*************************************************************************
ab@2201: *  CPUSaver parameters
ab@2201: *
ab@2201: *  All CPUSaver parameters are 16-bit literals that are part of a
ab@2201: *  "move immediate value" instruction.  By changing the value of
ab@2201: *  the literal in the instruction before the code is loaded, the
ab@2201: *  driver can change the algorithm.
ab@2201: *
ab@2201: *  INTDELAY - This loads the dead-man timer with its initial value.
ab@2201: *    When this timer expires the interrupt is asserted, and the
ab@2201: *    timer is reset each time a new packet is received.  (see
ab@2201: *    BUNDLEMAX below to set the limit on number of chained packets)
ab@2201: *    The current default is 0x600 or 1536.  Experiments show that
ab@2201: *    the value should probably stay within the 0x200 - 0x1000.
ab@2201: *
ab@2201: *  BUNDLEMAX -
ab@2201: *    This sets the maximum number of frames that will be bundled.  In
ab@2201: *    some situations, such as the TCP windowing algorithm, it may be
ab@2201: *    better to limit the growth of the bundle size than let it go as
ab@2201: *    high as it can, because that could cause too much added latency.
ab@2201: *    The default is six, because this is the number of packets in the
ab@2201: *    default TCP window size.  A value of 1 would make CPUSaver indicate
ab@2201: *    an interrupt for every frame received.  If you do not want to put
ab@2201: *    a limit on the bundle size, set this value to xFFFF.
ab@2201: *
ab@2201: *  BUNDLESMALL -
ab@2201: *    This contains a bit-mask describing the minimum size frame that
ab@2201: *    will be bundled.  The default masks the lower 7 bits, which means
ab@2201: *    that any frame less than 128 bytes in length will not be bundled,
ab@2201: *    but will instead immediately generate an interrupt.  This does
ab@2201: *    not affect the current bundle in any way.  Any frame that is 128
ab@2201: *    bytes or large will be bundled normally.  This feature is meant
ab@2201: *    to provide immediate indication of ACK frames in a TCP environment.
ab@2201: *    Customers were seeing poor performance when a machine with CPUSaver
ab@2201: *    enabled was sending but not receiving.  The delay introduced when
ab@2201: *    the ACKs were received was enough to reduce total throughput, because
ab@2201: *    the sender would sit idle until the ACK was finally seen.
ab@2201: *
ab@2201: *    The current default is 0xFF80, which masks out the lower 7 bits.
ab@2201: *    This means that any frame which is x7F (127) bytes or smaller
ab@2201: *    will cause an immediate interrupt.  Because this value must be a
ab@2201: *    bit mask, there are only a few valid values that can be used.  To
ab@2201: *    turn this feature off, the driver can write the value xFFFF to the
ab@2201: *    lower word of this instruction (in the same way that the other
ab@2201: *    parameters are used).  Likewise, a value of 0xF800 (2047) would
ab@2201: *    cause an interrupt to be generated for every frame, because all
ab@2201: *    standard Ethernet frames are <= 2047 bytes in length.
ab@2201: *************************************************************************/
ab@2201: 
ab@2201: /* if you wish to disable the ucode functionality, while maintaining the
ab@2201:  * workarounds it provides, set the following defines to:
ab@2201:  * BUNDLESMALL 0
ab@2201:  * BUNDLEMAX 1
ab@2201:  * INTDELAY 1
ab@2201:  */
ab@2201: #define BUNDLESMALL 1
ab@2201: #define BUNDLEMAX (u16)6
ab@2201: #define INTDELAY (u16)1536 /* 0x600 */
ab@2201: 
ab@2201: /* Initialize firmware */
ab@2201: static const struct firmware *e100_request_firmware(struct nic *nic)
ab@2201: {
ab@2201: 	const char *fw_name;
ab@2201: 	const struct firmware *fw = nic->fw;
ab@2201: 	u8 timer, bundle, min_size;
ab@2201: 	int err = 0;
ab@2201: 
ab@2201: 	/* do not load u-code for ICH devices */
ab@2201: 	if (nic->flags & ich)
ab@2201: 		return NULL;
ab@2201: 
ab@2201: 	/* Search for ucode match against h/w revision */
ab@2201: 	if (nic->mac == mac_82559_D101M)
ab@2201: 		fw_name = FIRMWARE_D101M;
ab@2201: 	else if (nic->mac == mac_82559_D101S)
ab@2201: 		fw_name = FIRMWARE_D101S;
ab@2201: 	else if (nic->mac == mac_82551_F || nic->mac == mac_82551_10)
ab@2201: 		fw_name = FIRMWARE_D102E;
ab@2201: 	else /* No ucode on other devices */
ab@2201: 		return NULL;
ab@2201: 
ab@2201: 	/* If the firmware has not previously been loaded, request a pointer
ab@2201: 	 * to it. If it was previously loaded, we are reinitializing the
ab@2201: 	 * adapter, possibly in a resume from hibernate, in which case
ab@2201: 	 * request_firmware() cannot be used.
ab@2201: 	 */
ab@2201: 	if (!fw)
ab@2201: 		err = request_firmware(&fw, fw_name, &nic->pdev->dev);
ab@2201: 
ab@2201: 	if (err) {
ab@2201: 		DPRINTK(PROBE, ERR, "Failed to load firmware \"%s\": %d\n",
ab@2201: 			fw_name, err);
ab@2201: 		return ERR_PTR(err);
ab@2201: 	}
ab@2201: 
ab@2201: 	/* Firmware should be precisely UCODE_SIZE (words) plus three bytes
ab@2201: 	   indicating the offsets for BUNDLESMALL, BUNDLEMAX, INTDELAY */
ab@2201: 	if (fw->size != UCODE_SIZE * 4 + 3) {
ab@2201: 		DPRINTK(PROBE, ERR, "Firmware \"%s\" has wrong size %zu\n",
ab@2201: 			fw_name, fw->size);
ab@2201: 		release_firmware(fw);
ab@2201: 		return ERR_PTR(-EINVAL);
ab@2201: 	}
ab@2201: 
ab@2201: 	/* Read timer, bundle and min_size from end of firmware blob */
ab@2201: 	timer = fw->data[UCODE_SIZE * 4];
ab@2201: 	bundle = fw->data[UCODE_SIZE * 4 + 1];
ab@2201: 	min_size = fw->data[UCODE_SIZE * 4 + 2];
ab@2201: 
ab@2201: 	if (timer >= UCODE_SIZE || bundle >= UCODE_SIZE ||
ab@2201: 	    min_size >= UCODE_SIZE) {
ab@2201: 		DPRINTK(PROBE, ERR,
ab@2201: 			"\"%s\" has bogus offset values (0x%x,0x%x,0x%x)\n",
ab@2201: 			fw_name, timer, bundle, min_size);
ab@2201: 		release_firmware(fw);
ab@2201: 		return ERR_PTR(-EINVAL);
ab@2201: 	}
ab@2201: 
ab@2201: 	/* OK, firmware is validated and ready to use. Save a pointer
ab@2201: 	 * to it in the nic */
ab@2201: 	nic->fw = fw;
ab@2201: 	return fw;
ab@2201: }
ab@2201: 
ab@2201: static void e100_setup_ucode(struct nic *nic, struct cb *cb,
ab@2201: 			     struct sk_buff *skb)
ab@2201: {
ab@2201: 	const struct firmware *fw = (void *)skb;
ab@2201: 	u8 timer, bundle, min_size;
ab@2201: 
ab@2201: 	/* It's not a real skb; we just abused the fact that e100_exec_cb
ab@2201: 	   will pass it through to here... */
ab@2201: 	cb->skb = NULL;
ab@2201: 
ab@2201: 	/* firmware is stored as little endian already */
ab@2201: 	memcpy(cb->u.ucode, fw->data, UCODE_SIZE * 4);
ab@2201: 
ab@2201: 	/* Read timer, bundle and min_size from end of firmware blob */
ab@2201: 	timer = fw->data[UCODE_SIZE * 4];
ab@2201: 	bundle = fw->data[UCODE_SIZE * 4 + 1];
ab@2201: 	min_size = fw->data[UCODE_SIZE * 4 + 2];
ab@2201: 
ab@2201: 	/* Insert user-tunable settings in cb->u.ucode */
ab@2201: 	cb->u.ucode[timer] &= cpu_to_le32(0xFFFF0000);
ab@2201: 	cb->u.ucode[timer] |= cpu_to_le32(INTDELAY);
ab@2201: 	cb->u.ucode[bundle] &= cpu_to_le32(0xFFFF0000);
ab@2201: 	cb->u.ucode[bundle] |= cpu_to_le32(BUNDLEMAX);
ab@2201: 	cb->u.ucode[min_size] &= cpu_to_le32(0xFFFF0000);
ab@2201: 	cb->u.ucode[min_size] |= cpu_to_le32((BUNDLESMALL) ? 0xFFFF : 0xFF80);
ab@2201: 
ab@2201: 	cb->command = cpu_to_le16(cb_ucode | cb_el);
ab@2201: }
ab@2201: 
ab@2201: static inline int e100_load_ucode_wait(struct nic *nic)
ab@2201: {
ab@2201: 	const struct firmware *fw;
ab@2201: 	int err = 0, counter = 50;
ab@2201: 	struct cb *cb = nic->cb_to_clean;
ab@2201: 
ab@2201: 	fw = e100_request_firmware(nic);
ab@2201: 	/* If it's NULL, then no ucode is required */
ab@2201: 	if (!fw || IS_ERR(fw))
ab@2201: 		return PTR_ERR(fw);
ab@2201: 
ab@2201: 	if ((err = e100_exec_cb(nic, (void *)fw, e100_setup_ucode)))
ab@2201: 		DPRINTK(PROBE,ERR, "ucode cmd failed with error %d\n", err);
ab@2201: 
ab@2201: 	/* must restart cuc */
ab@2201: 	nic->cuc_cmd = cuc_start;
ab@2201: 
ab@2201: 	/* wait for completion */
ab@2201: 	e100_write_flush(nic);
ab@2201: 	udelay(10);
ab@2201: 
ab@2201: 	/* wait for possibly (ouch) 500ms */
ab@2201: 	while (!(cb->status & cpu_to_le16(cb_complete))) {
ab@2201: 		msleep(10);
ab@2201: 		if (!--counter) break;
ab@2201: 	}
ab@2201: 
ab@2201: 	/* ack any interrupts, something could have been set */
ab@2201: 	iowrite8(~0, &nic->csr->scb.stat_ack);
ab@2201: 
ab@2201: 	/* if the command failed, or is not OK, notify and return */
ab@2201: 	if (!counter || !(cb->status & cpu_to_le16(cb_ok))) {
ab@2201: 		DPRINTK(PROBE,ERR, "ucode load failed\n");
ab@2201: 		err = -EPERM;
ab@2201: 	}
ab@2201: 
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: static void e100_setup_iaaddr(struct nic *nic, struct cb *cb,
ab@2201: 	struct sk_buff *skb)
ab@2201: {
ab@2201: 	cb->command = cpu_to_le16(cb_iaaddr);
ab@2201: 	memcpy(cb->u.iaaddr, nic->netdev->dev_addr, ETH_ALEN);
ab@2201: }
ab@2201: 
ab@2201: static void e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb)
ab@2201: {
ab@2201: 	cb->command = cpu_to_le16(cb_dump);
ab@2201: 	cb->u.dump_buffer_addr = cpu_to_le32(nic->dma_addr +
ab@2201: 		offsetof(struct mem, dump_buf));
ab@2201: }
ab@2201: 
ab@2201: static int e100_phy_check_without_mii(struct nic *nic)
ab@2201: {
ab@2201: 	u8 phy_type;
ab@2201: 	int without_mii;
ab@2201: 
ab@2201: 	phy_type = (nic->eeprom[eeprom_phy_iface] >> 8) & 0x0f;
ab@2201: 
ab@2201: 	switch (phy_type) {
ab@2201: 	case NoSuchPhy: /* Non-MII PHY; UNTESTED! */
ab@2201: 	case I82503: /* Non-MII PHY; UNTESTED! */
ab@2201: 	case S80C24: /* Non-MII PHY; tested and working */
ab@2201: 		/* paragraph from the FreeBSD driver, "FXP_PHY_80C24":
ab@2201: 		 * The Seeq 80c24 AutoDUPLEX(tm) Ethernet Interface Adapter
ab@2201: 		 * doesn't have a programming interface of any sort.  The
ab@2201: 		 * media is sensed automatically based on how the link partner
ab@2201: 		 * is configured.  This is, in essence, manual configuration.
ab@2201: 		 */
ab@2201: 		DPRINTK(PROBE, INFO,
ab@2201: 			 "found MII-less i82503 or 80c24 or other PHY\n");
ab@2201: 
ab@2201: 		nic->mdio_ctrl = mdio_ctrl_phy_mii_emulated;
ab@2201: 		nic->mii.phy_id = 0; /* is this ok for an MII-less PHY? */
ab@2201: 
ab@2201: 		/* these might be needed for certain MII-less cards...
ab@2201: 		 * nic->flags |= ich;
ab@2201: 		 * nic->flags |= ich_10h_workaround; */
ab@2201: 
ab@2201: 		without_mii = 1;
ab@2201: 		break;
ab@2201: 	default:
ab@2201: 		without_mii = 0;
ab@2201: 		break;
ab@2201: 	}
ab@2201: 	return without_mii;
ab@2201: }
ab@2201: 
ab@2201: #define NCONFIG_AUTO_SWITCH	0x0080
ab@2201: #define MII_NSC_CONG		MII_RESV1
ab@2201: #define NSC_CONG_ENABLE		0x0100
ab@2201: #define NSC_CONG_TXREADY	0x0400
ab@2201: #define ADVERTISE_FC_SUPPORTED	0x0400
ab@2201: static int e100_phy_init(struct nic *nic)
ab@2201: {
ab@2201: 	struct net_device *netdev = nic->netdev;
ab@2201: 	u32 addr;
ab@2201: 	u16 bmcr, stat, id_lo, id_hi, cong;
ab@2201: 
ab@2201: 	/* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
ab@2201: 	for (addr = 0; addr < 32; addr++) {
ab@2201: 		nic->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr;
ab@2201: 		bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
ab@2201: 		stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
ab@2201: 		stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
ab@2201: 		if (!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0))))
ab@2201: 			break;
ab@2201: 	}
ab@2201: 	if (addr == 32) {
ab@2201: 		/* uhoh, no PHY detected: check whether we seem to be some
ab@2201: 		 * weird, rare variant which is *known* to not have any MII.
ab@2201: 		 * But do this AFTER MII checking only, since this does
ab@2201: 		 * lookup of EEPROM values which may easily be unreliable. */
ab@2201: 		if (e100_phy_check_without_mii(nic))
ab@2201: 			return 0; /* simply return and hope for the best */
ab@2201: 		else {
ab@2201: 			/* for unknown cases log a fatal error */
ab@2201: 			DPRINTK(HW, ERR,
ab@2201: 				"Failed to locate any known PHY, aborting.\n");
ab@2201: 			return -EAGAIN;
ab@2201: 		}
ab@2201: 	} else
ab@2201: 		DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id);
ab@2201: 
ab@2201: 	/* Get phy ID */
ab@2201: 	id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1);
ab@2201: 	id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2);
ab@2201: 	nic->phy = (u32)id_hi << 16 | (u32)id_lo;
ab@2201: 	DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy);
ab@2201: 
ab@2201: 	/* Select the phy and isolate the rest */
ab@2201: 	for (addr = 0; addr < 32; addr++) {
ab@2201: 		if (addr != nic->mii.phy_id) {
ab@2201: 			mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE);
ab@2201: 		} else if (nic->phy != phy_82552_v) {
ab@2201: 			bmcr = mdio_read(netdev, addr, MII_BMCR);
ab@2201: 			mdio_write(netdev, addr, MII_BMCR,
ab@2201: 				bmcr & ~BMCR_ISOLATE);
ab@2201: 		}
ab@2201: 	}
ab@2201: 	/*
ab@2201: 	 * Workaround for 82552:
ab@2201: 	 * Clear the ISOLATE bit on selected phy_id last (mirrored on all
ab@2201: 	 * other phy_id's) using bmcr value from addr discovery loop above.
ab@2201: 	 */
ab@2201: 	if (nic->phy == phy_82552_v)
ab@2201: 		mdio_write(netdev, nic->mii.phy_id, MII_BMCR,
ab@2201: 			bmcr & ~BMCR_ISOLATE);
ab@2201: 
ab@2201: 	/* Handle National tx phys */
ab@2201: #define NCS_PHY_MODEL_MASK	0xFFF0FFFF
ab@2201: 	if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
ab@2201: 		/* Disable congestion control */
ab@2201: 		cong = mdio_read(netdev, nic->mii.phy_id, MII_NSC_CONG);
ab@2201: 		cong |= NSC_CONG_TXREADY;
ab@2201: 		cong &= ~NSC_CONG_ENABLE;
ab@2201: 		mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong);
ab@2201: 	}
ab@2201: 
ab@2201: 	if (nic->phy == phy_82552_v) {
ab@2201: 		u16 advert = mdio_read(netdev, nic->mii.phy_id, MII_ADVERTISE);
ab@2201: 
ab@2201: 		/* assign special tweaked mdio_ctrl() function */
ab@2201: 		nic->mdio_ctrl = mdio_ctrl_phy_82552_v;
ab@2201: 
ab@2201: 		/* Workaround Si not advertising flow-control during autoneg */
ab@2201: 		advert |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
ab@2201: 		mdio_write(netdev, nic->mii.phy_id, MII_ADVERTISE, advert);
ab@2201: 
ab@2201: 		/* Reset for the above changes to take effect */
ab@2201: 		bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
ab@2201: 		bmcr |= BMCR_RESET;
ab@2201: 		mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr);
ab@2201: 	} else if ((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
ab@2201: 	   (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000) &&
ab@2201: 		!(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))) {
ab@2201: 		/* enable/disable MDI/MDI-X auto-switching. */
ab@2201: 		mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG,
ab@2201: 				nic->mii.force_media ? 0 : NCONFIG_AUTO_SWITCH);
ab@2201: 	}
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static int e100_hw_init(struct nic *nic)
ab@2201: {
ab@2201: 	int err;
ab@2201: 
ab@2201: 	e100_hw_reset(nic);
ab@2201: 
ab@2201: 	DPRINTK(HW, ERR, "e100_hw_init\n");
ab@2201: 	if (!in_interrupt() && (err = e100_self_test(nic)))
ab@2201: 		return err;
ab@2201: 
ab@2201: 	if ((err = e100_phy_init(nic)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_exec_cmd(nic, cuc_load_base, 0)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_exec_cmd(nic, ruc_load_base, 0)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_load_ucode_wait(nic)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_exec_cb(nic, NULL, e100_configure)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_exec_cmd(nic, cuc_dump_addr,
ab@2201: 		nic->dma_addr + offsetof(struct mem, stats))))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_exec_cmd(nic, cuc_dump_reset, 0)))
ab@2201: 		return err;
ab@2201: 
ab@2201: 	e100_disable_irq(nic);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static void e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
ab@2201: {
ab@2201: 	struct net_device *netdev = nic->netdev;
ab@2201: 	struct dev_mc_list *list = netdev->mc_list;
ab@2201: 	u16 i, count = min(netdev->mc_count, E100_MAX_MULTICAST_ADDRS);
ab@2201: 
ab@2201: 	cb->command = cpu_to_le16(cb_multi);
ab@2201: 	cb->u.multi.count = cpu_to_le16(count * ETH_ALEN);
ab@2201: 	for (i = 0; list && i < count; i++, list = list->next)
ab@2201: 		memcpy(&cb->u.multi.addr[i*ETH_ALEN], &list->dmi_addr,
ab@2201: 			ETH_ALEN);
ab@2201: }
ab@2201: 
ab@2201: static void e100_set_multicast_list(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	DPRINTK(HW, DEBUG, "mc_count=%d, flags=0x%04X\n",
ab@2201: 		netdev->mc_count, netdev->flags);
ab@2201: 
ab@2201: 	if (netdev->flags & IFF_PROMISC)
ab@2201: 		nic->flags |= promiscuous;
ab@2201: 	else
ab@2201: 		nic->flags &= ~promiscuous;
ab@2201: 
ab@2201: 	if (netdev->flags & IFF_ALLMULTI ||
ab@2201: 		netdev->mc_count > E100_MAX_MULTICAST_ADDRS)
ab@2201: 		nic->flags |= multicast_all;
ab@2201: 	else
ab@2201: 		nic->flags &= ~multicast_all;
ab@2201: 
ab@2201: 	e100_exec_cb(nic, NULL, e100_configure);
ab@2201: 	e100_exec_cb(nic, NULL, e100_multi);
ab@2201: }
ab@2201: 
ab@2201: static void e100_update_stats(struct nic *nic)
ab@2201: {
ab@2201: 	struct net_device *dev = nic->netdev;
ab@2201: 	struct net_device_stats *ns = &dev->stats;
ab@2201: 	struct stats *s = &nic->mem->stats;
ab@2201: 	__le32 *complete = (nic->mac < mac_82558_D101_A4) ? &s->fc_xmt_pause :
ab@2201: 		(nic->mac < mac_82559_D101M) ? (__le32 *)&s->xmt_tco_frames :
ab@2201: 		&s->complete;
ab@2201: 
ab@2201: 	/* Device's stats reporting may take several microseconds to
ab@2201: 	 * complete, so we're always waiting for results of the
ab@2201: 	 * previous command. */
ab@2201: 
ab@2201: 	if (*complete == cpu_to_le32(cuc_dump_reset_complete)) {
ab@2201: 		*complete = 0;
ab@2201: 		nic->tx_frames = le32_to_cpu(s->tx_good_frames);
ab@2201: 		nic->tx_collisions = le32_to_cpu(s->tx_total_collisions);
ab@2201: 		ns->tx_aborted_errors += le32_to_cpu(s->tx_max_collisions);
ab@2201: 		ns->tx_window_errors += le32_to_cpu(s->tx_late_collisions);
ab@2201: 		ns->tx_carrier_errors += le32_to_cpu(s->tx_lost_crs);
ab@2201: 		ns->tx_fifo_errors += le32_to_cpu(s->tx_underruns);
ab@2201: 		ns->collisions += nic->tx_collisions;
ab@2201: 		ns->tx_errors += le32_to_cpu(s->tx_max_collisions) +
ab@2201: 			le32_to_cpu(s->tx_lost_crs);
ab@2201: 		ns->rx_length_errors += le32_to_cpu(s->rx_short_frame_errors) +
ab@2201: 			nic->rx_over_length_errors;
ab@2201: 		ns->rx_crc_errors += le32_to_cpu(s->rx_crc_errors);
ab@2201: 		ns->rx_frame_errors += le32_to_cpu(s->rx_alignment_errors);
ab@2201: 		ns->rx_over_errors += le32_to_cpu(s->rx_overrun_errors);
ab@2201: 		ns->rx_fifo_errors += le32_to_cpu(s->rx_overrun_errors);
ab@2201: 		ns->rx_missed_errors += le32_to_cpu(s->rx_resource_errors);
ab@2201: 		ns->rx_errors += le32_to_cpu(s->rx_crc_errors) +
ab@2201: 			le32_to_cpu(s->rx_alignment_errors) +
ab@2201: 			le32_to_cpu(s->rx_short_frame_errors) +
ab@2201: 			le32_to_cpu(s->rx_cdt_errors);
ab@2201: 		nic->tx_deferred += le32_to_cpu(s->tx_deferred);
ab@2201: 		nic->tx_single_collisions +=
ab@2201: 			le32_to_cpu(s->tx_single_collisions);
ab@2201: 		nic->tx_multiple_collisions +=
ab@2201: 			le32_to_cpu(s->tx_multiple_collisions);
ab@2201: 		if (nic->mac >= mac_82558_D101_A4) {
ab@2201: 			nic->tx_fc_pause += le32_to_cpu(s->fc_xmt_pause);
ab@2201: 			nic->rx_fc_pause += le32_to_cpu(s->fc_rcv_pause);
ab@2201: 			nic->rx_fc_unsupported +=
ab@2201: 				le32_to_cpu(s->fc_rcv_unsupported);
ab@2201: 			if (nic->mac >= mac_82559_D101M) {
ab@2201: 				nic->tx_tco_frames +=
ab@2201: 					le16_to_cpu(s->xmt_tco_frames);
ab@2201: 				nic->rx_tco_frames +=
ab@2201: 					le16_to_cpu(s->rcv_tco_frames);
ab@2201: 			}
ab@2201: 		}
ab@2201: 	}
ab@2201: 
ab@2201: 
ab@2201: 	if (e100_exec_cmd(nic, cuc_dump_reset, 0))
ab@2201: 		DPRINTK(TX_ERR, DEBUG, "exec cuc_dump_reset failed\n");
ab@2201: }
ab@2201: 
ab@2201: static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex)
ab@2201: {
ab@2201: 	/* Adjust inter-frame-spacing (IFS) between two transmits if
ab@2201: 	 * we're getting collisions on a half-duplex connection. */
ab@2201: 
ab@2201: 	if (duplex == DUPLEX_HALF) {
ab@2201: 		u32 prev = nic->adaptive_ifs;
ab@2201: 		u32 min_frames = (speed == SPEED_100) ? 1000 : 100;
ab@2201: 
ab@2201: 		if ((nic->tx_frames / 32 < nic->tx_collisions) &&
ab@2201: 		   (nic->tx_frames > min_frames)) {
ab@2201: 			if (nic->adaptive_ifs < 60)
ab@2201: 				nic->adaptive_ifs += 5;
ab@2201: 		} else if (nic->tx_frames < min_frames) {
ab@2201: 			if (nic->adaptive_ifs >= 5)
ab@2201: 				nic->adaptive_ifs -= 5;
ab@2201: 		}
ab@2201: 		if (nic->adaptive_ifs != prev)
ab@2201: 			e100_exec_cb(nic, NULL, e100_configure);
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: static void e100_watchdog(unsigned long data)
ab@2201: {
ab@2201: 	struct nic *nic = (struct nic *)data;
ab@2201: 	struct ethtool_cmd cmd;
ab@2201: 
ab@2201: 	DPRINTK(TIMER, DEBUG, "right now = %ld\n", jiffies);
ab@2201: 
ab@2201: 	/* mii library handles link maintenance tasks */
ab@2201: 
ab@2201: 	mii_ethtool_gset(&nic->mii, &cmd);
ab@2201: 
ab@2201: 	if (mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) {
ab@2201: 		printk(KERN_INFO "e100: %s NIC Link is Up %s Mbps %s Duplex\n",
ab@2201: 		       nic->netdev->name,
ab@2201: 		       cmd.speed == SPEED_100 ? "100" : "10",
ab@2201: 		       cmd.duplex == DUPLEX_FULL ? "Full" : "Half");
ab@2201: 	} else if (!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) {
ab@2201: 		printk(KERN_INFO "e100: %s NIC Link is Down\n",
ab@2201: 		       nic->netdev->name);
ab@2201: 	}
ab@2201: 
ab@2201: 	mii_check_link(&nic->mii);
ab@2201: 
ab@2201: 	/* Software generated interrupt to recover from (rare) Rx
ab@2201: 	 * allocation failure.
ab@2201: 	 * Unfortunately have to use a spinlock to not re-enable interrupts
ab@2201: 	 * accidentally, due to hardware that shares a register between the
ab@2201: 	 * interrupt mask bit and the SW Interrupt generation bit */
ab@2201: 	spin_lock_irq(&nic->cmd_lock);
ab@2201: 	iowrite8(ioread8(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi);
ab@2201: 	e100_write_flush(nic);
ab@2201: 	spin_unlock_irq(&nic->cmd_lock);
ab@2201: 
ab@2201: 	e100_update_stats(nic);
ab@2201: 	e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex);
ab@2201: 
ab@2201: 	if (nic->mac <= mac_82557_D100_C)
ab@2201: 		/* Issue a multicast command to workaround a 557 lock up */
ab@2201: 		e100_set_multicast_list(nic->netdev);
ab@2201: 
ab@2201: 	if (nic->flags & ich && cmd.speed==SPEED_10 && cmd.duplex==DUPLEX_HALF)
ab@2201: 		/* Need SW workaround for ICH[x] 10Mbps/half duplex Tx hang. */
ab@2201: 		nic->flags |= ich_10h_workaround;
ab@2201: 	else
ab@2201: 		nic->flags &= ~ich_10h_workaround;
ab@2201: 
ab@2201: 	mod_timer(&nic->watchdog,
ab@2201: 		  round_jiffies(jiffies + E100_WATCHDOG_PERIOD));
ab@2201: }
ab@2201: 
ab@2201: static void e100_xmit_prepare(struct nic *nic, struct cb *cb,
ab@2201: 	struct sk_buff *skb)
ab@2201: {
ab@2201: 	cb->command = nic->tx_command;
ab@2201: 	/* interrupt every 16 packets regardless of delay */
ab@2201: 	if ((nic->cbs_avail & ~15) == nic->cbs_avail)
ab@2201: 		cb->command |= cpu_to_le16(cb_i);
ab@2201: 	cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd);
ab@2201: 	cb->u.tcb.tcb_byte_count = 0;
ab@2201: 	cb->u.tcb.threshold = nic->tx_threshold;
ab@2201: 	cb->u.tcb.tbd_count = 1;
ab@2201: 	cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev,
ab@2201: 		skb->data, skb->len, PCI_DMA_TODEVICE));
ab@2201: 	/* check for mapping failure? */
ab@2201: 	cb->u.tcb.tbd.size = cpu_to_le16(skb->len);
ab@2201: }
ab@2201: 
ab@2201: static netdev_tx_t e100_xmit_frame(struct sk_buff *skb,
ab@2201: 				   struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	int err;
ab@2201: 
ab@2201: 	if (nic->flags & ich_10h_workaround) {
ab@2201: 		/* SW workaround for ICH[x] 10Mbps/half duplex Tx hang.
ab@2201: 		   Issue a NOP command followed by a 1us delay before
ab@2201: 		   issuing the Tx command. */
ab@2201: 		if (e100_exec_cmd(nic, cuc_nop, 0))
ab@2201: 			DPRINTK(TX_ERR, DEBUG, "exec cuc_nop failed\n");
ab@2201: 		udelay(1);
ab@2201: 	}
ab@2201: 
ab@2201: 	err = e100_exec_cb(nic, skb, e100_xmit_prepare);
ab@2201: 
ab@2201: 	switch (err) {
ab@2201: 	case -ENOSPC:
ab@2201: 		/* We queued the skb, but now we're out of space. */
ab@2201: 		DPRINTK(TX_ERR, DEBUG, "No space for CB\n");
ab@2201: 		netif_stop_queue(netdev);
ab@2201: 		break;
ab@2201: 	case -ENOMEM:
ab@2201: 		/* This is a hard error - log it. */
ab@2201: 		DPRINTK(TX_ERR, DEBUG, "Out of Tx resources, returning skb\n");
ab@2201: 		netif_stop_queue(netdev);
ab@2201: 		return NETDEV_TX_BUSY;
ab@2201: 	}
ab@2201: 
ab@2201: 	netdev->trans_start = jiffies;
ab@2201: 	return NETDEV_TX_OK;
ab@2201: }
ab@2201: 
ab@2201: static int e100_tx_clean(struct nic *nic)
ab@2201: {
ab@2201: 	struct net_device *dev = nic->netdev;
ab@2201: 	struct cb *cb;
ab@2201: 	int tx_cleaned = 0;
ab@2201: 
ab@2201: 	spin_lock(&nic->cb_lock);
ab@2201: 
ab@2201: 	/* Clean CBs marked complete */
ab@2201: 	for (cb = nic->cb_to_clean;
ab@2201: 	    cb->status & cpu_to_le16(cb_complete);
ab@2201: 	    cb = nic->cb_to_clean = cb->next) {
ab@2201: 		DPRINTK(TX_DONE, DEBUG, "cb[%d]->status = 0x%04X\n",
ab@2201: 		        (int)(((void*)cb - (void*)nic->cbs)/sizeof(struct cb)),
ab@2201: 		        cb->status);
ab@2201: 
ab@2201: 		if (likely(cb->skb != NULL)) {
ab@2201: 			dev->stats.tx_packets++;
ab@2201: 			dev->stats.tx_bytes += cb->skb->len;
ab@2201: 
ab@2201: 			pci_unmap_single(nic->pdev,
ab@2201: 				le32_to_cpu(cb->u.tcb.tbd.buf_addr),
ab@2201: 				le16_to_cpu(cb->u.tcb.tbd.size),
ab@2201: 				PCI_DMA_TODEVICE);
ab@2201: 			dev_kfree_skb_any(cb->skb);
ab@2201: 			cb->skb = NULL;
ab@2201: 			tx_cleaned = 1;
ab@2201: 		}
ab@2201: 		cb->status = 0;
ab@2201: 		nic->cbs_avail++;
ab@2201: 	}
ab@2201: 
ab@2201: 	spin_unlock(&nic->cb_lock);
ab@2201: 
ab@2201: 	/* Recover from running out of Tx resources in xmit_frame */
ab@2201: 	if (unlikely(tx_cleaned && netif_queue_stopped(nic->netdev)))
ab@2201: 		netif_wake_queue(nic->netdev);
ab@2201: 
ab@2201: 	return tx_cleaned;
ab@2201: }
ab@2201: 
ab@2201: static void e100_clean_cbs(struct nic *nic)
ab@2201: {
ab@2201: 	if (nic->cbs) {
ab@2201: 		while (nic->cbs_avail != nic->params.cbs.count) {
ab@2201: 			struct cb *cb = nic->cb_to_clean;
ab@2201: 			if (cb->skb) {
ab@2201: 				pci_unmap_single(nic->pdev,
ab@2201: 					le32_to_cpu(cb->u.tcb.tbd.buf_addr),
ab@2201: 					le16_to_cpu(cb->u.tcb.tbd.size),
ab@2201: 					PCI_DMA_TODEVICE);
ab@2201: 				dev_kfree_skb(cb->skb);
ab@2201: 			}
ab@2201: 			nic->cb_to_clean = nic->cb_to_clean->next;
ab@2201: 			nic->cbs_avail++;
ab@2201: 		}
ab@2201: 		pci_pool_free(nic->cbs_pool, nic->cbs, nic->cbs_dma_addr);
ab@2201: 		nic->cbs = NULL;
ab@2201: 		nic->cbs_avail = 0;
ab@2201: 	}
ab@2201: 	nic->cuc_cmd = cuc_start;
ab@2201: 	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean =
ab@2201: 		nic->cbs;
ab@2201: }
ab@2201: 
ab@2201: static int e100_alloc_cbs(struct nic *nic)
ab@2201: {
ab@2201: 	struct cb *cb;
ab@2201: 	unsigned int i, count = nic->params.cbs.count;
ab@2201: 
ab@2201: 	nic->cuc_cmd = cuc_start;
ab@2201: 	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL;
ab@2201: 	nic->cbs_avail = 0;
ab@2201: 
ab@2201: 	nic->cbs = pci_pool_alloc(nic->cbs_pool, GFP_KERNEL,
ab@2201: 				  &nic->cbs_dma_addr);
ab@2201: 	if (!nic->cbs)
ab@2201: 		return -ENOMEM;
ab@2201: 	memset(nic->cbs, 0, count * sizeof(struct cb));
ab@2201: 
ab@2201: 	for (cb = nic->cbs, i = 0; i < count; cb++, i++) {
ab@2201: 		cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
ab@2201: 		cb->prev = (i == 0) ? nic->cbs + count - 1 : cb - 1;
ab@2201: 
ab@2201: 		cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb);
ab@2201: 		cb->link = cpu_to_le32(nic->cbs_dma_addr +
ab@2201: 			((i+1) % count) * sizeof(struct cb));
ab@2201: 	}
ab@2201: 
ab@2201: 	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs;
ab@2201: 	nic->cbs_avail = count;
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static inline void e100_start_receiver(struct nic *nic, struct rx *rx)
ab@2201: {
ab@2201: 	if (!nic->rxs) return;
ab@2201: 	if (RU_SUSPENDED != nic->ru_running) return;
ab@2201: 
ab@2201: 	/* handle init time starts */
ab@2201: 	if (!rx) rx = nic->rxs;
ab@2201: 
ab@2201: 	/* (Re)start RU if suspended or idle and RFA is non-NULL */
ab@2201: 	if (rx->skb) {
ab@2201: 		e100_exec_cmd(nic, ruc_start, rx->dma_addr);
ab@2201: 		nic->ru_running = RU_RUNNING;
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: #define RFD_BUF_LEN (sizeof(struct rfd) + VLAN_ETH_FRAME_LEN)
ab@2201: static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx)
ab@2201: {
ab@2201: 	if (!(rx->skb = netdev_alloc_skb_ip_align(nic->netdev, RFD_BUF_LEN)))
ab@2201: 		return -ENOMEM;
ab@2201: 
ab@2201: 	/* Init, and map the RFD. */
ab@2201: 	skb_copy_to_linear_data(rx->skb, &nic->blank_rfd, sizeof(struct rfd));
ab@2201: 	rx->dma_addr = pci_map_single(nic->pdev, rx->skb->data,
ab@2201: 		RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
ab@2201: 
ab@2201: 	if (pci_dma_mapping_error(nic->pdev, rx->dma_addr)) {
ab@2201: 		dev_kfree_skb_any(rx->skb);
ab@2201: 		rx->skb = NULL;
ab@2201: 		rx->dma_addr = 0;
ab@2201: 		return -ENOMEM;
ab@2201: 	}
ab@2201: 
ab@2201: 	/* Link the RFD to end of RFA by linking previous RFD to
ab@2201: 	 * this one.  We are safe to touch the previous RFD because
ab@2201: 	 * it is protected by the before last buffer's el bit being set */
ab@2201: 	if (rx->prev->skb) {
ab@2201: 		struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data;
ab@2201: 		put_unaligned_le32(rx->dma_addr, &prev_rfd->link);
ab@2201: 		pci_dma_sync_single_for_device(nic->pdev, rx->prev->dma_addr,
ab@2201: 			sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL);
ab@2201: 	}
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static int e100_rx_indicate(struct nic *nic, struct rx *rx,
ab@2201: 	unsigned int *work_done, unsigned int work_to_do)
ab@2201: {
ab@2201: 	struct net_device *dev = nic->netdev;
ab@2201: 	struct sk_buff *skb = rx->skb;
ab@2201: 	struct rfd *rfd = (struct rfd *)skb->data;
ab@2201: 	u16 rfd_status, actual_size;
ab@2201: 
ab@2201: 	if (unlikely(work_done && *work_done >= work_to_do))
ab@2201: 		return -EAGAIN;
ab@2201: 
ab@2201: 	/* Need to sync before taking a peek at cb_complete bit */
ab@2201: 	pci_dma_sync_single_for_cpu(nic->pdev, rx->dma_addr,
ab@2201: 		sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL);
ab@2201: 	rfd_status = le16_to_cpu(rfd->status);
ab@2201: 
ab@2201: 	DPRINTK(RX_STATUS, DEBUG, "status=0x%04X\n", rfd_status);
ab@2201: 
ab@2201: 	/* If data isn't ready, nothing to indicate */
ab@2201: 	if (unlikely(!(rfd_status & cb_complete))) {
ab@2201: 		/* If the next buffer has the el bit, but we think the receiver
ab@2201: 		 * is still running, check to see if it really stopped while
ab@2201: 		 * we had interrupts off.
ab@2201: 		 * This allows for a fast restart without re-enabling
ab@2201: 		 * interrupts */
ab@2201: 		if ((le16_to_cpu(rfd->command) & cb_el) &&
ab@2201: 		    (RU_RUNNING == nic->ru_running))
ab@2201: 
ab@2201: 			if (ioread8(&nic->csr->scb.status) & rus_no_res)
ab@2201: 				nic->ru_running = RU_SUSPENDED;
ab@2201: 		pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr,
ab@2201: 					       sizeof(struct rfd),
ab@2201: 					       PCI_DMA_FROMDEVICE);
ab@2201: 		return -ENODATA;
ab@2201: 	}
ab@2201: 
ab@2201: 	/* Get actual data size */
ab@2201: 	actual_size = le16_to_cpu(rfd->actual_size) & 0x3FFF;
ab@2201: 	if (unlikely(actual_size > RFD_BUF_LEN - sizeof(struct rfd)))
ab@2201: 		actual_size = RFD_BUF_LEN - sizeof(struct rfd);
ab@2201: 
ab@2201: 	/* Get data */
ab@2201: 	pci_unmap_single(nic->pdev, rx->dma_addr,
ab@2201: 		RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
ab@2201: 
ab@2201: 	/* If this buffer has the el bit, but we think the receiver
ab@2201: 	 * is still running, check to see if it really stopped while
ab@2201: 	 * we had interrupts off.
ab@2201: 	 * This allows for a fast restart without re-enabling interrupts.
ab@2201: 	 * This can happen when the RU sees the size change but also sees
ab@2201: 	 * the el bit set. */
ab@2201: 	if ((le16_to_cpu(rfd->command) & cb_el) &&
ab@2201: 	    (RU_RUNNING == nic->ru_running)) {
ab@2201: 
ab@2201: 	    if (ioread8(&nic->csr->scb.status) & rus_no_res)
ab@2201: 		nic->ru_running = RU_SUSPENDED;
ab@2201: 	}
ab@2201: 
ab@2201: 	/* Pull off the RFD and put the actual data (minus eth hdr) */
ab@2201: 	skb_reserve(skb, sizeof(struct rfd));
ab@2201: 	skb_put(skb, actual_size);
ab@2201: 	skb->protocol = eth_type_trans(skb, nic->netdev);
ab@2201: 
ab@2201: 	if (unlikely(!(rfd_status & cb_ok))) {
ab@2201: 		/* Don't indicate if hardware indicates errors */
ab@2201: 		dev_kfree_skb_any(skb);
ab@2201: 	} else if (actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN) {
ab@2201: 		/* Don't indicate oversized frames */
ab@2201: 		nic->rx_over_length_errors++;
ab@2201: 		dev_kfree_skb_any(skb);
ab@2201: 	} else {
ab@2201: 		dev->stats.rx_packets++;
ab@2201: 		dev->stats.rx_bytes += actual_size;
ab@2201: 		netif_receive_skb(skb);
ab@2201: 		if (work_done)
ab@2201: 			(*work_done)++;
ab@2201: 	}
ab@2201: 
ab@2201: 	rx->skb = NULL;
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
ab@2201: 	unsigned int work_to_do)
ab@2201: {
ab@2201: 	struct rx *rx;
ab@2201: 	int restart_required = 0, err = 0;
ab@2201: 	struct rx *old_before_last_rx, *new_before_last_rx;
ab@2201: 	struct rfd *old_before_last_rfd, *new_before_last_rfd;
ab@2201: 
ab@2201: 	/* Indicate newly arrived packets */
ab@2201: 	for (rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) {
ab@2201: 		err = e100_rx_indicate(nic, rx, work_done, work_to_do);
ab@2201: 		/* Hit quota or no more to clean */
ab@2201: 		if (-EAGAIN == err || -ENODATA == err)
ab@2201: 			break;
ab@2201: 	}
ab@2201: 
ab@2201: 
ab@2201: 	/* On EAGAIN, hit quota so have more work to do, restart once
ab@2201: 	 * cleanup is complete.
ab@2201: 	 * Else, are we already rnr? then pay attention!!! this ensures that
ab@2201: 	 * the state machine progression never allows a start with a
ab@2201: 	 * partially cleaned list, avoiding a race between hardware
ab@2201: 	 * and rx_to_clean when in NAPI mode */
ab@2201: 	if (-EAGAIN != err && RU_SUSPENDED == nic->ru_running)
ab@2201: 		restart_required = 1;
ab@2201: 
ab@2201: 	old_before_last_rx = nic->rx_to_use->prev->prev;
ab@2201: 	old_before_last_rfd = (struct rfd *)old_before_last_rx->skb->data;
ab@2201: 
ab@2201: 	/* Alloc new skbs to refill list */
ab@2201: 	for (rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) {
ab@2201: 		if (unlikely(e100_rx_alloc_skb(nic, rx)))
ab@2201: 			break; /* Better luck next time (see watchdog) */
ab@2201: 	}
ab@2201: 
ab@2201: 	new_before_last_rx = nic->rx_to_use->prev->prev;
ab@2201: 	if (new_before_last_rx != old_before_last_rx) {
ab@2201: 		/* Set the el-bit on the buffer that is before the last buffer.
ab@2201: 		 * This lets us update the next pointer on the last buffer
ab@2201: 		 * without worrying about hardware touching it.
ab@2201: 		 * We set the size to 0 to prevent hardware from touching this
ab@2201: 		 * buffer.
ab@2201: 		 * When the hardware hits the before last buffer with el-bit
ab@2201: 		 * and size of 0, it will RNR interrupt, the RUS will go into
ab@2201: 		 * the No Resources state.  It will not complete nor write to
ab@2201: 		 * this buffer. */
ab@2201: 		new_before_last_rfd =
ab@2201: 			(struct rfd *)new_before_last_rx->skb->data;
ab@2201: 		new_before_last_rfd->size = 0;
ab@2201: 		new_before_last_rfd->command |= cpu_to_le16(cb_el);
ab@2201: 		pci_dma_sync_single_for_device(nic->pdev,
ab@2201: 			new_before_last_rx->dma_addr, sizeof(struct rfd),
ab@2201: 			PCI_DMA_BIDIRECTIONAL);
ab@2201: 
ab@2201: 		/* Now that we have a new stopping point, we can clear the old
ab@2201: 		 * stopping point.  We must sync twice to get the proper
ab@2201: 		 * ordering on the hardware side of things. */
ab@2201: 		old_before_last_rfd->command &= ~cpu_to_le16(cb_el);
ab@2201: 		pci_dma_sync_single_for_device(nic->pdev,
ab@2201: 			old_before_last_rx->dma_addr, sizeof(struct rfd),
ab@2201: 			PCI_DMA_BIDIRECTIONAL);
ab@2201: 		old_before_last_rfd->size = cpu_to_le16(VLAN_ETH_FRAME_LEN);
ab@2201: 		pci_dma_sync_single_for_device(nic->pdev,
ab@2201: 			old_before_last_rx->dma_addr, sizeof(struct rfd),
ab@2201: 			PCI_DMA_BIDIRECTIONAL);
ab@2201: 	}
ab@2201: 
ab@2201: 	if (restart_required) {
ab@2201: 		// ack the rnr?
ab@2201: 		iowrite8(stat_ack_rnr, &nic->csr->scb.stat_ack);
ab@2201: 		e100_start_receiver(nic, nic->rx_to_clean);
ab@2201: 		if (work_done)
ab@2201: 			(*work_done)++;
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: static void e100_rx_clean_list(struct nic *nic)
ab@2201: {
ab@2201: 	struct rx *rx;
ab@2201: 	unsigned int i, count = nic->params.rfds.count;
ab@2201: 
ab@2201: 	nic->ru_running = RU_UNINITIALIZED;
ab@2201: 
ab@2201: 	if (nic->rxs) {
ab@2201: 		for (rx = nic->rxs, i = 0; i < count; rx++, i++) {
ab@2201: 			if (rx->skb) {
ab@2201: 				pci_unmap_single(nic->pdev, rx->dma_addr,
ab@2201: 					RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
ab@2201: 				dev_kfree_skb(rx->skb);
ab@2201: 			}
ab@2201: 		}
ab@2201: 		kfree(nic->rxs);
ab@2201: 		nic->rxs = NULL;
ab@2201: 	}
ab@2201: 
ab@2201: 	nic->rx_to_use = nic->rx_to_clean = NULL;
ab@2201: }
ab@2201: 
ab@2201: static int e100_rx_alloc_list(struct nic *nic)
ab@2201: {
ab@2201: 	struct rx *rx;
ab@2201: 	unsigned int i, count = nic->params.rfds.count;
ab@2201: 	struct rfd *before_last;
ab@2201: 
ab@2201: 	nic->rx_to_use = nic->rx_to_clean = NULL;
ab@2201: 	nic->ru_running = RU_UNINITIALIZED;
ab@2201: 
ab@2201: 	if (!(nic->rxs = kcalloc(count, sizeof(struct rx), GFP_ATOMIC)))
ab@2201: 		return -ENOMEM;
ab@2201: 
ab@2201: 	for (rx = nic->rxs, i = 0; i < count; rx++, i++) {
ab@2201: 		rx->next = (i + 1 < count) ? rx + 1 : nic->rxs;
ab@2201: 		rx->prev = (i == 0) ? nic->rxs + count - 1 : rx - 1;
ab@2201: 		if (e100_rx_alloc_skb(nic, rx)) {
ab@2201: 			e100_rx_clean_list(nic);
ab@2201: 			return -ENOMEM;
ab@2201: 		}
ab@2201: 	}
ab@2201: 	/* Set the el-bit on the buffer that is before the last buffer.
ab@2201: 	 * This lets us update the next pointer on the last buffer without
ab@2201: 	 * worrying about hardware touching it.
ab@2201: 	 * We set the size to 0 to prevent hardware from touching this buffer.
ab@2201: 	 * When the hardware hits the before last buffer with el-bit and size
ab@2201: 	 * of 0, it will RNR interrupt, the RU will go into the No Resources
ab@2201: 	 * state.  It will not complete nor write to this buffer. */
ab@2201: 	rx = nic->rxs->prev->prev;
ab@2201: 	before_last = (struct rfd *)rx->skb->data;
ab@2201: 	before_last->command |= cpu_to_le16(cb_el);
ab@2201: 	before_last->size = 0;
ab@2201: 	pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr,
ab@2201: 		sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL);
ab@2201: 
ab@2201: 	nic->rx_to_use = nic->rx_to_clean = nic->rxs;
ab@2201: 	nic->ru_running = RU_SUSPENDED;
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static irqreturn_t e100_intr(int irq, void *dev_id)
ab@2201: {
ab@2201: 	struct net_device *netdev = dev_id;
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	u8 stat_ack = ioread8(&nic->csr->scb.stat_ack);
ab@2201: 
ab@2201: 	DPRINTK(INTR, DEBUG, "stat_ack = 0x%02X\n", stat_ack);
ab@2201: 
ab@2201: 	if (stat_ack == stat_ack_not_ours ||	/* Not our interrupt */
ab@2201: 	   stat_ack == stat_ack_not_present)	/* Hardware is ejected */
ab@2201: 		return IRQ_NONE;
ab@2201: 
ab@2201: 	/* Ack interrupt(s) */
ab@2201: 	iowrite8(stat_ack, &nic->csr->scb.stat_ack);
ab@2201: 
ab@2201: 	/* We hit Receive No Resource (RNR); restart RU after cleaning */
ab@2201: 	if (stat_ack & stat_ack_rnr)
ab@2201: 		nic->ru_running = RU_SUSPENDED;
ab@2201: 
ab@2201: 	if (likely(napi_schedule_prep(&nic->napi))) {
ab@2201: 		e100_disable_irq(nic);
ab@2201: 		__napi_schedule(&nic->napi);
ab@2201: 	}
ab@2201: 
ab@2201: 	return IRQ_HANDLED;
ab@2201: }
ab@2201: 
ab@2201: static int e100_poll(struct napi_struct *napi, int budget)
ab@2201: {
ab@2201: 	struct nic *nic = container_of(napi, struct nic, napi);
ab@2201: 	unsigned int work_done = 0;
ab@2201: 
ab@2201: 	e100_rx_clean(nic, &work_done, budget);
ab@2201: 	e100_tx_clean(nic);
ab@2201: 
ab@2201: 	/* If budget not fully consumed, exit the polling mode */
ab@2201: 	if (work_done < budget) {
ab@2201: 		napi_complete(napi);
ab@2201: 		e100_enable_irq(nic);
ab@2201: 	}
ab@2201: 
ab@2201: 	return work_done;
ab@2201: }
ab@2201: 
ab@2201: #ifdef CONFIG_NET_POLL_CONTROLLER
ab@2201: static void e100_netpoll(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	e100_disable_irq(nic);
ab@2201: 	e100_intr(nic->pdev->irq, netdev);
ab@2201: 	e100_tx_clean(nic);
ab@2201: 	e100_enable_irq(nic);
ab@2201: }
ab@2201: #endif
ab@2201: 
ab@2201: static int e100_set_mac_address(struct net_device *netdev, void *p)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	struct sockaddr *addr = p;
ab@2201: 
ab@2201: 	if (!is_valid_ether_addr(addr->sa_data))
ab@2201: 		return -EADDRNOTAVAIL;
ab@2201: 
ab@2201: 	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
ab@2201: 	e100_exec_cb(nic, NULL, e100_setup_iaaddr);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static int e100_change_mtu(struct net_device *netdev, int new_mtu)
ab@2201: {
ab@2201: 	if (new_mtu < ETH_ZLEN || new_mtu > ETH_DATA_LEN)
ab@2201: 		return -EINVAL;
ab@2201: 	netdev->mtu = new_mtu;
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static int e100_asf(struct nic *nic)
ab@2201: {
ab@2201: 	/* ASF can be enabled from eeprom */
ab@2201: 	return((nic->pdev->device >= 0x1050) && (nic->pdev->device <= 0x1057) &&
ab@2201: 	   (nic->eeprom[eeprom_config_asf] & eeprom_asf) &&
ab@2201: 	   !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) &&
ab@2201: 	   ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE));
ab@2201: }
ab@2201: 
ab@2201: static int e100_up(struct nic *nic)
ab@2201: {
ab@2201: 	int err;
ab@2201: 
ab@2201: 	if ((err = e100_rx_alloc_list(nic)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_alloc_cbs(nic)))
ab@2201: 		goto err_rx_clean_list;
ab@2201: 	if ((err = e100_hw_init(nic)))
ab@2201: 		goto err_clean_cbs;
ab@2201: 	e100_set_multicast_list(nic->netdev);
ab@2201: 	e100_start_receiver(nic, NULL);
ab@2201: 	mod_timer(&nic->watchdog, jiffies);
ab@2201: 	if ((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED,
ab@2201: 		nic->netdev->name, nic->netdev)))
ab@2201: 		goto err_no_irq;
ab@2201: 	netif_wake_queue(nic->netdev);
ab@2201: 	napi_enable(&nic->napi);
ab@2201: 	/* enable ints _after_ enabling poll, preventing a race between
ab@2201: 	 * disable ints+schedule */
ab@2201: 	e100_enable_irq(nic);
ab@2201: 	return 0;
ab@2201: 
ab@2201: err_no_irq:
ab@2201: 	del_timer_sync(&nic->watchdog);
ab@2201: err_clean_cbs:
ab@2201: 	e100_clean_cbs(nic);
ab@2201: err_rx_clean_list:
ab@2201: 	e100_rx_clean_list(nic);
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: static void e100_down(struct nic *nic)
ab@2201: {
ab@2201: 	/* wait here for poll to complete */
ab@2201: 	napi_disable(&nic->napi);
ab@2201: 	netif_stop_queue(nic->netdev);
ab@2201: 	e100_hw_reset(nic);
ab@2201: 	free_irq(nic->pdev->irq, nic->netdev);
ab@2201: 	del_timer_sync(&nic->watchdog);
ab@2201: 	netif_carrier_off(nic->netdev);
ab@2201: 	e100_clean_cbs(nic);
ab@2201: 	e100_rx_clean_list(nic);
ab@2201: }
ab@2201: 
ab@2201: static void e100_tx_timeout(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	/* Reset outside of interrupt context, to avoid request_irq
ab@2201: 	 * in interrupt context */
ab@2201: 	schedule_work(&nic->tx_timeout_task);
ab@2201: }
ab@2201: 
ab@2201: static void e100_tx_timeout_task(struct work_struct *work)
ab@2201: {
ab@2201: 	struct nic *nic = container_of(work, struct nic, tx_timeout_task);
ab@2201: 	struct net_device *netdev = nic->netdev;
ab@2201: 
ab@2201: 	DPRINTK(TX_ERR, DEBUG, "scb.status=0x%02X\n",
ab@2201: 		ioread8(&nic->csr->scb.status));
ab@2201: 	e100_down(netdev_priv(netdev));
ab@2201: 	e100_up(netdev_priv(netdev));
ab@2201: }
ab@2201: 
ab@2201: static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
ab@2201: {
ab@2201: 	int err;
ab@2201: 	struct sk_buff *skb;
ab@2201: 
ab@2201: 	/* Use driver resources to perform internal MAC or PHY
ab@2201: 	 * loopback test.  A single packet is prepared and transmitted
ab@2201: 	 * in loopback mode, and the test passes if the received
ab@2201: 	 * packet compares byte-for-byte to the transmitted packet. */
ab@2201: 
ab@2201: 	if ((err = e100_rx_alloc_list(nic)))
ab@2201: 		return err;
ab@2201: 	if ((err = e100_alloc_cbs(nic)))
ab@2201: 		goto err_clean_rx;
ab@2201: 
ab@2201: 	/* ICH PHY loopback is broken so do MAC loopback instead */
ab@2201: 	if (nic->flags & ich && loopback_mode == lb_phy)
ab@2201: 		loopback_mode = lb_mac;
ab@2201: 
ab@2201: 	nic->loopback = loopback_mode;
ab@2201: 	if ((err = e100_hw_init(nic)))
ab@2201: 		goto err_loopback_none;
ab@2201: 
ab@2201: 	if (loopback_mode == lb_phy)
ab@2201: 		mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR,
ab@2201: 			BMCR_LOOPBACK);
ab@2201: 
ab@2201: 	e100_start_receiver(nic, NULL);
ab@2201: 
ab@2201: 	if (!(skb = netdev_alloc_skb(nic->netdev, ETH_DATA_LEN))) {
ab@2201: 		err = -ENOMEM;
ab@2201: 		goto err_loopback_none;
ab@2201: 	}
ab@2201: 	skb_put(skb, ETH_DATA_LEN);
ab@2201: 	memset(skb->data, 0xFF, ETH_DATA_LEN);
ab@2201: 	e100_xmit_frame(skb, nic->netdev);
ab@2201: 
ab@2201: 	msleep(10);
ab@2201: 
ab@2201: 	pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr,
ab@2201: 			RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
ab@2201: 
ab@2201: 	if (memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
ab@2201: 	   skb->data, ETH_DATA_LEN))
ab@2201: 		err = -EAGAIN;
ab@2201: 
ab@2201: err_loopback_none:
ab@2201: 	mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0);
ab@2201: 	nic->loopback = lb_none;
ab@2201: 	e100_clean_cbs(nic);
ab@2201: 	e100_hw_reset(nic);
ab@2201: err_clean_rx:
ab@2201: 	e100_rx_clean_list(nic);
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: #define MII_LED_CONTROL	0x1B
ab@2201: #define E100_82552_LED_OVERRIDE 0x19
ab@2201: #define E100_82552_LED_ON       0x000F /* LEDTX and LED_RX both on */
ab@2201: #define E100_82552_LED_OFF      0x000A /* LEDTX and LED_RX both off */
ab@2201: static void e100_blink_led(unsigned long data)
ab@2201: {
ab@2201: 	struct nic *nic = (struct nic *)data;
ab@2201: 	enum led_state {
ab@2201: 		led_on     = 0x01,
ab@2201: 		led_off    = 0x04,
ab@2201: 		led_on_559 = 0x05,
ab@2201: 		led_on_557 = 0x07,
ab@2201: 	};
ab@2201: 	u16 led_reg = MII_LED_CONTROL;
ab@2201: 
ab@2201: 	if (nic->phy == phy_82552_v) {
ab@2201: 		led_reg = E100_82552_LED_OVERRIDE;
ab@2201: 
ab@2201: 		nic->leds = (nic->leds == E100_82552_LED_ON) ?
ab@2201: 		            E100_82552_LED_OFF : E100_82552_LED_ON;
ab@2201: 	} else {
ab@2201: 		nic->leds = (nic->leds & led_on) ? led_off :
ab@2201: 		            (nic->mac < mac_82559_D101M) ? led_on_557 :
ab@2201: 		            led_on_559;
ab@2201: 	}
ab@2201: 	mdio_write(nic->netdev, nic->mii.phy_id, led_reg, nic->leds);
ab@2201: 	mod_timer(&nic->blink_timer, jiffies + HZ / 4);
ab@2201: }
ab@2201: 
ab@2201: static int e100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	return mii_ethtool_gset(&nic->mii, cmd);
ab@2201: }
ab@2201: 
ab@2201: static int e100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	int err;
ab@2201: 
ab@2201: 	mdio_write(netdev, nic->mii.phy_id, MII_BMCR, BMCR_RESET);
ab@2201: 	err = mii_ethtool_sset(&nic->mii, cmd);
ab@2201: 	e100_exec_cb(nic, NULL, e100_configure);
ab@2201: 
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: static void e100_get_drvinfo(struct net_device *netdev,
ab@2201: 	struct ethtool_drvinfo *info)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	strcpy(info->driver, DRV_NAME);
ab@2201: 	strcpy(info->version, DRV_VERSION);
ab@2201: 	strcpy(info->fw_version, "N/A");
ab@2201: 	strcpy(info->bus_info, pci_name(nic->pdev));
ab@2201: }
ab@2201: 
ab@2201: #define E100_PHY_REGS 0x1C
ab@2201: static int e100_get_regs_len(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	return 1 + E100_PHY_REGS + sizeof(nic->mem->dump_buf);
ab@2201: }
ab@2201: 
ab@2201: static void e100_get_regs(struct net_device *netdev,
ab@2201: 	struct ethtool_regs *regs, void *p)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	u32 *buff = p;
ab@2201: 	int i;
ab@2201: 
ab@2201: 	regs->version = (1 << 24) | nic->pdev->revision;
ab@2201: 	buff[0] = ioread8(&nic->csr->scb.cmd_hi) << 24 |
ab@2201: 		ioread8(&nic->csr->scb.cmd_lo) << 16 |
ab@2201: 		ioread16(&nic->csr->scb.status);
ab@2201: 	for (i = E100_PHY_REGS; i >= 0; i--)
ab@2201: 		buff[1 + E100_PHY_REGS - i] =
ab@2201: 			mdio_read(netdev, nic->mii.phy_id, i);
ab@2201: 	memset(nic->mem->dump_buf, 0, sizeof(nic->mem->dump_buf));
ab@2201: 	e100_exec_cb(nic, NULL, e100_dump);
ab@2201: 	msleep(10);
ab@2201: 	memcpy(&buff[2 + E100_PHY_REGS], nic->mem->dump_buf,
ab@2201: 		sizeof(nic->mem->dump_buf));
ab@2201: }
ab@2201: 
ab@2201: static void e100_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	wol->supported = (nic->mac >= mac_82558_D101_A4) ?  WAKE_MAGIC : 0;
ab@2201: 	wol->wolopts = (nic->flags & wol_magic) ? WAKE_MAGIC : 0;
ab@2201: }
ab@2201: 
ab@2201: static int e100_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	if ((wol->wolopts && wol->wolopts != WAKE_MAGIC) ||
ab@2201: 	    !device_can_wakeup(&nic->pdev->dev))
ab@2201: 		return -EOPNOTSUPP;
ab@2201: 
ab@2201: 	if (wol->wolopts)
ab@2201: 		nic->flags |= wol_magic;
ab@2201: 	else
ab@2201: 		nic->flags &= ~wol_magic;
ab@2201: 
ab@2201: 	device_set_wakeup_enable(&nic->pdev->dev, wol->wolopts);
ab@2201: 
ab@2201: 	e100_exec_cb(nic, NULL, e100_configure);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static u32 e100_get_msglevel(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	return nic->msg_enable;
ab@2201: }
ab@2201: 
ab@2201: static void e100_set_msglevel(struct net_device *netdev, u32 value)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	nic->msg_enable = value;
ab@2201: }
ab@2201: 
ab@2201: static int e100_nway_reset(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	return mii_nway_restart(&nic->mii);
ab@2201: }
ab@2201: 
ab@2201: static u32 e100_get_link(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	return mii_link_ok(&nic->mii);
ab@2201: }
ab@2201: 
ab@2201: static int e100_get_eeprom_len(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	return nic->eeprom_wc << 1;
ab@2201: }
ab@2201: 
ab@2201: #define E100_EEPROM_MAGIC	0x1234
ab@2201: static int e100_get_eeprom(struct net_device *netdev,
ab@2201: 	struct ethtool_eeprom *eeprom, u8 *bytes)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	eeprom->magic = E100_EEPROM_MAGIC;
ab@2201: 	memcpy(bytes, &((u8 *)nic->eeprom)[eeprom->offset], eeprom->len);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static int e100_set_eeprom(struct net_device *netdev,
ab@2201: 	struct ethtool_eeprom *eeprom, u8 *bytes)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	if (eeprom->magic != E100_EEPROM_MAGIC)
ab@2201: 		return -EINVAL;
ab@2201: 
ab@2201: 	memcpy(&((u8 *)nic->eeprom)[eeprom->offset], bytes, eeprom->len);
ab@2201: 
ab@2201: 	return e100_eeprom_save(nic, eeprom->offset >> 1,
ab@2201: 		(eeprom->len >> 1) + 1);
ab@2201: }
ab@2201: 
ab@2201: static void e100_get_ringparam(struct net_device *netdev,
ab@2201: 	struct ethtool_ringparam *ring)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	struct param_range *rfds = &nic->params.rfds;
ab@2201: 	struct param_range *cbs = &nic->params.cbs;
ab@2201: 
ab@2201: 	ring->rx_max_pending = rfds->max;
ab@2201: 	ring->tx_max_pending = cbs->max;
ab@2201: 	ring->rx_mini_max_pending = 0;
ab@2201: 	ring->rx_jumbo_max_pending = 0;
ab@2201: 	ring->rx_pending = rfds->count;
ab@2201: 	ring->tx_pending = cbs->count;
ab@2201: 	ring->rx_mini_pending = 0;
ab@2201: 	ring->rx_jumbo_pending = 0;
ab@2201: }
ab@2201: 
ab@2201: static int e100_set_ringparam(struct net_device *netdev,
ab@2201: 	struct ethtool_ringparam *ring)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	struct param_range *rfds = &nic->params.rfds;
ab@2201: 	struct param_range *cbs = &nic->params.cbs;
ab@2201: 
ab@2201: 	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
ab@2201: 		return -EINVAL;
ab@2201: 
ab@2201: 	if (netif_running(netdev))
ab@2201: 		e100_down(nic);
ab@2201: 	rfds->count = max(ring->rx_pending, rfds->min);
ab@2201: 	rfds->count = min(rfds->count, rfds->max);
ab@2201: 	cbs->count = max(ring->tx_pending, cbs->min);
ab@2201: 	cbs->count = min(cbs->count, cbs->max);
ab@2201: 	DPRINTK(DRV, INFO, "Ring Param settings: rx: %d, tx %d\n",
ab@2201: 	        rfds->count, cbs->count);
ab@2201: 	if (netif_running(netdev))
ab@2201: 		e100_up(nic);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static const char e100_gstrings_test[][ETH_GSTRING_LEN] = {
ab@2201: 	"Link test     (on/offline)",
ab@2201: 	"Eeprom test   (on/offline)",
ab@2201: 	"Self test        (offline)",
ab@2201: 	"Mac loopback     (offline)",
ab@2201: 	"Phy loopback     (offline)",
ab@2201: };
ab@2201: #define E100_TEST_LEN	ARRAY_SIZE(e100_gstrings_test)
ab@2201: 
ab@2201: static void e100_diag_test(struct net_device *netdev,
ab@2201: 	struct ethtool_test *test, u64 *data)
ab@2201: {
ab@2201: 	struct ethtool_cmd cmd;
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	int i, err;
ab@2201: 
ab@2201: 	memset(data, 0, E100_TEST_LEN * sizeof(u64));
ab@2201: 	data[0] = !mii_link_ok(&nic->mii);
ab@2201: 	data[1] = e100_eeprom_load(nic);
ab@2201: 	if (test->flags & ETH_TEST_FL_OFFLINE) {
ab@2201: 
ab@2201: 		/* save speed, duplex & autoneg settings */
ab@2201: 		err = mii_ethtool_gset(&nic->mii, &cmd);
ab@2201: 
ab@2201: 		if (netif_running(netdev))
ab@2201: 			e100_down(nic);
ab@2201: 		data[2] = e100_self_test(nic);
ab@2201: 		data[3] = e100_loopback_test(nic, lb_mac);
ab@2201: 		data[4] = e100_loopback_test(nic, lb_phy);
ab@2201: 
ab@2201: 		/* restore speed, duplex & autoneg settings */
ab@2201: 		err = mii_ethtool_sset(&nic->mii, &cmd);
ab@2201: 
ab@2201: 		if (netif_running(netdev))
ab@2201: 			e100_up(nic);
ab@2201: 	}
ab@2201: 	for (i = 0; i < E100_TEST_LEN; i++)
ab@2201: 		test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0;
ab@2201: 
ab@2201: 	msleep_interruptible(4 * 1000);
ab@2201: }
ab@2201: 
ab@2201: static int e100_phys_id(struct net_device *netdev, u32 data)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	u16 led_reg = (nic->phy == phy_82552_v) ? E100_82552_LED_OVERRIDE :
ab@2201: 	              MII_LED_CONTROL;
ab@2201: 
ab@2201: 	if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
ab@2201: 		data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
ab@2201: 	mod_timer(&nic->blink_timer, jiffies);
ab@2201: 	msleep_interruptible(data * 1000);
ab@2201: 	del_timer_sync(&nic->blink_timer);
ab@2201: 	mdio_write(netdev, nic->mii.phy_id, led_reg, 0);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static const char e100_gstrings_stats[][ETH_GSTRING_LEN] = {
ab@2201: 	"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
ab@2201: 	"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
ab@2201: 	"rx_length_errors", "rx_over_errors", "rx_crc_errors",
ab@2201: 	"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
ab@2201: 	"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
ab@2201: 	"tx_heartbeat_errors", "tx_window_errors",
ab@2201: 	/* device-specific stats */
ab@2201: 	"tx_deferred", "tx_single_collisions", "tx_multi_collisions",
ab@2201: 	"tx_flow_control_pause", "rx_flow_control_pause",
ab@2201: 	"rx_flow_control_unsupported", "tx_tco_packets", "rx_tco_packets",
ab@2201: };
ab@2201: #define E100_NET_STATS_LEN	21
ab@2201: #define E100_STATS_LEN	ARRAY_SIZE(e100_gstrings_stats)
ab@2201: 
ab@2201: static int e100_get_sset_count(struct net_device *netdev, int sset)
ab@2201: {
ab@2201: 	switch (sset) {
ab@2201: 	case ETH_SS_TEST:
ab@2201: 		return E100_TEST_LEN;
ab@2201: 	case ETH_SS_STATS:
ab@2201: 		return E100_STATS_LEN;
ab@2201: 	default:
ab@2201: 		return -EOPNOTSUPP;
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: static void e100_get_ethtool_stats(struct net_device *netdev,
ab@2201: 	struct ethtool_stats *stats, u64 *data)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	int i;
ab@2201: 
ab@2201: 	for (i = 0; i < E100_NET_STATS_LEN; i++)
ab@2201: 		data[i] = ((unsigned long *)&netdev->stats)[i];
ab@2201: 
ab@2201: 	data[i++] = nic->tx_deferred;
ab@2201: 	data[i++] = nic->tx_single_collisions;
ab@2201: 	data[i++] = nic->tx_multiple_collisions;
ab@2201: 	data[i++] = nic->tx_fc_pause;
ab@2201: 	data[i++] = nic->rx_fc_pause;
ab@2201: 	data[i++] = nic->rx_fc_unsupported;
ab@2201: 	data[i++] = nic->tx_tco_frames;
ab@2201: 	data[i++] = nic->rx_tco_frames;
ab@2201: }
ab@2201: 
ab@2201: static void e100_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
ab@2201: {
ab@2201: 	switch (stringset) {
ab@2201: 	case ETH_SS_TEST:
ab@2201: 		memcpy(data, *e100_gstrings_test, sizeof(e100_gstrings_test));
ab@2201: 		break;
ab@2201: 	case ETH_SS_STATS:
ab@2201: 		memcpy(data, *e100_gstrings_stats, sizeof(e100_gstrings_stats));
ab@2201: 		break;
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: static const struct ethtool_ops e100_ethtool_ops = {
ab@2201: 	.get_settings		= e100_get_settings,
ab@2201: 	.set_settings		= e100_set_settings,
ab@2201: 	.get_drvinfo		= e100_get_drvinfo,
ab@2201: 	.get_regs_len		= e100_get_regs_len,
ab@2201: 	.get_regs		= e100_get_regs,
ab@2201: 	.get_wol		= e100_get_wol,
ab@2201: 	.set_wol		= e100_set_wol,
ab@2201: 	.get_msglevel		= e100_get_msglevel,
ab@2201: 	.set_msglevel		= e100_set_msglevel,
ab@2201: 	.nway_reset		= e100_nway_reset,
ab@2201: 	.get_link		= e100_get_link,
ab@2201: 	.get_eeprom_len		= e100_get_eeprom_len,
ab@2201: 	.get_eeprom		= e100_get_eeprom,
ab@2201: 	.set_eeprom		= e100_set_eeprom,
ab@2201: 	.get_ringparam		= e100_get_ringparam,
ab@2201: 	.set_ringparam		= e100_set_ringparam,
ab@2201: 	.self_test		= e100_diag_test,
ab@2201: 	.get_strings		= e100_get_strings,
ab@2201: 	.phys_id		= e100_phys_id,
ab@2201: 	.get_ethtool_stats	= e100_get_ethtool_stats,
ab@2201: 	.get_sset_count		= e100_get_sset_count,
ab@2201: };
ab@2201: 
ab@2201: static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	return generic_mii_ioctl(&nic->mii, if_mii(ifr), cmd, NULL);
ab@2201: }
ab@2201: 
ab@2201: static int e100_alloc(struct nic *nic)
ab@2201: {
ab@2201: 	nic->mem = pci_alloc_consistent(nic->pdev, sizeof(struct mem),
ab@2201: 		&nic->dma_addr);
ab@2201: 	return nic->mem ? 0 : -ENOMEM;
ab@2201: }
ab@2201: 
ab@2201: static void e100_free(struct nic *nic)
ab@2201: {
ab@2201: 	if (nic->mem) {
ab@2201: 		pci_free_consistent(nic->pdev, sizeof(struct mem),
ab@2201: 			nic->mem, nic->dma_addr);
ab@2201: 		nic->mem = NULL;
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: static int e100_open(struct net_device *netdev)
ab@2201: {
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 	int err = 0;
ab@2201: 
ab@2201: 	netif_carrier_off(netdev);
ab@2201: 	if ((err = e100_up(nic)))
ab@2201: 		DPRINTK(IFUP, ERR, "Cannot open interface, aborting.\n");
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: static int e100_close(struct net_device *netdev)
ab@2201: {
ab@2201: 	e100_down(netdev_priv(netdev));
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: static const struct net_device_ops e100_netdev_ops = {
ab@2201: 	.ndo_open		= e100_open,
ab@2201: 	.ndo_stop		= e100_close,
ab@2201: 	.ndo_start_xmit		= e100_xmit_frame,
ab@2201: 	.ndo_validate_addr	= eth_validate_addr,
ab@2201: 	.ndo_set_multicast_list	= e100_set_multicast_list,
ab@2201: 	.ndo_set_mac_address	= e100_set_mac_address,
ab@2201: 	.ndo_change_mtu		= e100_change_mtu,
ab@2201: 	.ndo_do_ioctl		= e100_do_ioctl,
ab@2201: 	.ndo_tx_timeout		= e100_tx_timeout,
ab@2201: #ifdef CONFIG_NET_POLL_CONTROLLER
ab@2201: 	.ndo_poll_controller	= e100_netpoll,
ab@2201: #endif
ab@2201: };
ab@2201: 
ab@2201: static int __devinit e100_probe(struct pci_dev *pdev,
ab@2201: 	const struct pci_device_id *ent)
ab@2201: {
ab@2201: 	struct net_device *netdev;
ab@2201: 	struct nic *nic;
ab@2201: 	int err;
ab@2201: 
ab@2201: 	if (!(netdev = alloc_etherdev(sizeof(struct nic)))) {
ab@2201: 		if (((1 << debug) - 1) & NETIF_MSG_PROBE)
ab@2201: 			printk(KERN_ERR PFX "Etherdev alloc failed, abort.\n");
ab@2201: 		return -ENOMEM;
ab@2201: 	}
ab@2201: 
ab@2201: 	netdev->netdev_ops = &e100_netdev_ops;
ab@2201: 	SET_ETHTOOL_OPS(netdev, &e100_ethtool_ops);
ab@2201: 	netdev->watchdog_timeo = E100_WATCHDOG_PERIOD;
ab@2201: 	strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
ab@2201: 
ab@2201: 	nic = netdev_priv(netdev);
ab@2201: 	netif_napi_add(netdev, &nic->napi, e100_poll, E100_NAPI_WEIGHT);
ab@2201: 	nic->netdev = netdev;
ab@2201: 	nic->pdev = pdev;
ab@2201: 	nic->msg_enable = (1 << debug) - 1;
ab@2201: 	nic->mdio_ctrl = mdio_ctrl_hw;
ab@2201: 	pci_set_drvdata(pdev, netdev);
ab@2201: 
ab@2201: 	if ((err = pci_enable_device(pdev))) {
ab@2201: 		DPRINTK(PROBE, ERR, "Cannot enable PCI device, aborting.\n");
ab@2201: 		goto err_out_free_dev;
ab@2201: 	}
ab@2201: 
ab@2201: 	if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
ab@2201: 		DPRINTK(PROBE, ERR, "Cannot find proper PCI device "
ab@2201: 			"base address, aborting.\n");
ab@2201: 		err = -ENODEV;
ab@2201: 		goto err_out_disable_pdev;
ab@2201: 	}
ab@2201: 
ab@2201: 	if ((err = pci_request_regions(pdev, DRV_NAME))) {
ab@2201: 		DPRINTK(PROBE, ERR, "Cannot obtain PCI resources, aborting.\n");
ab@2201: 		goto err_out_disable_pdev;
ab@2201: 	}
ab@2201: 
ab@2201: 	if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) {
ab@2201: 		DPRINTK(PROBE, ERR, "No usable DMA configuration, aborting.\n");
ab@2201: 		goto err_out_free_res;
ab@2201: 	}
ab@2201: 
ab@2201: 	SET_NETDEV_DEV(netdev, &pdev->dev);
ab@2201: 
ab@2201: 	if (use_io)
ab@2201: 		DPRINTK(PROBE, INFO, "using i/o access mode\n");
ab@2201: 
ab@2201: 	nic->csr = pci_iomap(pdev, (use_io ? 1 : 0), sizeof(struct csr));
ab@2201: 	if (!nic->csr) {
ab@2201: 		DPRINTK(PROBE, ERR, "Cannot map device registers, aborting.\n");
ab@2201: 		err = -ENOMEM;
ab@2201: 		goto err_out_free_res;
ab@2201: 	}
ab@2201: 
ab@2201: 	if (ent->driver_data)
ab@2201: 		nic->flags |= ich;
ab@2201: 	else
ab@2201: 		nic->flags &= ~ich;
ab@2201: 
ab@2201: 	e100_get_defaults(nic);
ab@2201: 
ab@2201: 	/* locks must be initialized before calling hw_reset */
ab@2201: 	spin_lock_init(&nic->cb_lock);
ab@2201: 	spin_lock_init(&nic->cmd_lock);
ab@2201: 	spin_lock_init(&nic->mdio_lock);
ab@2201: 
ab@2201: 	/* Reset the device before pci_set_master() in case device is in some
ab@2201: 	 * funky state and has an interrupt pending - hint: we don't have the
ab@2201: 	 * interrupt handler registered yet. */
ab@2201: 	e100_hw_reset(nic);
ab@2201: 
ab@2201: 	pci_set_master(pdev);
ab@2201: 
ab@2201: 	init_timer(&nic->watchdog);
ab@2201: 	nic->watchdog.function = e100_watchdog;
ab@2201: 	nic->watchdog.data = (unsigned long)nic;
ab@2201: 	init_timer(&nic->blink_timer);
ab@2201: 	nic->blink_timer.function = e100_blink_led;
ab@2201: 	nic->blink_timer.data = (unsigned long)nic;
ab@2201: 
ab@2201: 	INIT_WORK(&nic->tx_timeout_task, e100_tx_timeout_task);
ab@2201: 
ab@2201: 	if ((err = e100_alloc(nic))) {
ab@2201: 		DPRINTK(PROBE, ERR, "Cannot alloc driver memory, aborting.\n");
ab@2201: 		goto err_out_iounmap;
ab@2201: 	}
ab@2201: 
ab@2201: 	if ((err = e100_eeprom_load(nic)))
ab@2201: 		goto err_out_free;
ab@2201: 
ab@2201: 	e100_phy_init(nic);
ab@2201: 
ab@2201: 	memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN);
ab@2201: 	memcpy(netdev->perm_addr, nic->eeprom, ETH_ALEN);
ab@2201: 	if (!is_valid_ether_addr(netdev->perm_addr)) {
ab@2201: 		if (!eeprom_bad_csum_allow) {
ab@2201: 			DPRINTK(PROBE, ERR, "Invalid MAC address from "
ab@2201: 			        "EEPROM, aborting.\n");
ab@2201: 			err = -EAGAIN;
ab@2201: 			goto err_out_free;
ab@2201: 		} else {
ab@2201: 			DPRINTK(PROBE, ERR, "Invalid MAC address from EEPROM, "
ab@2201: 			        "you MUST configure one.\n");
ab@2201: 		}
ab@2201: 	}
ab@2201: 
ab@2201: 	/* Wol magic packet can be enabled from eeprom */
ab@2201: 	if ((nic->mac >= mac_82558_D101_A4) &&
ab@2201: 	   (nic->eeprom[eeprom_id] & eeprom_id_wol)) {
ab@2201: 		nic->flags |= wol_magic;
ab@2201: 		device_set_wakeup_enable(&pdev->dev, true);
ab@2201: 	}
ab@2201: 
ab@2201: 	/* ack any pending wake events, disable PME */
ab@2201: 	pci_pme_active(pdev, false);
ab@2201: 
ab@2201: 	strcpy(netdev->name, "eth%d");
ab@2201: 	if ((err = register_netdev(netdev))) {
ab@2201: 		DPRINTK(PROBE, ERR, "Cannot register net device, aborting.\n");
ab@2201: 		goto err_out_free;
ab@2201: 	}
ab@2201: 	nic->cbs_pool = pci_pool_create(netdev->name,
ab@2201: 			   nic->pdev,
ab@2201: 			   nic->params.cbs.max * sizeof(struct cb),
ab@2201: 			   sizeof(u32),
ab@2201: 			   0);
ab@2201: 	DPRINTK(PROBE, INFO, "addr 0x%llx, irq %d, MAC addr %pM\n",
ab@2201: 		(unsigned long long)pci_resource_start(pdev, use_io ? 1 : 0),
ab@2201: 		pdev->irq, netdev->dev_addr);
ab@2201: 
ab@2201: 	return 0;
ab@2201: 
ab@2201: err_out_free:
ab@2201: 	e100_free(nic);
ab@2201: err_out_iounmap:
ab@2201: 	pci_iounmap(pdev, nic->csr);
ab@2201: err_out_free_res:
ab@2201: 	pci_release_regions(pdev);
ab@2201: err_out_disable_pdev:
ab@2201: 	pci_disable_device(pdev);
ab@2201: err_out_free_dev:
ab@2201: 	pci_set_drvdata(pdev, NULL);
ab@2201: 	free_netdev(netdev);
ab@2201: 	return err;
ab@2201: }
ab@2201: 
ab@2201: static void __devexit e100_remove(struct pci_dev *pdev)
ab@2201: {
ab@2201: 	struct net_device *netdev = pci_get_drvdata(pdev);
ab@2201: 
ab@2201: 	if (netdev) {
ab@2201: 		struct nic *nic = netdev_priv(netdev);
ab@2201: 		unregister_netdev(netdev);
ab@2201: 		e100_free(nic);
ab@2201: 		pci_iounmap(pdev, nic->csr);
ab@2201: 		pci_pool_destroy(nic->cbs_pool);
ab@2201: 		free_netdev(netdev);
ab@2201: 		pci_release_regions(pdev);
ab@2201: 		pci_disable_device(pdev);
ab@2201: 		pci_set_drvdata(pdev, NULL);
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: #define E100_82552_SMARTSPEED   0x14   /* SmartSpeed Ctrl register */
ab@2201: #define E100_82552_REV_ANEG     0x0200 /* Reverse auto-negotiation */
ab@2201: #define E100_82552_ANEG_NOW     0x0400 /* Auto-negotiate now */
ab@2201: static void __e100_shutdown(struct pci_dev *pdev, bool *enable_wake)
ab@2201: {
ab@2201: 	struct net_device *netdev = pci_get_drvdata(pdev);
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	if (netif_running(netdev))
ab@2201: 		e100_down(nic);
ab@2201: 	netif_device_detach(netdev);
ab@2201: 
ab@2201: 	pci_save_state(pdev);
ab@2201: 
ab@2201: 	if ((nic->flags & wol_magic) | e100_asf(nic)) {
ab@2201: 		/* enable reverse auto-negotiation */
ab@2201: 		if (nic->phy == phy_82552_v) {
ab@2201: 			u16 smartspeed = mdio_read(netdev, nic->mii.phy_id,
ab@2201: 			                           E100_82552_SMARTSPEED);
ab@2201: 
ab@2201: 			mdio_write(netdev, nic->mii.phy_id,
ab@2201: 			           E100_82552_SMARTSPEED, smartspeed |
ab@2201: 			           E100_82552_REV_ANEG | E100_82552_ANEG_NOW);
ab@2201: 		}
ab@2201: 		*enable_wake = true;
ab@2201: 	} else {
ab@2201: 		*enable_wake = false;
ab@2201: 	}
ab@2201: 
ab@2201: 	pci_disable_device(pdev);
ab@2201: }
ab@2201: 
ab@2201: static int __e100_power_off(struct pci_dev *pdev, bool wake)
ab@2201: {
ab@2201: 	if (wake)
ab@2201: 		return pci_prepare_to_sleep(pdev);
ab@2201: 
ab@2201: 	pci_wake_from_d3(pdev, false);
ab@2201: 	pci_set_power_state(pdev, PCI_D3hot);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: 
ab@2201: #ifdef CONFIG_PM
ab@2201: static int e100_suspend(struct pci_dev *pdev, pm_message_t state)
ab@2201: {
ab@2201: 	bool wake;
ab@2201: 	__e100_shutdown(pdev, &wake);
ab@2201: 	return __e100_power_off(pdev, wake);
ab@2201: }
ab@2201: 
ab@2201: static int e100_resume(struct pci_dev *pdev)
ab@2201: {
ab@2201: 	struct net_device *netdev = pci_get_drvdata(pdev);
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	pci_set_power_state(pdev, PCI_D0);
ab@2201: 	pci_restore_state(pdev);
ab@2201: 	/* ack any pending wake events, disable PME */
ab@2201: 	pci_enable_wake(pdev, 0, 0);
ab@2201: 
ab@2201: 	/* disable reverse auto-negotiation */
ab@2201: 	if (nic->phy == phy_82552_v) {
ab@2201: 		u16 smartspeed = mdio_read(netdev, nic->mii.phy_id,
ab@2201: 		                           E100_82552_SMARTSPEED);
ab@2201: 
ab@2201: 		mdio_write(netdev, nic->mii.phy_id,
ab@2201: 		           E100_82552_SMARTSPEED,
ab@2201: 		           smartspeed & ~(E100_82552_REV_ANEG));
ab@2201: 	}
ab@2201: 
ab@2201: 	netif_device_attach(netdev);
ab@2201: 	if (netif_running(netdev))
ab@2201: 		e100_up(nic);
ab@2201: 
ab@2201: 	return 0;
ab@2201: }
ab@2201: #endif /* CONFIG_PM */
ab@2201: 
ab@2201: static void e100_shutdown(struct pci_dev *pdev)
ab@2201: {
ab@2201: 	bool wake;
ab@2201: 	__e100_shutdown(pdev, &wake);
ab@2201: 	if (system_state == SYSTEM_POWER_OFF)
ab@2201: 		__e100_power_off(pdev, wake);
ab@2201: }
ab@2201: 
ab@2201: /* ------------------ PCI Error Recovery infrastructure  -------------- */
ab@2201: /**
ab@2201:  * e100_io_error_detected - called when PCI error is detected.
ab@2201:  * @pdev: Pointer to PCI device
ab@2201:  * @state: The current pci connection state
ab@2201:  */
ab@2201: static pci_ers_result_t e100_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
ab@2201: {
ab@2201: 	struct net_device *netdev = pci_get_drvdata(pdev);
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	netif_device_detach(netdev);
ab@2201: 
ab@2201: 	if (state == pci_channel_io_perm_failure)
ab@2201: 		return PCI_ERS_RESULT_DISCONNECT;
ab@2201: 
ab@2201: 	if (netif_running(netdev))
ab@2201: 		e100_down(nic);
ab@2201: 	pci_disable_device(pdev);
ab@2201: 
ab@2201: 	/* Request a slot reset. */
ab@2201: 	return PCI_ERS_RESULT_NEED_RESET;
ab@2201: }
ab@2201: 
ab@2201: /**
ab@2201:  * e100_io_slot_reset - called after the pci bus has been reset.
ab@2201:  * @pdev: Pointer to PCI device
ab@2201:  *
ab@2201:  * Restart the card from scratch.
ab@2201:  */
ab@2201: static pci_ers_result_t e100_io_slot_reset(struct pci_dev *pdev)
ab@2201: {
ab@2201: 	struct net_device *netdev = pci_get_drvdata(pdev);
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	if (pci_enable_device(pdev)) {
ab@2201: 		printk(KERN_ERR "e100: Cannot re-enable PCI device after reset.\n");
ab@2201: 		return PCI_ERS_RESULT_DISCONNECT;
ab@2201: 	}
ab@2201: 	pci_set_master(pdev);
ab@2201: 
ab@2201: 	/* Only one device per card can do a reset */
ab@2201: 	if (0 != PCI_FUNC(pdev->devfn))
ab@2201: 		return PCI_ERS_RESULT_RECOVERED;
ab@2201: 	e100_hw_reset(nic);
ab@2201: 	e100_phy_init(nic);
ab@2201: 
ab@2201: 	return PCI_ERS_RESULT_RECOVERED;
ab@2201: }
ab@2201: 
ab@2201: /**
ab@2201:  * e100_io_resume - resume normal operations
ab@2201:  * @pdev: Pointer to PCI device
ab@2201:  *
ab@2201:  * Resume normal operations after an error recovery
ab@2201:  * sequence has been completed.
ab@2201:  */
ab@2201: static void e100_io_resume(struct pci_dev *pdev)
ab@2201: {
ab@2201: 	struct net_device *netdev = pci_get_drvdata(pdev);
ab@2201: 	struct nic *nic = netdev_priv(netdev);
ab@2201: 
ab@2201: 	/* ack any pending wake events, disable PME */
ab@2201: 	pci_enable_wake(pdev, 0, 0);
ab@2201: 
ab@2201: 	netif_device_attach(netdev);
ab@2201: 	if (netif_running(netdev)) {
ab@2201: 		e100_open(netdev);
ab@2201: 		mod_timer(&nic->watchdog, jiffies);
ab@2201: 	}
ab@2201: }
ab@2201: 
ab@2201: static struct pci_error_handlers e100_err_handler = {
ab@2201: 	.error_detected = e100_io_error_detected,
ab@2201: 	.slot_reset = e100_io_slot_reset,
ab@2201: 	.resume = e100_io_resume,
ab@2201: };
ab@2201: 
ab@2201: static struct pci_driver e100_driver = {
ab@2201: 	.name =         DRV_NAME,
ab@2201: 	.id_table =     e100_id_table,
ab@2201: 	.probe =        e100_probe,
ab@2201: 	.remove =       __devexit_p(e100_remove),
ab@2201: #ifdef CONFIG_PM
ab@2201: 	/* Power Management hooks */
ab@2201: 	.suspend =      e100_suspend,
ab@2201: 	.resume =       e100_resume,
ab@2201: #endif
ab@2201: 	.shutdown =     e100_shutdown,
ab@2201: 	.err_handler = &e100_err_handler,
ab@2201: };
ab@2201: 
ab@2201: static int __init e100_init_module(void)
ab@2201: {
ab@2201: 	if (((1 << debug) - 1) & NETIF_MSG_DRV) {
ab@2201: 		printk(KERN_INFO PFX "%s, %s\n", DRV_DESCRIPTION, DRV_VERSION);
ab@2201: 		printk(KERN_INFO PFX "%s\n", DRV_COPYRIGHT);
ab@2201: 	}
ab@2201: 	return pci_register_driver(&e100_driver);
ab@2201: }
ab@2201: 
ab@2201: static void __exit e100_cleanup_module(void)
ab@2201: {
ab@2201: 	pci_unregister_driver(&e100_driver);
ab@2201: }
ab@2201: 
ab@2201: module_init(e100_init_module);
ab@2201: module_exit(e100_cleanup_module);