ha@828: /*
ha@828: 
ha@828: 	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
ha@828: 
ha@828: 	Maintained by Jeff Garzik <jgarzik@pobox.com>
ha@828: 	Copyright 2000-2002 Jeff Garzik
ha@828: 
ha@828: 	Much code comes from Donald Becker's rtl8139.c driver,
ha@828: 	versions 1.13 and older.  This driver was originally based
ha@828: 	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
ha@828: 
ha@828: 	-----<snip>-----
ha@828: 
ha@828:         	Written 1997-2001 by Donald Becker.
ha@828: 		This software may be used and distributed according to the
ha@828: 		terms of the GNU General Public License (GPL), incorporated
ha@828: 		herein by reference.  Drivers based on or derived from this
ha@828: 		code fall under the GPL and must retain the authorship,
ha@828: 		copyright and license notice.  This file is not a complete
ha@828: 		program and may only be used when the entire operating
ha@828: 		system is licensed under the GPL.
ha@828: 
ha@828: 		This driver is for boards based on the RTL8129 and RTL8139
ha@828: 		PCI ethernet chips.
ha@828: 
ha@828: 		The author may be reached as becker@scyld.com, or C/O Scyld
ha@828: 		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
ha@828: 		MD 21403
ha@828: 
ha@828: 		Support and updates available at
ha@828: 		http://www.scyld.com/network/rtl8139.html
ha@828: 
ha@828: 		Twister-tuning table provided by Kinston
ha@828: 		<shangh@realtek.com.tw>.
ha@828: 
ha@828: 	-----<snip>-----
ha@828: 
ha@828: 	This software may be used and distributed according to the terms
ha@828: 	of the GNU General Public License, incorporated herein by reference.
ha@828: 
ha@828: 	Contributors:
ha@828: 
ha@828: 		Donald Becker - he wrote the original driver, kudos to him!
ha@828: 		(but please don't e-mail him for support, this isn't his driver)
ha@828: 
ha@828: 		Tigran Aivazian - bug fixes, skbuff free cleanup
ha@828: 
ha@828: 		Martin Mares - suggestions for PCI cleanup
ha@828: 
ha@828: 		David S. Miller - PCI DMA and softnet updates
ha@828: 
ha@828: 		Ernst Gill - fixes ported from BSD driver
ha@828: 
ha@828: 		Daniel Kobras - identified specific locations of
ha@828: 			posted MMIO write bugginess
ha@828: 
ha@828: 		Gerard Sharp - bug fix, testing and feedback
ha@828: 
ha@828: 		David Ford - Rx ring wrap fix
ha@828: 
ha@828: 		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
ha@828: 		to find and fix a crucial bug on older chipsets.
ha@828: 
ha@828: 		Donald Becker/Chris Butterworth/Marcus Westergren -
ha@828: 		Noticed various Rx packet size-related buglets.
ha@828: 
ha@828: 		Santiago Garcia Mantinan - testing and feedback
ha@828: 
ha@828: 		Jens David - 2.2.x kernel backports
ha@828: 
ha@828: 		Martin Dennett - incredibly helpful insight on undocumented
ha@828: 		features of the 8139 chips
ha@828: 
ha@828: 		Jean-Jacques Michel - bug fix
ha@828: 
ha@828: 		Tobias Ringström - Rx interrupt status checking suggestion
ha@828: 
ha@828: 		Andrew Morton - Clear blocked signals, avoid
ha@828: 		buffer overrun setting current->comm.
ha@828: 
ha@828: 		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
ha@828: 
ha@828: 		Robert Kuebel - Save kernel thread from dying on any signal.
ha@828: 
ha@828: 	Submitting bug reports:
ha@828: 
ha@828: 		"rtl8139-diag -mmmaaavvveefN" output
ha@828: 		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
ha@828: 
ha@828: */
ha@828: 
ha@828: #define DRV_NAME	"8139too"
ha@828: #define DRV_VERSION	"0.9.28"
ha@828: 
ha@828: 
ha@828: #include <linux/module.h>
ha@828: #include <linux/kernel.h>
ha@828: #include <linux/compiler.h>
ha@828: #include <linux/pci.h>
ha@828: #include <linux/init.h>
ha@828: #include <linux/ioport.h>
ha@828: #include <linux/netdevice.h>
ha@828: #include <linux/etherdevice.h>
ha@828: #include <linux/rtnetlink.h>
ha@828: #include <linux/delay.h>
ha@828: #include <linux/ethtool.h>
ha@828: #include <linux/mii.h>
ha@828: #include <linux/completion.h>
ha@828: #include <linux/crc32.h>
ha@828: #include <asm/io.h>
ha@828: #include <asm/uaccess.h>
ha@828: #include <asm/irq.h>
ha@828: 
ha@828: #define RTL8139_DRIVER_NAME   DRV_NAME " Fast Ethernet driver " DRV_VERSION
ha@828: #define PFX DRV_NAME ": "
ha@828: 
ha@828: /* Default Message level */
ha@828: #define RTL8139_DEF_MSG_ENABLE   (NETIF_MSG_DRV   | \
ha@828:                                  NETIF_MSG_PROBE  | \
ha@828:                                  NETIF_MSG_LINK)
ha@828: 
ha@828: 
ha@828: /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
ha@828: #ifdef CONFIG_8139TOO_PIO
ha@828: #define USE_IO_OPS 1
ha@828: #endif
ha@828: 
ha@828: /* define to 1, 2 or 3 to enable copious debugging info */
ha@828: #define RTL8139_DEBUG 0
ha@828: 
ha@828: /* define to 1 to disable lightweight runtime debugging checks */
ha@828: #undef RTL8139_NDEBUG
ha@828: 
ha@828: 
ha@828: #if RTL8139_DEBUG
ha@828: /* note: prints function name for you */
ha@828: #  define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
ha@828: #else
ha@828: #  define DPRINTK(fmt, args...)
ha@828: #endif
ha@828: 
ha@828: #ifdef RTL8139_NDEBUG
ha@828: #  define assert(expr) do {} while (0)
ha@828: #else
ha@828: #  define assert(expr) \
ha@828:         if(unlikely(!(expr))) {				        \
ha@828:         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n",	\
ha@828:         #expr,__FILE__,__FUNCTION__,__LINE__);		        \
ha@828:         }
ha@828: #endif
ha@828: 
ha@828: 
ha@828: /* A few user-configurable values. */
ha@828: /* media options */
ha@828: #define MAX_UNITS 8
ha@828: static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
ha@828: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
ha@828: 
ha@828: /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
ha@828:    The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
ha@828: static int multicast_filter_limit = 32;
ha@828: 
ha@828: /* bitmapped message enable number */
ha@828: static int debug = -1;
ha@828: 
ha@828: /*
ha@828:  * Receive ring size
ha@828:  * Warning: 64K ring has hardware issues and may lock up.
ha@828:  */
ha@828: #if defined(CONFIG_SH_DREAMCAST)
ha@828: #define RX_BUF_IDX	1	/* 16K ring */
ha@828: #else
ha@828: #define RX_BUF_IDX	2	/* 32K ring */
ha@828: #endif
ha@828: #define RX_BUF_LEN	(8192 << RX_BUF_IDX)
ha@828: #define RX_BUF_PAD	16
ha@828: #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
ha@828: 
ha@828: #if RX_BUF_LEN == 65536
ha@828: #define RX_BUF_TOT_LEN	RX_BUF_LEN
ha@828: #else
ha@828: #define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
ha@828: #endif
ha@828: 
ha@828: /* Number of Tx descriptor registers. */
ha@828: #define NUM_TX_DESC	4
ha@828: 
ha@828: /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
ha@828: #define MAX_ETH_FRAME_SIZE	1536
ha@828: 
ha@828: /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
ha@828: #define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
ha@828: #define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
ha@828: 
ha@828: /* PCI Tuning Parameters
ha@828:    Threshold is bytes transferred to chip before transmission starts. */
ha@828: #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
ha@828: 
ha@828: /* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
ha@828: #define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
ha@828: #define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
ha@828: #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
ha@828: #define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
ha@828: 
ha@828: /* Operational parameters that usually are not changed. */
ha@828: /* Time in jiffies before concluding the transmitter is hung. */
ha@828: #define TX_TIMEOUT  (6*HZ)
ha@828: 
ha@828: 
ha@828: enum {
ha@828: 	HAS_MII_XCVR = 0x010000,
ha@828: 	HAS_CHIP_XCVR = 0x020000,
ha@828: 	HAS_LNK_CHNG = 0x040000,
ha@828: };
ha@828: 
ha@828: #define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
ha@828: #define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
ha@828: #define RTL_MIN_IO_SIZE 0x80
ha@828: #define RTL8139B_IO_SIZE 256
ha@828: 
ha@828: #define RTL8129_CAPS	HAS_MII_XCVR
ha@828: #define RTL8139_CAPS	HAS_CHIP_XCVR|HAS_LNK_CHNG
ha@828: 
ha@828: typedef enum {
ha@828: 	RTL8139 = 0,
ha@828: 	RTL8129,
ha@828: } board_t;
ha@828: 
ha@828: 
ha@828: /* indexed by board_t, above */
ha@828: static const struct {
ha@828: 	const char *name;
ha@828: 	u32 hw_flags;
ha@828: } board_info[] __devinitdata = {
ha@828: 	{ "RealTek RTL8139", RTL8139_CAPS },
ha@828: 	{ "RealTek RTL8129", RTL8129_CAPS },
ha@828: };
ha@828: 
ha@828: 
ha@828: static struct pci_device_id rtl8139_pci_tbl[] = {
ha@828: 	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 	{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: 
ha@828: #ifdef CONFIG_SH_SECUREEDGE5410
ha@828: 	/* Bogus 8139 silicon reports 8129 without external PROM :-( */
ha@828: 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
ha@828: #endif
ha@828: #ifdef CONFIG_8139TOO_8129
ha@828: 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
ha@828: #endif
ha@828: 
ha@828: 	/* some crazy cards report invalid vendor ids like
ha@828: 	 * 0x0001 here.  The other ids are valid and constant,
ha@828: 	 * so we simply don't match on the main vendor id.
ha@828: 	 */
ha@828: 	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
ha@828: 	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
ha@828: 	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
ha@828: 
ha@828: 	{0,}
ha@828: };
ha@828: MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
ha@828: 
ha@828: static struct {
ha@828: 	const char str[ETH_GSTRING_LEN];
ha@828: } ethtool_stats_keys[] = {
ha@828: 	{ "early_rx" },
ha@828: 	{ "tx_buf_mapped" },
ha@828: 	{ "tx_timeouts" },
ha@828: 	{ "rx_lost_in_ring" },
ha@828: };
ha@828: 
ha@828: /* The rest of these values should never change. */
ha@828: 
ha@828: /* Symbolic offsets to registers. */
ha@828: enum RTL8139_registers {
ha@828: 	MAC0 = 0,		/* Ethernet hardware address. */
ha@828: 	MAR0 = 8,		/* Multicast filter. */
ha@828: 	TxStatus0 = 0x10,	/* Transmit status (Four 32bit registers). */
ha@828: 	TxAddr0 = 0x20,		/* Tx descriptors (also four 32bit). */
ha@828: 	RxBuf = 0x30,
ha@828: 	ChipCmd = 0x37,
ha@828: 	RxBufPtr = 0x38,
ha@828: 	RxBufAddr = 0x3A,
ha@828: 	IntrMask = 0x3C,
ha@828: 	IntrStatus = 0x3E,
ha@828: 	TxConfig = 0x40,
ha@828: 	RxConfig = 0x44,
ha@828: 	Timer = 0x48,		/* A general-purpose counter. */
ha@828: 	RxMissed = 0x4C,	/* 24 bits valid, write clears. */
ha@828: 	Cfg9346 = 0x50,
ha@828: 	Config0 = 0x51,
ha@828: 	Config1 = 0x52,
ha@828: 	FlashReg = 0x54,
ha@828: 	MediaStatus = 0x58,
ha@828: 	Config3 = 0x59,
ha@828: 	Config4 = 0x5A,		/* absent on RTL-8139A */
ha@828: 	HltClk = 0x5B,
ha@828: 	MultiIntr = 0x5C,
ha@828: 	TxSummary = 0x60,
ha@828: 	BasicModeCtrl = 0x62,
ha@828: 	BasicModeStatus = 0x64,
ha@828: 	NWayAdvert = 0x66,
ha@828: 	NWayLPAR = 0x68,
ha@828: 	NWayExpansion = 0x6A,
ha@828: 	/* Undocumented registers, but required for proper operation. */
ha@828: 	FIFOTMS = 0x70,		/* FIFO Control and test. */
ha@828: 	CSCR = 0x74,		/* Chip Status and Configuration Register. */
ha@828: 	PARA78 = 0x78,
ha@828: 	PARA7c = 0x7c,		/* Magic transceiver parameter register. */
ha@828: 	Config5 = 0xD8,		/* absent on RTL-8139A */
ha@828: };
ha@828: 
ha@828: enum ClearBitMasks {
ha@828: 	MultiIntrClear = 0xF000,
ha@828: 	ChipCmdClear = 0xE2,
ha@828: 	Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
ha@828: };
ha@828: 
ha@828: enum ChipCmdBits {
ha@828: 	CmdReset = 0x10,
ha@828: 	CmdRxEnb = 0x08,
ha@828: 	CmdTxEnb = 0x04,
ha@828: 	RxBufEmpty = 0x01,
ha@828: };
ha@828: 
ha@828: /* Interrupt register bits, using my own meaningful names. */
ha@828: enum IntrStatusBits {
ha@828: 	PCIErr = 0x8000,
ha@828: 	PCSTimeout = 0x4000,
ha@828: 	RxFIFOOver = 0x40,
ha@828: 	RxUnderrun = 0x20,
ha@828: 	RxOverflow = 0x10,
ha@828: 	TxErr = 0x08,
ha@828: 	TxOK = 0x04,
ha@828: 	RxErr = 0x02,
ha@828: 	RxOK = 0x01,
ha@828: 
ha@828: 	RxAckBits = RxFIFOOver | RxOverflow | RxOK,
ha@828: };
ha@828: 
ha@828: enum TxStatusBits {
ha@828: 	TxHostOwns = 0x2000,
ha@828: 	TxUnderrun = 0x4000,
ha@828: 	TxStatOK = 0x8000,
ha@828: 	TxOutOfWindow = 0x20000000,
ha@828: 	TxAborted = 0x40000000,
ha@828: 	TxCarrierLost = 0x80000000,
ha@828: };
ha@828: enum RxStatusBits {
ha@828: 	RxMulticast = 0x8000,
ha@828: 	RxPhysical = 0x4000,
ha@828: 	RxBroadcast = 0x2000,
ha@828: 	RxBadSymbol = 0x0020,
ha@828: 	RxRunt = 0x0010,
ha@828: 	RxTooLong = 0x0008,
ha@828: 	RxCRCErr = 0x0004,
ha@828: 	RxBadAlign = 0x0002,
ha@828: 	RxStatusOK = 0x0001,
ha@828: };
ha@828: 
ha@828: /* Bits in RxConfig. */
ha@828: enum rx_mode_bits {
ha@828: 	AcceptErr = 0x20,
ha@828: 	AcceptRunt = 0x10,
ha@828: 	AcceptBroadcast = 0x08,
ha@828: 	AcceptMulticast = 0x04,
ha@828: 	AcceptMyPhys = 0x02,
ha@828: 	AcceptAllPhys = 0x01,
ha@828: };
ha@828: 
ha@828: /* Bits in TxConfig. */
ha@828: enum tx_config_bits {
ha@828: 
ha@828:         /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
ha@828:         TxIFGShift = 24,
ha@828:         TxIFG84 = (0 << TxIFGShift),    /* 8.4us / 840ns (10 / 100Mbps) */
ha@828:         TxIFG88 = (1 << TxIFGShift),    /* 8.8us / 880ns (10 / 100Mbps) */
ha@828:         TxIFG92 = (2 << TxIFGShift),    /* 9.2us / 920ns (10 / 100Mbps) */
ha@828:         TxIFG96 = (3 << TxIFGShift),    /* 9.6us / 960ns (10 / 100Mbps) */
ha@828: 
ha@828: 	TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
ha@828: 	TxCRC = (1 << 16),	/* DISABLE appending CRC to end of Tx packets */
ha@828: 	TxClearAbt = (1 << 0),	/* Clear abort (WO) */
ha@828: 	TxDMAShift = 8,		/* DMA burst value (0-7) is shifted this many bits */
ha@828: 	TxRetryShift = 4,	/* TXRR value (0-15) is shifted this many bits */
ha@828: 
ha@828: 	TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
ha@828: };
ha@828: 
ha@828: /* Bits in Config1 */
ha@828: enum Config1Bits {
ha@828: 	Cfg1_PM_Enable = 0x01,
ha@828: 	Cfg1_VPD_Enable = 0x02,
ha@828: 	Cfg1_PIO = 0x04,
ha@828: 	Cfg1_MMIO = 0x08,
ha@828: 	LWAKE = 0x10,		/* not on 8139, 8139A */
ha@828: 	Cfg1_Driver_Load = 0x20,
ha@828: 	Cfg1_LED0 = 0x40,
ha@828: 	Cfg1_LED1 = 0x80,
ha@828: 	SLEEP = (1 << 1),	/* only on 8139, 8139A */
ha@828: 	PWRDN = (1 << 0),	/* only on 8139, 8139A */
ha@828: };
ha@828: 
ha@828: /* Bits in Config3 */
ha@828: enum Config3Bits {
ha@828: 	Cfg3_FBtBEn    = (1 << 0), /* 1 = Fast Back to Back */
ha@828: 	Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
ha@828: 	Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
ha@828: 	Cfg3_CardB_En  = (1 << 3), /* 1 = enable CardBus registers */
ha@828: 	Cfg3_LinkUp    = (1 << 4), /* 1 = wake up on link up */
ha@828: 	Cfg3_Magic     = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
ha@828: 	Cfg3_PARM_En   = (1 << 6), /* 0 = software can set twister parameters */
ha@828: 	Cfg3_GNTSel    = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
ha@828: };
ha@828: 
ha@828: /* Bits in Config4 */
ha@828: enum Config4Bits {
ha@828: 	LWPTN = (1 << 2),	/* not on 8139, 8139A */
ha@828: };
ha@828: 
ha@828: /* Bits in Config5 */
ha@828: enum Config5Bits {
ha@828: 	Cfg5_PME_STS     = (1 << 0), /* 1 = PCI reset resets PME_Status */
ha@828: 	Cfg5_LANWake     = (1 << 1), /* 1 = enable LANWake signal */
ha@828: 	Cfg5_LDPS        = (1 << 2), /* 0 = save power when link is down */
ha@828: 	Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
ha@828: 	Cfg5_UWF         = (1 << 4), /* 1 = accept unicast wakeup frame */
ha@828: 	Cfg5_MWF         = (1 << 5), /* 1 = accept multicast wakeup frame */
ha@828: 	Cfg5_BWF         = (1 << 6), /* 1 = accept broadcast wakeup frame */
ha@828: };
ha@828: 
ha@828: enum RxConfigBits {
ha@828: 	/* rx fifo threshold */
ha@828: 	RxCfgFIFOShift = 13,
ha@828: 	RxCfgFIFONone = (7 << RxCfgFIFOShift),
ha@828: 
ha@828: 	/* Max DMA burst */
ha@828: 	RxCfgDMAShift = 8,
ha@828: 	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
ha@828: 
ha@828: 	/* rx ring buffer length */
ha@828: 	RxCfgRcv8K = 0,
ha@828: 	RxCfgRcv16K = (1 << 11),
ha@828: 	RxCfgRcv32K = (1 << 12),
ha@828: 	RxCfgRcv64K = (1 << 11) | (1 << 12),
ha@828: 
ha@828: 	/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
ha@828: 	RxNoWrap = (1 << 7),
ha@828: };
ha@828: 
ha@828: /* Twister tuning parameters from RealTek.
ha@828:    Completely undocumented, but required to tune bad links on some boards. */
ha@828: enum CSCRBits {
ha@828: 	CSCR_LinkOKBit = 0x0400,
ha@828: 	CSCR_LinkChangeBit = 0x0800,
ha@828: 	CSCR_LinkStatusBits = 0x0f000,
ha@828: 	CSCR_LinkDownOffCmd = 0x003c0,
ha@828: 	CSCR_LinkDownCmd = 0x0f3c0,
ha@828: };
ha@828: 
ha@828: enum Cfg9346Bits {
ha@828: 	Cfg9346_Lock = 0x00,
ha@828: 	Cfg9346_Unlock = 0xC0,
ha@828: };
ha@828: 
ha@828: typedef enum {
ha@828: 	CH_8139 = 0,
ha@828: 	CH_8139_K,
ha@828: 	CH_8139A,
ha@828: 	CH_8139A_G,
ha@828: 	CH_8139B,
ha@828: 	CH_8130,
ha@828: 	CH_8139C,
ha@828: 	CH_8100,
ha@828: 	CH_8100B_8139D,
ha@828: 	CH_8101,
ha@828: } chip_t;
ha@828: 
ha@828: enum chip_flags {
ha@828: 	HasHltClk = (1 << 0),
ha@828: 	HasLWake = (1 << 1),
ha@828: };
ha@828: 
ha@828: #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
ha@828: 	(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
ha@828: #define HW_REVID_MASK	HW_REVID(1, 1, 1, 1, 1, 1, 1)
ha@828: 
ha@828: /* directly indexed by chip_t, above */
ha@828: static const struct {
ha@828: 	const char *name;
ha@828: 	u32 version; /* from RTL8139C/RTL8139D docs */
ha@828: 	u32 flags;
ha@828: } rtl_chip_info[] = {
ha@828: 	{ "RTL-8139",
ha@828: 	  HW_REVID(1, 0, 0, 0, 0, 0, 0),
ha@828: 	  HasHltClk,
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8139 rev K",
ha@828: 	  HW_REVID(1, 1, 0, 0, 0, 0, 0),
ha@828: 	  HasHltClk,
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8139A",
ha@828: 	  HW_REVID(1, 1, 1, 0, 0, 0, 0),
ha@828: 	  HasHltClk, /* XXX undocumented? */
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8139A rev G",
ha@828: 	  HW_REVID(1, 1, 1, 0, 0, 1, 0),
ha@828: 	  HasHltClk, /* XXX undocumented? */
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8139B",
ha@828: 	  HW_REVID(1, 1, 1, 1, 0, 0, 0),
ha@828: 	  HasLWake,
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8130",
ha@828: 	  HW_REVID(1, 1, 1, 1, 1, 0, 0),
ha@828: 	  HasLWake,
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8139C",
ha@828: 	  HW_REVID(1, 1, 1, 0, 1, 0, 0),
ha@828: 	  HasLWake,
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8100",
ha@828: 	  HW_REVID(1, 1, 1, 1, 0, 1, 0),
ha@828:  	  HasLWake,
ha@828:  	},
ha@828: 
ha@828: 	{ "RTL-8100B/8139D",
ha@828: 	  HW_REVID(1, 1, 1, 0, 1, 0, 1),
ha@828: 	  HasHltClk /* XXX undocumented? */
ha@828: 	| HasLWake,
ha@828: 	},
ha@828: 
ha@828: 	{ "RTL-8101",
ha@828: 	  HW_REVID(1, 1, 1, 0, 1, 1, 1),
ha@828: 	  HasLWake,
ha@828: 	},
ha@828: };
ha@828: 
ha@828: struct rtl_extra_stats {
ha@828: 	unsigned long early_rx;
ha@828: 	unsigned long tx_buf_mapped;
ha@828: 	unsigned long tx_timeouts;
ha@828: 	unsigned long rx_lost_in_ring;
ha@828: };
ha@828: 
ha@828: struct rtl8139_private {
ha@828: 	void __iomem *mmio_addr;
ha@828: 	int drv_flags;
ha@828: 	struct pci_dev *pci_dev;
ha@828: 	u32 msg_enable;
ha@828: 	struct net_device_stats stats;
ha@828: 	unsigned char *rx_ring;
ha@828: 	unsigned int cur_rx;	/* Index into the Rx buffer of next Rx pkt. */
ha@828: 	unsigned int tx_flag;
ha@828: 	unsigned long cur_tx;
ha@828: 	unsigned long dirty_tx;
ha@828: 	unsigned char *tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
ha@828: 	unsigned char *tx_bufs;	/* Tx bounce buffer region. */
ha@828: 	dma_addr_t rx_ring_dma;
ha@828: 	dma_addr_t tx_bufs_dma;
ha@828: 	signed char phys[4];		/* MII device addresses. */
ha@828: 	char twistie, twist_row, twist_col;	/* Twister tune state. */
ha@828: 	unsigned int watchdog_fired : 1;
ha@828: 	unsigned int default_port : 4;	/* Last dev->if_port value. */
ha@828: 	unsigned int have_thread : 1;
ha@828: 	spinlock_t lock;
ha@828: 	spinlock_t rx_lock;
ha@828: 	chip_t chipset;
ha@828: 	u32 rx_config;
ha@828: 	struct rtl_extra_stats xstats;
ha@828: 
ha@828: 	struct delayed_work thread;
ha@828: 
ha@828: 	struct mii_if_info mii;
ha@828: 	unsigned int regs_len;
ha@828: 	unsigned long fifo_copy_timeout;
ha@828: };
ha@828: 
ha@828: MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
ha@828: MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
ha@828: MODULE_LICENSE("GPL");
ha@828: MODULE_VERSION(DRV_VERSION);
ha@828: 
ha@828: module_param(multicast_filter_limit, int, 0);
ha@828: module_param_array(media, int, NULL, 0);
ha@828: module_param_array(full_duplex, int, NULL, 0);
ha@828: module_param(debug, int, 0);
ha@828: MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
ha@828: MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
ha@828: MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
ha@828: MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
ha@828: 
ha@828: static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
ha@828: static int rtl8139_open (struct net_device *dev);
ha@828: static int mdio_read (struct net_device *dev, int phy_id, int location);
ha@828: static void mdio_write (struct net_device *dev, int phy_id, int location,
ha@828: 			int val);
ha@828: static void rtl8139_start_thread(struct rtl8139_private *tp);
ha@828: static void rtl8139_tx_timeout (struct net_device *dev);
ha@828: static void rtl8139_init_ring (struct net_device *dev);
ha@828: static int rtl8139_start_xmit (struct sk_buff *skb,
ha@828: 			       struct net_device *dev);
ha@828: static int rtl8139_poll(struct net_device *dev, int *budget);
ha@828: #ifdef CONFIG_NET_POLL_CONTROLLER
ha@828: static void rtl8139_poll_controller(struct net_device *dev);
ha@828: #endif
ha@828: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance);
ha@828: static int rtl8139_close (struct net_device *dev);
ha@828: static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
ha@828: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
ha@828: static void rtl8139_set_rx_mode (struct net_device *dev);
ha@828: static void __set_rx_mode (struct net_device *dev);
ha@828: static void rtl8139_hw_start (struct net_device *dev);
ha@828: static void rtl8139_thread (struct work_struct *work);
ha@828: static void rtl8139_tx_timeout_task(struct work_struct *work);
ha@828: static const struct ethtool_ops rtl8139_ethtool_ops;
ha@828: 
ha@828: /* write MMIO register, with flush */
ha@828: /* Flush avoids rtl8139 bug w/ posted MMIO writes */
ha@828: #define RTL_W8_F(reg, val8)	do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
ha@828: #define RTL_W16_F(reg, val16)	do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
ha@828: #define RTL_W32_F(reg, val32)	do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
ha@828: 
ha@828: 
ha@828: #define MMIO_FLUSH_AUDIT_COMPLETE 1
ha@828: #if MMIO_FLUSH_AUDIT_COMPLETE
ha@828: 
ha@828: /* write MMIO register */
ha@828: #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))
ha@828: #define RTL_W16(reg, val16)	iowrite16 ((val16), ioaddr + (reg))
ha@828: #define RTL_W32(reg, val32)	iowrite32 ((val32), ioaddr + (reg))
ha@828: 
ha@828: #else
ha@828: 
ha@828: /* write MMIO register, then flush */
ha@828: #define RTL_W8		RTL_W8_F
ha@828: #define RTL_W16		RTL_W16_F
ha@828: #define RTL_W32		RTL_W32_F
ha@828: 
ha@828: #endif /* MMIO_FLUSH_AUDIT_COMPLETE */
ha@828: 
ha@828: /* read MMIO register */
ha@828: #define RTL_R8(reg)		ioread8 (ioaddr + (reg))
ha@828: #define RTL_R16(reg)		ioread16 (ioaddr + (reg))
ha@828: #define RTL_R32(reg)		((unsigned long) ioread32 (ioaddr + (reg)))
ha@828: 
ha@828: 
ha@828: static const u16 rtl8139_intr_mask =
ha@828: 	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
ha@828: 	TxErr | TxOK | RxErr | RxOK;
ha@828: 
ha@828: static const u16 rtl8139_norx_intr_mask =
ha@828: 	PCIErr | PCSTimeout | RxUnderrun |
ha@828: 	TxErr | TxOK | RxErr ;
ha@828: 
ha@828: #if RX_BUF_IDX == 0
ha@828: static const unsigned int rtl8139_rx_config =
ha@828: 	RxCfgRcv8K | RxNoWrap |
ha@828: 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
ha@828: 	(RX_DMA_BURST << RxCfgDMAShift);
ha@828: #elif RX_BUF_IDX == 1
ha@828: static const unsigned int rtl8139_rx_config =
ha@828: 	RxCfgRcv16K | RxNoWrap |
ha@828: 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
ha@828: 	(RX_DMA_BURST << RxCfgDMAShift);
ha@828: #elif RX_BUF_IDX == 2
ha@828: static const unsigned int rtl8139_rx_config =
ha@828: 	RxCfgRcv32K | RxNoWrap |
ha@828: 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
ha@828: 	(RX_DMA_BURST << RxCfgDMAShift);
ha@828: #elif RX_BUF_IDX == 3
ha@828: static const unsigned int rtl8139_rx_config =
ha@828: 	RxCfgRcv64K |
ha@828: 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
ha@828: 	(RX_DMA_BURST << RxCfgDMAShift);
ha@828: #else
ha@828: #error "Invalid configuration for 8139_RXBUF_IDX"
ha@828: #endif
ha@828: 
ha@828: static const unsigned int rtl8139_tx_config =
ha@828: 	TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
ha@828: 
ha@828: static void __rtl8139_cleanup_dev (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	struct pci_dev *pdev;
ha@828: 
ha@828: 	assert (dev != NULL);
ha@828: 	assert (tp->pci_dev != NULL);
ha@828: 	pdev = tp->pci_dev;
ha@828: 
ha@828: #ifdef USE_IO_OPS
ha@828: 	if (tp->mmio_addr)
ha@828: 		ioport_unmap (tp->mmio_addr);
ha@828: #else
ha@828: 	if (tp->mmio_addr)
ha@828: 		pci_iounmap (pdev, tp->mmio_addr);
ha@828: #endif /* USE_IO_OPS */
ha@828: 
ha@828: 	/* it's ok to call this even if we have no regions to free */
ha@828: 	pci_release_regions (pdev);
ha@828: 
ha@828: 	free_netdev(dev);
ha@828: 	pci_set_drvdata (pdev, NULL);
ha@828: }
ha@828: 
ha@828: 
ha@828: static void rtl8139_chip_reset (void __iomem *ioaddr)
ha@828: {
ha@828: 	int i;
ha@828: 
ha@828: 	/* Soft reset the chip. */
ha@828: 	RTL_W8 (ChipCmd, CmdReset);
ha@828: 
ha@828: 	/* Check that the chip has finished the reset. */
ha@828: 	for (i = 1000; i > 0; i--) {
ha@828: 		barrier();
ha@828: 		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
ha@828: 			break;
ha@828: 		udelay (10);
ha@828: 	}
ha@828: }
ha@828: 
ha@828: 
ha@828: static int __devinit rtl8139_init_board (struct pci_dev *pdev,
ha@828: 					 struct net_device **dev_out)
ha@828: {
ha@828: 	void __iomem *ioaddr;
ha@828: 	struct net_device *dev;
ha@828: 	struct rtl8139_private *tp;
ha@828: 	u8 tmp8;
ha@828: 	int rc, disable_dev_on_err = 0;
ha@828: 	unsigned int i;
ha@828: 	unsigned long pio_start, pio_end, pio_flags, pio_len;
ha@828: 	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
ha@828: 	u32 version;
ha@828: 
ha@828: 	assert (pdev != NULL);
ha@828: 
ha@828: 	*dev_out = NULL;
ha@828: 
ha@828: 	/* dev and priv zeroed in alloc_etherdev */
ha@828: 	dev = alloc_etherdev (sizeof (*tp));
ha@828: 	if (dev == NULL) {
ha@828: 		dev_err(&pdev->dev, "Unable to alloc new net device\n");
ha@828: 		return -ENOMEM;
ha@828: 	}
ha@828: 	SET_MODULE_OWNER(dev);
ha@828: 	SET_NETDEV_DEV(dev, &pdev->dev);
ha@828: 
ha@828: 	tp = netdev_priv(dev);
ha@828: 	tp->pci_dev = pdev;
ha@828: 
ha@828: 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
ha@828: 	rc = pci_enable_device (pdev);
ha@828: 	if (rc)
ha@828: 		goto err_out;
ha@828: 
ha@828: 	pio_start = pci_resource_start (pdev, 0);
ha@828: 	pio_end = pci_resource_end (pdev, 0);
ha@828: 	pio_flags = pci_resource_flags (pdev, 0);
ha@828: 	pio_len = pci_resource_len (pdev, 0);
ha@828: 
ha@828: 	mmio_start = pci_resource_start (pdev, 1);
ha@828: 	mmio_end = pci_resource_end (pdev, 1);
ha@828: 	mmio_flags = pci_resource_flags (pdev, 1);
ha@828: 	mmio_len = pci_resource_len (pdev, 1);
ha@828: 
ha@828: 	/* set this immediately, we need to know before
ha@828: 	 * we talk to the chip directly */
ha@828: 	DPRINTK("PIO region size == 0x%02X\n", pio_len);
ha@828: 	DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
ha@828: 
ha@828: #ifdef USE_IO_OPS
ha@828: 	/* make sure PCI base addr 0 is PIO */
ha@828: 	if (!(pio_flags & IORESOURCE_IO)) {
ha@828: 		dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n");
ha@828: 		rc = -ENODEV;
ha@828: 		goto err_out;
ha@828: 	}
ha@828: 	/* check for weird/broken PCI region reporting */
ha@828: 	if (pio_len < RTL_MIN_IO_SIZE) {
ha@828: 		dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n");
ha@828: 		rc = -ENODEV;
ha@828: 		goto err_out;
ha@828: 	}
ha@828: #else
ha@828: 	/* make sure PCI base addr 1 is MMIO */
ha@828: 	if (!(mmio_flags & IORESOURCE_MEM)) {
ha@828: 		dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
ha@828: 		rc = -ENODEV;
ha@828: 		goto err_out;
ha@828: 	}
ha@828: 	if (mmio_len < RTL_MIN_IO_SIZE) {
ha@828: 		dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n");
ha@828: 		rc = -ENODEV;
ha@828: 		goto err_out;
ha@828: 	}
ha@828: #endif
ha@828: 
ha@828: 	rc = pci_request_regions (pdev, DRV_NAME);
ha@828: 	if (rc)
ha@828: 		goto err_out;
ha@828: 	disable_dev_on_err = 1;
ha@828: 
ha@828: 	/* enable PCI bus-mastering */
ha@828: 	pci_set_master (pdev);
ha@828: 
ha@828: #ifdef USE_IO_OPS
ha@828: 	ioaddr = ioport_map(pio_start, pio_len);
ha@828: 	if (!ioaddr) {
ha@828: 		dev_err(&pdev->dev, "cannot map PIO, aborting\n");
ha@828: 		rc = -EIO;
ha@828: 		goto err_out;
ha@828: 	}
ha@828: 	dev->base_addr = pio_start;
ha@828: 	tp->mmio_addr = ioaddr;
ha@828: 	tp->regs_len = pio_len;
ha@828: #else
ha@828: 	/* ioremap MMIO region */
ha@828: 	ioaddr = pci_iomap(pdev, 1, 0);
ha@828: 	if (ioaddr == NULL) {
ha@828: 		dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
ha@828: 		rc = -EIO;
ha@828: 		goto err_out;
ha@828: 	}
ha@828: 	dev->base_addr = (long) ioaddr;
ha@828: 	tp->mmio_addr = ioaddr;
ha@828: 	tp->regs_len = mmio_len;
ha@828: #endif /* USE_IO_OPS */
ha@828: 
ha@828: 	/* Bring old chips out of low-power mode. */
ha@828: 	RTL_W8 (HltClk, 'R');
ha@828: 
ha@828: 	/* check for missing/broken hardware */
ha@828: 	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
ha@828: 		dev_err(&pdev->dev, "Chip not responding, ignoring board\n");
ha@828: 		rc = -EIO;
ha@828: 		goto err_out;
ha@828: 	}
ha@828: 
ha@828: 	/* identify chip attached to board */
ha@828: 	version = RTL_R32 (TxConfig) & HW_REVID_MASK;
ha@828: 	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
ha@828: 		if (version == rtl_chip_info[i].version) {
ha@828: 			tp->chipset = i;
ha@828: 			goto match;
ha@828: 		}
ha@828: 
ha@828: 	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
ha@828: 	dev_printk (KERN_DEBUG, &pdev->dev,
ha@828: 		    "unknown chip version, assuming RTL-8139\n");
ha@828: 	dev_printk (KERN_DEBUG, &pdev->dev,
ha@828: 		    "TxConfig = 0x%lx\n", RTL_R32 (TxConfig));
ha@828: 	tp->chipset = 0;
ha@828: 
ha@828: match:
ha@828: 	DPRINTK ("chipset id (%d) == index %d, '%s'\n",
ha@828: 		 version, i, rtl_chip_info[i].name);
ha@828: 
ha@828: 	if (tp->chipset >= CH_8139B) {
ha@828: 		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
ha@828: 		DPRINTK("PCI PM wakeup\n");
ha@828: 		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
ha@828: 		    (tmp8 & LWAKE))
ha@828: 			new_tmp8 &= ~LWAKE;
ha@828: 		new_tmp8 |= Cfg1_PM_Enable;
ha@828: 		if (new_tmp8 != tmp8) {
ha@828: 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
ha@828: 			RTL_W8 (Config1, tmp8);
ha@828: 			RTL_W8 (Cfg9346, Cfg9346_Lock);
ha@828: 		}
ha@828: 		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
ha@828: 			tmp8 = RTL_R8 (Config4);
ha@828: 			if (tmp8 & LWPTN) {
ha@828: 				RTL_W8 (Cfg9346, Cfg9346_Unlock);
ha@828: 				RTL_W8 (Config4, tmp8 & ~LWPTN);
ha@828: 				RTL_W8 (Cfg9346, Cfg9346_Lock);
ha@828: 			}
ha@828: 		}
ha@828: 	} else {
ha@828: 		DPRINTK("Old chip wakeup\n");
ha@828: 		tmp8 = RTL_R8 (Config1);
ha@828: 		tmp8 &= ~(SLEEP | PWRDN);
ha@828: 		RTL_W8 (Config1, tmp8);
ha@828: 	}
ha@828: 
ha@828: 	rtl8139_chip_reset (ioaddr);
ha@828: 
ha@828: 	*dev_out = dev;
ha@828: 	return 0;
ha@828: 
ha@828: err_out:
ha@828: 	__rtl8139_cleanup_dev (dev);
ha@828: 	if (disable_dev_on_err)
ha@828: 		pci_disable_device (pdev);
ha@828: 	return rc;
ha@828: }
ha@828: 
ha@828: 
ha@828: static int __devinit rtl8139_init_one (struct pci_dev *pdev,
ha@828: 				       const struct pci_device_id *ent)
ha@828: {
ha@828: 	struct net_device *dev = NULL;
ha@828: 	struct rtl8139_private *tp;
ha@828: 	int i, addr_len, option;
ha@828: 	void __iomem *ioaddr;
ha@828: 	static int board_idx = -1;
ha@828: 
ha@828: 	assert (pdev != NULL);
ha@828: 	assert (ent != NULL);
ha@828: 
ha@828: 	board_idx++;
ha@828: 
ha@828: 	/* when we're built into the kernel, the driver version message
ha@828: 	 * is only printed if at least one 8139 board has been found
ha@828: 	 */
ha@828: #ifndef MODULE
ha@828: 	{
ha@828: 		static int printed_version;
ha@828: 		if (!printed_version++)
ha@828: 			printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
ha@828: 	}
ha@828: #endif
ha@828: 
ha@828: 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
ha@828: 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) {
ha@828: 		dev_info(&pdev->dev,
ha@828: 			   "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
ha@828: 		       	   pdev->vendor, pdev->device, pdev->revision);
ha@828: 		dev_info(&pdev->dev,
ha@828: 			   "Use the \"8139cp\" driver for improved performance and stability.\n");
ha@828: 	}
ha@828: 
ha@828: 	i = rtl8139_init_board (pdev, &dev);
ha@828: 	if (i < 0)
ha@828: 		return i;
ha@828: 
ha@828: 	assert (dev != NULL);
ha@828: 	tp = netdev_priv(dev);
ha@828: 
ha@828: 	ioaddr = tp->mmio_addr;
ha@828: 	assert (ioaddr != NULL);
ha@828: 
ha@828: 	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
ha@828: 	for (i = 0; i < 3; i++)
ha@828: 		((u16 *) (dev->dev_addr))[i] =
ha@828: 		    le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
ha@828: 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
ha@828: 
ha@828: 	/* The Rtl8139-specific entries in the device structure. */
ha@828: 	dev->open = rtl8139_open;
ha@828: 	dev->hard_start_xmit = rtl8139_start_xmit;
ha@828: 	dev->poll = rtl8139_poll;
ha@828: 	dev->weight = 64;
ha@828: 	dev->stop = rtl8139_close;
ha@828: 	dev->get_stats = rtl8139_get_stats;
ha@828: 	dev->set_multicast_list = rtl8139_set_rx_mode;
ha@828: 	dev->do_ioctl = netdev_ioctl;
ha@828: 	dev->ethtool_ops = &rtl8139_ethtool_ops;
ha@828: 	dev->tx_timeout = rtl8139_tx_timeout;
ha@828: 	dev->watchdog_timeo = TX_TIMEOUT;
ha@828: #ifdef CONFIG_NET_POLL_CONTROLLER
ha@828: 	dev->poll_controller = rtl8139_poll_controller;
ha@828: #endif
ha@828: 
ha@828: 	/* note: the hardware is not capable of sg/csum/highdma, however
ha@828: 	 * through the use of skb_copy_and_csum_dev we enable these
ha@828: 	 * features
ha@828: 	 */
ha@828: 	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
ha@828: 
ha@828: 	dev->irq = pdev->irq;
ha@828: 
ha@828: 	/* tp zeroed and aligned in alloc_etherdev */
ha@828: 	tp = netdev_priv(dev);
ha@828: 
ha@828: 	/* note: tp->chipset set in rtl8139_init_board */
ha@828: 	tp->drv_flags = board_info[ent->driver_data].hw_flags;
ha@828: 	tp->mmio_addr = ioaddr;
ha@828: 	tp->msg_enable =
ha@828: 		(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
ha@828: 	spin_lock_init (&tp->lock);
ha@828: 	spin_lock_init (&tp->rx_lock);
ha@828: 	INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
ha@828: 	tp->mii.dev = dev;
ha@828: 	tp->mii.mdio_read = mdio_read;
ha@828: 	tp->mii.mdio_write = mdio_write;
ha@828: 	tp->mii.phy_id_mask = 0x3f;
ha@828: 	tp->mii.reg_num_mask = 0x1f;
ha@828: 
ha@828: 	/* dev is fully set up and ready to use now */
ha@828: 	DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
ha@828: 	i = register_netdev (dev);
ha@828: 	if (i) goto err_out;
ha@828: 
ha@828: 	pci_set_drvdata (pdev, dev);
ha@828: 
ha@828: 	printk (KERN_INFO "%s: %s at 0x%lx, "
ha@828: 		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
ha@828: 		"IRQ %d\n",
ha@828: 		dev->name,
ha@828: 		board_info[ent->driver_data].name,
ha@828: 		dev->base_addr,
ha@828: 		dev->dev_addr[0], dev->dev_addr[1],
ha@828: 		dev->dev_addr[2], dev->dev_addr[3],
ha@828: 		dev->dev_addr[4], dev->dev_addr[5],
ha@828: 		dev->irq);
ha@828: 
ha@828: 	printk (KERN_DEBUG "%s:  Identified 8139 chip type '%s'\n",
ha@828: 		dev->name, rtl_chip_info[tp->chipset].name);
ha@828: 
ha@828: 	/* Find the connected MII xcvrs.
ha@828: 	   Doing this in open() would allow detecting external xcvrs later, but
ha@828: 	   takes too much time. */
ha@828: #ifdef CONFIG_8139TOO_8129
ha@828: 	if (tp->drv_flags & HAS_MII_XCVR) {
ha@828: 		int phy, phy_idx = 0;
ha@828: 		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
ha@828: 			int mii_status = mdio_read(dev, phy, 1);
ha@828: 			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
ha@828: 				u16 advertising = mdio_read(dev, phy, 4);
ha@828: 				tp->phys[phy_idx++] = phy;
ha@828: 				printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
ha@828: 					   "advertising %4.4x.\n",
ha@828: 					   dev->name, phy, mii_status, advertising);
ha@828: 			}
ha@828: 		}
ha@828: 		if (phy_idx == 0) {
ha@828: 			printk(KERN_INFO "%s: No MII transceivers found!  Assuming SYM "
ha@828: 				   "transceiver.\n",
ha@828: 				   dev->name);
ha@828: 			tp->phys[0] = 32;
ha@828: 		}
ha@828: 	} else
ha@828: #endif
ha@828: 		tp->phys[0] = 32;
ha@828: 	tp->mii.phy_id = tp->phys[0];
ha@828: 
ha@828: 	/* The lower four bits are the media type. */
ha@828: 	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
ha@828: 	if (option > 0) {
ha@828: 		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
ha@828: 		tp->default_port = option & 0xFF;
ha@828: 		if (tp->default_port)
ha@828: 			tp->mii.force_media = 1;
ha@828: 	}
ha@828: 	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
ha@828: 		tp->mii.full_duplex = full_duplex[board_idx];
ha@828: 	if (tp->mii.full_duplex) {
ha@828: 		printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
ha@828: 		/* Changing the MII-advertised media because might prevent
ha@828: 		   re-connection. */
ha@828: 		tp->mii.force_media = 1;
ha@828: 	}
ha@828: 	if (tp->default_port) {
ha@828: 		printk(KERN_INFO "  Forcing %dMbps %s-duplex operation.\n",
ha@828: 			   (option & 0x20 ? 100 : 10),
ha@828: 			   (option & 0x10 ? "full" : "half"));
ha@828: 		mdio_write(dev, tp->phys[0], 0,
ha@828: 				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
ha@828: 				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
ha@828: 	}
ha@828: 
ha@828: 	/* Put the chip into low-power mode. */
ha@828: 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
ha@828: 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
ha@828: 
ha@828: 	return 0;
ha@828: 
ha@828: err_out:
ha@828: 	__rtl8139_cleanup_dev (dev);
ha@828: 	pci_disable_device (pdev);
ha@828: 	return i;
ha@828: }
ha@828: 
ha@828: 
ha@828: static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
ha@828: {
ha@828: 	struct net_device *dev = pci_get_drvdata (pdev);
ha@828: 
ha@828: 	assert (dev != NULL);
ha@828: 
ha@828: 	flush_scheduled_work();
ha@828: 
ha@828: 	unregister_netdev (dev);
ha@828: 
ha@828: 	__rtl8139_cleanup_dev (dev);
ha@828: 	pci_disable_device (pdev);
ha@828: }
ha@828: 
ha@828: 
ha@828: /* Serial EEPROM section. */
ha@828: 
ha@828: /*  EEPROM_Ctrl bits. */
ha@828: #define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
ha@828: #define EE_CS			0x08	/* EEPROM chip select. */
ha@828: #define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
ha@828: #define EE_WRITE_0		0x00
ha@828: #define EE_WRITE_1		0x02
ha@828: #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
ha@828: #define EE_ENB			(0x80 | EE_CS)
ha@828: 
ha@828: /* Delay between EEPROM clock transitions.
ha@828:    No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
ha@828:  */
ha@828: 
ha@828: #define eeprom_delay()	(void)RTL_R32(Cfg9346)
ha@828: 
ha@828: /* The EEPROM commands include the alway-set leading bit. */
ha@828: #define EE_WRITE_CMD	(5)
ha@828: #define EE_READ_CMD		(6)
ha@828: #define EE_ERASE_CMD	(7)
ha@828: 
ha@828: static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len)
ha@828: {
ha@828: 	int i;
ha@828: 	unsigned retval = 0;
ha@828: 	int read_cmd = location | (EE_READ_CMD << addr_len);
ha@828: 
ha@828: 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
ha@828: 	RTL_W8 (Cfg9346, EE_ENB);
ha@828: 	eeprom_delay ();
ha@828: 
ha@828: 	/* Shift the read command bits out. */
ha@828: 	for (i = 4 + addr_len; i >= 0; i--) {
ha@828: 		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
ha@828: 		RTL_W8 (Cfg9346, EE_ENB | dataval);
ha@828: 		eeprom_delay ();
ha@828: 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
ha@828: 		eeprom_delay ();
ha@828: 	}
ha@828: 	RTL_W8 (Cfg9346, EE_ENB);
ha@828: 	eeprom_delay ();
ha@828: 
ha@828: 	for (i = 16; i > 0; i--) {
ha@828: 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
ha@828: 		eeprom_delay ();
ha@828: 		retval =
ha@828: 		    (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
ha@828: 				     0);
ha@828: 		RTL_W8 (Cfg9346, EE_ENB);
ha@828: 		eeprom_delay ();
ha@828: 	}
ha@828: 
ha@828: 	/* Terminate the EEPROM access. */
ha@828: 	RTL_W8 (Cfg9346, ~EE_CS);
ha@828: 	eeprom_delay ();
ha@828: 
ha@828: 	return retval;
ha@828: }
ha@828: 
ha@828: /* MII serial management: mostly bogus for now. */
ha@828: /* Read and write the MII management registers using software-generated
ha@828:    serial MDIO protocol.
ha@828:    The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
ha@828:    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
ha@828:    "overclocking" issues. */
ha@828: #define MDIO_DIR		0x80
ha@828: #define MDIO_DATA_OUT	0x04
ha@828: #define MDIO_DATA_IN	0x02
ha@828: #define MDIO_CLK		0x01
ha@828: #define MDIO_WRITE0 (MDIO_DIR)
ha@828: #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
ha@828: 
ha@828: #define mdio_delay()	RTL_R8(Config4)
ha@828: 
ha@828: 
ha@828: static const char mii_2_8139_map[8] = {
ha@828: 	BasicModeCtrl,
ha@828: 	BasicModeStatus,
ha@828: 	0,
ha@828: 	0,
ha@828: 	NWayAdvert,
ha@828: 	NWayLPAR,
ha@828: 	NWayExpansion,
ha@828: 	0
ha@828: };
ha@828: 
ha@828: 
ha@828: #ifdef CONFIG_8139TOO_8129
ha@828: /* Syncronize the MII management interface by shifting 32 one bits out. */
ha@828: static void mdio_sync (void __iomem *ioaddr)
ha@828: {
ha@828: 	int i;
ha@828: 
ha@828: 	for (i = 32; i >= 0; i--) {
ha@828: 		RTL_W8 (Config4, MDIO_WRITE1);
ha@828: 		mdio_delay ();
ha@828: 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
ha@828: 		mdio_delay ();
ha@828: 	}
ha@828: }
ha@828: #endif
ha@828: 
ha@828: static int mdio_read (struct net_device *dev, int phy_id, int location)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	int retval = 0;
ha@828: #ifdef CONFIG_8139TOO_8129
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
ha@828: 	int i;
ha@828: #endif
ha@828: 
ha@828: 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
ha@828: 		void __iomem *ioaddr = tp->mmio_addr;
ha@828: 		return location < 8 && mii_2_8139_map[location] ?
ha@828: 		    RTL_R16 (mii_2_8139_map[location]) : 0;
ha@828: 	}
ha@828: 
ha@828: #ifdef CONFIG_8139TOO_8129
ha@828: 	mdio_sync (ioaddr);
ha@828: 	/* Shift the read command bits out. */
ha@828: 	for (i = 15; i >= 0; i--) {
ha@828: 		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
ha@828: 
ha@828: 		RTL_W8 (Config4, MDIO_DIR | dataval);
ha@828: 		mdio_delay ();
ha@828: 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
ha@828: 		mdio_delay ();
ha@828: 	}
ha@828: 
ha@828: 	/* Read the two transition, 16 data, and wire-idle bits. */
ha@828: 	for (i = 19; i > 0; i--) {
ha@828: 		RTL_W8 (Config4, 0);
ha@828: 		mdio_delay ();
ha@828: 		retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
ha@828: 		RTL_W8 (Config4, MDIO_CLK);
ha@828: 		mdio_delay ();
ha@828: 	}
ha@828: #endif
ha@828: 
ha@828: 	return (retval >> 1) & 0xffff;
ha@828: }
ha@828: 
ha@828: 
ha@828: static void mdio_write (struct net_device *dev, int phy_id, int location,
ha@828: 			int value)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: #ifdef CONFIG_8139TOO_8129
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
ha@828: 	int i;
ha@828: #endif
ha@828: 
ha@828: 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
ha@828: 		void __iomem *ioaddr = tp->mmio_addr;
ha@828: 		if (location == 0) {
ha@828: 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
ha@828: 			RTL_W16 (BasicModeCtrl, value);
ha@828: 			RTL_W8 (Cfg9346, Cfg9346_Lock);
ha@828: 		} else if (location < 8 && mii_2_8139_map[location])
ha@828: 			RTL_W16 (mii_2_8139_map[location], value);
ha@828: 		return;
ha@828: 	}
ha@828: 
ha@828: #ifdef CONFIG_8139TOO_8129
ha@828: 	mdio_sync (ioaddr);
ha@828: 
ha@828: 	/* Shift the command bits out. */
ha@828: 	for (i = 31; i >= 0; i--) {
ha@828: 		int dataval =
ha@828: 		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
ha@828: 		RTL_W8 (Config4, dataval);
ha@828: 		mdio_delay ();
ha@828: 		RTL_W8 (Config4, dataval | MDIO_CLK);
ha@828: 		mdio_delay ();
ha@828: 	}
ha@828: 	/* Clear out extra bits. */
ha@828: 	for (i = 2; i > 0; i--) {
ha@828: 		RTL_W8 (Config4, 0);
ha@828: 		mdio_delay ();
ha@828: 		RTL_W8 (Config4, MDIO_CLK);
ha@828: 		mdio_delay ();
ha@828: 	}
ha@828: #endif
ha@828: }
ha@828: 
ha@828: 
ha@828: static int rtl8139_open (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	int retval;
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 
ha@828: 	retval = request_irq (dev->irq, rtl8139_interrupt, IRQF_SHARED, dev->name, dev);
ha@828: 	if (retval)
ha@828: 		return retval;
ha@828: 
ha@828: 	tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
ha@828: 					   &tp->tx_bufs_dma);
ha@828: 	tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
ha@828: 					   &tp->rx_ring_dma);
ha@828: 	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
ha@828: 		free_irq(dev->irq, dev);
ha@828: 
ha@828: 		if (tp->tx_bufs)
ha@828: 			pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
ha@828: 					    tp->tx_bufs, tp->tx_bufs_dma);
ha@828: 		if (tp->rx_ring)
ha@828: 			pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
ha@828: 					    tp->rx_ring, tp->rx_ring_dma);
ha@828: 
ha@828: 		return -ENOMEM;
ha@828: 
ha@828: 	}
ha@828: 
ha@828: 	tp->mii.full_duplex = tp->mii.force_media;
ha@828: 	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
ha@828: 
ha@828: 	rtl8139_init_ring (dev);
ha@828: 	rtl8139_hw_start (dev);
ha@828: 	netif_start_queue (dev);
ha@828: 
ha@828: 	if (netif_msg_ifup(tp))
ha@828: 		printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d"
ha@828: 			" GP Pins %2.2x %s-duplex.\n", dev->name,
ha@828: 			(unsigned long long)pci_resource_start (tp->pci_dev, 1),
ha@828: 			dev->irq, RTL_R8 (MediaStatus),
ha@828: 			tp->mii.full_duplex ? "full" : "half");
ha@828: 
ha@828: 	rtl8139_start_thread(tp);
ha@828: 
ha@828: 	return 0;
ha@828: }
ha@828: 
ha@828: 
ha@828: static void rtl_check_media (struct net_device *dev, unsigned int init_media)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 
ha@828: 	if (tp->phys[0] >= 0) {
ha@828: 		mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
ha@828: 	}
ha@828: }
ha@828: 
ha@828: /* Start the hardware at open or resume. */
ha@828: static void rtl8139_hw_start (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	u32 i;
ha@828: 	u8 tmp;
ha@828: 
ha@828: 	/* Bring old chips out of low-power mode. */
ha@828: 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
ha@828: 		RTL_W8 (HltClk, 'R');
ha@828: 
ha@828: 	rtl8139_chip_reset (ioaddr);
ha@828: 
ha@828: 	/* unlock Config[01234] and BMCR register writes */
ha@828: 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
ha@828: 	/* Restore our idea of the MAC address. */
ha@828: 	RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
ha@828: 	RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
ha@828: 
ha@828: 	/* Must enable Tx/Rx before setting transfer thresholds! */
ha@828: 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
ha@828: 
ha@828: 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
ha@828: 	RTL_W32 (RxConfig, tp->rx_config);
ha@828: 	RTL_W32 (TxConfig, rtl8139_tx_config);
ha@828: 
ha@828: 	tp->cur_rx = 0;
ha@828: 
ha@828: 	rtl_check_media (dev, 1);
ha@828: 
ha@828: 	if (tp->chipset >= CH_8139B) {
ha@828: 		/* Disable magic packet scanning, which is enabled
ha@828: 		 * when PM is enabled in Config1.  It can be reenabled
ha@828: 		 * via ETHTOOL_SWOL if desired.  */
ha@828: 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
ha@828: 	}
ha@828: 
ha@828: 	DPRINTK("init buffer addresses\n");
ha@828: 
ha@828: 	/* Lock Config[01234] and BMCR register writes */
ha@828: 	RTL_W8 (Cfg9346, Cfg9346_Lock);
ha@828: 
ha@828: 	/* init Rx ring buffer DMA address */
ha@828: 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
ha@828: 
ha@828: 	/* init Tx buffer DMA addresses */
ha@828: 	for (i = 0; i < NUM_TX_DESC; i++)
ha@828: 		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
ha@828: 
ha@828: 	RTL_W32 (RxMissed, 0);
ha@828: 
ha@828: 	rtl8139_set_rx_mode (dev);
ha@828: 
ha@828: 	/* no early-rx interrupts */
ha@828: 	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
ha@828: 
ha@828: 	/* make sure RxTx has started */
ha@828: 	tmp = RTL_R8 (ChipCmd);
ha@828: 	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
ha@828: 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
ha@828: 
ha@828: 	/* Enable all known interrupts by setting the interrupt mask. */
ha@828: 	RTL_W16 (IntrMask, rtl8139_intr_mask);
ha@828: }
ha@828: 
ha@828: 
ha@828: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
ha@828: static void rtl8139_init_ring (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	int i;
ha@828: 
ha@828: 	tp->cur_rx = 0;
ha@828: 	tp->cur_tx = 0;
ha@828: 	tp->dirty_tx = 0;
ha@828: 
ha@828: 	for (i = 0; i < NUM_TX_DESC; i++)
ha@828: 		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
ha@828: }
ha@828: 
ha@828: 
ha@828: /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
ha@828: static int next_tick = 3 * HZ;
ha@828: 
ha@828: #ifndef CONFIG_8139TOO_TUNE_TWISTER
ha@828: static inline void rtl8139_tune_twister (struct net_device *dev,
ha@828: 				  struct rtl8139_private *tp) {}
ha@828: #else
ha@828: enum TwisterParamVals {
ha@828: 	PARA78_default	= 0x78fa8388,
ha@828: 	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
ha@828: 	PARA7c_xxx	= 0xcb38de43,
ha@828: };
ha@828: 
ha@828: static const unsigned long param[4][4] = {
ha@828: 	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
ha@828: 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
ha@828: 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
ha@828: 	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
ha@828: };
ha@828: 
ha@828: static void rtl8139_tune_twister (struct net_device *dev,
ha@828: 				  struct rtl8139_private *tp)
ha@828: {
ha@828: 	int linkcase;
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 
ha@828: 	/* This is a complicated state machine to configure the "twister" for
ha@828: 	   impedance/echos based on the cable length.
ha@828: 	   All of this is magic and undocumented.
ha@828: 	 */
ha@828: 	switch (tp->twistie) {
ha@828: 	case 1:
ha@828: 		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
ha@828: 			/* We have link beat, let us tune the twister. */
ha@828: 			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
ha@828: 			tp->twistie = 2;	/* Change to state 2. */
ha@828: 			next_tick = HZ / 10;
ha@828: 		} else {
ha@828: 			/* Just put in some reasonable defaults for when beat returns. */
ha@828: 			RTL_W16 (CSCR, CSCR_LinkDownCmd);
ha@828: 			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
ha@828: 			RTL_W32 (PARA78, PARA78_default);
ha@828: 			RTL_W32 (PARA7c, PARA7c_default);
ha@828: 			tp->twistie = 0;	/* Bail from future actions. */
ha@828: 		}
ha@828: 		break;
ha@828: 	case 2:
ha@828: 		/* Read how long it took to hear the echo. */
ha@828: 		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
ha@828: 		if (linkcase == 0x7000)
ha@828: 			tp->twist_row = 3;
ha@828: 		else if (linkcase == 0x3000)
ha@828: 			tp->twist_row = 2;
ha@828: 		else if (linkcase == 0x1000)
ha@828: 			tp->twist_row = 1;
ha@828: 		else
ha@828: 			tp->twist_row = 0;
ha@828: 		tp->twist_col = 0;
ha@828: 		tp->twistie = 3;	/* Change to state 2. */
ha@828: 		next_tick = HZ / 10;
ha@828: 		break;
ha@828: 	case 3:
ha@828: 		/* Put out four tuning parameters, one per 100msec. */
ha@828: 		if (tp->twist_col == 0)
ha@828: 			RTL_W16 (FIFOTMS, 0);
ha@828: 		RTL_W32 (PARA7c, param[(int) tp->twist_row]
ha@828: 			 [(int) tp->twist_col]);
ha@828: 		next_tick = HZ / 10;
ha@828: 		if (++tp->twist_col >= 4) {
ha@828: 			/* For short cables we are done.
ha@828: 			   For long cables (row == 3) check for mistune. */
ha@828: 			tp->twistie =
ha@828: 			    (tp->twist_row == 3) ? 4 : 0;
ha@828: 		}
ha@828: 		break;
ha@828: 	case 4:
ha@828: 		/* Special case for long cables: check for mistune. */
ha@828: 		if ((RTL_R16 (CSCR) &
ha@828: 		     CSCR_LinkStatusBits) == 0x7000) {
ha@828: 			tp->twistie = 0;
ha@828: 			break;
ha@828: 		} else {
ha@828: 			RTL_W32 (PARA7c, 0xfb38de03);
ha@828: 			tp->twistie = 5;
ha@828: 			next_tick = HZ / 10;
ha@828: 		}
ha@828: 		break;
ha@828: 	case 5:
ha@828: 		/* Retune for shorter cable (column 2). */
ha@828: 		RTL_W32 (FIFOTMS, 0x20);
ha@828: 		RTL_W32 (PARA78, PARA78_default);
ha@828: 		RTL_W32 (PARA7c, PARA7c_default);
ha@828: 		RTL_W32 (FIFOTMS, 0x00);
ha@828: 		tp->twist_row = 2;
ha@828: 		tp->twist_col = 0;
ha@828: 		tp->twistie = 3;
ha@828: 		next_tick = HZ / 10;
ha@828: 		break;
ha@828: 
ha@828: 	default:
ha@828: 		/* do nothing */
ha@828: 		break;
ha@828: 	}
ha@828: }
ha@828: #endif /* CONFIG_8139TOO_TUNE_TWISTER */
ha@828: 
ha@828: static inline void rtl8139_thread_iter (struct net_device *dev,
ha@828: 				 struct rtl8139_private *tp,
ha@828: 				 void __iomem *ioaddr)
ha@828: {
ha@828: 	int mii_lpa;
ha@828: 
ha@828: 	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
ha@828: 
ha@828: 	if (!tp->mii.force_media && mii_lpa != 0xffff) {
ha@828: 		int duplex = (mii_lpa & LPA_100FULL)
ha@828: 		    || (mii_lpa & 0x01C0) == 0x0040;
ha@828: 		if (tp->mii.full_duplex != duplex) {
ha@828: 			tp->mii.full_duplex = duplex;
ha@828: 
ha@828: 			if (mii_lpa) {
ha@828: 				printk (KERN_INFO
ha@828: 					"%s: Setting %s-duplex based on MII #%d link"
ha@828: 					" partner ability of %4.4x.\n",
ha@828: 					dev->name,
ha@828: 					tp->mii.full_duplex ? "full" : "half",
ha@828: 					tp->phys[0], mii_lpa);
ha@828: 			} else {
ha@828: 				printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
ha@828: 				       dev->name);
ha@828: 			}
ha@828: #if 0
ha@828: 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
ha@828: 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
ha@828: 			RTL_W8 (Cfg9346, Cfg9346_Lock);
ha@828: #endif
ha@828: 		}
ha@828: 	}
ha@828: 
ha@828: 	next_tick = HZ * 60;
ha@828: 
ha@828: 	rtl8139_tune_twister (dev, tp);
ha@828: 
ha@828: 	DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
ha@828: 		 dev->name, RTL_R16 (NWayLPAR));
ha@828: 	DPRINTK ("%s:  Other registers are IntMask %4.4x IntStatus %4.4x\n",
ha@828: 		 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
ha@828: 	DPRINTK ("%s:  Chip config %2.2x %2.2x.\n",
ha@828: 		 dev->name, RTL_R8 (Config0),
ha@828: 		 RTL_R8 (Config1));
ha@828: }
ha@828: 
ha@828: static void rtl8139_thread (struct work_struct *work)
ha@828: {
ha@828: 	struct rtl8139_private *tp =
ha@828: 		container_of(work, struct rtl8139_private, thread.work);
ha@828: 	struct net_device *dev = tp->mii.dev;
ha@828: 	unsigned long thr_delay = next_tick;
ha@828: 
ha@828: 	rtnl_lock();
ha@828: 
ha@828: 	if (!netif_running(dev))
ha@828: 		goto out_unlock;
ha@828: 
ha@828: 	if (tp->watchdog_fired) {
ha@828: 		tp->watchdog_fired = 0;
ha@828: 		rtl8139_tx_timeout_task(work);
ha@828: 	} else
ha@828: 		rtl8139_thread_iter(dev, tp, tp->mmio_addr);
ha@828: 
ha@828: 	if (tp->have_thread)
ha@828: 		schedule_delayed_work(&tp->thread, thr_delay);
ha@828: out_unlock:
ha@828: 	rtnl_unlock ();
ha@828: }
ha@828: 
ha@828: static void rtl8139_start_thread(struct rtl8139_private *tp)
ha@828: {
ha@828: 	tp->twistie = 0;
ha@828: 	if (tp->chipset == CH_8139_K)
ha@828: 		tp->twistie = 1;
ha@828: 	else if (tp->drv_flags & HAS_LNK_CHNG)
ha@828: 		return;
ha@828: 
ha@828: 	tp->have_thread = 1;
ha@828: 	tp->watchdog_fired = 0;
ha@828: 
ha@828: 	schedule_delayed_work(&tp->thread, next_tick);
ha@828: }
ha@828: 
ha@828: static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
ha@828: {
ha@828: 	tp->cur_tx = 0;
ha@828: 	tp->dirty_tx = 0;
ha@828: 
ha@828: 	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
ha@828: }
ha@828: 
ha@828: static void rtl8139_tx_timeout_task (struct work_struct *work)
ha@828: {
ha@828: 	struct rtl8139_private *tp =
ha@828: 		container_of(work, struct rtl8139_private, thread.work);
ha@828: 	struct net_device *dev = tp->mii.dev;
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	int i;
ha@828: 	u8 tmp8;
ha@828: 
ha@828: 	printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x "
ha@828: 		"media %2.2x.\n", dev->name, RTL_R8 (ChipCmd),
ha@828: 		RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
ha@828: 	/* Emit info to figure out what went wrong. */
ha@828: 	printk (KERN_DEBUG "%s: Tx queue start entry %ld  dirty entry %ld.\n",
ha@828: 		dev->name, tp->cur_tx, tp->dirty_tx);
ha@828: 	for (i = 0; i < NUM_TX_DESC; i++)
ha@828: 		printk (KERN_DEBUG "%s:  Tx descriptor %d is %8.8lx.%s\n",
ha@828: 			dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
ha@828: 			i == tp->dirty_tx % NUM_TX_DESC ?
ha@828: 				" (queue head)" : "");
ha@828: 
ha@828: 	tp->xstats.tx_timeouts++;
ha@828: 
ha@828: 	/* disable Tx ASAP, if not already */
ha@828: 	tmp8 = RTL_R8 (ChipCmd);
ha@828: 	if (tmp8 & CmdTxEnb)
ha@828: 		RTL_W8 (ChipCmd, CmdRxEnb);
ha@828: 
ha@828: 	spin_lock_bh(&tp->rx_lock);
ha@828: 	/* Disable interrupts by clearing the interrupt mask. */
ha@828: 	RTL_W16 (IntrMask, 0x0000);
ha@828: 
ha@828: 	/* Stop a shared interrupt from scavenging while we are. */
ha@828: 	spin_lock_irq(&tp->lock);
ha@828: 	rtl8139_tx_clear (tp);
ha@828: 	spin_unlock_irq(&tp->lock);
ha@828: 
ha@828: 	/* ...and finally, reset everything */
ha@828: 	if (netif_running(dev)) {
ha@828: 		rtl8139_hw_start (dev);
ha@828: 		netif_wake_queue (dev);
ha@828: 	}
ha@828: 	spin_unlock_bh(&tp->rx_lock);
ha@828: }
ha@828: 
ha@828: static void rtl8139_tx_timeout (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 
ha@828: 	tp->watchdog_fired = 1;
ha@828: 	if (!tp->have_thread) {
ha@828: 		INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
ha@828: 		schedule_delayed_work(&tp->thread, next_tick);
ha@828: 	}
ha@828: }
ha@828: 
ha@828: static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	unsigned int entry;
ha@828: 	unsigned int len = skb->len;
ha@828: 	unsigned long flags;
ha@828: 
ha@828: 	/* Calculate the next Tx descriptor entry. */
ha@828: 	entry = tp->cur_tx % NUM_TX_DESC;
ha@828: 
ha@828: 	/* Note: the chip doesn't have auto-pad! */
ha@828: 	if (likely(len < TX_BUF_SIZE)) {
ha@828: 		if (len < ETH_ZLEN)
ha@828: 			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
ha@828: 		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
ha@828: 		dev_kfree_skb(skb);
ha@828: 	} else {
ha@828: 		dev_kfree_skb(skb);
ha@828: 		tp->stats.tx_dropped++;
ha@828: 		return 0;
ha@828: 	}
ha@828: 
ha@828: 	spin_lock_irqsave(&tp->lock, flags);
ha@828: 	RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
ha@828: 		   tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
ha@828: 
ha@828: 	dev->trans_start = jiffies;
ha@828: 
ha@828: 	tp->cur_tx++;
ha@828: 	wmb();
ha@828: 
ha@828: 	if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
ha@828: 		netif_stop_queue (dev);
ha@828: 	spin_unlock_irqrestore(&tp->lock, flags);
ha@828: 
ha@828: 	if (netif_msg_tx_queued(tp))
ha@828: 		printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
ha@828: 			dev->name, len, entry);
ha@828: 
ha@828: 	return 0;
ha@828: }
ha@828: 
ha@828: 
ha@828: static void rtl8139_tx_interrupt (struct net_device *dev,
ha@828: 				  struct rtl8139_private *tp,
ha@828: 				  void __iomem *ioaddr)
ha@828: {
ha@828: 	unsigned long dirty_tx, tx_left;
ha@828: 
ha@828: 	assert (dev != NULL);
ha@828: 	assert (ioaddr != NULL);
ha@828: 
ha@828: 	dirty_tx = tp->dirty_tx;
ha@828: 	tx_left = tp->cur_tx - dirty_tx;
ha@828: 	while (tx_left > 0) {
ha@828: 		int entry = dirty_tx % NUM_TX_DESC;
ha@828: 		int txstatus;
ha@828: 
ha@828: 		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
ha@828: 
ha@828: 		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
ha@828: 			break;	/* It still hasn't been Txed */
ha@828: 
ha@828: 		/* Note: TxCarrierLost is always asserted at 100mbps. */
ha@828: 		if (txstatus & (TxOutOfWindow | TxAborted)) {
ha@828: 			/* There was an major error, log it. */
ha@828: 			if (netif_msg_tx_err(tp))
ha@828: 				printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
ha@828: 					dev->name, txstatus);
ha@828: 			tp->stats.tx_errors++;
ha@828: 			if (txstatus & TxAborted) {
ha@828: 				tp->stats.tx_aborted_errors++;
ha@828: 				RTL_W32 (TxConfig, TxClearAbt);
ha@828: 				RTL_W16 (IntrStatus, TxErr);
ha@828: 				wmb();
ha@828: 			}
ha@828: 			if (txstatus & TxCarrierLost)
ha@828: 				tp->stats.tx_carrier_errors++;
ha@828: 			if (txstatus & TxOutOfWindow)
ha@828: 				tp->stats.tx_window_errors++;
ha@828: 		} else {
ha@828: 			if (txstatus & TxUnderrun) {
ha@828: 				/* Add 64 to the Tx FIFO threshold. */
ha@828: 				if (tp->tx_flag < 0x00300000)
ha@828: 					tp->tx_flag += 0x00020000;
ha@828: 				tp->stats.tx_fifo_errors++;
ha@828: 			}
ha@828: 			tp->stats.collisions += (txstatus >> 24) & 15;
ha@828: 			tp->stats.tx_bytes += txstatus & 0x7ff;
ha@828: 			tp->stats.tx_packets++;
ha@828: 		}
ha@828: 
ha@828: 		dirty_tx++;
ha@828: 		tx_left--;
ha@828: 	}
ha@828: 
ha@828: #ifndef RTL8139_NDEBUG
ha@828: 	if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
ha@828: 		printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
ha@828: 		        dev->name, dirty_tx, tp->cur_tx);
ha@828: 		dirty_tx += NUM_TX_DESC;
ha@828: 	}
ha@828: #endif /* RTL8139_NDEBUG */
ha@828: 
ha@828: 	/* only wake the queue if we did work, and the queue is stopped */
ha@828: 	if (tp->dirty_tx != dirty_tx) {
ha@828: 		tp->dirty_tx = dirty_tx;
ha@828: 		mb();
ha@828: 		netif_wake_queue (dev);
ha@828: 	}
ha@828: }
ha@828: 
ha@828: 
ha@828: /* TODO: clean this up!  Rx reset need not be this intensive */
ha@828: static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
ha@828: 			    struct rtl8139_private *tp, void __iomem *ioaddr)
ha@828: {
ha@828: 	u8 tmp8;
ha@828: #ifdef CONFIG_8139_OLD_RX_RESET
ha@828: 	int tmp_work;
ha@828: #endif
ha@828: 
ha@828: 	if (netif_msg_rx_err (tp))
ha@828: 		printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
ha@828: 			dev->name, rx_status);
ha@828: 	tp->stats.rx_errors++;
ha@828: 	if (!(rx_status & RxStatusOK)) {
ha@828: 		if (rx_status & RxTooLong) {
ha@828: 			DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
ha@828: 			 	dev->name, rx_status);
ha@828: 			/* A.C.: The chip hangs here. */
ha@828: 		}
ha@828: 		if (rx_status & (RxBadSymbol | RxBadAlign))
ha@828: 			tp->stats.rx_frame_errors++;
ha@828: 		if (rx_status & (RxRunt | RxTooLong))
ha@828: 			tp->stats.rx_length_errors++;
ha@828: 		if (rx_status & RxCRCErr)
ha@828: 			tp->stats.rx_crc_errors++;
ha@828: 	} else {
ha@828: 		tp->xstats.rx_lost_in_ring++;
ha@828: 	}
ha@828: 
ha@828: #ifndef CONFIG_8139_OLD_RX_RESET
ha@828: 	tmp8 = RTL_R8 (ChipCmd);
ha@828: 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
ha@828: 	RTL_W8 (ChipCmd, tmp8);
ha@828: 	RTL_W32 (RxConfig, tp->rx_config);
ha@828: 	tp->cur_rx = 0;
ha@828: #else
ha@828: 	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
ha@828: 
ha@828: 	/* disable receive */
ha@828: 	RTL_W8_F (ChipCmd, CmdTxEnb);
ha@828: 	tmp_work = 200;
ha@828: 	while (--tmp_work > 0) {
ha@828: 		udelay(1);
ha@828: 		tmp8 = RTL_R8 (ChipCmd);
ha@828: 		if (!(tmp8 & CmdRxEnb))
ha@828: 			break;
ha@828: 	}
ha@828: 	if (tmp_work <= 0)
ha@828: 		printk (KERN_WARNING PFX "rx stop wait too long\n");
ha@828: 	/* restart receive */
ha@828: 	tmp_work = 200;
ha@828: 	while (--tmp_work > 0) {
ha@828: 		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
ha@828: 		udelay(1);
ha@828: 		tmp8 = RTL_R8 (ChipCmd);
ha@828: 		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
ha@828: 			break;
ha@828: 	}
ha@828: 	if (tmp_work <= 0)
ha@828: 		printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
ha@828: 
ha@828: 	/* and reinitialize all rx related registers */
ha@828: 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
ha@828: 	/* Must enable Tx/Rx before setting transfer thresholds! */
ha@828: 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
ha@828: 
ha@828: 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
ha@828: 	RTL_W32 (RxConfig, tp->rx_config);
ha@828: 	tp->cur_rx = 0;
ha@828: 
ha@828: 	DPRINTK("init buffer addresses\n");
ha@828: 
ha@828: 	/* Lock Config[01234] and BMCR register writes */
ha@828: 	RTL_W8 (Cfg9346, Cfg9346_Lock);
ha@828: 
ha@828: 	/* init Rx ring buffer DMA address */
ha@828: 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
ha@828: 
ha@828: 	/* A.C.: Reset the multicast list. */
ha@828: 	__set_rx_mode (dev);
ha@828: #endif
ha@828: }
ha@828: 
ha@828: #if RX_BUF_IDX == 3
ha@828: static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
ha@828: 				 u32 offset, unsigned int size)
ha@828: {
ha@828: 	u32 left = RX_BUF_LEN - offset;
ha@828: 
ha@828: 	if (size > left) {
ha@828: 		skb_copy_to_linear_data(skb, ring + offset, left);
ha@828: 		skb_copy_to_linear_data_offset(skb, left, ring, size - left);
ha@828: 	} else
ha@828: 		skb_copy_to_linear_data(skb, ring + offset, size);
ha@828: }
ha@828: #endif
ha@828: 
ha@828: static void rtl8139_isr_ack(struct rtl8139_private *tp)
ha@828: {
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	u16 status;
ha@828: 
ha@828: 	status = RTL_R16 (IntrStatus) & RxAckBits;
ha@828: 
ha@828: 	/* Clear out errors and receive interrupts */
ha@828: 	if (likely(status != 0)) {
ha@828: 		if (unlikely(status & (RxFIFOOver | RxOverflow))) {
ha@828: 			tp->stats.rx_errors++;
ha@828: 			if (status & RxFIFOOver)
ha@828: 				tp->stats.rx_fifo_errors++;
ha@828: 		}
ha@828: 		RTL_W16_F (IntrStatus, RxAckBits);
ha@828: 	}
ha@828: }
ha@828: 
ha@828: static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
ha@828: 		      int budget)
ha@828: {
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	int received = 0;
ha@828: 	unsigned char *rx_ring = tp->rx_ring;
ha@828: 	unsigned int cur_rx = tp->cur_rx;
ha@828: 	unsigned int rx_size = 0;
ha@828: 
ha@828: 	DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
ha@828: 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx,
ha@828: 		 RTL_R16 (RxBufAddr),
ha@828: 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
ha@828: 
ha@828: 	while (netif_running(dev) && received < budget
ha@828: 	       && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
ha@828: 		u32 ring_offset = cur_rx % RX_BUF_LEN;
ha@828: 		u32 rx_status;
ha@828: 		unsigned int pkt_size;
ha@828: 		struct sk_buff *skb;
ha@828: 
ha@828: 		rmb();
ha@828: 
ha@828: 		/* read size+status of next frame from DMA ring buffer */
ha@828: 		rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
ha@828: 		rx_size = rx_status >> 16;
ha@828: 		pkt_size = rx_size - 4;
ha@828: 
ha@828: 		if (netif_msg_rx_status(tp))
ha@828: 			printk(KERN_DEBUG "%s:  rtl8139_rx() status %4.4x, size %4.4x,"
ha@828: 				" cur %4.4x.\n", dev->name, rx_status,
ha@828: 			 rx_size, cur_rx);
ha@828: #if RTL8139_DEBUG > 2
ha@828: 		{
ha@828: 			int i;
ha@828: 			DPRINTK ("%s: Frame contents ", dev->name);
ha@828: 			for (i = 0; i < 70; i++)
ha@828: 				printk (" %2.2x",
ha@828: 					rx_ring[ring_offset + i]);
ha@828: 			printk (".\n");
ha@828: 		}
ha@828: #endif
ha@828: 
ha@828: 		/* Packet copy from FIFO still in progress.
ha@828: 		 * Theoretically, this should never happen
ha@828: 		 * since EarlyRx is disabled.
ha@828: 		 */
ha@828: 		if (unlikely(rx_size == 0xfff0)) {
ha@828: 			if (!tp->fifo_copy_timeout)
ha@828: 				tp->fifo_copy_timeout = jiffies + 2;
ha@828: 			else if (time_after(jiffies, tp->fifo_copy_timeout)) {
ha@828: 				DPRINTK ("%s: hung FIFO. Reset.", dev->name);
ha@828: 				rx_size = 0;
ha@828: 				goto no_early_rx;
ha@828: 			}
ha@828: 			if (netif_msg_intr(tp)) {
ha@828: 				printk(KERN_DEBUG "%s: fifo copy in progress.",
ha@828: 				       dev->name);
ha@828: 			}
ha@828: 			tp->xstats.early_rx++;
ha@828: 			break;
ha@828: 		}
ha@828: 
ha@828: no_early_rx:
ha@828: 		tp->fifo_copy_timeout = 0;
ha@828: 
ha@828: 		/* If Rx err or invalid rx_size/rx_status received
ha@828: 		 * (which happens if we get lost in the ring),
ha@828: 		 * Rx process gets reset, so we abort any further
ha@828: 		 * Rx processing.
ha@828: 		 */
ha@828: 		if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
ha@828: 			     (rx_size < 8) ||
ha@828: 			     (!(rx_status & RxStatusOK)))) {
ha@828: 			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
ha@828: 			received = -1;
ha@828: 			goto out;
ha@828: 		}
ha@828: 
ha@828: 		/* Malloc up new buffer, compatible with net-2e. */
ha@828: 		/* Omit the four octet CRC from the length. */
ha@828: 
ha@828: 		skb = dev_alloc_skb (pkt_size + 2);
ha@828: 		if (likely(skb)) {
ha@828: 			skb_reserve (skb, 2);	/* 16 byte align the IP fields. */
ha@828: #if RX_BUF_IDX == 3
ha@828: 			wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
ha@828: #else
ha@828: 			skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size);
ha@828: #endif
ha@828: 			skb_put (skb, pkt_size);
ha@828: 
ha@828: 			skb->protocol = eth_type_trans (skb, dev);
ha@828: 
ha@828: 			dev->last_rx = jiffies;
ha@828: 			tp->stats.rx_bytes += pkt_size;
ha@828: 			tp->stats.rx_packets++;
ha@828: 
ha@828: 			netif_receive_skb (skb);
ha@828: 		} else {
ha@828: 			if (net_ratelimit())
ha@828: 				printk (KERN_WARNING
ha@828: 					"%s: Memory squeeze, dropping packet.\n",
ha@828: 					dev->name);
ha@828: 			tp->stats.rx_dropped++;
ha@828: 		}
ha@828: 		received++;
ha@828: 
ha@828: 		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
ha@828: 		RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
ha@828: 
ha@828: 		rtl8139_isr_ack(tp);
ha@828: 	}
ha@828: 
ha@828: 	if (unlikely(!received || rx_size == 0xfff0))
ha@828: 		rtl8139_isr_ack(tp);
ha@828: 
ha@828: #if RTL8139_DEBUG > 1
ha@828: 	DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
ha@828: 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
ha@828: 		 RTL_R16 (RxBufAddr),
ha@828: 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
ha@828: #endif
ha@828: 
ha@828: 	tp->cur_rx = cur_rx;
ha@828: 
ha@828: 	/*
ha@828: 	 * The receive buffer should be mostly empty.
ha@828: 	 * Tell NAPI to reenable the Rx irq.
ha@828: 	 */
ha@828: 	if (tp->fifo_copy_timeout)
ha@828: 		received = budget;
ha@828: 
ha@828: out:
ha@828: 	return received;
ha@828: }
ha@828: 
ha@828: 
ha@828: static void rtl8139_weird_interrupt (struct net_device *dev,
ha@828: 				     struct rtl8139_private *tp,
ha@828: 				     void __iomem *ioaddr,
ha@828: 				     int status, int link_changed)
ha@828: {
ha@828: 	DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
ha@828: 		 dev->name, status);
ha@828: 
ha@828: 	assert (dev != NULL);
ha@828: 	assert (tp != NULL);
ha@828: 	assert (ioaddr != NULL);
ha@828: 
ha@828: 	/* Update the error count. */
ha@828: 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
ha@828: 	RTL_W32 (RxMissed, 0);
ha@828: 
ha@828: 	if ((status & RxUnderrun) && link_changed &&
ha@828: 	    (tp->drv_flags & HAS_LNK_CHNG)) {
ha@828: 		rtl_check_media(dev, 0);
ha@828: 		status &= ~RxUnderrun;
ha@828: 	}
ha@828: 
ha@828: 	if (status & (RxUnderrun | RxErr))
ha@828: 		tp->stats.rx_errors++;
ha@828: 
ha@828: 	if (status & PCSTimeout)
ha@828: 		tp->stats.rx_length_errors++;
ha@828: 	if (status & RxUnderrun)
ha@828: 		tp->stats.rx_fifo_errors++;
ha@828: 	if (status & PCIErr) {
ha@828: 		u16 pci_cmd_status;
ha@828: 		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
ha@828: 		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
ha@828: 
ha@828: 		printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
ha@828: 			dev->name, pci_cmd_status);
ha@828: 	}
ha@828: }
ha@828: 
ha@828: static int rtl8139_poll(struct net_device *dev, int *budget)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	int orig_budget = min(*budget, dev->quota);
ha@828: 	int done = 1;
ha@828: 
ha@828: 	spin_lock(&tp->rx_lock);
ha@828: 	if (likely(RTL_R16(IntrStatus) & RxAckBits)) {
ha@828: 		int work_done;
ha@828: 
ha@828: 		work_done = rtl8139_rx(dev, tp, orig_budget);
ha@828: 		if (likely(work_done > 0)) {
ha@828: 			*budget -= work_done;
ha@828: 			dev->quota -= work_done;
ha@828: 			done = (work_done < orig_budget);
ha@828: 		}
ha@828: 	}
ha@828: 
ha@828: 	if (done) {
ha@828: 		unsigned long flags;
ha@828: 		/*
ha@828: 		 * Order is important since data can get interrupted
ha@828: 		 * again when we think we are done.
ha@828: 		 */
ha@828: 		local_irq_save(flags);
ha@828: 		RTL_W16_F(IntrMask, rtl8139_intr_mask);
ha@828: 		__netif_rx_complete(dev);
ha@828: 		local_irq_restore(flags);
ha@828: 	}
ha@828: 	spin_unlock(&tp->rx_lock);
ha@828: 
ha@828: 	return !done;
ha@828: }
ha@828: 
ha@828: /* The interrupt handler does all of the Rx thread work and cleans up
ha@828:    after the Tx thread. */
ha@828: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
ha@828: {
ha@828: 	struct net_device *dev = (struct net_device *) dev_instance;
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	u16 status, ackstat;
ha@828: 	int link_changed = 0; /* avoid bogus "uninit" warning */
ha@828: 	int handled = 0;
ha@828: 
ha@828: 	spin_lock (&tp->lock);
ha@828: 	status = RTL_R16 (IntrStatus);
ha@828: 
ha@828: 	/* shared irq? */
ha@828: 	if (unlikely((status & rtl8139_intr_mask) == 0))
ha@828: 		goto out;
ha@828: 
ha@828: 	handled = 1;
ha@828: 
ha@828: 	/* h/w no longer present (hotplug?) or major error, bail */
ha@828: 	if (unlikely(status == 0xFFFF))
ha@828: 		goto out;
ha@828: 
ha@828: 	/* close possible race's with dev_close */
ha@828: 	if (unlikely(!netif_running(dev))) {
ha@828: 		RTL_W16 (IntrMask, 0);
ha@828: 		goto out;
ha@828: 	}
ha@828: 
ha@828: 	/* Acknowledge all of the current interrupt sources ASAP, but
ha@828: 	   an first get an additional status bit from CSCR. */
ha@828: 	if (unlikely(status & RxUnderrun))
ha@828: 		link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
ha@828: 
ha@828: 	ackstat = status & ~(RxAckBits | TxErr);
ha@828: 	if (ackstat)
ha@828: 		RTL_W16 (IntrStatus, ackstat);
ha@828: 
ha@828: 	/* Receive packets are processed by poll routine.
ha@828: 	   If not running start it now. */
ha@828: 	if (status & RxAckBits){
ha@828: 		if (netif_rx_schedule_prep(dev)) {
ha@828: 			RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
ha@828: 			__netif_rx_schedule (dev);
ha@828: 		}
ha@828: 	}
ha@828: 
ha@828: 	/* Check uncommon events with one test. */
ha@828: 	if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
ha@828: 		rtl8139_weird_interrupt (dev, tp, ioaddr,
ha@828: 					 status, link_changed);
ha@828: 
ha@828: 	if (status & (TxOK | TxErr)) {
ha@828: 		rtl8139_tx_interrupt (dev, tp, ioaddr);
ha@828: 		if (status & TxErr)
ha@828: 			RTL_W16 (IntrStatus, TxErr);
ha@828: 	}
ha@828:  out:
ha@828: 	spin_unlock (&tp->lock);
ha@828: 
ha@828: 	DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
ha@828: 		 dev->name, RTL_R16 (IntrStatus));
ha@828: 	return IRQ_RETVAL(handled);
ha@828: }
ha@828: 
ha@828: #ifdef CONFIG_NET_POLL_CONTROLLER
ha@828: /*
ha@828:  * Polling receive - used by netconsole and other diagnostic tools
ha@828:  * to allow network i/o with interrupts disabled.
ha@828:  */
ha@828: static void rtl8139_poll_controller(struct net_device *dev)
ha@828: {
ha@828: 	disable_irq(dev->irq);
ha@828: 	rtl8139_interrupt(dev->irq, dev);
ha@828: 	enable_irq(dev->irq);
ha@828: }
ha@828: #endif
ha@828: 
ha@828: static int rtl8139_close (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	unsigned long flags;
ha@828: 
ha@828: 	netif_stop_queue (dev);
ha@828: 
ha@828: 	if (netif_msg_ifdown(tp))
ha@828: 		printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n",
ha@828: 			dev->name, RTL_R16 (IntrStatus));
ha@828: 
ha@828: 	spin_lock_irqsave (&tp->lock, flags);
ha@828: 
ha@828: 	/* Stop the chip's Tx and Rx DMA processes. */
ha@828: 	RTL_W8 (ChipCmd, 0);
ha@828: 
ha@828: 	/* Disable interrupts by clearing the interrupt mask. */
ha@828: 	RTL_W16 (IntrMask, 0);
ha@828: 
ha@828: 	/* Update the error counts. */
ha@828: 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
ha@828: 	RTL_W32 (RxMissed, 0);
ha@828: 
ha@828: 	spin_unlock_irqrestore (&tp->lock, flags);
ha@828: 
ha@828: 	synchronize_irq (dev->irq);	/* racy, but that's ok here */
ha@828: 	free_irq (dev->irq, dev);
ha@828: 
ha@828: 	rtl8139_tx_clear (tp);
ha@828: 
ha@828: 	pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
ha@828: 			    tp->rx_ring, tp->rx_ring_dma);
ha@828: 	pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
ha@828: 			    tp->tx_bufs, tp->tx_bufs_dma);
ha@828: 	tp->rx_ring = NULL;
ha@828: 	tp->tx_bufs = NULL;
ha@828: 
ha@828: 	/* Green! Put the chip in low-power mode. */
ha@828: 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
ha@828: 
ha@828: 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
ha@828: 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
ha@828: 
ha@828: 	return 0;
ha@828: }
ha@828: 
ha@828: 
ha@828: /* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
ha@828:    kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
ha@828:    other threads or interrupts aren't messing with the 8139.  */
ha@828: static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = np->mmio_addr;
ha@828: 
ha@828: 	spin_lock_irq(&np->lock);
ha@828: 	if (rtl_chip_info[np->chipset].flags & HasLWake) {
ha@828: 		u8 cfg3 = RTL_R8 (Config3);
ha@828: 		u8 cfg5 = RTL_R8 (Config5);
ha@828: 
ha@828: 		wol->supported = WAKE_PHY | WAKE_MAGIC
ha@828: 			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
ha@828: 
ha@828: 		wol->wolopts = 0;
ha@828: 		if (cfg3 & Cfg3_LinkUp)
ha@828: 			wol->wolopts |= WAKE_PHY;
ha@828: 		if (cfg3 & Cfg3_Magic)
ha@828: 			wol->wolopts |= WAKE_MAGIC;
ha@828: 		/* (KON)FIXME: See how netdev_set_wol() handles the
ha@828: 		   following constants.  */
ha@828: 		if (cfg5 & Cfg5_UWF)
ha@828: 			wol->wolopts |= WAKE_UCAST;
ha@828: 		if (cfg5 & Cfg5_MWF)
ha@828: 			wol->wolopts |= WAKE_MCAST;
ha@828: 		if (cfg5 & Cfg5_BWF)
ha@828: 			wol->wolopts |= WAKE_BCAST;
ha@828: 	}
ha@828: 	spin_unlock_irq(&np->lock);
ha@828: }
ha@828: 
ha@828: 
ha@828: /* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
ha@828:    that wol points to kernel memory and other threads or interrupts
ha@828:    aren't messing with the 8139.  */
ha@828: static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = np->mmio_addr;
ha@828: 	u32 support;
ha@828: 	u8 cfg3, cfg5;
ha@828: 
ha@828: 	support = ((rtl_chip_info[np->chipset].flags & HasLWake)
ha@828: 		   ? (WAKE_PHY | WAKE_MAGIC
ha@828: 		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
ha@828: 		   : 0);
ha@828: 	if (wol->wolopts & ~support)
ha@828: 		return -EINVAL;
ha@828: 
ha@828: 	spin_lock_irq(&np->lock);
ha@828: 	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
ha@828: 	if (wol->wolopts & WAKE_PHY)
ha@828: 		cfg3 |= Cfg3_LinkUp;
ha@828: 	if (wol->wolopts & WAKE_MAGIC)
ha@828: 		cfg3 |= Cfg3_Magic;
ha@828: 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
ha@828: 	RTL_W8 (Config3, cfg3);
ha@828: 	RTL_W8 (Cfg9346, Cfg9346_Lock);
ha@828: 
ha@828: 	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
ha@828: 	/* (KON)FIXME: These are untested.  We may have to set the
ha@828: 	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
ha@828: 	   documentation.  */
ha@828: 	if (wol->wolopts & WAKE_UCAST)
ha@828: 		cfg5 |= Cfg5_UWF;
ha@828: 	if (wol->wolopts & WAKE_MCAST)
ha@828: 		cfg5 |= Cfg5_MWF;
ha@828: 	if (wol->wolopts & WAKE_BCAST)
ha@828: 		cfg5 |= Cfg5_BWF;
ha@828: 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
ha@828: 	spin_unlock_irq(&np->lock);
ha@828: 
ha@828: 	return 0;
ha@828: }
ha@828: 
ha@828: static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	strcpy(info->driver, DRV_NAME);
ha@828: 	strcpy(info->version, DRV_VERSION);
ha@828: 	strcpy(info->bus_info, pci_name(np->pci_dev));
ha@828: 	info->regdump_len = np->regs_len;
ha@828: }
ha@828: 
ha@828: static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	spin_lock_irq(&np->lock);
ha@828: 	mii_ethtool_gset(&np->mii, cmd);
ha@828: 	spin_unlock_irq(&np->lock);
ha@828: 	return 0;
ha@828: }
ha@828: 
ha@828: static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	int rc;
ha@828: 	spin_lock_irq(&np->lock);
ha@828: 	rc = mii_ethtool_sset(&np->mii, cmd);
ha@828: 	spin_unlock_irq(&np->lock);
ha@828: 	return rc;
ha@828: }
ha@828: 
ha@828: static int rtl8139_nway_reset(struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	return mii_nway_restart(&np->mii);
ha@828: }
ha@828: 
ha@828: static u32 rtl8139_get_link(struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	return mii_link_ok(&np->mii);
ha@828: }
ha@828: 
ha@828: static u32 rtl8139_get_msglevel(struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	return np->msg_enable;
ha@828: }
ha@828: 
ha@828: static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	np->msg_enable = datum;
ha@828: }
ha@828: 
ha@828: /* TODO: we are too slack to do reg dumping for pio, for now */
ha@828: #ifdef CONFIG_8139TOO_PIO
ha@828: #define rtl8139_get_regs_len	NULL
ha@828: #define rtl8139_get_regs	NULL
ha@828: #else
ha@828: static int rtl8139_get_regs_len(struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	return np->regs_len;
ha@828: }
ha@828: 
ha@828: static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 
ha@828: 	regs->version = RTL_REGS_VER;
ha@828: 
ha@828: 	spin_lock_irq(&np->lock);
ha@828: 	memcpy_fromio(regbuf, np->mmio_addr, regs->len);
ha@828: 	spin_unlock_irq(&np->lock);
ha@828: }
ha@828: #endif /* CONFIG_8139TOO_MMIO */
ha@828: 
ha@828: static int rtl8139_get_stats_count(struct net_device *dev)
ha@828: {
ha@828: 	return RTL_NUM_STATS;
ha@828: }
ha@828: 
ha@828: static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 
ha@828: 	data[0] = np->xstats.early_rx;
ha@828: 	data[1] = np->xstats.tx_buf_mapped;
ha@828: 	data[2] = np->xstats.tx_timeouts;
ha@828: 	data[3] = np->xstats.rx_lost_in_ring;
ha@828: }
ha@828: 
ha@828: static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
ha@828: {
ha@828: 	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
ha@828: }
ha@828: 
ha@828: static const struct ethtool_ops rtl8139_ethtool_ops = {
ha@828: 	.get_drvinfo		= rtl8139_get_drvinfo,
ha@828: 	.get_settings		= rtl8139_get_settings,
ha@828: 	.set_settings		= rtl8139_set_settings,
ha@828: 	.get_regs_len		= rtl8139_get_regs_len,
ha@828: 	.get_regs		= rtl8139_get_regs,
ha@828: 	.nway_reset		= rtl8139_nway_reset,
ha@828: 	.get_link		= rtl8139_get_link,
ha@828: 	.get_msglevel		= rtl8139_get_msglevel,
ha@828: 	.set_msglevel		= rtl8139_set_msglevel,
ha@828: 	.get_wol		= rtl8139_get_wol,
ha@828: 	.set_wol		= rtl8139_set_wol,
ha@828: 	.get_strings		= rtl8139_get_strings,
ha@828: 	.get_stats_count	= rtl8139_get_stats_count,
ha@828: 	.get_ethtool_stats	= rtl8139_get_ethtool_stats,
ha@828: };
ha@828: 
ha@828: static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
ha@828: {
ha@828: 	struct rtl8139_private *np = netdev_priv(dev);
ha@828: 	int rc;
ha@828: 
ha@828: 	if (!netif_running(dev))
ha@828: 		return -EINVAL;
ha@828: 
ha@828: 	spin_lock_irq(&np->lock);
ha@828: 	rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL);
ha@828: 	spin_unlock_irq(&np->lock);
ha@828: 
ha@828: 	return rc;
ha@828: }
ha@828: 
ha@828: 
ha@828: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	unsigned long flags;
ha@828: 
ha@828: 	if (netif_running(dev)) {
ha@828: 		spin_lock_irqsave (&tp->lock, flags);
ha@828: 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
ha@828: 		RTL_W32 (RxMissed, 0);
ha@828: 		spin_unlock_irqrestore (&tp->lock, flags);
ha@828: 	}
ha@828: 
ha@828: 	return &tp->stats;
ha@828: }
ha@828: 
ha@828: /* Set or clear the multicast filter for this adaptor.
ha@828:    This routine is not state sensitive and need not be SMP locked. */
ha@828: 
ha@828: static void __set_rx_mode (struct net_device *dev)
ha@828: {
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	u32 mc_filter[2];	/* Multicast hash filter */
ha@828: 	int i, rx_mode;
ha@828: 	u32 tmp;
ha@828: 
ha@828: 	DPRINTK ("%s:   rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
ha@828: 			dev->name, dev->flags, RTL_R32 (RxConfig));
ha@828: 
ha@828: 	/* Note: do not reorder, GCC is clever about common statements. */
ha@828: 	if (dev->flags & IFF_PROMISC) {
ha@828: 		rx_mode =
ha@828: 		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
ha@828: 		    AcceptAllPhys;
ha@828: 		mc_filter[1] = mc_filter[0] = 0xffffffff;
ha@828: 	} else if ((dev->mc_count > multicast_filter_limit)
ha@828: 		   || (dev->flags & IFF_ALLMULTI)) {
ha@828: 		/* Too many to filter perfectly -- accept all multicasts. */
ha@828: 		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
ha@828: 		mc_filter[1] = mc_filter[0] = 0xffffffff;
ha@828: 	} else {
ha@828: 		struct dev_mc_list *mclist;
ha@828: 		rx_mode = AcceptBroadcast | AcceptMyPhys;
ha@828: 		mc_filter[1] = mc_filter[0] = 0;
ha@828: 		for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
ha@828: 		     i++, mclist = mclist->next) {
ha@828: 			int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
ha@828: 
ha@828: 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
ha@828: 			rx_mode |= AcceptMulticast;
ha@828: 		}
ha@828: 	}
ha@828: 
ha@828: 	/* We can safely update without stopping the chip. */
ha@828: 	tmp = rtl8139_rx_config | rx_mode;
ha@828: 	if (tp->rx_config != tmp) {
ha@828: 		RTL_W32_F (RxConfig, tmp);
ha@828: 		tp->rx_config = tmp;
ha@828: 	}
ha@828: 	RTL_W32_F (MAR0 + 0, mc_filter[0]);
ha@828: 	RTL_W32_F (MAR0 + 4, mc_filter[1]);
ha@828: }
ha@828: 
ha@828: static void rtl8139_set_rx_mode (struct net_device *dev)
ha@828: {
ha@828: 	unsigned long flags;
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 
ha@828: 	spin_lock_irqsave (&tp->lock, flags);
ha@828: 	__set_rx_mode(dev);
ha@828: 	spin_unlock_irqrestore (&tp->lock, flags);
ha@828: }
ha@828: 
ha@828: #ifdef CONFIG_PM
ha@828: 
ha@828: static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
ha@828: {
ha@828: 	struct net_device *dev = pci_get_drvdata (pdev);
ha@828: 	struct rtl8139_private *tp = netdev_priv(dev);
ha@828: 	void __iomem *ioaddr = tp->mmio_addr;
ha@828: 	unsigned long flags;
ha@828: 
ha@828: 	pci_save_state (pdev);
ha@828: 
ha@828: 	if (!netif_running (dev))
ha@828: 		return 0;
ha@828: 
ha@828: 	netif_device_detach (dev);
ha@828: 
ha@828: 	spin_lock_irqsave (&tp->lock, flags);
ha@828: 
ha@828: 	/* Disable interrupts, stop Tx and Rx. */
ha@828: 	RTL_W16 (IntrMask, 0);
ha@828: 	RTL_W8 (ChipCmd, 0);
ha@828: 
ha@828: 	/* Update the error counts. */
ha@828: 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
ha@828: 	RTL_W32 (RxMissed, 0);
ha@828: 
ha@828: 	spin_unlock_irqrestore (&tp->lock, flags);
ha@828: 
ha@828: 	pci_set_power_state (pdev, PCI_D3hot);
ha@828: 
ha@828: 	return 0;
ha@828: }
ha@828: 
ha@828: 
ha@828: static int rtl8139_resume (struct pci_dev *pdev)
ha@828: {
ha@828: 	struct net_device *dev = pci_get_drvdata (pdev);
ha@828: 
ha@828: 	pci_restore_state (pdev);
ha@828: 	if (!netif_running (dev))
ha@828: 		return 0;
ha@828: 	pci_set_power_state (pdev, PCI_D0);
ha@828: 	rtl8139_init_ring (dev);
ha@828: 	rtl8139_hw_start (dev);
ha@828: 	netif_device_attach (dev);
ha@828: 	return 0;
ha@828: }
ha@828: 
ha@828: #endif /* CONFIG_PM */
ha@828: 
ha@828: 
ha@828: static struct pci_driver rtl8139_pci_driver = {
ha@828: 	.name		= DRV_NAME,
ha@828: 	.id_table	= rtl8139_pci_tbl,
ha@828: 	.probe		= rtl8139_init_one,
ha@828: 	.remove		= __devexit_p(rtl8139_remove_one),
ha@828: #ifdef CONFIG_PM
ha@828: 	.suspend	= rtl8139_suspend,
ha@828: 	.resume		= rtl8139_resume,
ha@828: #endif /* CONFIG_PM */
ha@828: };
ha@828: 
ha@828: 
ha@828: static int __init rtl8139_init_module (void)
ha@828: {
ha@828: 	/* when we're a module, we always print a version message,
ha@828: 	 * even if no 8139 board is found.
ha@828: 	 */
ha@828: #ifdef MODULE
ha@828: 	printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
ha@828: #endif
ha@828: 
ha@828: 	return pci_register_driver(&rtl8139_pci_driver);
ha@828: }
ha@828: 
ha@828: 
ha@828: static void __exit rtl8139_cleanup_module (void)
ha@828: {
ha@828: 	pci_unregister_driver (&rtl8139_pci_driver);
ha@828: }
ha@828: 
ha@828: 
ha@828: module_init(rtl8139_init_module);
ha@828: module_exit(rtl8139_cleanup_module);