fp@774: /****************************************************************************** fp@774: * fp@774: * $Id$ fp@774: * fp@1326: * Copyright (C) 2006-2008 Florian Pose, Ingenieurgemeinschaft IgH fp@774: * fp@774: * This file is part of the IgH EtherCAT Master. fp@774: * fp@1326: * The IgH EtherCAT Master is free software; you can redistribute it and/or fp@1326: * modify it under the terms of the GNU General Public License version 2, as fp@1326: * published by the Free Software Foundation. fp@774: * fp@1326: * The IgH EtherCAT Master is distributed in the hope that it will be useful, fp@1326: * but WITHOUT ANY WARRANTY; without even the implied warranty of fp@1326: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General fp@1326: * Public License for more details. fp@774: * fp@1326: * You should have received a copy of the GNU General Public License along fp@1326: * with the IgH EtherCAT Master; if not, write to the Free Software fp@774: * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA fp@774: * fp@1363: * --- fp@1363: * fp@1363: * The license mentioned above concerns the source code only. Using the fp@1363: * EtherCAT technology and brand is only permitted in compliance with the fp@1363: * industrial property and similar rights of Beckhoff Automation GmbH. fp@774: * fp@774: *****************************************************************************/ fp@774: fp@774: /** fp@774: \file fp@774: EtherCAT driver for RTL8139-compatible NICs. fp@774: */ fp@774: fp@774: /*****************************************************************************/ fp@774: fp@774: /* fp@774: Former documentation: fp@774: fp@774: 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. fp@774: fp@774: Maintained by Jeff Garzik fp@774: Copyright 2000-2002 Jeff Garzik fp@774: fp@774: Much code comes from Donald Becker's rtl8139.c driver, fp@774: versions 1.13 and older. This driver was originally based fp@774: on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: fp@774: fp@774: ---------- fp@774: fp@774: Written 1997-2001 by Donald Becker. fp@774: This software may be used and distributed according to the fp@774: terms of the GNU General Public License (GPL), incorporated fp@774: herein by reference. Drivers based on or derived from this fp@774: code fall under the GPL and must retain the authorship, fp@774: copyright and license notice. This file is not a complete fp@774: program and may only be used when the entire operating fp@774: system is licensed under the GPL. fp@774: fp@774: This driver is for boards based on the RTL8129 and RTL8139 fp@774: PCI ethernet chips. fp@774: fp@774: The author may be reached as becker@scyld.com, or C/O Scyld fp@774: Computing Corporation 410 Severn Ave., Suite 210 Annapolis fp@774: MD 21403 fp@774: fp@774: Support and updates available at fp@774: http://www.scyld.com/network/rtl8139.html fp@774: fp@774: Twister-tuning table provided by Kinston fp@774: . fp@774: fp@774: ---------- fp@774: fp@774: This software may be used and distributed according to the terms fp@774: of the GNU General Public License, incorporated herein by reference. fp@774: fp@774: Contributors: fp@774: fp@774: Donald Becker - he wrote the original driver, kudos to him! fp@774: (but please don't e-mail him for support, this isn't his driver) fp@774: fp@774: Tigran Aivazian - bug fixes, skbuff free cleanup fp@774: fp@774: Martin Mares - suggestions for PCI cleanup fp@774: fp@774: David S. Miller - PCI DMA and softnet updates fp@774: fp@774: Ernst Gill - fixes ported from BSD driver fp@774: fp@774: Daniel Kobras - identified specific locations of fp@774: posted MMIO write bugginess fp@774: fp@774: Gerard Sharp - bug fix, testing and feedback fp@774: fp@774: David Ford - Rx ring wrap fix fp@774: fp@774: Dan DeMaggio - swapped RTL8139 cards with me, and allowed me fp@774: to find and fix a crucial bug on older chipsets. fp@774: fp@774: Donald Becker/Chris Butterworth/Marcus Westergren - fp@774: Noticed various Rx packet size-related buglets. fp@774: fp@774: Santiago Garcia Mantinan - testing and feedback fp@774: fp@774: Jens David - 2.2.x kernel backports fp@774: fp@774: Martin Dennett - incredibly helpful insight on undocumented fp@774: features of the 8139 chips fp@774: fp@774: Jean-Jacques Michel - bug fix fp@774: fp@774: Tobias Ringström - Rx interrupt status checking suggestion fp@774: fp@774: Andrew Morton - Clear blocked signals, avoid fp@774: buffer overrun setting current->comm. fp@774: fp@774: Kalle Olavi Niemitalo - Wake-on-LAN ioctls fp@774: fp@774: Robert Kuebel - Save kernel thread from dying on any signal. fp@774: fp@774: Submitting bug reports: fp@774: fp@774: "rtl8139-diag -mmmaaavvveefN" output fp@774: enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log fp@774: fp@774: */ fp@774: fp@774: #define DRV_NAME "ec_8139too" fp@774: #define DRV_VERSION "0.9.28" fp@774: fp@774: fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: #include fp@774: fp@774: #include "../globals.h" fp@774: #include "ecdev.h" fp@774: fp@774: #define RTL8139_DRIVER_NAME DRV_NAME \ fp@774: " EtherCAT-capable Fast Ethernet driver " \ fp@774: DRV_VERSION ", master " EC_MASTER_VERSION fp@774: fp@774: #define PFX DRV_NAME ": " fp@774: fp@774: /* Default Message level */ fp@774: #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \ fp@774: NETIF_MSG_PROBE | \ fp@774: NETIF_MSG_LINK) fp@774: fp@774: fp@774: /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */ fp@774: #ifdef CONFIG_8139TOO_PIO fp@774: #define USE_IO_OPS 1 fp@774: #endif fp@774: fp@774: /* define to 1, 2 or 3 to enable copious debugging info */ fp@774: #define RTL8139_DEBUG 0 fp@774: fp@774: /* define to 1 to disable lightweight runtime debugging checks */ fp@774: #undef RTL8139_NDEBUG fp@774: fp@774: fp@774: #if RTL8139_DEBUG fp@774: /* note: prints function name for you */ fp@774: # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) fp@774: #else fp@774: # define DPRINTK(fmt, args...) fp@774: #endif fp@774: fp@774: #ifdef RTL8139_NDEBUG fp@774: # define assert(expr) do {} while (0) fp@774: #else fp@774: # define assert(expr) \ fp@774: if(unlikely(!(expr))) { \ fp@774: printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \ fp@774: #expr,__FILE__,__FUNCTION__,__LINE__); \ fp@774: } fp@774: #endif fp@774: fp@774: fp@774: /* A few user-configurable values. */ fp@774: /* media options */ fp@774: #define MAX_UNITS 8 fp@774: static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; fp@774: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; fp@774: fp@774: /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). fp@774: The RTL chips use a 64 element hash table based on the Ethernet CRC. */ fp@774: static int multicast_filter_limit = 32; fp@774: fp@774: /* bitmapped message enable number */ fp@774: static int debug = -1; fp@774: fp@774: /* fp@774: * Receive ring size fp@774: * Warning: 64K ring has hardware issues and may lock up. fp@774: */ fp@774: #if defined(CONFIG_SH_DREAMCAST) fp@774: #define RX_BUF_IDX 1 /* 16K ring */ fp@774: #else fp@774: #define RX_BUF_IDX 2 /* 32K ring */ fp@774: #endif fp@774: #define RX_BUF_LEN (8192 << RX_BUF_IDX) fp@774: #define RX_BUF_PAD 16 fp@774: #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ fp@774: fp@774: #if RX_BUF_LEN == 65536 fp@774: #define RX_BUF_TOT_LEN RX_BUF_LEN fp@774: #else fp@774: #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) fp@774: #endif fp@774: fp@774: /* Number of Tx descriptor registers. */ fp@774: #define NUM_TX_DESC 4 fp@774: fp@774: /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ fp@774: #define MAX_ETH_FRAME_SIZE 1536 fp@774: fp@774: /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ fp@774: #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE fp@774: #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) fp@774: fp@774: /* PCI Tuning Parameters fp@774: Threshold is bytes transferred to chip before transmission starts. */ fp@774: #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ fp@774: fp@774: /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ fp@774: #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ fp@774: #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ fp@774: #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ fp@774: #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ fp@774: fp@774: /* Operational parameters that usually are not changed. */ fp@774: /* Time in jiffies before concluding the transmitter is hung. */ fp@774: #define TX_TIMEOUT (6*HZ) fp@774: fp@774: fp@774: enum { fp@774: HAS_MII_XCVR = 0x010000, fp@774: HAS_CHIP_XCVR = 0x020000, fp@774: HAS_LNK_CHNG = 0x040000, fp@774: }; fp@774: fp@774: #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ fp@774: #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ fp@774: #define RTL_MIN_IO_SIZE 0x80 fp@774: #define RTL8139B_IO_SIZE 256 fp@774: fp@774: #define RTL8129_CAPS HAS_MII_XCVR fp@774: #define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG fp@774: fp@774: typedef enum { fp@774: RTL8139 = 0, fp@774: RTL8129, fp@774: } board_t; fp@774: fp@774: fp@774: /* indexed by board_t, above */ fp@774: static const struct { fp@774: const char *name; fp@774: u32 hw_flags; fp@774: } board_info[] __devinitdata = { fp@774: { "RealTek RTL8139", RTL8139_CAPS }, fp@774: { "RealTek RTL8129", RTL8129_CAPS }, fp@774: }; fp@774: fp@774: fp@774: static struct pci_device_id rtl8139_pci_tbl[] = { fp@774: {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: fp@774: #ifdef CONFIG_SH_SECUREEDGE5410 fp@774: /* Bogus 8139 silicon reports 8129 without external PROM :-( */ fp@774: {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@774: #endif fp@774: #ifdef CONFIG_8139TOO_8129 fp@774: {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 }, fp@774: #endif fp@774: fp@774: /* some crazy cards report invalid vendor ids like fp@774: * 0x0001 here. The other ids are valid and constant, fp@774: * so we simply don't match on the main vendor id. fp@774: */ fp@774: {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 }, fp@774: {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 }, fp@774: {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 }, fp@774: fp@774: {0,} fp@774: }; fp@774: fp@774: /* prevent driver from being loaded automatically */ fp@774: //MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); fp@774: fp@774: static struct { fp@774: const char str[ETH_GSTRING_LEN]; fp@774: } ethtool_stats_keys[] = { fp@774: { "early_rx" }, fp@774: { "tx_buf_mapped" }, fp@774: { "tx_timeouts" }, fp@774: { "rx_lost_in_ring" }, fp@774: }; fp@774: fp@774: /* The rest of these values should never change. */ fp@774: fp@774: /* Symbolic offsets to registers. */ fp@774: enum RTL8139_registers { fp@774: MAC0 = 0, /* Ethernet hardware address. */ fp@774: MAR0 = 8, /* Multicast filter. */ fp@774: TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ fp@774: TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ fp@774: RxBuf = 0x30, fp@774: ChipCmd = 0x37, fp@774: RxBufPtr = 0x38, fp@774: RxBufAddr = 0x3A, fp@774: IntrMask = 0x3C, fp@774: IntrStatus = 0x3E, fp@774: TxConfig = 0x40, fp@774: RxConfig = 0x44, fp@774: Timer = 0x48, /* A general-purpose counter. */ fp@774: RxMissed = 0x4C, /* 24 bits valid, write clears. */ fp@774: Cfg9346 = 0x50, fp@774: Config0 = 0x51, fp@774: Config1 = 0x52, fp@774: FlashReg = 0x54, fp@774: MediaStatus = 0x58, fp@774: Config3 = 0x59, fp@774: Config4 = 0x5A, /* absent on RTL-8139A */ fp@774: HltClk = 0x5B, fp@774: MultiIntr = 0x5C, fp@774: TxSummary = 0x60, fp@774: BasicModeCtrl = 0x62, fp@774: BasicModeStatus = 0x64, fp@774: NWayAdvert = 0x66, fp@774: NWayLPAR = 0x68, fp@774: NWayExpansion = 0x6A, fp@774: /* Undocumented registers, but required for proper operation. */ fp@774: FIFOTMS = 0x70, /* FIFO Control and test. */ fp@774: CSCR = 0x74, /* Chip Status and Configuration Register. */ fp@774: PARA78 = 0x78, fp@774: PARA7c = 0x7c, /* Magic transceiver parameter register. */ fp@774: Config5 = 0xD8, /* absent on RTL-8139A */ fp@774: }; fp@774: fp@774: enum ClearBitMasks { fp@774: MultiIntrClear = 0xF000, fp@774: ChipCmdClear = 0xE2, fp@774: Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), fp@774: }; fp@774: fp@774: enum ChipCmdBits { fp@774: CmdReset = 0x10, fp@774: CmdRxEnb = 0x08, fp@774: CmdTxEnb = 0x04, fp@774: RxBufEmpty = 0x01, fp@774: }; fp@774: fp@774: /* Interrupt register bits, using my own meaningful names. */ fp@774: enum IntrStatusBits { fp@774: PCIErr = 0x8000, fp@774: PCSTimeout = 0x4000, fp@774: RxFIFOOver = 0x40, fp@774: RxUnderrun = 0x20, fp@774: RxOverflow = 0x10, fp@774: TxErr = 0x08, fp@774: TxOK = 0x04, fp@774: RxErr = 0x02, fp@774: RxOK = 0x01, fp@774: fp@774: RxAckBits = RxFIFOOver | RxOverflow | RxOK, fp@774: }; fp@774: fp@774: enum TxStatusBits { fp@774: TxHostOwns = 0x2000, fp@774: TxUnderrun = 0x4000, fp@774: TxStatOK = 0x8000, fp@774: TxOutOfWindow = 0x20000000, fp@774: TxAborted = 0x40000000, fp@774: TxCarrierLost = 0x80000000, fp@774: }; fp@774: enum RxStatusBits { fp@774: RxMulticast = 0x8000, fp@774: RxPhysical = 0x4000, fp@774: RxBroadcast = 0x2000, fp@774: RxBadSymbol = 0x0020, fp@774: RxRunt = 0x0010, fp@774: RxTooLong = 0x0008, fp@774: RxCRCErr = 0x0004, fp@774: RxBadAlign = 0x0002, fp@774: RxStatusOK = 0x0001, fp@774: }; fp@774: fp@774: /* Bits in RxConfig. */ fp@774: enum rx_mode_bits { fp@774: AcceptErr = 0x20, fp@774: AcceptRunt = 0x10, fp@774: AcceptBroadcast = 0x08, fp@774: AcceptMulticast = 0x04, fp@774: AcceptMyPhys = 0x02, fp@774: AcceptAllPhys = 0x01, fp@774: }; fp@774: fp@774: /* Bits in TxConfig. */ fp@774: enum tx_config_bits { fp@774: fp@774: /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */ fp@774: TxIFGShift = 24, fp@774: TxIFG84 = (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */ fp@774: TxIFG88 = (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */ fp@774: TxIFG92 = (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */ fp@774: TxIFG96 = (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */ fp@774: fp@774: TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ fp@774: TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */ fp@774: TxClearAbt = (1 << 0), /* Clear abort (WO) */ fp@774: TxDMAShift = 8, /* DMA burst value (0-7) is shifted this many bits */ fp@774: TxRetryShift = 4, /* TXRR value (0-15) is shifted this many bits */ fp@774: fp@774: TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ fp@774: }; fp@774: fp@774: /* Bits in Config1 */ fp@774: enum Config1Bits { fp@774: Cfg1_PM_Enable = 0x01, fp@774: Cfg1_VPD_Enable = 0x02, fp@774: Cfg1_PIO = 0x04, fp@774: Cfg1_MMIO = 0x08, fp@774: LWAKE = 0x10, /* not on 8139, 8139A */ fp@774: Cfg1_Driver_Load = 0x20, fp@774: Cfg1_LED0 = 0x40, fp@774: Cfg1_LED1 = 0x80, fp@774: SLEEP = (1 << 1), /* only on 8139, 8139A */ fp@774: PWRDN = (1 << 0), /* only on 8139, 8139A */ fp@774: }; fp@774: fp@774: /* Bits in Config3 */ fp@774: enum Config3Bits { fp@774: Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ fp@774: Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ fp@774: Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ fp@774: Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ fp@774: Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ fp@774: Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ fp@774: Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ fp@774: Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ fp@774: }; fp@774: fp@774: /* Bits in Config4 */ fp@774: enum Config4Bits { fp@774: LWPTN = (1 << 2), /* not on 8139, 8139A */ fp@774: }; fp@774: fp@774: /* Bits in Config5 */ fp@774: enum Config5Bits { fp@774: Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ fp@774: Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ fp@774: Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ fp@774: Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */ fp@774: Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ fp@774: Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ fp@774: Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ fp@774: }; fp@774: fp@774: enum RxConfigBits { fp@774: /* rx fifo threshold */ fp@774: RxCfgFIFOShift = 13, fp@774: RxCfgFIFONone = (7 << RxCfgFIFOShift), fp@774: fp@774: /* Max DMA burst */ fp@774: RxCfgDMAShift = 8, fp@774: RxCfgDMAUnlimited = (7 << RxCfgDMAShift), fp@774: fp@774: /* rx ring buffer length */ fp@774: RxCfgRcv8K = 0, fp@774: RxCfgRcv16K = (1 << 11), fp@774: RxCfgRcv32K = (1 << 12), fp@774: RxCfgRcv64K = (1 << 11) | (1 << 12), fp@774: fp@774: /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */ fp@774: RxNoWrap = (1 << 7), fp@774: }; fp@774: fp@774: /* Twister tuning parameters from RealTek. fp@774: Completely undocumented, but required to tune bad links on some boards. */ fp@774: enum CSCRBits { fp@774: CSCR_LinkOKBit = 0x0400, fp@774: CSCR_LinkChangeBit = 0x0800, fp@774: CSCR_LinkStatusBits = 0x0f000, fp@774: CSCR_LinkDownOffCmd = 0x003c0, fp@774: CSCR_LinkDownCmd = 0x0f3c0, fp@774: }; fp@774: fp@774: enum Cfg9346Bits { fp@774: Cfg9346_Lock = 0x00, fp@774: Cfg9346_Unlock = 0xC0, fp@774: }; fp@774: fp@774: typedef enum { fp@774: CH_8139 = 0, fp@774: CH_8139_K, fp@774: CH_8139A, fp@774: CH_8139A_G, fp@774: CH_8139B, fp@774: CH_8130, fp@774: CH_8139C, fp@774: CH_8100, fp@774: CH_8100B_8139D, fp@774: CH_8101, fp@774: } chip_t; fp@774: fp@774: enum chip_flags { fp@774: HasHltClk = (1 << 0), fp@774: HasLWake = (1 << 1), fp@774: }; fp@774: fp@774: #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \ fp@774: (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22) fp@774: #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1) fp@774: fp@774: /* directly indexed by chip_t, above */ fp@774: static const struct { fp@774: const char *name; fp@774: u32 version; /* from RTL8139C/RTL8139D docs */ fp@774: u32 flags; fp@774: } rtl_chip_info[] = { fp@774: { "RTL-8139", fp@774: HW_REVID(1, 0, 0, 0, 0, 0, 0), fp@774: HasHltClk, fp@774: }, fp@774: fp@774: { "RTL-8139 rev K", fp@774: HW_REVID(1, 1, 0, 0, 0, 0, 0), fp@774: HasHltClk, fp@774: }, fp@774: fp@774: { "RTL-8139A", fp@774: HW_REVID(1, 1, 1, 0, 0, 0, 0), fp@774: HasHltClk, /* XXX undocumented? */ fp@774: }, fp@774: fp@774: { "RTL-8139A rev G", fp@774: HW_REVID(1, 1, 1, 0, 0, 1, 0), fp@774: HasHltClk, /* XXX undocumented? */ fp@774: }, fp@774: fp@774: { "RTL-8139B", fp@774: HW_REVID(1, 1, 1, 1, 0, 0, 0), fp@774: HasLWake, fp@774: }, fp@774: fp@774: { "RTL-8130", fp@774: HW_REVID(1, 1, 1, 1, 1, 0, 0), fp@774: HasLWake, fp@774: }, fp@774: fp@774: { "RTL-8139C", fp@774: HW_REVID(1, 1, 1, 0, 1, 0, 0), fp@774: HasLWake, fp@774: }, fp@774: fp@774: { "RTL-8100", fp@774: HW_REVID(1, 1, 1, 1, 0, 1, 0), fp@774: HasLWake, fp@774: }, fp@774: fp@774: { "RTL-8100B/8139D", fp@774: HW_REVID(1, 1, 1, 0, 1, 0, 1), fp@774: HasHltClk /* XXX undocumented? */ fp@774: | HasLWake, fp@774: }, fp@774: fp@774: { "RTL-8101", fp@774: HW_REVID(1, 1, 1, 0, 1, 1, 1), fp@774: HasLWake, fp@774: }, fp@774: }; fp@774: fp@774: struct rtl_extra_stats { fp@774: unsigned long early_rx; fp@774: unsigned long tx_buf_mapped; fp@774: unsigned long tx_timeouts; fp@774: unsigned long rx_lost_in_ring; fp@774: }; fp@774: fp@774: struct rtl8139_private { fp@774: void __iomem *mmio_addr; fp@774: int drv_flags; fp@774: struct pci_dev *pci_dev; fp@774: u32 msg_enable; fp@774: struct net_device_stats stats; fp@774: unsigned char *rx_ring; fp@774: unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */ fp@774: unsigned int tx_flag; fp@774: unsigned long cur_tx; fp@774: unsigned long dirty_tx; fp@774: unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ fp@774: unsigned char *tx_bufs; /* Tx bounce buffer region. */ fp@774: dma_addr_t rx_ring_dma; fp@774: dma_addr_t tx_bufs_dma; fp@774: signed char phys[4]; /* MII device addresses. */ fp@774: char twistie, twist_row, twist_col; /* Twister tune state. */ fp@774: unsigned int watchdog_fired : 1; fp@774: unsigned int default_port : 4; /* Last dev->if_port value. */ fp@774: unsigned int have_thread : 1; fp@774: spinlock_t lock; fp@774: spinlock_t rx_lock; fp@774: chip_t chipset; fp@774: u32 rx_config; fp@774: struct rtl_extra_stats xstats; fp@774: fp@774: struct delayed_work thread; fp@774: fp@774: struct mii_if_info mii; fp@774: unsigned int regs_len; fp@774: unsigned long fifo_copy_timeout; fp@2421: fp@774: ec_device_t *ecdev; fp@774: }; fp@774: fp@774: MODULE_AUTHOR("Florian Pose "); fp@774: MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver"); fp@774: MODULE_LICENSE("GPL"); fp@774: MODULE_VERSION(EC_MASTER_VERSION); fp@774: fp@774: module_param(multicast_filter_limit, int, 0); fp@774: module_param_array(media, int, NULL, 0); fp@774: module_param_array(full_duplex, int, NULL, 0); fp@774: module_param(debug, int, 0); fp@774: MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); fp@774: MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); fp@774: MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); fp@774: MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); fp@774: fp@774: void ec_poll(struct net_device *); fp@774: fp@774: static int read_eeprom (void __iomem *ioaddr, int location, int addr_len); fp@774: static int rtl8139_open (struct net_device *dev); fp@774: static int mdio_read (struct net_device *dev, int phy_id, int location); fp@774: static void mdio_write (struct net_device *dev, int phy_id, int location, fp@774: int val); fp@774: static void rtl8139_start_thread(struct rtl8139_private *tp); fp@774: static void rtl8139_tx_timeout (struct net_device *dev); fp@774: static void rtl8139_init_ring (struct net_device *dev); fp@774: static int rtl8139_start_xmit (struct sk_buff *skb, fp@774: struct net_device *dev); fp@774: static int rtl8139_poll(struct net_device *dev, int *budget); fp@774: #ifdef CONFIG_NET_POLL_CONTROLLER fp@774: static void rtl8139_poll_controller(struct net_device *dev); fp@774: #endif fp@774: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance); fp@774: static int rtl8139_close (struct net_device *dev); fp@774: static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); fp@774: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); fp@774: static void rtl8139_set_rx_mode (struct net_device *dev); fp@774: static void __set_rx_mode (struct net_device *dev); fp@774: static void rtl8139_hw_start (struct net_device *dev); fp@774: static void rtl8139_thread (struct work_struct *work); fp@774: static void rtl8139_tx_timeout_task(struct work_struct *work); fp@774: static const struct ethtool_ops rtl8139_ethtool_ops; fp@774: fp@774: /* write MMIO register, with flush */ fp@774: /* Flush avoids rtl8139 bug w/ posted MMIO writes */ fp@774: #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0) fp@774: #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0) fp@774: #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0) fp@774: fp@774: fp@774: #define MMIO_FLUSH_AUDIT_COMPLETE 1 fp@774: #if MMIO_FLUSH_AUDIT_COMPLETE fp@774: fp@774: /* write MMIO register */ fp@774: #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg)) fp@774: #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg)) fp@774: #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg)) fp@774: fp@774: #else fp@774: fp@774: /* write MMIO register, then flush */ fp@774: #define RTL_W8 RTL_W8_F fp@774: #define RTL_W16 RTL_W16_F fp@774: #define RTL_W32 RTL_W32_F fp@774: fp@774: #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ fp@774: fp@774: /* read MMIO register */ fp@774: #define RTL_R8(reg) ioread8 (ioaddr + (reg)) fp@774: #define RTL_R16(reg) ioread16 (ioaddr + (reg)) fp@774: #define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) fp@774: fp@774: fp@774: static const u16 rtl8139_intr_mask = fp@774: PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | fp@774: TxErr | TxOK | RxErr | RxOK; fp@774: fp@774: static const u16 rtl8139_norx_intr_mask = fp@774: PCIErr | PCSTimeout | RxUnderrun | fp@774: TxErr | TxOK | RxErr ; fp@774: fp@774: #if RX_BUF_IDX == 0 fp@774: static const unsigned int rtl8139_rx_config = fp@774: RxCfgRcv8K | RxNoWrap | fp@774: (RX_FIFO_THRESH << RxCfgFIFOShift) | fp@774: (RX_DMA_BURST << RxCfgDMAShift); fp@774: #elif RX_BUF_IDX == 1 fp@774: static const unsigned int rtl8139_rx_config = fp@774: RxCfgRcv16K | RxNoWrap | fp@774: (RX_FIFO_THRESH << RxCfgFIFOShift) | fp@774: (RX_DMA_BURST << RxCfgDMAShift); fp@774: #elif RX_BUF_IDX == 2 fp@774: static const unsigned int rtl8139_rx_config = fp@774: RxCfgRcv32K | RxNoWrap | fp@774: (RX_FIFO_THRESH << RxCfgFIFOShift) | fp@774: (RX_DMA_BURST << RxCfgDMAShift); fp@774: #elif RX_BUF_IDX == 3 fp@774: static const unsigned int rtl8139_rx_config = fp@774: RxCfgRcv64K | fp@774: (RX_FIFO_THRESH << RxCfgFIFOShift) | fp@774: (RX_DMA_BURST << RxCfgDMAShift); fp@774: #else fp@774: #error "Invalid configuration for 8139_RXBUF_IDX" fp@774: #endif fp@774: fp@774: static const unsigned int rtl8139_tx_config = fp@774: TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); fp@774: fp@774: static void __rtl8139_cleanup_dev (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: struct pci_dev *pdev; fp@774: fp@774: assert (dev != NULL); fp@774: assert (tp->pci_dev != NULL); fp@774: pdev = tp->pci_dev; fp@774: fp@774: #ifdef USE_IO_OPS fp@774: if (tp->mmio_addr) fp@774: ioport_unmap (tp->mmio_addr); fp@774: #else fp@774: if (tp->mmio_addr) fp@774: pci_iounmap (pdev, tp->mmio_addr); fp@774: #endif /* USE_IO_OPS */ fp@774: fp@774: /* it's ok to call this even if we have no regions to free */ fp@774: pci_release_regions (pdev); fp@774: fp@774: free_netdev(dev); fp@774: pci_set_drvdata (pdev, NULL); fp@774: } fp@774: fp@774: fp@774: static void rtl8139_chip_reset (void __iomem *ioaddr) fp@774: { fp@774: int i; fp@774: fp@774: /* Soft reset the chip. */ fp@774: RTL_W8 (ChipCmd, CmdReset); fp@774: fp@774: /* Check that the chip has finished the reset. */ fp@774: for (i = 1000; i > 0; i--) { fp@774: barrier(); fp@774: if ((RTL_R8 (ChipCmd) & CmdReset) == 0) fp@774: break; fp@774: udelay (10); fp@774: } fp@774: } fp@774: fp@774: fp@774: static int __devinit rtl8139_init_board (struct pci_dev *pdev, fp@774: struct net_device **dev_out) fp@774: { fp@774: void __iomem *ioaddr; fp@774: struct net_device *dev; fp@774: struct rtl8139_private *tp; fp@774: u8 tmp8; fp@774: int rc, disable_dev_on_err = 0; fp@774: unsigned int i; fp@774: unsigned long pio_start, pio_end, pio_flags, pio_len; fp@774: unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; fp@774: u32 version; fp@774: fp@774: assert (pdev != NULL); fp@774: fp@774: *dev_out = NULL; fp@774: fp@774: /* dev and priv zeroed in alloc_etherdev */ fp@774: dev = alloc_etherdev (sizeof (*tp)); fp@774: if (dev == NULL) { fp@774: dev_err(&pdev->dev, "Unable to alloc new net device\n"); fp@774: return -ENOMEM; fp@774: } fp@774: SET_MODULE_OWNER(dev); fp@774: SET_NETDEV_DEV(dev, &pdev->dev); fp@774: fp@774: tp = netdev_priv(dev); fp@774: tp->pci_dev = pdev; fp@774: fp@774: /* enable device (incl. PCI PM wakeup and hotplug setup) */ fp@774: rc = pci_enable_device (pdev); fp@774: if (rc) fp@774: goto err_out; fp@774: fp@774: pio_start = pci_resource_start (pdev, 0); fp@774: pio_end = pci_resource_end (pdev, 0); fp@774: pio_flags = pci_resource_flags (pdev, 0); fp@774: pio_len = pci_resource_len (pdev, 0); fp@774: fp@774: mmio_start = pci_resource_start (pdev, 1); fp@774: mmio_end = pci_resource_end (pdev, 1); fp@774: mmio_flags = pci_resource_flags (pdev, 1); fp@774: mmio_len = pci_resource_len (pdev, 1); fp@774: fp@774: /* set this immediately, we need to know before fp@774: * we talk to the chip directly */ fp@774: DPRINTK("PIO region size == 0x%02X\n", pio_len); fp@774: DPRINTK("MMIO region size == 0x%02lX\n", mmio_len); fp@774: fp@774: #ifdef USE_IO_OPS fp@774: /* make sure PCI base addr 0 is PIO */ fp@774: if (!(pio_flags & IORESOURCE_IO)) { fp@774: dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n"); fp@774: rc = -ENODEV; fp@774: goto err_out; fp@774: } fp@774: /* check for weird/broken PCI region reporting */ fp@774: if (pio_len < RTL_MIN_IO_SIZE) { fp@774: dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n"); fp@774: rc = -ENODEV; fp@774: goto err_out; fp@774: } fp@774: #else fp@774: /* make sure PCI base addr 1 is MMIO */ fp@774: if (!(mmio_flags & IORESOURCE_MEM)) { fp@774: dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); fp@774: rc = -ENODEV; fp@774: goto err_out; fp@774: } fp@774: if (mmio_len < RTL_MIN_IO_SIZE) { fp@774: dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n"); fp@774: rc = -ENODEV; fp@774: goto err_out; fp@774: } fp@774: #endif fp@774: fp@774: rc = pci_request_regions (pdev, DRV_NAME); fp@774: if (rc) fp@774: goto err_out; fp@774: disable_dev_on_err = 1; fp@774: fp@774: /* enable PCI bus-mastering */ fp@774: pci_set_master (pdev); fp@774: fp@774: #ifdef USE_IO_OPS fp@774: ioaddr = ioport_map(pio_start, pio_len); fp@774: if (!ioaddr) { fp@774: dev_err(&pdev->dev, "cannot map PIO, aborting\n"); fp@774: rc = -EIO; fp@774: goto err_out; fp@774: } fp@774: dev->base_addr = pio_start; fp@774: tp->mmio_addr = ioaddr; fp@774: tp->regs_len = pio_len; fp@774: #else fp@774: /* ioremap MMIO region */ fp@774: ioaddr = pci_iomap(pdev, 1, 0); fp@774: if (ioaddr == NULL) { fp@774: dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); fp@774: rc = -EIO; fp@774: goto err_out; fp@774: } fp@774: dev->base_addr = (long) ioaddr; fp@774: tp->mmio_addr = ioaddr; fp@774: tp->regs_len = mmio_len; fp@774: #endif /* USE_IO_OPS */ fp@774: fp@774: /* Bring old chips out of low-power mode. */ fp@774: RTL_W8 (HltClk, 'R'); fp@774: fp@774: /* check for missing/broken hardware */ fp@774: if (RTL_R32 (TxConfig) == 0xFFFFFFFF) { fp@774: dev_err(&pdev->dev, "Chip not responding, ignoring board\n"); fp@774: rc = -EIO; fp@774: goto err_out; fp@774: } fp@774: fp@774: /* identify chip attached to board */ fp@774: version = RTL_R32 (TxConfig) & HW_REVID_MASK; fp@774: for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) fp@774: if (version == rtl_chip_info[i].version) { fp@774: tp->chipset = i; fp@774: goto match; fp@774: } fp@774: fp@774: /* if unknown chip, assume array element #0, original RTL-8139 in this case */ fp@774: dev_printk (KERN_DEBUG, &pdev->dev, fp@774: "unknown chip version, assuming RTL-8139\n"); fp@774: dev_printk (KERN_DEBUG, &pdev->dev, fp@774: "TxConfig = 0x%lx\n", RTL_R32 (TxConfig)); fp@774: tp->chipset = 0; fp@774: fp@774: match: fp@774: DPRINTK ("chipset id (%d) == index %d, '%s'\n", fp@774: version, i, rtl_chip_info[i].name); fp@774: fp@774: if (tp->chipset >= CH_8139B) { fp@774: u8 new_tmp8 = tmp8 = RTL_R8 (Config1); fp@774: DPRINTK("PCI PM wakeup\n"); fp@774: if ((rtl_chip_info[tp->chipset].flags & HasLWake) && fp@774: (tmp8 & LWAKE)) fp@774: new_tmp8 &= ~LWAKE; fp@774: new_tmp8 |= Cfg1_PM_Enable; fp@774: if (new_tmp8 != tmp8) { fp@774: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@774: RTL_W8 (Config1, tmp8); fp@774: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@774: } fp@774: if (rtl_chip_info[tp->chipset].flags & HasLWake) { fp@774: tmp8 = RTL_R8 (Config4); fp@774: if (tmp8 & LWPTN) { fp@774: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@774: RTL_W8 (Config4, tmp8 & ~LWPTN); fp@774: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@774: } fp@774: } fp@774: } else { fp@774: DPRINTK("Old chip wakeup\n"); fp@774: tmp8 = RTL_R8 (Config1); fp@774: tmp8 &= ~(SLEEP | PWRDN); fp@774: RTL_W8 (Config1, tmp8); fp@774: } fp@774: fp@774: rtl8139_chip_reset (ioaddr); fp@774: fp@774: *dev_out = dev; fp@774: return 0; fp@774: fp@774: err_out: fp@774: __rtl8139_cleanup_dev (dev); fp@774: if (disable_dev_on_err) fp@774: pci_disable_device (pdev); fp@774: return rc; fp@774: } fp@774: fp@774: fp@774: static int __devinit rtl8139_init_one (struct pci_dev *pdev, fp@774: const struct pci_device_id *ent) fp@774: { fp@774: struct net_device *dev = NULL; fp@774: struct rtl8139_private *tp; fp@774: int i, addr_len, option; fp@774: void __iomem *ioaddr; fp@774: static int board_idx = -1; fp@774: u8 pci_rev; fp@774: fp@774: assert (pdev != NULL); fp@774: assert (ent != NULL); fp@774: fp@774: board_idx++; fp@774: fp@774: /* when we're built into the kernel, the driver version message fp@774: * is only printed if at least one 8139 board has been found fp@774: */ fp@774: #ifndef MODULE fp@774: { fp@774: static int printed_version; fp@774: if (!printed_version++) fp@774: printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); fp@774: } fp@774: #endif fp@774: fp@774: pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); fp@774: fp@774: if (pdev->vendor == PCI_VENDOR_ID_REALTEK && fp@774: pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) { fp@774: dev_info(&pdev->dev, fp@774: "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n", fp@774: pdev->vendor, pdev->device, pci_rev); fp@774: dev_info(&pdev->dev, fp@774: "Use the \"8139cp\" driver for improved performance and stability.\n"); fp@774: } fp@774: fp@774: i = rtl8139_init_board (pdev, &dev); fp@774: if (i < 0) fp@774: return i; fp@774: fp@774: assert (dev != NULL); fp@774: tp = netdev_priv(dev); fp@774: fp@774: ioaddr = tp->mmio_addr; fp@774: assert (ioaddr != NULL); fp@774: fp@774: addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; fp@774: for (i = 0; i < 3; i++) fp@774: ((u16 *) (dev->dev_addr))[i] = fp@774: le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); fp@774: memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); fp@774: fp@774: /* The Rtl8139-specific entries in the device structure. */ fp@774: dev->open = rtl8139_open; fp@774: dev->hard_start_xmit = rtl8139_start_xmit; fp@774: dev->poll = rtl8139_poll; fp@774: dev->weight = 64; fp@774: dev->stop = rtl8139_close; fp@774: dev->get_stats = rtl8139_get_stats; fp@774: dev->set_multicast_list = rtl8139_set_rx_mode; fp@774: dev->do_ioctl = netdev_ioctl; fp@774: dev->ethtool_ops = &rtl8139_ethtool_ops; fp@774: dev->tx_timeout = rtl8139_tx_timeout; fp@774: dev->watchdog_timeo = TX_TIMEOUT; fp@774: #ifdef CONFIG_NET_POLL_CONTROLLER fp@774: dev->poll_controller = rtl8139_poll_controller; fp@774: #endif fp@774: fp@774: /* note: the hardware is not capable of sg/csum/highdma, however fp@774: * through the use of skb_copy_and_csum_dev we enable these fp@774: * features fp@774: */ fp@774: dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA; fp@774: fp@774: dev->irq = pdev->irq; fp@774: fp@774: /* tp zeroed and aligned in alloc_etherdev */ fp@774: tp = netdev_priv(dev); fp@774: fp@774: /* note: tp->chipset set in rtl8139_init_board */ fp@774: tp->drv_flags = board_info[ent->driver_data].hw_flags; fp@774: tp->mmio_addr = ioaddr; fp@774: tp->msg_enable = fp@774: (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1)); fp@774: spin_lock_init (&tp->lock); fp@774: spin_lock_init (&tp->rx_lock); fp@774: INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); fp@774: tp->mii.dev = dev; fp@774: tp->mii.mdio_read = mdio_read; fp@774: tp->mii.mdio_write = mdio_write; fp@774: tp->mii.phy_id_mask = 0x3f; fp@774: tp->mii.reg_num_mask = 0x1f; fp@774: fp@774: /* dev is fully set up and ready to use now */ fp@2421: fp@774: // offer device to EtherCAT master module fp@1011: tp->ecdev = ecdev_offer(dev, ec_poll, THIS_MODULE); fp@774: fp@774: if (!tp->ecdev) { fp@774: DPRINTK("about to register device named %s (%p)...\n", dev->name, dev); fp@774: i = register_netdev (dev); fp@774: if (i) goto err_out; fp@774: } fp@774: fp@774: pci_set_drvdata (pdev, dev); fp@774: fp@774: printk (KERN_INFO "%s: %s at 0x%lx, " fp@774: "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " fp@774: "IRQ %d\n", fp@774: dev->name, fp@774: board_info[ent->driver_data].name, fp@774: dev->base_addr, fp@774: dev->dev_addr[0], dev->dev_addr[1], fp@774: dev->dev_addr[2], dev->dev_addr[3], fp@774: dev->dev_addr[4], dev->dev_addr[5], fp@774: dev->irq); fp@774: fp@774: printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", fp@774: dev->name, rtl_chip_info[tp->chipset].name); fp@774: fp@774: /* Find the connected MII xcvrs. fp@774: Doing this in open() would allow detecting external xcvrs later, but fp@774: takes too much time. */ fp@774: #ifdef CONFIG_8139TOO_8129 fp@774: if (tp->drv_flags & HAS_MII_XCVR) { fp@774: int phy, phy_idx = 0; fp@774: for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) { fp@774: int mii_status = mdio_read(dev, phy, 1); fp@774: if (mii_status != 0xffff && mii_status != 0x0000) { fp@774: u16 advertising = mdio_read(dev, phy, 4); fp@774: tp->phys[phy_idx++] = phy; fp@774: printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x " fp@774: "advertising %4.4x.\n", fp@774: dev->name, phy, mii_status, advertising); fp@774: } fp@774: } fp@774: if (phy_idx == 0) { fp@774: printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM " fp@774: "transceiver.\n", fp@774: dev->name); fp@774: tp->phys[0] = 32; fp@774: } fp@774: } else fp@774: #endif fp@774: tp->phys[0] = 32; fp@774: tp->mii.phy_id = tp->phys[0]; fp@774: fp@774: /* The lower four bits are the media type. */ fp@774: option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; fp@774: if (option > 0) { fp@774: tp->mii.full_duplex = (option & 0x210) ? 1 : 0; fp@774: tp->default_port = option & 0xFF; fp@774: if (tp->default_port) fp@774: tp->mii.force_media = 1; fp@774: } fp@774: if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) fp@774: tp->mii.full_duplex = full_duplex[board_idx]; fp@774: if (tp->mii.full_duplex) { fp@774: printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name); fp@774: /* Changing the MII-advertised media because might prevent fp@774: re-connection. */ fp@774: tp->mii.force_media = 1; fp@774: } fp@774: if (tp->default_port) { fp@774: printk(KERN_INFO " Forcing %dMbps %s-duplex operation.\n", fp@774: (option & 0x20 ? 100 : 10), fp@774: (option & 0x10 ? "full" : "half")); fp@774: mdio_write(dev, tp->phys[0], 0, fp@774: ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ fp@774: ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ fp@774: } fp@774: fp@774: /* Put the chip into low-power mode. */ fp@774: if (rtl_chip_info[tp->chipset].flags & HasHltClk) fp@774: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ fp@774: fp@2582: if (tp->ecdev) { fp@2582: i = ecdev_open(tp->ecdev); fp@2582: if (i) { fp@2582: ecdev_withdraw(tp->ecdev); fp@2582: goto err_out; fp@2582: } fp@774: } fp@774: fp@774: return 0; fp@774: fp@774: err_out: fp@774: __rtl8139_cleanup_dev (dev); fp@774: pci_disable_device (pdev); fp@774: return i; fp@774: } fp@774: fp@774: fp@774: static void __devexit rtl8139_remove_one (struct pci_dev *pdev) fp@774: { fp@774: struct net_device *dev = pci_get_drvdata (pdev); fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: fp@774: assert (dev != NULL); fp@774: fp@774: flush_scheduled_work(); fp@774: fp@774: if (tp->ecdev) { fp@774: ecdev_close(tp->ecdev); fp@774: ecdev_withdraw(tp->ecdev); fp@774: } fp@774: else { fp@774: unregister_netdev (dev); fp@774: } fp@774: fp@774: __rtl8139_cleanup_dev (dev); fp@774: pci_disable_device (pdev); fp@774: } fp@774: fp@774: fp@774: /* Serial EEPROM section. */ fp@774: fp@774: /* EEPROM_Ctrl bits. */ fp@774: #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ fp@774: #define EE_CS 0x08 /* EEPROM chip select. */ fp@774: #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ fp@774: #define EE_WRITE_0 0x00 fp@774: #define EE_WRITE_1 0x02 fp@774: #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ fp@774: #define EE_ENB (0x80 | EE_CS) fp@774: fp@774: /* Delay between EEPROM clock transitions. fp@774: No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. fp@774: */ fp@774: fp@774: #define eeprom_delay() (void)RTL_R32(Cfg9346) fp@774: fp@774: /* The EEPROM commands include the alway-set leading bit. */ fp@774: #define EE_WRITE_CMD (5) fp@774: #define EE_READ_CMD (6) fp@774: #define EE_ERASE_CMD (7) fp@774: fp@774: static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len) fp@774: { fp@774: int i; fp@774: unsigned retval = 0; fp@774: int read_cmd = location | (EE_READ_CMD << addr_len); fp@774: fp@774: RTL_W8 (Cfg9346, EE_ENB & ~EE_CS); fp@774: RTL_W8 (Cfg9346, EE_ENB); fp@774: eeprom_delay (); fp@774: fp@774: /* Shift the read command bits out. */ fp@774: for (i = 4 + addr_len; i >= 0; i--) { fp@774: int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; fp@774: RTL_W8 (Cfg9346, EE_ENB | dataval); fp@774: eeprom_delay (); fp@774: RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK); fp@774: eeprom_delay (); fp@774: } fp@774: RTL_W8 (Cfg9346, EE_ENB); fp@774: eeprom_delay (); fp@774: fp@774: for (i = 16; i > 0; i--) { fp@774: RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK); fp@774: eeprom_delay (); fp@774: retval = fp@774: (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 : fp@774: 0); fp@774: RTL_W8 (Cfg9346, EE_ENB); fp@774: eeprom_delay (); fp@774: } fp@774: fp@774: /* Terminate the EEPROM access. */ fp@774: RTL_W8 (Cfg9346, ~EE_CS); fp@774: eeprom_delay (); fp@774: fp@774: return retval; fp@774: } fp@774: fp@774: /* MII serial management: mostly bogus for now. */ fp@774: /* Read and write the MII management registers using software-generated fp@774: serial MDIO protocol. fp@774: The maximum data clock rate is 2.5 Mhz. The minimum timing is usually fp@774: met by back-to-back PCI I/O cycles, but we insert a delay to avoid fp@774: "overclocking" issues. */ fp@774: #define MDIO_DIR 0x80 fp@774: #define MDIO_DATA_OUT 0x04 fp@774: #define MDIO_DATA_IN 0x02 fp@774: #define MDIO_CLK 0x01 fp@774: #define MDIO_WRITE0 (MDIO_DIR) fp@774: #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) fp@774: fp@774: #define mdio_delay() RTL_R8(Config4) fp@774: fp@774: fp@774: static const char mii_2_8139_map[8] = { fp@774: BasicModeCtrl, fp@774: BasicModeStatus, fp@774: 0, fp@774: 0, fp@774: NWayAdvert, fp@774: NWayLPAR, fp@774: NWayExpansion, fp@774: 0 fp@774: }; fp@774: fp@774: fp@774: #ifdef CONFIG_8139TOO_8129 fp@774: /* Syncronize the MII management interface by shifting 32 one bits out. */ fp@774: static void mdio_sync (void __iomem *ioaddr) fp@774: { fp@774: int i; fp@774: fp@774: for (i = 32; i >= 0; i--) { fp@774: RTL_W8 (Config4, MDIO_WRITE1); fp@774: mdio_delay (); fp@774: RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK); fp@774: mdio_delay (); fp@774: } fp@774: } fp@774: #endif fp@774: fp@774: static int mdio_read (struct net_device *dev, int phy_id, int location) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: int retval = 0; fp@774: #ifdef CONFIG_8139TOO_8129 fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; fp@774: int i; fp@774: #endif fp@774: fp@774: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: return location < 8 && mii_2_8139_map[location] ? fp@774: RTL_R16 (mii_2_8139_map[location]) : 0; fp@774: } fp@774: fp@774: #ifdef CONFIG_8139TOO_8129 fp@774: mdio_sync (ioaddr); fp@774: /* Shift the read command bits out. */ fp@774: for (i = 15; i >= 0; i--) { fp@774: int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; fp@774: fp@774: RTL_W8 (Config4, MDIO_DIR | dataval); fp@774: mdio_delay (); fp@774: RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK); fp@774: mdio_delay (); fp@774: } fp@774: fp@774: /* Read the two transition, 16 data, and wire-idle bits. */ fp@774: for (i = 19; i > 0; i--) { fp@774: RTL_W8 (Config4, 0); fp@774: mdio_delay (); fp@774: retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0); fp@774: RTL_W8 (Config4, MDIO_CLK); fp@774: mdio_delay (); fp@774: } fp@774: #endif fp@774: fp@774: return (retval >> 1) & 0xffff; fp@774: } fp@774: fp@774: fp@774: static void mdio_write (struct net_device *dev, int phy_id, int location, fp@774: int value) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: #ifdef CONFIG_8139TOO_8129 fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; fp@774: int i; fp@774: #endif fp@774: fp@774: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: if (location == 0) { fp@774: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@774: RTL_W16 (BasicModeCtrl, value); fp@774: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@774: } else if (location < 8 && mii_2_8139_map[location]) fp@774: RTL_W16 (mii_2_8139_map[location], value); fp@774: return; fp@774: } fp@774: fp@774: #ifdef CONFIG_8139TOO_8129 fp@774: mdio_sync (ioaddr); fp@774: fp@774: /* Shift the command bits out. */ fp@774: for (i = 31; i >= 0; i--) { fp@774: int dataval = fp@774: (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; fp@774: RTL_W8 (Config4, dataval); fp@774: mdio_delay (); fp@774: RTL_W8 (Config4, dataval | MDIO_CLK); fp@774: mdio_delay (); fp@774: } fp@774: /* Clear out extra bits. */ fp@774: for (i = 2; i > 0; i--) { fp@774: RTL_W8 (Config4, 0); fp@774: mdio_delay (); fp@774: RTL_W8 (Config4, MDIO_CLK); fp@774: mdio_delay (); fp@774: } fp@774: #endif fp@774: } fp@774: fp@774: fp@774: static int rtl8139_open (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: int retval; fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: fp@774: if (!tp->ecdev) { fp@774: retval = request_irq(dev->irq, rtl8139_interrupt, fp@774: IRQF_SHARED, dev->name, dev); fp@774: if (retval) fp@774: return retval; fp@774: } fp@774: fp@774: tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN, fp@774: &tp->tx_bufs_dma); fp@774: tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN, fp@774: &tp->rx_ring_dma); fp@774: if (tp->tx_bufs == NULL || tp->rx_ring == NULL) { fp@774: if (!tp->ecdev) free_irq(dev->irq, dev); fp@774: fp@774: if (tp->tx_bufs) fp@774: pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, fp@774: tp->tx_bufs, tp->tx_bufs_dma); fp@774: if (tp->rx_ring) fp@774: pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, fp@774: tp->rx_ring, tp->rx_ring_dma); fp@774: fp@774: return -ENOMEM; fp@774: fp@774: } fp@774: fp@774: tp->mii.full_duplex = tp->mii.force_media; fp@774: tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; fp@774: fp@774: rtl8139_init_ring (dev); fp@774: rtl8139_hw_start (dev); fp@774: fp@774: if (!tp->ecdev) { fp@774: netif_start_queue (dev); fp@774: fp@774: if (netif_msg_ifup(tp)) fp@774: printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d" fp@774: " GP Pins %2.2x %s-duplex.\n", dev->name, fp@774: (unsigned long long)pci_resource_start (tp->pci_dev, 1), fp@774: dev->irq, RTL_R8 (MediaStatus), fp@774: tp->mii.full_duplex ? "full" : "half"); fp@774: rtl8139_start_thread(tp); fp@774: } fp@774: fp@774: return 0; fp@774: } fp@774: fp@774: fp@774: static void rtl_check_media (struct net_device *dev, unsigned int init_media) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: fp@774: if (tp->ecdev) { fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: uint16_t state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS; fp@774: ecdev_set_link(tp->ecdev, state ? 1 : 0); fp@774: } fp@774: else { fp@774: if (tp->phys[0] >= 0) { fp@774: mii_check_media(&tp->mii, netif_msg_link(tp), init_media); fp@774: } fp@774: } fp@774: } fp@774: fp@774: /* Start the hardware at open or resume. */ fp@774: static void rtl8139_hw_start (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: u32 i; fp@774: u8 tmp; fp@774: fp@774: /* Bring old chips out of low-power mode. */ fp@774: if (rtl_chip_info[tp->chipset].flags & HasHltClk) fp@774: RTL_W8 (HltClk, 'R'); fp@774: fp@774: rtl8139_chip_reset (ioaddr); fp@774: fp@774: /* unlock Config[01234] and BMCR register writes */ fp@774: RTL_W8_F (Cfg9346, Cfg9346_Unlock); fp@774: /* Restore our idea of the MAC address. */ fp@774: RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); fp@774: RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); fp@774: fp@774: /* Must enable Tx/Rx before setting transfer thresholds! */ fp@774: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); fp@774: fp@774: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; fp@774: RTL_W32 (RxConfig, tp->rx_config); fp@774: RTL_W32 (TxConfig, rtl8139_tx_config); fp@774: fp@774: tp->cur_rx = 0; fp@774: fp@774: rtl_check_media (dev, 1); fp@774: fp@774: if (tp->chipset >= CH_8139B) { fp@774: /* Disable magic packet scanning, which is enabled fp@774: * when PM is enabled in Config1. It can be reenabled fp@774: * via ETHTOOL_SWOL if desired. */ fp@774: RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); fp@774: } fp@774: fp@774: DPRINTK("init buffer addresses\n"); fp@774: fp@774: /* Lock Config[01234] and BMCR register writes */ fp@774: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@774: fp@774: /* init Rx ring buffer DMA address */ fp@774: RTL_W32_F (RxBuf, tp->rx_ring_dma); fp@774: fp@774: /* init Tx buffer DMA addresses */ fp@774: for (i = 0; i < NUM_TX_DESC; i++) fp@774: RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); fp@774: fp@774: RTL_W32 (RxMissed, 0); fp@774: fp@774: rtl8139_set_rx_mode (dev); fp@774: fp@774: /* no early-rx interrupts */ fp@774: RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); fp@774: fp@774: /* make sure RxTx has started */ fp@774: tmp = RTL_R8 (ChipCmd); fp@774: if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) fp@774: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); fp@774: fp@774: if (!tp->ecdev) fp@774: /* Enable all known interrupts by setting the interrupt mask. */ fp@774: RTL_W16 (IntrMask, rtl8139_intr_mask); fp@774: } fp@774: fp@774: fp@774: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ fp@774: static void rtl8139_init_ring (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: int i; fp@774: fp@774: tp->cur_rx = 0; fp@774: tp->cur_tx = 0; fp@774: tp->dirty_tx = 0; fp@774: fp@774: for (i = 0; i < NUM_TX_DESC; i++) fp@774: tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; fp@774: } fp@774: fp@774: fp@774: /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ fp@774: static int next_tick = 3 * HZ; fp@774: fp@774: #ifndef CONFIG_8139TOO_TUNE_TWISTER fp@774: static inline void rtl8139_tune_twister (struct net_device *dev, fp@774: struct rtl8139_private *tp) {} fp@774: #else fp@774: enum TwisterParamVals { fp@774: PARA78_default = 0x78fa8388, fp@774: PARA7c_default = 0xcb38de43, /* param[0][3] */ fp@774: PARA7c_xxx = 0xcb38de43, fp@774: }; fp@774: fp@774: static const unsigned long param[4][4] = { fp@774: {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43}, fp@774: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, fp@774: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, fp@774: {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83} fp@774: }; fp@774: fp@774: static void rtl8139_tune_twister (struct net_device *dev, fp@774: struct rtl8139_private *tp) fp@774: { fp@774: int linkcase; fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: fp@774: /* This is a complicated state machine to configure the "twister" for fp@774: impedance/echos based on the cable length. fp@774: All of this is magic and undocumented. fp@774: */ fp@774: switch (tp->twistie) { fp@774: case 1: fp@774: if (RTL_R16 (CSCR) & CSCR_LinkOKBit) { fp@774: /* We have link beat, let us tune the twister. */ fp@774: RTL_W16 (CSCR, CSCR_LinkDownOffCmd); fp@774: tp->twistie = 2; /* Change to state 2. */ fp@774: next_tick = HZ / 10; fp@774: } else { fp@774: /* Just put in some reasonable defaults for when beat returns. */ fp@774: RTL_W16 (CSCR, CSCR_LinkDownCmd); fp@774: RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ fp@774: RTL_W32 (PARA78, PARA78_default); fp@774: RTL_W32 (PARA7c, PARA7c_default); fp@774: tp->twistie = 0; /* Bail from future actions. */ fp@774: } fp@774: break; fp@774: case 2: fp@774: /* Read how long it took to hear the echo. */ fp@774: linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; fp@774: if (linkcase == 0x7000) fp@774: tp->twist_row = 3; fp@774: else if (linkcase == 0x3000) fp@774: tp->twist_row = 2; fp@774: else if (linkcase == 0x1000) fp@774: tp->twist_row = 1; fp@774: else fp@774: tp->twist_row = 0; fp@774: tp->twist_col = 0; fp@774: tp->twistie = 3; /* Change to state 2. */ fp@774: next_tick = HZ / 10; fp@774: break; fp@774: case 3: fp@774: /* Put out four tuning parameters, one per 100msec. */ fp@774: if (tp->twist_col == 0) fp@774: RTL_W16 (FIFOTMS, 0); fp@774: RTL_W32 (PARA7c, param[(int) tp->twist_row] fp@774: [(int) tp->twist_col]); fp@774: next_tick = HZ / 10; fp@774: if (++tp->twist_col >= 4) { fp@774: /* For short cables we are done. fp@774: For long cables (row == 3) check for mistune. */ fp@774: tp->twistie = fp@774: (tp->twist_row == 3) ? 4 : 0; fp@774: } fp@774: break; fp@774: case 4: fp@774: /* Special case for long cables: check for mistune. */ fp@774: if ((RTL_R16 (CSCR) & fp@774: CSCR_LinkStatusBits) == 0x7000) { fp@774: tp->twistie = 0; fp@774: break; fp@774: } else { fp@774: RTL_W32 (PARA7c, 0xfb38de03); fp@774: tp->twistie = 5; fp@774: next_tick = HZ / 10; fp@774: } fp@774: break; fp@774: case 5: fp@774: /* Retune for shorter cable (column 2). */ fp@774: RTL_W32 (FIFOTMS, 0x20); fp@774: RTL_W32 (PARA78, PARA78_default); fp@774: RTL_W32 (PARA7c, PARA7c_default); fp@774: RTL_W32 (FIFOTMS, 0x00); fp@774: tp->twist_row = 2; fp@774: tp->twist_col = 0; fp@774: tp->twistie = 3; fp@774: next_tick = HZ / 10; fp@774: break; fp@774: fp@774: default: fp@774: /* do nothing */ fp@774: break; fp@774: } fp@774: } fp@774: #endif /* CONFIG_8139TOO_TUNE_TWISTER */ fp@774: fp@774: static inline void rtl8139_thread_iter (struct net_device *dev, fp@774: struct rtl8139_private *tp, fp@774: void __iomem *ioaddr) fp@774: { fp@774: int mii_lpa; fp@774: fp@774: mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); fp@774: fp@774: if (!tp->mii.force_media && mii_lpa != 0xffff) { fp@774: int duplex = (mii_lpa & LPA_100FULL) fp@774: || (mii_lpa & 0x01C0) == 0x0040; fp@774: if (tp->mii.full_duplex != duplex) { fp@774: tp->mii.full_duplex = duplex; fp@774: fp@774: if (mii_lpa) { fp@774: printk (KERN_INFO fp@774: "%s: Setting %s-duplex based on MII #%d link" fp@774: " partner ability of %4.4x.\n", fp@774: dev->name, fp@774: tp->mii.full_duplex ? "full" : "half", fp@774: tp->phys[0], mii_lpa); fp@774: } else { fp@774: printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n", fp@774: dev->name); fp@774: } fp@774: #if 0 fp@774: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@774: RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); fp@774: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@774: #endif fp@774: } fp@774: } fp@774: fp@774: next_tick = HZ * 60; fp@774: fp@774: rtl8139_tune_twister (dev, tp); fp@774: fp@774: DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n", fp@774: dev->name, RTL_R16 (NWayLPAR)); fp@774: DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n", fp@774: dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); fp@774: DPRINTK ("%s: Chip config %2.2x %2.2x.\n", fp@774: dev->name, RTL_R8 (Config0), fp@774: RTL_R8 (Config1)); fp@774: } fp@774: fp@774: static void rtl8139_thread (struct work_struct *work) fp@774: { fp@774: struct rtl8139_private *tp = fp@774: container_of(work, struct rtl8139_private, thread.work); fp@774: struct net_device *dev = tp->mii.dev; fp@774: unsigned long thr_delay = next_tick; fp@774: fp@774: rtnl_lock(); fp@774: fp@774: if (!netif_running(dev)) fp@774: goto out_unlock; fp@774: fp@774: if (tp->watchdog_fired) { fp@774: tp->watchdog_fired = 0; fp@774: rtl8139_tx_timeout_task(work); fp@774: } else fp@774: rtl8139_thread_iter(dev, tp, tp->mmio_addr); fp@774: fp@774: if (tp->have_thread) fp@774: schedule_delayed_work(&tp->thread, thr_delay); fp@774: out_unlock: fp@774: rtnl_unlock (); fp@774: } fp@774: fp@774: static void rtl8139_start_thread(struct rtl8139_private *tp) fp@774: { fp@774: tp->twistie = 0; fp@774: if (tp->chipset == CH_8139_K) fp@774: tp->twistie = 1; fp@774: else if (tp->drv_flags & HAS_LNK_CHNG) fp@774: return; fp@774: fp@774: tp->have_thread = 1; fp@774: tp->watchdog_fired = 0; fp@774: fp@774: schedule_delayed_work(&tp->thread, next_tick); fp@774: } fp@774: fp@774: static inline void rtl8139_tx_clear (struct rtl8139_private *tp) fp@774: { fp@774: tp->cur_tx = 0; fp@774: tp->dirty_tx = 0; fp@774: fp@774: /* XXX account for unsent Tx packets in tp->stats.tx_dropped */ fp@774: } fp@774: fp@774: static void rtl8139_tx_timeout_task (struct work_struct *work) fp@774: { fp@774: struct rtl8139_private *tp = fp@774: container_of(work, struct rtl8139_private, thread.work); fp@774: struct net_device *dev = tp->mii.dev; fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: int i; fp@774: u8 tmp8; fp@774: fp@774: printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x " fp@774: "media %2.2x.\n", dev->name, RTL_R8 (ChipCmd), fp@774: RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus)); fp@774: /* Emit info to figure out what went wrong. */ fp@774: printk (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n", fp@774: dev->name, tp->cur_tx, tp->dirty_tx); fp@774: for (i = 0; i < NUM_TX_DESC; i++) fp@774: printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", fp@774: dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), fp@774: i == tp->dirty_tx % NUM_TX_DESC ? fp@774: " (queue head)" : ""); fp@774: fp@774: tp->xstats.tx_timeouts++; fp@774: fp@774: /* disable Tx ASAP, if not already */ fp@774: tmp8 = RTL_R8 (ChipCmd); fp@774: if (tmp8 & CmdTxEnb) fp@774: RTL_W8 (ChipCmd, CmdRxEnb); fp@774: fp@774: if (tp->ecdev) { fp@774: rtl8139_tx_clear (tp); fp@774: rtl8139_hw_start (dev); fp@774: } fp@774: else { fp@774: spin_lock_bh(&tp->rx_lock); fp@774: /* Disable interrupts by clearing the interrupt mask. */ fp@774: RTL_W16 (IntrMask, 0x0000); fp@774: fp@774: /* Stop a shared interrupt from scavenging while we are. */ fp@774: spin_lock_irq(&tp->lock); fp@774: rtl8139_tx_clear (tp); fp@774: spin_unlock_irq(&tp->lock); fp@774: fp@774: /* ...and finally, reset everything */ fp@774: if (netif_running(dev)) { fp@774: rtl8139_hw_start (dev); fp@774: netif_wake_queue (dev); fp@774: } fp@774: spin_unlock_bh(&tp->rx_lock); fp@774: } fp@774: } fp@774: fp@774: static void rtl8139_tx_timeout (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: fp@774: tp->watchdog_fired = 1; fp@774: if (!tp->ecdev && !tp->have_thread) { fp@774: INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); fp@774: schedule_delayed_work(&tp->thread, next_tick); fp@774: } fp@774: } fp@774: fp@774: static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: unsigned int entry; fp@774: unsigned int len = skb->len; fp@774: unsigned long flags; fp@774: fp@774: /* Calculate the next Tx descriptor entry. */ fp@774: entry = tp->cur_tx % NUM_TX_DESC; fp@774: fp@774: /* Note: the chip doesn't have auto-pad! */ fp@774: if (likely(len < TX_BUF_SIZE)) { fp@774: if (len < ETH_ZLEN) fp@774: memset(tp->tx_buf[entry], 0, ETH_ZLEN); fp@774: skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); fp@774: if (!tp->ecdev) dev_kfree_skb(skb); fp@774: } else { fp@774: if (!tp->ecdev) dev_kfree_skb(skb); fp@774: tp->stats.tx_dropped++; fp@774: return 0; fp@774: } fp@774: fp@774: if (tp->ecdev) { fp@774: RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), fp@774: tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); fp@774: fp@774: dev->trans_start = jiffies; fp@774: fp@774: tp->cur_tx++; fp@774: wmb(); fp@774: } fp@774: else { fp@774: spin_lock_irqsave(&tp->lock, flags); fp@774: fp@774: RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), fp@774: tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); fp@774: fp@774: dev->trans_start = jiffies; fp@774: fp@774: tp->cur_tx++; fp@774: wmb(); fp@774: fp@774: if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) fp@774: netif_stop_queue (dev); fp@774: spin_unlock_irqrestore(&tp->lock, flags); fp@774: fp@774: if (netif_msg_tx_queued(tp)) fp@774: printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n", fp@774: dev->name, len, entry); fp@774: } fp@774: fp@774: return 0; fp@774: } fp@774: fp@774: fp@774: static void rtl8139_tx_interrupt (struct net_device *dev, fp@774: struct rtl8139_private *tp, fp@774: void __iomem *ioaddr) fp@774: { fp@774: unsigned long dirty_tx, tx_left; fp@774: fp@774: assert (dev != NULL); fp@774: assert (ioaddr != NULL); fp@774: fp@774: dirty_tx = tp->dirty_tx; fp@774: tx_left = tp->cur_tx - dirty_tx; fp@774: while (tx_left > 0) { fp@774: int entry = dirty_tx % NUM_TX_DESC; fp@774: int txstatus; fp@774: fp@774: txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); fp@774: fp@774: if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) fp@774: break; /* It still hasn't been Txed */ fp@774: fp@774: /* Note: TxCarrierLost is always asserted at 100mbps. */ fp@774: if (txstatus & (TxOutOfWindow | TxAborted)) { fp@774: /* There was an major error, log it. */ fp@774: if (netif_msg_tx_err(tp)) fp@774: printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n", fp@774: dev->name, txstatus); fp@774: tp->stats.tx_errors++; fp@774: if (txstatus & TxAborted) { fp@774: tp->stats.tx_aborted_errors++; fp@774: RTL_W32 (TxConfig, TxClearAbt); fp@774: RTL_W16 (IntrStatus, TxErr); fp@774: wmb(); fp@774: } fp@774: if (txstatus & TxCarrierLost) fp@774: tp->stats.tx_carrier_errors++; fp@774: if (txstatus & TxOutOfWindow) fp@774: tp->stats.tx_window_errors++; fp@774: } else { fp@774: if (txstatus & TxUnderrun) { fp@774: /* Add 64 to the Tx FIFO threshold. */ fp@774: if (tp->tx_flag < 0x00300000) fp@774: tp->tx_flag += 0x00020000; fp@774: tp->stats.tx_fifo_errors++; fp@774: } fp@774: tp->stats.collisions += (txstatus >> 24) & 15; fp@774: tp->stats.tx_bytes += txstatus & 0x7ff; fp@774: tp->stats.tx_packets++; fp@774: } fp@774: fp@774: dirty_tx++; fp@774: tx_left--; fp@774: } fp@774: fp@774: #ifndef RTL8139_NDEBUG fp@774: if (!tp->ecdev && tp->cur_tx - dirty_tx > NUM_TX_DESC) { fp@774: printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", fp@774: dev->name, dirty_tx, tp->cur_tx); fp@774: dirty_tx += NUM_TX_DESC; fp@774: } fp@774: #endif /* RTL8139_NDEBUG */ fp@774: fp@774: /* only wake the queue if we did work, and the queue is stopped */ fp@774: if (tp->dirty_tx != dirty_tx) { fp@774: tp->dirty_tx = dirty_tx; fp@774: mb(); fp@774: if (!tp->ecdev) netif_wake_queue (dev); fp@774: } fp@774: } fp@774: fp@774: fp@774: /* TODO: clean this up! Rx reset need not be this intensive */ fp@774: static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, fp@774: struct rtl8139_private *tp, void __iomem *ioaddr) fp@774: { fp@774: u8 tmp8; fp@774: #ifdef CONFIG_8139_OLD_RX_RESET fp@774: int tmp_work; fp@774: #endif fp@774: fp@774: if (netif_msg_rx_err (tp)) fp@774: printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n", fp@774: dev->name, rx_status); fp@774: tp->stats.rx_errors++; fp@774: if (!(rx_status & RxStatusOK)) { fp@774: if (rx_status & RxTooLong) { fp@774: DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n", fp@774: dev->name, rx_status); fp@774: /* A.C.: The chip hangs here. */ fp@774: } fp@774: if (rx_status & (RxBadSymbol | RxBadAlign)) fp@774: tp->stats.rx_frame_errors++; fp@774: if (rx_status & (RxRunt | RxTooLong)) fp@774: tp->stats.rx_length_errors++; fp@774: if (rx_status & RxCRCErr) fp@774: tp->stats.rx_crc_errors++; fp@774: } else { fp@774: tp->xstats.rx_lost_in_ring++; fp@774: } fp@774: fp@774: #ifndef CONFIG_8139_OLD_RX_RESET fp@774: tmp8 = RTL_R8 (ChipCmd); fp@774: RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); fp@774: RTL_W8 (ChipCmd, tmp8); fp@774: RTL_W32 (RxConfig, tp->rx_config); fp@774: tp->cur_rx = 0; fp@774: #else fp@774: /* Reset the receiver, based on RealTek recommendation. (Bug?) */ fp@774: fp@774: /* disable receive */ fp@774: RTL_W8_F (ChipCmd, CmdTxEnb); fp@774: tmp_work = 200; fp@774: while (--tmp_work > 0) { fp@774: udelay(1); fp@774: tmp8 = RTL_R8 (ChipCmd); fp@774: if (!(tmp8 & CmdRxEnb)) fp@774: break; fp@774: } fp@774: if (tmp_work <= 0) fp@774: printk (KERN_WARNING PFX "rx stop wait too long\n"); fp@774: /* restart receive */ fp@774: tmp_work = 200; fp@774: while (--tmp_work > 0) { fp@774: RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); fp@774: udelay(1); fp@774: tmp8 = RTL_R8 (ChipCmd); fp@774: if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) fp@774: break; fp@774: } fp@774: if (tmp_work <= 0) fp@774: printk (KERN_WARNING PFX "tx/rx enable wait too long\n"); fp@774: fp@774: /* and reinitialize all rx related registers */ fp@774: RTL_W8_F (Cfg9346, Cfg9346_Unlock); fp@774: /* Must enable Tx/Rx before setting transfer thresholds! */ fp@774: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); fp@774: fp@774: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; fp@774: RTL_W32 (RxConfig, tp->rx_config); fp@774: tp->cur_rx = 0; fp@774: fp@774: DPRINTK("init buffer addresses\n"); fp@774: fp@774: /* Lock Config[01234] and BMCR register writes */ fp@774: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@774: fp@774: /* init Rx ring buffer DMA address */ fp@774: RTL_W32_F (RxBuf, tp->rx_ring_dma); fp@774: fp@774: /* A.C.: Reset the multicast list. */ fp@774: __set_rx_mode (dev); fp@774: #endif fp@774: } fp@774: fp@774: #if RX_BUF_IDX == 3 fp@774: static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring, fp@774: u32 offset, unsigned int size) fp@774: { fp@774: u32 left = RX_BUF_LEN - offset; fp@774: fp@774: if (size > left) { fp@774: skb_copy_to_linear_data(skb, ring + offset, left); fp@774: skb_copy_to_linear_data_offset(skb, left, ring, size - left); fp@774: } else fp@774: skb_copy_to_linear_data(skb, ring + offset, size); fp@774: } fp@774: #endif fp@774: fp@774: static void rtl8139_isr_ack(struct rtl8139_private *tp) fp@774: { fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: u16 status; fp@774: fp@774: status = RTL_R16 (IntrStatus) & RxAckBits; fp@774: fp@774: /* Clear out errors and receive interrupts */ fp@774: if (likely(status != 0)) { fp@774: if (unlikely(status & (RxFIFOOver | RxOverflow))) { fp@774: tp->stats.rx_errors++; fp@774: if (status & RxFIFOOver) fp@774: tp->stats.rx_fifo_errors++; fp@774: } fp@774: RTL_W16_F (IntrStatus, RxAckBits); fp@774: } fp@774: } fp@774: fp@774: static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, fp@774: int budget) fp@774: { fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: int received = 0; fp@774: unsigned char *rx_ring = tp->rx_ring; fp@774: unsigned int cur_rx = tp->cur_rx; fp@774: unsigned int rx_size = 0; fp@774: fp@774: DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x," fp@774: " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx, fp@774: RTL_R16 (RxBufAddr), fp@774: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); fp@774: fp@774: while ((tp->ecdev || netif_running(dev)) fp@774: && received < budget fp@774: && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { fp@774: u32 ring_offset = cur_rx % RX_BUF_LEN; fp@774: u32 rx_status; fp@774: unsigned int pkt_size; fp@774: struct sk_buff *skb; fp@774: fp@774: rmb(); fp@774: fp@774: /* read size+status of next frame from DMA ring buffer */ fp@774: rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset)); fp@774: rx_size = rx_status >> 16; fp@774: pkt_size = rx_size - 4; fp@774: fp@774: if (!tp->ecdev) { fp@774: if (netif_msg_rx_status(tp)) fp@774: printk(KERN_DEBUG "%s: rtl8139_rx() status %4.4x, size %4.4x," fp@774: " cur %4.4x.\n", dev->name, rx_status, fp@774: rx_size, cur_rx); fp@774: } fp@774: #if RTL8139_DEBUG > 2 fp@774: { fp@774: int i; fp@774: DPRINTK ("%s: Frame contents ", dev->name); fp@774: for (i = 0; i < 70; i++) fp@774: printk (" %2.2x", fp@774: rx_ring[ring_offset + i]); fp@774: printk (".\n"); fp@774: } fp@774: #endif fp@774: fp@774: /* Packet copy from FIFO still in progress. fp@774: * Theoretically, this should never happen fp@774: * since EarlyRx is disabled. fp@774: */ fp@774: if (unlikely(rx_size == 0xfff0)) { fp@774: if (!tp->fifo_copy_timeout) fp@774: tp->fifo_copy_timeout = jiffies + 2; fp@774: else if (time_after(jiffies, tp->fifo_copy_timeout)) { fp@774: DPRINTK ("%s: hung FIFO. Reset.", dev->name); fp@774: rx_size = 0; fp@774: goto no_early_rx; fp@774: } fp@774: if (netif_msg_intr(tp)) { fp@774: printk(KERN_DEBUG "%s: fifo copy in progress.", fp@774: dev->name); fp@774: } fp@774: tp->xstats.early_rx++; fp@774: break; fp@774: } fp@774: fp@774: no_early_rx: fp@774: tp->fifo_copy_timeout = 0; fp@774: fp@774: /* If Rx err or invalid rx_size/rx_status received fp@774: * (which happens if we get lost in the ring), fp@774: * Rx process gets reset, so we abort any further fp@774: * Rx processing. fp@774: */ fp@774: if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) || fp@774: (rx_size < 8) || fp@774: (!(rx_status & RxStatusOK)))) { fp@774: rtl8139_rx_err (rx_status, dev, tp, ioaddr); fp@774: received = -1; fp@774: goto out; fp@774: } fp@774: fp@774: if (tp->ecdev) { fp@774: ecdev_receive(tp->ecdev, fp@774: &rx_ring[ring_offset + 4], pkt_size); fp@774: dev->last_rx = jiffies; fp@774: tp->stats.rx_bytes += pkt_size; fp@774: tp->stats.rx_packets++; fp@774: } fp@774: else { fp@774: fp@774: /* Malloc up new buffer, compatible with net-2e. */ fp@774: /* Omit the four octet CRC from the length. */ fp@774: fp@774: skb = dev_alloc_skb (pkt_size + 2); fp@774: if (likely(skb)) { fp@774: skb_reserve (skb, 2); /* 16 byte align the IP fields. */ fp@774: #if RX_BUF_IDX == 3 fp@774: wrap_copy(skb, rx_ring, ring_offset+4, pkt_size); fp@774: #else fp@774: eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0); fp@774: #endif fp@774: skb_put (skb, pkt_size); fp@774: fp@774: skb->protocol = eth_type_trans (skb, dev); fp@774: fp@774: dev->last_rx = jiffies; fp@774: tp->stats.rx_bytes += pkt_size; fp@774: tp->stats.rx_packets++; fp@774: fp@774: netif_receive_skb (skb); fp@774: } else { fp@774: if (net_ratelimit()) fp@774: printk (KERN_WARNING fp@774: "%s: Memory squeeze, dropping packet.\n", fp@774: dev->name); fp@774: tp->stats.rx_dropped++; fp@774: } fp@774: } fp@774: received++; fp@774: fp@774: cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; fp@774: RTL_W16 (RxBufPtr, (u16) (cur_rx - 16)); fp@774: fp@774: rtl8139_isr_ack(tp); fp@774: } fp@774: fp@774: if (unlikely(!received || rx_size == 0xfff0)) fp@774: rtl8139_isr_ack(tp); fp@774: fp@774: #if RTL8139_DEBUG > 1 fp@774: DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x," fp@774: " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, fp@774: RTL_R16 (RxBufAddr), fp@774: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); fp@774: #endif fp@774: fp@774: tp->cur_rx = cur_rx; fp@774: fp@774: /* fp@774: * The receive buffer should be mostly empty. fp@774: * Tell NAPI to reenable the Rx irq. fp@774: */ fp@774: if (tp->fifo_copy_timeout) fp@774: received = budget; fp@774: fp@774: out: fp@774: return received; fp@774: } fp@774: fp@774: fp@774: static void rtl8139_weird_interrupt (struct net_device *dev, fp@774: struct rtl8139_private *tp, fp@774: void __iomem *ioaddr, fp@774: int status, int link_changed) fp@774: { fp@774: DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n", fp@774: dev->name, status); fp@774: fp@774: assert (dev != NULL); fp@774: assert (tp != NULL); fp@774: assert (ioaddr != NULL); fp@774: fp@774: /* Update the error count. */ fp@774: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@774: RTL_W32 (RxMissed, 0); fp@774: fp@774: if ((status & RxUnderrun) && link_changed && fp@774: (tp->drv_flags & HAS_LNK_CHNG)) { fp@774: rtl_check_media(dev, 0); fp@774: status &= ~RxUnderrun; fp@774: } fp@774: fp@774: if (status & (RxUnderrun | RxErr)) fp@774: tp->stats.rx_errors++; fp@774: fp@774: if (status & PCSTimeout) fp@774: tp->stats.rx_length_errors++; fp@774: if (status & RxUnderrun) fp@774: tp->stats.rx_fifo_errors++; fp@774: if (status & PCIErr) { fp@774: u16 pci_cmd_status; fp@774: pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); fp@774: pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); fp@774: fp@774: printk (KERN_ERR "%s: PCI Bus error %4.4x.\n", fp@774: dev->name, pci_cmd_status); fp@774: } fp@774: } fp@774: fp@774: static int rtl8139_poll(struct net_device *dev, int *budget) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: int orig_budget = min(*budget, dev->quota); fp@774: int done = 1; fp@774: fp@774: spin_lock(&tp->rx_lock); fp@774: if (likely(RTL_R16(IntrStatus) & RxAckBits)) { fp@774: int work_done; fp@774: fp@774: work_done = rtl8139_rx(dev, tp, orig_budget); fp@774: if (likely(work_done > 0)) { fp@774: *budget -= work_done; fp@774: dev->quota -= work_done; fp@774: done = (work_done < orig_budget); fp@774: } fp@774: } fp@774: fp@774: if (done) { fp@774: unsigned long flags; fp@774: /* fp@774: * Order is important since data can get interrupted fp@774: * again when we think we are done. fp@774: */ fp@774: local_irq_save(flags); fp@774: RTL_W16_F(IntrMask, rtl8139_intr_mask); fp@774: __netif_rx_complete(dev); fp@774: local_irq_restore(flags); fp@774: } fp@774: spin_unlock(&tp->rx_lock); fp@774: fp@774: return !done; fp@774: } fp@774: fp@774: void ec_poll(struct net_device *dev) fp@774: { fp@774: rtl8139_interrupt(0, dev); fp@774: } fp@774: fp@774: /* The interrupt handler does all of the Rx thread work and cleans up fp@774: after the Tx thread. */ fp@774: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance) fp@774: { fp@774: struct net_device *dev = (struct net_device *) dev_instance; fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: u16 status, ackstat; fp@774: int link_changed = 0; /* avoid bogus "uninit" warning */ fp@774: int handled = 0; fp@774: fp@774: if (tp->ecdev) { fp@774: status = RTL_R16 (IntrStatus); fp@774: } fp@774: else { fp@774: spin_lock (&tp->lock); fp@774: status = RTL_R16 (IntrStatus); fp@774: fp@774: /* shared irq? */ fp@774: if (unlikely((status & rtl8139_intr_mask) == 0)) fp@774: goto out; fp@774: } fp@774: fp@774: handled = 1; fp@774: fp@774: /* h/w no longer present (hotplug?) or major error, bail */ fp@774: if (unlikely(status == 0xFFFF)) fp@774: goto out; fp@774: fp@774: if (!tp->ecdev) { fp@774: /* close possible race's with dev_close */ fp@774: if (unlikely(!netif_running(dev))) { fp@774: RTL_W16 (IntrMask, 0); fp@774: goto out; fp@774: } fp@774: } fp@774: fp@774: /* Acknowledge all of the current interrupt sources ASAP, but fp@774: an first get an additional status bit from CSCR. */ fp@774: if (unlikely(status & RxUnderrun)) fp@774: link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; fp@774: fp@774: ackstat = status & ~(RxAckBits | TxErr); fp@774: if (ackstat) fp@774: RTL_W16 (IntrStatus, ackstat); fp@774: fp@774: /* Receive packets are processed by poll routine. fp@774: If not running start it now. */ fp@774: if (status & RxAckBits){ fp@774: if (tp->ecdev) { fp@774: /* EtherCAT device: Just receive all frames */ fp@774: rtl8139_rx(dev, tp, 100); // FIXME fp@774: } fp@774: else { fp@774: /* Mark for polling */ fp@774: if (netif_rx_schedule_prep(dev)) { fp@774: RTL_W16_F (IntrMask, rtl8139_norx_intr_mask); fp@774: __netif_rx_schedule (dev); fp@774: } fp@774: } fp@774: } fp@774: fp@774: /* Check uncommon events with one test. */ fp@774: if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr))) fp@774: rtl8139_weird_interrupt (dev, tp, ioaddr, fp@774: status, link_changed); fp@774: fp@774: if (status & (TxOK | TxErr)) { fp@774: rtl8139_tx_interrupt (dev, tp, ioaddr); fp@774: if (status & TxErr) fp@774: RTL_W16 (IntrStatus, TxErr); fp@774: } fp@774: out: fp@774: if (!tp->ecdev) spin_unlock (&tp->lock); fp@774: fp@774: DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n", fp@774: dev->name, RTL_R16 (IntrStatus)); fp@774: return IRQ_RETVAL(handled); fp@774: } fp@774: fp@774: #ifdef CONFIG_NET_POLL_CONTROLLER fp@774: /* fp@774: * Polling receive - used by netconsole and other diagnostic tools fp@774: * to allow network i/o with interrupts disabled. fp@774: */ fp@774: static void rtl8139_poll_controller(struct net_device *dev) fp@774: { fp@774: disable_irq(dev->irq); fp@774: rtl8139_interrupt(dev->irq, dev); fp@774: enable_irq(dev->irq); fp@774: } fp@774: #endif fp@774: fp@774: static int rtl8139_close (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: unsigned long flags; fp@774: fp@774: if (tp->ecdev) { fp@774: /* Stop the chip's Tx and Rx DMA processes. */ fp@774: RTL_W8 (ChipCmd, 0); fp@774: fp@774: /* Disable interrupts by clearing the interrupt mask. */ fp@774: RTL_W16 (IntrMask, 0); fp@774: fp@774: /* Update the error counts. */ fp@774: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@774: RTL_W32 (RxMissed, 0); fp@774: } else { fp@774: netif_stop_queue (dev); fp@774: fp@774: if (netif_msg_ifdown(tp)) fp@774: printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n", fp@774: dev->name, RTL_R16 (IntrStatus)); fp@774: fp@774: spin_lock_irqsave (&tp->lock, flags); fp@774: fp@774: /* Stop the chip's Tx and Rx DMA processes. */ fp@774: RTL_W8 (ChipCmd, 0); fp@774: fp@774: /* Disable interrupts by clearing the interrupt mask. */ fp@774: RTL_W16 (IntrMask, 0); fp@774: fp@774: /* Update the error counts. */ fp@774: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@774: RTL_W32 (RxMissed, 0); fp@774: fp@774: spin_unlock_irqrestore (&tp->lock, flags); fp@774: fp@774: synchronize_irq (dev->irq); /* racy, but that's ok here */ fp@774: free_irq (dev->irq, dev); fp@774: } fp@774: fp@774: rtl8139_tx_clear (tp); fp@774: fp@774: pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, fp@774: tp->rx_ring, tp->rx_ring_dma); fp@774: pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, fp@774: tp->tx_bufs, tp->tx_bufs_dma); fp@774: tp->rx_ring = NULL; fp@774: tp->tx_bufs = NULL; fp@774: fp@774: /* Green! Put the chip in low-power mode. */ fp@774: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@774: fp@774: if (rtl_chip_info[tp->chipset].flags & HasHltClk) fp@774: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ fp@774: fp@774: return 0; fp@774: } fp@774: fp@774: fp@774: /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to fp@774: kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and fp@774: other threads or interrupts aren't messing with the 8139. */ fp@774: static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: void __iomem *ioaddr = np->mmio_addr; fp@774: fp@774: spin_lock_irq(&np->lock); fp@774: if (rtl_chip_info[np->chipset].flags & HasLWake) { fp@774: u8 cfg3 = RTL_R8 (Config3); fp@774: u8 cfg5 = RTL_R8 (Config5); fp@774: fp@774: wol->supported = WAKE_PHY | WAKE_MAGIC fp@774: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; fp@774: fp@774: wol->wolopts = 0; fp@774: if (cfg3 & Cfg3_LinkUp) fp@774: wol->wolopts |= WAKE_PHY; fp@774: if (cfg3 & Cfg3_Magic) fp@774: wol->wolopts |= WAKE_MAGIC; fp@774: /* (KON)FIXME: See how netdev_set_wol() handles the fp@774: following constants. */ fp@774: if (cfg5 & Cfg5_UWF) fp@774: wol->wolopts |= WAKE_UCAST; fp@774: if (cfg5 & Cfg5_MWF) fp@774: wol->wolopts |= WAKE_MCAST; fp@774: if (cfg5 & Cfg5_BWF) fp@774: wol->wolopts |= WAKE_BCAST; fp@774: } fp@774: spin_unlock_irq(&np->lock); fp@774: } fp@774: fp@774: fp@774: /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes fp@774: that wol points to kernel memory and other threads or interrupts fp@774: aren't messing with the 8139. */ fp@774: static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: void __iomem *ioaddr = np->mmio_addr; fp@774: u32 support; fp@774: u8 cfg3, cfg5; fp@774: fp@774: support = ((rtl_chip_info[np->chipset].flags & HasLWake) fp@774: ? (WAKE_PHY | WAKE_MAGIC fp@774: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) fp@774: : 0); fp@774: if (wol->wolopts & ~support) fp@774: return -EINVAL; fp@774: fp@774: spin_lock_irq(&np->lock); fp@774: cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); fp@774: if (wol->wolopts & WAKE_PHY) fp@774: cfg3 |= Cfg3_LinkUp; fp@774: if (wol->wolopts & WAKE_MAGIC) fp@774: cfg3 |= Cfg3_Magic; fp@774: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@774: RTL_W8 (Config3, cfg3); fp@774: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@774: fp@774: cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); fp@774: /* (KON)FIXME: These are untested. We may have to set the fp@774: CRC0, Wakeup0 and LSBCRC0 registers too, but I have no fp@774: documentation. */ fp@774: if (wol->wolopts & WAKE_UCAST) fp@774: cfg5 |= Cfg5_UWF; fp@774: if (wol->wolopts & WAKE_MCAST) fp@774: cfg5 |= Cfg5_MWF; fp@774: if (wol->wolopts & WAKE_BCAST) fp@774: cfg5 |= Cfg5_BWF; fp@774: RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ fp@774: spin_unlock_irq(&np->lock); fp@774: fp@774: return 0; fp@774: } fp@774: fp@774: static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: strcpy(info->driver, DRV_NAME); fp@774: strcpy(info->version, DRV_VERSION); fp@774: strcpy(info->bus_info, pci_name(np->pci_dev)); fp@774: info->regdump_len = np->regs_len; fp@774: } fp@774: fp@774: static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: spin_lock_irq(&np->lock); fp@774: mii_ethtool_gset(&np->mii, cmd); fp@774: spin_unlock_irq(&np->lock); fp@774: return 0; fp@774: } fp@774: fp@774: static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: int rc; fp@774: spin_lock_irq(&np->lock); fp@774: rc = mii_ethtool_sset(&np->mii, cmd); fp@774: spin_unlock_irq(&np->lock); fp@774: return rc; fp@774: } fp@774: fp@774: static int rtl8139_nway_reset(struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: return mii_nway_restart(&np->mii); fp@774: } fp@774: fp@774: static u32 rtl8139_get_link(struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: return mii_link_ok(&np->mii); fp@774: } fp@774: fp@774: static u32 rtl8139_get_msglevel(struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: return np->msg_enable; fp@774: } fp@774: fp@774: static void rtl8139_set_msglevel(struct net_device *dev, u32 datum) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: np->msg_enable = datum; fp@774: } fp@774: fp@774: /* TODO: we are too slack to do reg dumping for pio, for now */ fp@774: #ifdef CONFIG_8139TOO_PIO fp@774: #define rtl8139_get_regs_len NULL fp@774: #define rtl8139_get_regs NULL fp@774: #else fp@774: static int rtl8139_get_regs_len(struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: return np->regs_len; fp@774: } fp@774: fp@774: static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: fp@774: regs->version = RTL_REGS_VER; fp@774: fp@774: spin_lock_irq(&np->lock); fp@774: memcpy_fromio(regbuf, np->mmio_addr, regs->len); fp@774: spin_unlock_irq(&np->lock); fp@774: } fp@774: #endif /* CONFIG_8139TOO_MMIO */ fp@774: fp@774: static int rtl8139_get_stats_count(struct net_device *dev) fp@774: { fp@774: return RTL_NUM_STATS; fp@774: } fp@774: fp@774: static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: fp@774: data[0] = np->xstats.early_rx; fp@774: data[1] = np->xstats.tx_buf_mapped; fp@774: data[2] = np->xstats.tx_timeouts; fp@774: data[3] = np->xstats.rx_lost_in_ring; fp@774: } fp@774: fp@774: static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data) fp@774: { fp@774: memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); fp@774: } fp@774: fp@774: static const struct ethtool_ops rtl8139_ethtool_ops = { fp@774: .get_drvinfo = rtl8139_get_drvinfo, fp@774: .get_settings = rtl8139_get_settings, fp@774: .set_settings = rtl8139_set_settings, fp@774: .get_regs_len = rtl8139_get_regs_len, fp@774: .get_regs = rtl8139_get_regs, fp@774: .nway_reset = rtl8139_nway_reset, fp@774: .get_link = rtl8139_get_link, fp@774: .get_msglevel = rtl8139_get_msglevel, fp@774: .set_msglevel = rtl8139_set_msglevel, fp@774: .get_wol = rtl8139_get_wol, fp@774: .set_wol = rtl8139_set_wol, fp@774: .get_strings = rtl8139_get_strings, fp@774: .get_stats_count = rtl8139_get_stats_count, fp@774: .get_ethtool_stats = rtl8139_get_ethtool_stats, fp@774: .get_perm_addr = ethtool_op_get_perm_addr, fp@774: }; fp@774: fp@774: static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) fp@774: { fp@774: struct rtl8139_private *np = netdev_priv(dev); fp@774: int rc; fp@774: fp@774: if (np->ecdev || !netif_running(dev)) fp@774: return -EINVAL; fp@774: fp@774: spin_lock_irq(&np->lock); fp@774: rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL); fp@774: spin_unlock_irq(&np->lock); fp@774: fp@774: return rc; fp@774: } fp@774: fp@774: fp@774: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: unsigned long flags; fp@774: fp@774: if (tp->ecdev || netif_running(dev)) { fp@774: spin_lock_irqsave (&tp->lock, flags); fp@774: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@774: RTL_W32 (RxMissed, 0); fp@774: spin_unlock_irqrestore (&tp->lock, flags); fp@774: } fp@774: fp@774: return &tp->stats; fp@774: } fp@774: fp@774: /* Set or clear the multicast filter for this adaptor. fp@774: This routine is not state sensitive and need not be SMP locked. */ fp@774: fp@774: static void __set_rx_mode (struct net_device *dev) fp@774: { fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: u32 mc_filter[2]; /* Multicast hash filter */ fp@774: int i, rx_mode; fp@774: u32 tmp; fp@774: fp@774: DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n", fp@774: dev->name, dev->flags, RTL_R32 (RxConfig)); fp@774: fp@774: /* Note: do not reorder, GCC is clever about common statements. */ fp@774: if (dev->flags & IFF_PROMISC) { fp@774: rx_mode = fp@774: AcceptBroadcast | AcceptMulticast | AcceptMyPhys | fp@774: AcceptAllPhys; fp@774: mc_filter[1] = mc_filter[0] = 0xffffffff; fp@774: } else if ((dev->mc_count > multicast_filter_limit) fp@774: || (dev->flags & IFF_ALLMULTI)) { fp@774: /* Too many to filter perfectly -- accept all multicasts. */ fp@774: rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; fp@774: mc_filter[1] = mc_filter[0] = 0xffffffff; fp@774: } else { fp@774: struct dev_mc_list *mclist; fp@774: rx_mode = AcceptBroadcast | AcceptMyPhys; fp@774: mc_filter[1] = mc_filter[0] = 0; fp@774: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; fp@774: i++, mclist = mclist->next) { fp@774: int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; fp@774: fp@774: mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); fp@774: rx_mode |= AcceptMulticast; fp@774: } fp@774: } fp@774: fp@774: /* We can safely update without stopping the chip. */ fp@774: tmp = rtl8139_rx_config | rx_mode; fp@774: if (tp->rx_config != tmp) { fp@774: RTL_W32_F (RxConfig, tmp); fp@774: tp->rx_config = tmp; fp@774: } fp@774: RTL_W32_F (MAR0 + 0, mc_filter[0]); fp@774: RTL_W32_F (MAR0 + 4, mc_filter[1]); fp@774: } fp@774: fp@774: static void rtl8139_set_rx_mode (struct net_device *dev) fp@774: { fp@774: unsigned long flags; fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: fp@774: spin_lock_irqsave (&tp->lock, flags); fp@774: __set_rx_mode(dev); fp@774: spin_unlock_irqrestore (&tp->lock, flags); fp@774: } fp@774: fp@774: #ifdef CONFIG_PM fp@774: fp@774: static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state) fp@774: { fp@774: struct net_device *dev = pci_get_drvdata (pdev); fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: void __iomem *ioaddr = tp->mmio_addr; fp@774: unsigned long flags; fp@774: fp@774: pci_save_state (pdev); fp@774: fp@774: if (tp->ecdev || !netif_running (dev)) fp@774: return 0; fp@774: fp@774: netif_device_detach (dev); fp@774: fp@774: spin_lock_irqsave (&tp->lock, flags); fp@774: fp@774: /* Disable interrupts, stop Tx and Rx. */ fp@774: RTL_W16 (IntrMask, 0); fp@774: RTL_W8 (ChipCmd, 0); fp@774: fp@774: /* Update the error counts. */ fp@774: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@774: RTL_W32 (RxMissed, 0); fp@774: fp@774: spin_unlock_irqrestore (&tp->lock, flags); fp@774: fp@774: pci_set_power_state (pdev, PCI_D3hot); fp@774: fp@774: return 0; fp@774: } fp@774: fp@774: fp@774: static int rtl8139_resume (struct pci_dev *pdev) fp@774: { fp@774: struct net_device *dev = pci_get_drvdata (pdev); fp@774: struct rtl8139_private *tp = netdev_priv(dev); fp@774: fp@774: pci_restore_state (pdev); fp@774: if (tp->ecdev || !netif_running (dev)) fp@774: return 0; fp@774: pci_set_power_state (pdev, PCI_D0); fp@774: rtl8139_init_ring (dev); fp@774: rtl8139_hw_start (dev); fp@774: netif_device_attach (dev); fp@774: return 0; fp@774: } fp@774: fp@774: #endif /* CONFIG_PM */ fp@774: fp@774: fp@774: static struct pci_driver rtl8139_pci_driver = { fp@774: .name = DRV_NAME, fp@774: .id_table = rtl8139_pci_tbl, fp@774: .probe = rtl8139_init_one, fp@774: .remove = __devexit_p(rtl8139_remove_one), fp@774: #ifdef CONFIG_PM fp@774: .suspend = rtl8139_suspend, fp@774: .resume = rtl8139_resume, fp@774: #endif /* CONFIG_PM */ fp@774: }; fp@774: fp@774: fp@774: static int __init rtl8139_init_module (void) fp@774: { fp@774: /* when we're a module, we always print a version message, fp@774: * even if no 8139 board is found. fp@774: */ fp@774: #ifdef MODULE fp@774: printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); fp@774: #endif fp@774: fp@774: return pci_register_driver(&rtl8139_pci_driver); fp@774: } fp@774: fp@774: fp@774: static void __exit rtl8139_cleanup_module (void) fp@774: { fp@774: pci_unregister_driver (&rtl8139_pci_driver); fp@774: } fp@774: fp@774: fp@774: module_init(rtl8139_init_module); fp@774: module_exit(rtl8139_cleanup_module);