fp@1739: /******************************************************************************
fp@1739:  *
fp@1739:  *  $Id$
fp@1739:  *
fp@1739:  *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH
fp@1739:  *
fp@1739:  *  This file is part of the IgH EtherCAT Master.
fp@1739:  *
fp@1739:  *  The IgH EtherCAT Master is free software; you can redistribute it
fp@1739:  *  and/or modify it under the terms of the GNU General Public License
fp@1739:  *  as published by the Free Software Foundation; either version 2 of the
fp@1739:  *  License, or (at your option) any later version.
fp@1739:  *
fp@1739:  *  The IgH EtherCAT Master is distributed in the hope that it will be
fp@1739:  *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
fp@1739:  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
fp@1739:  *  GNU General Public License for more details.
fp@1739:  *
fp@1739:  *  You should have received a copy of the GNU General Public License
fp@1739:  *  along with the IgH EtherCAT Master; if not, write to the Free Software
fp@1739:  *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
fp@1739:  *
fp@1739:  *  The right to use EtherCAT Technology is granted and comes free of
fp@1739:  *  charge under condition of compatibility of product made by
fp@1739:  *  Licensee. People intending to distribute/sell products based on the
fp@1739:  *  code, have to sign an agreement to guarantee that products using
fp@1739:  *  software based on IgH EtherCAT master stay compatible with the actual
fp@1739:  *  EtherCAT specification (which are released themselves as an open
fp@1739:  *  standard) as the (only) precondition to have the right to use EtherCAT
fp@1739:  *  Technology, IP and trade marks.
fp@1739:  *
fp@1739:  *****************************************************************************/
fp@1739: 
fp@1739: /**
fp@1739:    \file
fp@1739:    EtherCAT finite state machines.
fp@1739: */
fp@1739: 
fp@1739: /*****************************************************************************/
fp@1739: 
fp@1739: #ifndef __EC_FSM_MASTER__
fp@1739: #define __EC_FSM_MASTER__
fp@1739: 
fp@1739: #include "globals.h"
fp@1739: #include "../include/ecrt.h"
fp@1739: #include "datagram.h"
fp@1739: #include "slave.h"
fp@1739: #include "canopen.h"
fp@1739: 
fp@1739: #include "fsm_slave.h"
fp@1746: #include "fsm_coe_map.h"
fp@1739: 
fp@1739: /*****************************************************************************/
fp@1739: 
fp@1744: /**
fp@1744:  * EEPROM write request.
fp@1744:  */
fp@1744: 
fp@1744: typedef struct
fp@1744: {
fp@1746:     struct list_head list; /**< list head */
fp@1746:     ec_slave_t *slave; /**< EtherCAT slave */
fp@1746:     off_t word_offset; /**< SII address in words */
fp@1746:     size_t word_size; /**< data size in words */
fp@1746:     const uint8_t *data; /**< pointer to the data */
fp@1746:     ec_request_state_t state; /**< state of the request */
fp@1744: }
fp@1744: ec_eeprom_write_request_t;
fp@1744: 
fp@1744: /*****************************************************************************/
fp@1744: 
fp@1739: typedef struct ec_fsm_master ec_fsm_master_t; /**< \see ec_fsm_master */
fp@1739: 
fp@1739: /**
fp@1739:    Finite state machine of an EtherCAT master.
fp@1739: */
fp@1739: 
fp@1739: struct ec_fsm_master
fp@1739: {
fp@1739:     ec_master_t *master; /**< master the FSM runs on */
fp@1739:     ec_datagram_t *datagram; /**< datagram used in the state machine */
fp@1739:     unsigned int retries; /**< retries on datagram timeout. */
fp@1739: 
fp@1739:     void (*state)(ec_fsm_master_t *); /**< master state function */
fp@1744:     int idle; /**< state machine is in idle phase */
fp@1744:     unsigned long scan_jiffies; /**< beginning of slave scanning */
fp@1739:     unsigned int slaves_responding; /**< number of responding slaves */
fp@1739:     unsigned int topology_change_pending; /**< bus topology changed */
fp@1739:     ec_slave_state_t slave_states; /**< states of responding slaves */
fp@1739:     unsigned int validate; /**< non-zero, if validation to do */
fp@1744:     unsigned int tainted; /**< non-zero, if the current bus topology does
fp@1744:                             not meet the initial conditions */
fp@1744:     unsigned int config_error; /**< error during slave configuration */
fp@1739:     ec_slave_t *slave; /**< current slave */
fp@1744:     ec_eeprom_write_request_t *eeprom_request; /**< EEPROM write request */
fp@1744:     off_t eeprom_index; /**< index to EEPROM write request data */
fp@1739:     ec_sdo_request_t *sdo_request; /**< SDO request to process */
fp@1739: 
fp@1739:     ec_fsm_slave_t fsm_slave; /**< slave state machine */
fp@1739:     ec_fsm_sii_t fsm_sii; /**< SII state machine */
fp@1739:     ec_fsm_change_t fsm_change; /**< State change state machine */
fp@1739:     ec_fsm_coe_t fsm_coe; /**< CoE state machine */
fp@1746:     ec_fsm_coe_map_t fsm_coe_map; /**< CoE mapping state machine */
fp@1739: };
fp@1739: 
fp@1739: /*****************************************************************************/
fp@1739: 
fp@1739: void ec_fsm_master_init(ec_fsm_master_t *, ec_master_t *, ec_datagram_t *);
fp@1739: void ec_fsm_master_clear(ec_fsm_master_t *);
fp@1739: 
fp@1739: int ec_fsm_master_exec(ec_fsm_master_t *);
fp@1744: int ec_fsm_master_running(const ec_fsm_master_t *);
fp@1744: int ec_fsm_master_idle(const ec_fsm_master_t *);
fp@1739: 
fp@1739: /*****************************************************************************/
fp@1739: 
fp@1739: #endif