fp@0: /****************************************************************************** fp@0: * fp@0: * drv_8139too.c fp@0: * fp@0: * EtherCAT-Treiber für RTL8139-kompatible Netzwerkkarten. fp@0: * fp@0: * Autoren: Wilhelm Hagemeister, Florian Pose fp@0: * fp@0: * $Date$ fp@0: * $Author$ fp@0: * fp@0: * (C) Copyright IgH 2005 fp@0: * Ingenieurgemeinschaft IgH fp@0: * Heinz-Bäcker Str. 34 fp@0: * D-45356 Essen fp@0: * Tel.: +49 201/61 99 31 fp@0: * Fax.: +49 201/61 98 36 fp@0: * E-mail: sp@igh-essen.com fp@0: * fp@0: ******************************************************************************/ fp@0: fp@0: /* fp@0: 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. fp@0: fp@0: Maintained by Jeff Garzik fp@0: Copyright 2000-2002 Jeff Garzik fp@0: fp@0: Much code comes from Donald Becker's rtl8139.c driver, fp@0: versions 1.13 and older. This driver was originally based fp@0: on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: fp@0: fp@0: ---------- fp@0: fp@0: Written 1997-2001 by Donald Becker. fp@0: This software may be used and distributed according to the fp@0: terms of the GNU General Public License (GPL), incorporated fp@0: herein by reference. Drivers based on or derived from this fp@0: code fall under the GPL and must retain the authorship, fp@0: copyright and license notice. This file is not a complete fp@0: program and may only be used when the entire operating fp@0: system is licensed under the GPL. fp@0: fp@0: This driver is for boards based on the RTL8129 and RTL8139 fp@0: PCI ethernet chips. fp@0: fp@0: The author may be reached as becker@scyld.com, or C/O Scyld fp@0: Computing Corporation 410 Severn Ave., Suite 210 Annapolis fp@0: MD 21403 fp@0: fp@0: Support and updates available at fp@0: http://www.scyld.com/network/rtl8139.html fp@0: fp@0: Twister-tuning table provided by Kinston fp@0: . fp@0: fp@0: ---------- fp@0: fp@0: This software may be used and distributed according to the terms fp@0: of the GNU General Public License, incorporated herein by reference. fp@0: fp@0: Contributors: fp@0: fp@0: Donald Becker - he wrote the original driver, kudos to him! fp@0: (but please don't e-mail him for support, this isn't his driver) fp@0: fp@0: Tigran Aivazian - bug fixes, skbuff free cleanup fp@0: fp@0: Martin Mares - suggestions for PCI cleanup fp@0: fp@0: David S. Miller - PCI DMA and softnet updates fp@0: fp@0: Ernst Gill - fixes ported from BSD driver fp@0: fp@0: Daniel Kobras - identified specific locations of fp@0: posted MMIO write bugginess fp@0: fp@0: Gerard Sharp - bug fix, testing and feedback fp@0: fp@0: David Ford - Rx ring wrap fix fp@0: fp@0: Dan DeMaggio - swapped RTL8139 cards with me, and allowed me fp@0: to find and fix a crucial bug on older chipsets. fp@0: fp@0: Donald Becker/Chris Butterworth/Marcus Westergren - fp@0: Noticed various Rx packet size-related buglets. fp@0: fp@0: Santiago Garcia Mantinan - testing and feedback fp@0: fp@0: Jens David - 2.2.x kernel backports fp@0: fp@0: Martin Dennett - incredibly helpful insight on undocumented fp@0: features of the 8139 chips fp@0: fp@0: Jean-Jacques Michel - bug fix fp@0: fp@0: Tobias Ringström - Rx interrupt status checking suggestion fp@0: fp@0: Andrew Morton - Clear blocked signals, avoid fp@0: buffer overrun setting current->comm. fp@0: fp@0: Kalle Olavi Niemitalo - Wake-on-LAN ioctls fp@0: fp@0: Robert Kuebel - Save kernel thread from dying on any signal. fp@0: fp@0: Submitting bug reports: fp@0: fp@0: "rtl8139-diag -mmmaaavvveefN" output fp@0: enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log fp@0: fp@0: See 8139too.txt for more details. fp@0: fp@0: */ fp@0: fp@0: #define DRV_NAME "8139too_ecat" fp@0: #define DRV_VERSION "0.9.26" fp@0: fp@0: fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: #include fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: #include "ec_device.h" fp@0: #include fp@0: #include fp@0: #include "ec_dbg.h" fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION fp@0: #define PFX DRV_NAME ": " fp@0: fp@0: fp@0: /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */ fp@0: #ifdef CONFIG_8139TOO_PIO fp@0: #define USE_IO_OPS 1 fp@0: #endif fp@0: fp@0: /* define to 1 to enable copious debugging info */ fp@0: //#define RTL8139_DEBUG 1 fp@0: #undef RTL8139_DEBUG fp@0: fp@0: /* define to 1 to disable lightweight runtime debugging checks */ fp@0: #undef RTL8139_NDEBUG fp@0: fp@0: fp@0: #ifdef RTL8139_DEBUG fp@0: /* note: prints function name for you */ fp@0: # define DPRINTK(fmt, args...) EC_DBG(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) fp@0: #else fp@0: # define DPRINTK(fmt, args...) fp@0: #endif fp@0: fp@0: #ifdef RTL8139_NDEBUG fp@0: # define assert(expr) do {} while (0) fp@0: #else fp@0: # define assert(expr) \ fp@0: if(!(expr)) { \ fp@0: printk( "Assertion failed! %s,%s,%s,line=%d\n", \ fp@0: #expr,__FILE__,__FUNCTION__,__LINE__); \ fp@0: } fp@0: #endif fp@0: fp@0: fp@0: /* A few user-configurable values. */ fp@0: /* media options */ fp@0: #define MAX_UNITS 8 fp@0: static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; fp@0: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; fp@0: fp@0: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ fp@0: static int max_interrupt_work = 20; fp@0: fp@0: /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). fp@0: The RTL chips use a 64 element hash table based on the Ethernet CRC. */ fp@0: static int multicast_filter_limit = 32; fp@0: fp@0: /* bitmapped message enable number */ fp@0: static int debug = -1; fp@0: fp@0: /* Size of the in-memory receive ring. */ fp@0: #define RX_BUF_LEN_IDX 2 /* 0==8K, 1==16K, 2==32K, 3==64K */ fp@0: #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) fp@0: #define RX_BUF_PAD 16 fp@0: #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ fp@0: #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) fp@0: fp@0: /* Number of Tx descriptor registers. */ fp@0: #define NUM_TX_DESC 4 fp@0: fp@0: /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ fp@0: #define MAX_ETH_FRAME_SIZE 1536 fp@0: fp@0: /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ fp@0: #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE fp@0: #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) fp@0: fp@0: /* PCI Tuning Parameters fp@0: Threshold is bytes transferred to chip before transmission starts. */ fp@0: #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ fp@0: fp@0: /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ fp@0: #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ fp@0: #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ fp@0: #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ fp@0: #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ fp@0: fp@0: /* Operational parameters that usually are not changed. */ fp@0: /* Time in jiffies before concluding the transmitter is hung. */ fp@0: #define TX_TIMEOUT (6*HZ) fp@0: fp@0: fp@0: enum { fp@0: HAS_MII_XCVR = 0x010000, fp@0: HAS_CHIP_XCVR = 0x020000, fp@0: HAS_LNK_CHNG = 0x040000, fp@0: }; fp@0: fp@0: #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ fp@0: #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ fp@0: #define RTL_MIN_IO_SIZE 0x80 fp@0: #define RTL8139B_IO_SIZE 256 fp@0: fp@0: #define RTL8129_CAPS HAS_MII_XCVR fp@0: #define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG fp@0: fp@0: typedef enum { fp@0: RTL8139 = 0, fp@0: RTL8139_CB, fp@0: SMC1211TX, fp@0: /*MPX5030,*/ fp@0: DELTA8139, fp@0: ADDTRON8139, fp@0: DFE538TX, fp@0: DFE690TXD, fp@0: FE2000VX, fp@0: ALLIED8139, fp@0: RTL8129, fp@0: FNW3603TX, fp@0: FNW3800TX, fp@0: } board_t; fp@0: fp@0: fp@0: /* indexed by board_t, above */ fp@0: static struct { fp@0: const char *name; fp@0: u32 hw_flags; fp@0: } board_info[] __devinitdata = { fp@0: { "RealTek RTL8139 Fast Ethernet", RTL8139_CAPS }, fp@0: { "RealTek RTL8139B PCI/CardBus", RTL8139_CAPS }, fp@0: { "SMC1211TX EZCard 10/100 (RealTek RTL8139)", RTL8139_CAPS }, fp@0: /* { MPX5030, "Accton MPX5030 (RealTek RTL8139)", RTL8139_CAPS },*/ fp@0: { "Delta Electronics 8139 10/100BaseTX", RTL8139_CAPS }, fp@0: { "Addtron Technolgy 8139 10/100BaseTX", RTL8139_CAPS }, fp@0: { "D-Link DFE-538TX (RealTek RTL8139)", RTL8139_CAPS }, fp@0: { "D-Link DFE-690TXD (RealTek RTL8139)", RTL8139_CAPS }, fp@0: { "AboCom FE2000VX (RealTek RTL8139)", RTL8139_CAPS }, fp@0: { "Allied Telesyn 8139 CardBus", RTL8139_CAPS }, fp@0: { "RealTek RTL8129", RTL8129_CAPS }, fp@0: { "Planex FNW-3603-TX 10/100 CardBus", RTL8139_CAPS }, fp@0: { "Planex FNW-3800-TX 10/100 CardBus", RTL8139_CAPS }, fp@0: }; fp@0: fp@0: fp@0: static struct pci_device_id rtl8139_pci_tbl[] __devinitdata = { fp@0: {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, fp@0: {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139_CB }, fp@0: {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SMC1211TX }, fp@0: /* {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MPX5030 },*/ fp@0: {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DELTA8139 }, fp@0: {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ADDTRON8139 }, fp@0: {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE538TX }, fp@0: {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE690TXD }, fp@0: {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FE2000VX }, fp@0: {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALLIED8139 }, fp@0: {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FNW3603TX }, fp@0: {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FNW3800TX }, fp@0: fp@0: #ifdef CONFIG_8139TOO_8129 fp@0: {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 }, fp@0: #endif fp@0: fp@0: /* some crazy cards report invalid vendor ids like fp@0: * 0x0001 here. The other ids are valid and constant, fp@0: * so we simply don't match on the main vendor id. fp@0: */ fp@0: {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 }, fp@0: {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, DFE538TX }, fp@0: {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, FE2000VX }, fp@0: fp@0: {0,} fp@0: }; fp@0: MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); fp@0: fp@0: static struct { fp@0: const char str[ETH_GSTRING_LEN]; fp@0: } ethtool_stats_keys[] = { fp@0: { "early_rx" }, fp@0: { "tx_buf_mapped" }, fp@0: { "tx_timeouts" }, fp@0: { "rx_lost_in_ring" }, fp@0: }; fp@0: fp@0: /* The rest of these values should never change. */ fp@0: fp@0: /* Symbolic offsets to registers. */ fp@0: enum RTL8139_registers { fp@0: MAC0 = 0, /* Ethernet hardware address. */ fp@0: MAR0 = 8, /* Multicast filter. */ fp@0: TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ fp@0: TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ fp@0: RxBuf = 0x30, fp@0: ChipCmd = 0x37, fp@0: RxBufPtr = 0x38, fp@0: RxBufAddr = 0x3A, fp@0: IntrMask = 0x3C, fp@0: IntrStatus = 0x3E, fp@0: TxConfig = 0x40, fp@0: ChipVersion = 0x43, fp@0: RxConfig = 0x44, fp@0: Timer = 0x48, /* A general-purpose counter. */ fp@0: RxMissed = 0x4C, /* 24 bits valid, write clears. */ fp@0: Cfg9346 = 0x50, fp@0: Config0 = 0x51, fp@0: Config1 = 0x52, fp@0: FlashReg = 0x54, fp@0: MediaStatus = 0x58, fp@0: Config3 = 0x59, fp@0: Config4 = 0x5A, /* absent on RTL-8139A */ fp@0: HltClk = 0x5B, fp@0: MultiIntr = 0x5C, fp@0: TxSummary = 0x60, fp@0: BasicModeCtrl = 0x62, fp@0: BasicModeStatus = 0x64, fp@0: NWayAdvert = 0x66, fp@0: NWayLPAR = 0x68, fp@0: NWayExpansion = 0x6A, fp@0: /* Undocumented registers, but required for proper operation. */ fp@0: FIFOTMS = 0x70, /* FIFO Control and test. */ fp@0: CSCR = 0x74, /* Chip Status and Configuration Register. */ fp@0: PARA78 = 0x78, fp@0: PARA7c = 0x7c, /* Magic transceiver parameter register. */ fp@0: Config5 = 0xD8, /* absent on RTL-8139A */ fp@0: }; fp@0: fp@0: enum ClearBitMasks { fp@0: MultiIntrClear = 0xF000, fp@0: ChipCmdClear = 0xE2, fp@0: Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), fp@0: }; fp@0: fp@0: enum ChipCmdBits { fp@0: CmdReset = 0x10, fp@0: CmdRxEnb = 0x08, fp@0: CmdTxEnb = 0x04, fp@0: RxBufEmpty = 0x01, fp@0: }; fp@0: fp@0: /* Interrupt register bits, using my own meaningful names. */ fp@0: enum IntrStatusBits { fp@0: PCIErr = 0x8000, fp@0: PCSTimeout = 0x4000, fp@0: RxFIFOOver = 0x40, fp@0: RxUnderrun = 0x20, fp@0: RxOverflow = 0x10, fp@0: TxErr = 0x08, fp@0: TxOK = 0x04, fp@0: RxErr = 0x02, fp@0: RxOK = 0x01, fp@0: fp@0: RxAckBits = RxFIFOOver | RxOverflow | RxOK, fp@0: }; fp@0: fp@0: enum TxStatusBits { fp@0: TxHostOwns = 0x2000, fp@0: TxUnderrun = 0x4000, fp@0: TxStatOK = 0x8000, fp@0: TxOutOfWindow = 0x20000000, fp@0: TxAborted = 0x40000000, fp@0: TxCarrierLost = 0x80000000, fp@0: }; fp@0: enum RxStatusBits { fp@0: RxMulticast = 0x8000, fp@0: RxPhysical = 0x4000, fp@0: RxBroadcast = 0x2000, fp@0: RxBadSymbol = 0x0020, fp@0: RxRunt = 0x0010, fp@0: RxTooLong = 0x0008, fp@0: RxCRCErr = 0x0004, fp@0: RxBadAlign = 0x0002, fp@0: RxStatusOK = 0x0001, fp@0: }; fp@0: fp@0: /* Bits in RxConfig. */ fp@0: enum rx_mode_bits { fp@0: AcceptErr = 0x20, fp@0: AcceptRunt = 0x10, fp@0: AcceptBroadcast = 0x08, fp@0: AcceptMulticast = 0x04, fp@0: AcceptMyPhys = 0x02, fp@0: AcceptAllPhys = 0x01, fp@0: }; fp@0: fp@0: /* Bits in TxConfig. */ fp@0: enum tx_config_bits { fp@0: TxIFG1 = (1 << 25), /* Interframe Gap Time */ fp@0: TxIFG0 = (1 << 24), /* Enabling these bits violates IEEE 802.3 */ fp@0: TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ fp@0: TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */ fp@0: TxClearAbt = (1 << 0), /* Clear abort (WO) */ fp@0: TxDMAShift = 8, /* DMA burst value (0-7) is shifted this many bits */ fp@0: TxRetryShift = 4, /* TXRR value (0-15) is shifted this many bits */ fp@0: fp@0: TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ fp@0: }; fp@0: fp@0: /* Bits in Config1 */ fp@0: enum Config1Bits { fp@0: Cfg1_PM_Enable = 0x01, fp@0: Cfg1_VPD_Enable = 0x02, fp@0: Cfg1_PIO = 0x04, fp@0: Cfg1_MMIO = 0x08, fp@0: LWAKE = 0x10, /* not on 8139, 8139A */ fp@0: Cfg1_Driver_Load = 0x20, fp@0: Cfg1_LED0 = 0x40, fp@0: Cfg1_LED1 = 0x80, fp@0: SLEEP = (1 << 1), /* only on 8139, 8139A */ fp@0: PWRDN = (1 << 0), /* only on 8139, 8139A */ fp@0: }; fp@0: fp@0: /* Bits in Config3 */ fp@0: enum Config3Bits { fp@0: Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ fp@0: Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ fp@0: Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ fp@0: Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ fp@0: Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ fp@0: Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ fp@0: Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ fp@0: Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ fp@0: }; fp@0: fp@0: /* Bits in Config4 */ fp@0: enum Config4Bits { fp@0: LWPTN = (1 << 2), /* not on 8139, 8139A */ fp@0: }; fp@0: fp@0: /* Bits in Config5 */ fp@0: enum Config5Bits { fp@0: Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ fp@0: Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ fp@0: Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ fp@0: Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */ fp@0: Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ fp@0: Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ fp@0: Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ fp@0: }; fp@0: fp@0: enum RxConfigBits { fp@0: /* rx fifo threshold */ fp@0: RxCfgFIFOShift = 13, fp@0: RxCfgFIFONone = (7 << RxCfgFIFOShift), fp@0: fp@0: /* Max DMA burst */ fp@0: RxCfgDMAShift = 8, fp@0: RxCfgDMAUnlimited = (7 << RxCfgDMAShift), fp@0: fp@0: /* rx ring buffer length */ fp@0: RxCfgRcv8K = 0, fp@0: RxCfgRcv16K = (1 << 11), fp@0: RxCfgRcv32K = (1 << 12), fp@0: RxCfgRcv64K = (1 << 11) | (1 << 12), fp@0: fp@0: /* Disable packet wrap at end of Rx buffer */ fp@0: RxNoWrap = (1 << 7), fp@0: }; fp@0: fp@0: fp@0: /* Twister tuning parameters from RealTek. fp@0: Completely undocumented, but required to tune bad links on some boards. */ fp@0: enum CSCRBits { fp@0: CSCR_LinkOKBit = 0x0400, fp@0: CSCR_LinkChangeBit = 0x0800, fp@0: CSCR_LinkStatusBits = 0x0f000, fp@0: CSCR_LinkDownOffCmd = 0x003c0, fp@0: CSCR_LinkDownCmd = 0x0f3c0, fp@0: }; fp@0: fp@0: fp@0: enum Cfg9346Bits { fp@0: Cfg9346_Lock = 0x00, fp@0: Cfg9346_Unlock = 0xC0, fp@0: }; fp@0: fp@0: #ifdef CONFIG_8139TOO_TUNE_TWISTER fp@0: fp@0: enum TwisterParamVals { fp@0: PARA78_default = 0x78fa8388, fp@0: PARA7c_default = 0xcb38de43, /* param[0][3] */ fp@0: PARA7c_xxx = 0xcb38de43, fp@0: }; fp@0: fp@0: static const unsigned long param[4][4] = { fp@0: {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43}, fp@0: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, fp@0: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, fp@0: {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83} fp@0: }; fp@0: fp@0: #endif /* CONFIG_8139TOO_TUNE_TWISTER */ fp@0: fp@0: typedef enum { fp@0: CH_8139 = 0, fp@0: CH_8139_K, fp@0: CH_8139A, fp@0: CH_8139B, fp@0: CH_8130, fp@0: CH_8139C, fp@0: } chip_t; fp@0: fp@0: enum chip_flags { fp@0: HasHltClk = (1 << 0), fp@0: HasLWake = (1 << 1), fp@0: }; fp@0: fp@0: fp@0: /* directly indexed by chip_t, above */ fp@0: const static struct { fp@0: const char *name; fp@0: u8 version; /* from RTL8139C docs */ fp@0: u32 RxConfigMask; /* should clear the bits supported by this chip */ fp@0: u32 flags; fp@0: } rtl_chip_info[] = { fp@0: { "RTL-8139", fp@0: 0x40, fp@0: 0xf0fe0040, /* XXX copied from RTL8139A, verify */ fp@0: HasHltClk, fp@0: }, fp@0: fp@0: { "RTL-8139 rev K", fp@0: 0x60, fp@0: 0xf0fe0040, fp@0: HasHltClk, fp@0: }, fp@0: fp@0: { "RTL-8139A", fp@0: 0x70, fp@0: 0xf0fe0040, fp@0: HasHltClk, /* XXX undocumented? */ fp@0: }, fp@0: fp@0: { "RTL-8139B", fp@0: 0x78, fp@0: 0xf0fc0040, fp@0: HasLWake, fp@0: }, fp@0: fp@0: { "RTL-8130", fp@0: 0x7C, fp@0: 0xf0fe0040, /* XXX copied from RTL8139A, verify */ fp@0: HasLWake, fp@0: }, fp@0: fp@0: { "RTL-8139C", fp@0: 0x74, fp@0: 0xf0fc0040, /* XXX copied from RTL8139B, verify */ fp@0: HasLWake, fp@0: }, fp@0: fp@0: }; fp@0: fp@0: struct rtl_extra_stats { fp@0: unsigned long early_rx; fp@0: unsigned long tx_buf_mapped; fp@0: unsigned long tx_timeouts; fp@0: unsigned long rx_lost_in_ring; fp@0: }; fp@0: fp@0: struct rtl8139_private { fp@0: void *mmio_addr; fp@0: int drv_flags; fp@0: struct pci_dev *pci_dev; fp@0: struct net_device_stats stats; fp@0: unsigned char *rx_ring; fp@0: unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */ fp@0: unsigned int tx_flag; fp@0: unsigned long cur_tx; fp@0: unsigned long dirty_tx; fp@0: unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ fp@0: unsigned char *tx_bufs; /* Tx bounce buffer region. */ fp@0: dma_addr_t rx_ring_dma; fp@0: dma_addr_t tx_bufs_dma; fp@0: signed char phys[4]; /* MII device addresses. */ fp@0: char twistie, twist_row, twist_col; /* Twister tune state. */ fp@0: unsigned int default_port:4; /* Last dev->if_port value. */ fp@0: spinlock_t lock; fp@0: chip_t chipset; fp@0: pid_t thr_pid; fp@0: wait_queue_head_t thr_wait; fp@0: struct completion thr_exited; fp@0: u32 rx_config; fp@0: struct rtl_extra_stats xstats; fp@0: int time_to_die; fp@0: struct mii_if_info mii; fp@0: unsigned int regs_len; fp@0: }; fp@0: fp@0: MODULE_AUTHOR ("Jeff Garzik "); fp@0: MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver"); fp@0: MODULE_LICENSE("GPL"); fp@0: fp@0: MODULE_PARM (multicast_filter_limit, "i"); fp@0: MODULE_PARM (max_interrupt_work, "i"); fp@0: MODULE_PARM (media, "1-" __MODULE_STRING(MAX_UNITS) "i"); fp@0: MODULE_PARM (full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i"); fp@0: MODULE_PARM (debug, "i"); fp@0: MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); fp@0: MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); fp@0: MODULE_PARM_DESC (max_interrupt_work, "8139too maximum events handled per interrupt"); fp@0: MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); fp@0: MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); fp@0: fp@0: static int read_eeprom (void *ioaddr, int location, int addr_len); fp@0: static int rtl8139_open (struct net_device *dev); fp@0: static int mdio_read (struct net_device *dev, int phy_id, int location); fp@0: static void mdio_write (struct net_device *dev, int phy_id, int location, fp@0: int val); fp@0: static int rtl8139_thread (void *data); fp@0: static void rtl8139_tx_timeout (struct net_device *dev); fp@0: static void rtl8139_init_ring (struct net_device *dev); fp@0: static int rtl8139_start_xmit (struct sk_buff *skb, fp@0: struct net_device *dev); fp@0: static void rtl8139_interrupt (int irq, void *dev_instance, fp@0: struct pt_regs *regs); fp@0: static void rt_rtl8139_interrupt(void); fp@0: static int rtl8139_close (struct net_device *dev); fp@0: static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); fp@0: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); fp@0: static void rtl8139_set_rx_mode (struct net_device *dev); fp@0: static void __set_rx_mode (struct net_device *dev); fp@0: static void rtl8139_hw_start (struct net_device *dev); fp@0: fp@0: #ifdef USE_IO_OPS fp@0: fp@0: #define RTL_R8(reg) inb (((unsigned long)ioaddr) + (reg)) fp@0: #define RTL_R16(reg) inw (((unsigned long)ioaddr) + (reg)) fp@0: #define RTL_R32(reg) ((unsigned long) inl (((unsigned long)ioaddr) + (reg))) fp@0: #define RTL_W8(reg, val8) outb ((val8), ((unsigned long)ioaddr) + (reg)) fp@0: #define RTL_W16(reg, val16) outw ((val16), ((unsigned long)ioaddr) + (reg)) fp@0: #define RTL_W32(reg, val32) outl ((val32), ((unsigned long)ioaddr) + (reg)) fp@0: #define RTL_W8_F RTL_W8 fp@0: #define RTL_W16_F RTL_W16 fp@0: #define RTL_W32_F RTL_W32 fp@0: #undef readb fp@0: #undef readw fp@0: #undef readl fp@0: #undef writeb fp@0: #undef writew fp@0: #undef writel fp@0: #define readb(addr) inb((unsigned long)(addr)) fp@0: #define readw(addr) inw((unsigned long)(addr)) fp@0: #define readl(addr) inl((unsigned long)(addr)) fp@0: #define writeb(val,addr) outb((val),(unsigned long)(addr)) fp@0: #define writew(val,addr) outw((val),(unsigned long)(addr)) fp@0: #define writel(val,addr) outl((val),(unsigned long)(addr)) fp@0: fp@0: #else fp@0: fp@0: /* write MMIO register, with flush */ fp@0: /* Flush avoids rtl8139 bug w/ posted MMIO writes */ fp@0: #define RTL_W8_F(reg, val8) do { writeb ((val8), ioaddr + (reg)); readb (ioaddr + (reg)); } while (0) fp@0: #define RTL_W16_F(reg, val16) do { writew ((val16), ioaddr + (reg)); readw (ioaddr + (reg)); } while (0) fp@0: #define RTL_W32_F(reg, val32) do { writel ((val32), ioaddr + (reg)); readl (ioaddr + (reg)); } while (0) fp@0: fp@0: fp@0: #define MMIO_FLUSH_AUDIT_COMPLETE 1 fp@0: #if MMIO_FLUSH_AUDIT_COMPLETE fp@0: fp@0: /* write MMIO register */ fp@0: #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) fp@0: #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) fp@0: #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) fp@0: fp@0: #else fp@0: fp@0: /* write MMIO register, then flush */ fp@0: #define RTL_W8 RTL_W8_F fp@0: #define RTL_W16 RTL_W16_F fp@0: #define RTL_W32 RTL_W32_F fp@0: fp@0: #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ fp@0: fp@0: /* read MMIO register */ fp@0: #define RTL_R8(reg) readb (ioaddr + (reg)) fp@0: #define RTL_R16(reg) readw (ioaddr + (reg)) fp@0: #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) fp@0: fp@0: #endif /* USE_IO_OPS */ fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: #define ECATcard 1 // Diese Ethernetkarte wird für Ethercat verwendet fp@0: fp@0: //#define ECAT_DEBUG fp@0: fp@0: EtherCAT_device_t rtl_ecat_dev; fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: static const u16 rtl8139_intr_mask = fp@0: PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | fp@0: TxErr | TxOK | RxErr | RxOK; fp@0: fp@0: static const unsigned int rtl8139_rx_config = fp@0: RxCfgRcv32K | RxNoWrap | fp@0: (RX_FIFO_THRESH << RxCfgFIFOShift) | fp@0: (RX_DMA_BURST << RxCfgDMAShift); fp@0: fp@0: static const unsigned int rtl8139_tx_config = fp@0: (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); fp@0: fp@0: static void __rtl8139_cleanup_dev (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp; fp@0: struct pci_dev *pdev; fp@0: fp@0: assert (dev != NULL); fp@0: assert (dev->priv != NULL); fp@0: fp@0: tp = dev->priv; fp@0: assert (tp->pci_dev != NULL); fp@0: pdev = tp->pci_dev; fp@0: fp@0: #ifndef USE_IO_OPS fp@0: if (tp->mmio_addr) fp@0: iounmap (tp->mmio_addr); fp@0: #endif /* !USE_IO_OPS */ fp@0: fp@0: /* it's ok to call this even if we have no regions to free */ fp@0: pci_release_regions (pdev); fp@0: fp@0: #ifndef RTL8139_NDEBUG fp@0: /* poison memory before freeing */ fp@0: memset (dev, 0xBC, fp@0: sizeof (struct net_device) + fp@0: sizeof (struct rtl8139_private)); fp@0: #endif /* RTL8139_NDEBUG */ fp@0: fp@0: kfree (dev); fp@0: fp@0: pci_set_drvdata (pdev, NULL); fp@0: } fp@0: fp@0: fp@0: static void rtl8139_chip_reset (void *ioaddr) fp@0: { fp@0: int i; fp@0: int succ = 0 ; fp@0: /* Soft reset the chip. */ fp@0: RTL_W8 (ChipCmd, CmdReset); fp@0: fp@0: /* Check that the chip has finished the reset. */ fp@0: for (i = 1000; i > 0; i--) { fp@0: barrier(); fp@0: if ((RTL_R8 (ChipCmd) & CmdReset) == 0) { fp@0: succ = 1; fp@0: break; fp@0: } fp@0: udelay (10); fp@0: } fp@0: EC_DBG("rtl8139 chipreset"); fp@0: if(succ == 0) fp@0: EC_DBG("failed"); fp@0: else fp@0: EC_DBG("success at count %d",i); fp@0: fp@0: } fp@0: fp@0: fp@0: static int __devinit rtl8139_init_board (struct pci_dev *pdev, fp@0: struct net_device **dev_out) fp@0: { fp@0: void *ioaddr; fp@0: struct net_device *dev; fp@0: struct rtl8139_private *tp; fp@0: u8 tmp8; fp@0: int rc; fp@0: unsigned int i; fp@0: u32 pio_start, pio_end, pio_flags, pio_len; fp@0: unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; fp@0: u32 tmp; fp@0: fp@0: assert (pdev != NULL); fp@0: fp@0: *dev_out = NULL; fp@0: fp@0: /* dev and dev->priv zeroed in alloc_etherdev */ fp@0: dev = alloc_etherdev (sizeof (*tp)); fp@0: if (dev == NULL) { fp@0: EC_DBG (KERN_ERR PFX "%s: Unable to alloc new net device\n", pdev->slot_name); fp@0: return -ENOMEM; fp@0: } fp@0: SET_MODULE_OWNER(dev); fp@0: tp = dev->priv; fp@0: tp->pci_dev = pdev; fp@0: fp@0: /* enable device (incl. PCI PM wakeup and hotplug setup) */ fp@0: rc = pci_enable_device (pdev); fp@0: if (rc) fp@0: goto err_out; fp@0: fp@0: pio_start = pci_resource_start (pdev, 0); fp@0: pio_end = pci_resource_end (pdev, 0); fp@0: pio_flags = pci_resource_flags (pdev, 0); fp@0: pio_len = pci_resource_len (pdev, 0); fp@0: fp@0: mmio_start = pci_resource_start (pdev, 1); fp@0: mmio_end = pci_resource_end (pdev, 1); fp@0: mmio_flags = pci_resource_flags (pdev, 1); fp@0: mmio_len = pci_resource_len (pdev, 1); fp@0: fp@0: /* set this immediately, we need to know before fp@0: * we talk to the chip directly */ fp@0: DPRINTK("PIO region size == 0x%02X\n", pio_len); fp@0: DPRINTK("MMIO region size == 0x%02lX\n", mmio_len); fp@0: fp@0: #ifdef USE_IO_OPS fp@0: /* make sure PCI base addr 0 is PIO */ fp@0: if (!(pio_flags & IORESOURCE_IO)) { fp@0: EC_DBG (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pdev->slot_name); fp@0: rc = -ENODEV; fp@0: goto err_out; fp@0: } fp@0: /* check for weird/broken PCI region reporting */ fp@0: if (pio_len < RTL_MIN_IO_SIZE) { fp@0: EC_DBG (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pdev->slot_name); fp@0: rc = -ENODEV; fp@0: goto err_out; fp@0: } fp@0: #else fp@0: /* make sure PCI base addr 1 is MMIO */ fp@0: if (!(mmio_flags & IORESOURCE_MEM)) { fp@0: EC_DBG (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pdev->slot_name); fp@0: rc = -ENODEV; fp@0: goto err_out; fp@0: } fp@0: if (mmio_len < RTL_MIN_IO_SIZE) { fp@0: EC_DBG (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pdev->slot_name); fp@0: rc = -ENODEV; fp@0: goto err_out; fp@0: } fp@0: #endif fp@0: fp@0: rc = pci_request_regions (pdev, "8139too"); fp@0: if (rc) fp@0: goto err_out; fp@0: fp@0: /* enable PCI bus-mastering */ fp@0: pci_set_master (pdev); fp@0: fp@0: #ifdef USE_IO_OPS fp@0: ioaddr = (void *) pio_start; fp@0: dev->base_addr = pio_start; fp@0: tp->mmio_addr = ioaddr; fp@0: tp->regs_len = pio_len; fp@0: #else fp@0: /* ioremap MMIO region */ fp@0: ioaddr = ioremap (mmio_start, mmio_len); fp@0: if (ioaddr == NULL) { fp@0: EC_DBG (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pdev->slot_name); fp@0: rc = -EIO; fp@0: goto err_out; fp@0: } fp@0: dev->base_addr = (long) ioaddr; fp@0: tp->mmio_addr = ioaddr; fp@0: tp->regs_len = mmio_len; fp@0: #endif /* USE_IO_OPS */ fp@0: fp@0: /* Bring old chips out of low-power mode. */ fp@0: RTL_W8 (HltClk, 'R'); fp@0: fp@0: /* check for missing/broken hardware */ fp@0: if (RTL_R32 (TxConfig) == 0xFFFFFFFF) { fp@0: EC_DBG (KERN_ERR PFX "%s: Chip not responding, ignoring board\n", fp@0: pdev->slot_name); fp@0: rc = -EIO; fp@0: goto err_out; fp@0: } fp@0: fp@0: /* identify chip attached to board */ fp@0: tmp = RTL_R8 (ChipVersion); fp@0: for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) fp@0: if (tmp == rtl_chip_info[i].version) { fp@0: tp->chipset = i; fp@0: goto match; fp@0: } fp@0: fp@0: /* if unknown chip, assume array element #0, original RTL-8139 in this case */ fp@0: EC_DBG (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n", fp@0: pdev->slot_name); fp@0: EC_DBG (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pdev->slot_name, RTL_R32 (TxConfig)); fp@0: tp->chipset = 0; fp@0: fp@0: match: fp@0: DPRINTK ("chipset id (%d) == index %d, '%s'\n", fp@0: tmp, fp@0: tp->chipset, fp@0: rtl_chip_info[tp->chipset].name); fp@0: fp@0: if (tp->chipset >= CH_8139B) { fp@0: u8 new_tmp8 = tmp8 = RTL_R8 (Config1); fp@0: DPRINTK("PCI PM wakeup\n"); fp@0: if ((rtl_chip_info[tp->chipset].flags & HasLWake) && fp@0: (tmp8 & LWAKE)) fp@0: new_tmp8 &= ~LWAKE; fp@0: new_tmp8 |= Cfg1_PM_Enable; fp@0: if (new_tmp8 != tmp8) { fp@0: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@0: RTL_W8 (Config1, tmp8); fp@0: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@0: } fp@0: if (rtl_chip_info[tp->chipset].flags & HasLWake) { fp@0: tmp8 = RTL_R8 (Config4); fp@0: if (tmp8 & LWPTN) fp@0: RTL_W8 (Config4, tmp8 & ~LWPTN); fp@0: } fp@0: } else { fp@0: DPRINTK("Old chip wakeup\n"); fp@0: tmp8 = RTL_R8 (Config1); fp@0: tmp8 &= ~(SLEEP | PWRDN); fp@0: RTL_W8 (Config1, tmp8); fp@0: } fp@0: fp@0: rtl8139_chip_reset (ioaddr); fp@0: fp@0: *dev_out = dev; fp@0: return 0; fp@0: fp@0: err_out: fp@0: __rtl8139_cleanup_dev (dev); fp@0: return rc; fp@0: } fp@0: fp@0: fp@0: static int __devinit rtl8139_init_one (struct pci_dev *pdev, fp@0: const struct pci_device_id *ent) fp@0: { fp@0: struct net_device *dev = NULL; fp@0: struct rtl8139_private *tp; fp@0: int i, addr_len, option; fp@0: void *ioaddr; fp@0: static int board_idx = -1; fp@0: u8 pci_rev; fp@0: fp@0: assert (pdev != NULL); fp@0: assert (ent != NULL); fp@0: fp@0: board_idx++; fp@0: fp@0: fp@0: /* when we're built into the kernel, the driver version message fp@0: * is only printed if at least one 8139 board has been found fp@0: */ fp@0: #ifndef MODULE fp@0: { fp@0: static int printed_version; fp@0: if (!printed_version++) fp@0: EC_DBG (KERN_INFO RTL8139_DRIVER_NAME "\n"); fp@0: } fp@0: #endif fp@0: fp@0: pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); fp@0: fp@0: if (pdev->vendor == PCI_VENDOR_ID_REALTEK && fp@0: pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) { fp@0: EC_DBG(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n", fp@0: pdev->slot_name, pdev->vendor, pdev->device, pci_rev); fp@0: EC_DBG(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n"); fp@0: } fp@0: fp@0: i = rtl8139_init_board (pdev, &dev); fp@0: if (i < 0) fp@0: return i; fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (board_idx == ECATcard) fp@0: { fp@0: EC_DBG("EtherCAT registering board %d.\n", board_idx); fp@0: fp@0: if (EtherCAT_device_assign(&rtl_ecat_dev, dev) < 0) fp@0: goto err_out; fp@0: fp@0: strcpy(dev->name,"ECAT"); //device name überschreiben fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: tp = dev->priv; fp@0: ioaddr = tp->mmio_addr; fp@0: fp@0: assert (ioaddr != NULL); fp@0: assert (dev != NULL); fp@0: assert (tp != NULL); fp@0: fp@0: addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; fp@0: for (i = 0; i < 3; i++) fp@0: ((u16 *) (dev->dev_addr))[i] = fp@0: le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); fp@0: fp@0: /* The Rtl8139-specific entries in the device structure. */ fp@0: dev->open = rtl8139_open; fp@0: dev->hard_start_xmit = rtl8139_start_xmit; fp@0: dev->stop = rtl8139_close; fp@0: dev->get_stats = rtl8139_get_stats; fp@0: dev->set_multicast_list = rtl8139_set_rx_mode; fp@0: dev->do_ioctl = netdev_ioctl; fp@0: dev->tx_timeout = rtl8139_tx_timeout; fp@0: dev->watchdog_timeo = TX_TIMEOUT; fp@0: dev->features |= NETIF_F_SG|NETIF_F_HW_CSUM; fp@0: fp@0: dev->irq = pdev->irq; fp@0: fp@0: /* dev->priv/tp zeroed and aligned in init_etherdev */ fp@0: tp = dev->priv; fp@0: fp@0: /* note: tp->chipset set in rtl8139_init_board */ fp@0: tp->drv_flags = board_info[ent->driver_data].hw_flags; fp@0: tp->mmio_addr = ioaddr; fp@0: spin_lock_init (&tp->lock); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (board_idx == ECATcard) fp@0: { fp@0: rtl_ecat_dev.lock = &tp->lock; fp@0: } fp@0: fp@1: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: init_waitqueue_head (&tp->thr_wait); fp@0: init_completion (&tp->thr_exited); fp@0: tp->mii.dev = dev; fp@0: tp->mii.mdio_read = mdio_read; fp@0: tp->mii.mdio_write = mdio_write; fp@0: tp->mii.phy_id_mask = 0x3f; fp@0: tp->mii.reg_num_mask = 0x1f; fp@0: fp@0: /* dev is fully set up and ready to use now */ fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: /* EtherCAT-Karten nicht beim Stack anmelden. */ fp@0: if (dev != rtl_ecat_dev.dev) fp@0: { fp@0: DPRINTK("About to register device named %s (%p)...\n", dev->name, dev); fp@0: i = register_netdev (dev); fp@0: if (i) goto err_out; fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: pci_set_drvdata (pdev, dev); fp@0: fp@0: EC_DBG (KERN_INFO "%s: %s at 0x%lx, " fp@0: "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " fp@0: "IRQ %d\n", fp@0: dev->name, fp@0: board_info[ent->driver_data].name, fp@0: dev->base_addr, fp@0: dev->dev_addr[0], dev->dev_addr[1], fp@0: dev->dev_addr[2], dev->dev_addr[3], fp@0: dev->dev_addr[4], dev->dev_addr[5], fp@0: dev->irq); fp@0: fp@0: EC_DBG (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", fp@0: dev->name, rtl_chip_info[tp->chipset].name); fp@0: fp@0: /* Find the connected MII xcvrs. fp@0: Doing this in open() would allow detecting external xcvrs later, but fp@0: takes too much time. */ fp@0: #ifdef CONFIG_8139TOO_8129 fp@0: if (tp->drv_flags & HAS_MII_XCVR) { fp@0: int phy, phy_idx = 0; fp@0: for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) { fp@0: int mii_status = mdio_read(dev, phy, 1); fp@0: if (mii_status != 0xffff && mii_status != 0x0000) { fp@0: u16 advertising = mdio_read(dev, phy, 4); fp@0: tp->phys[phy_idx++] = phy; fp@0: EC_DBG(KERN_INFO "%s: MII transceiver %d status 0x%4.4x " fp@0: "advertising %4.4x.\n", fp@0: dev->name, phy, mii_status, advertising); fp@0: } fp@0: } fp@0: if (phy_idx == 0) { fp@0: EC_DBG(KERN_INFO "%s: No MII transceivers found! Assuming SYM " fp@0: "transceiver.\n", fp@0: dev->name); fp@0: tp->phys[0] = 32; fp@0: } fp@0: } else fp@0: #endif fp@0: tp->phys[0] = 32; fp@0: tp->mii.phy_id = tp->phys[0]; fp@0: fp@0: /* The lower four bits are the media type. */ fp@0: option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; fp@0: if (option > 0) { fp@0: tp->mii.full_duplex = (option & 0x210) ? 1 : 0; fp@0: tp->default_port = option & 0xFF; fp@0: if (tp->default_port) fp@0: tp->mii.force_media = 1; fp@0: } fp@0: if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) fp@0: tp->mii.full_duplex = full_duplex[board_idx]; fp@0: if (tp->mii.full_duplex) { fp@0: EC_DBG(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name); fp@0: /* Changing the MII-advertised media because might prevent fp@0: re-connection. */ fp@0: tp->mii.force_media = 1; fp@0: } fp@0: if (tp->default_port) { fp@0: EC_DBG(KERN_INFO " Forcing %dMbps %s-duplex operation.\n", fp@0: (option & 0x20 ? 100 : 10), fp@0: (option & 0x10 ? "full" : "half")); fp@0: mdio_write(dev, tp->phys[0], 0, fp@0: ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ fp@0: ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ fp@0: } fp@0: fp@0: /* Put the chip into low-power mode. */ fp@0: if (rtl_chip_info[tp->chipset].flags & HasHltClk) fp@0: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ fp@0: fp@0: return 0; fp@0: fp@0: err_out: fp@0: __rtl8139_cleanup_dev (dev); fp@0: return i; fp@0: } fp@0: fp@0: fp@0: static void __devexit rtl8139_remove_one (struct pci_dev *pdev) fp@0: { fp@0: struct net_device *dev = pci_get_drvdata (pdev); fp@0: struct rtl8139_private *np; fp@0: fp@0: assert (dev != NULL); fp@0: np = dev->priv; fp@0: assert (np != NULL); fp@1: fp@1: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@1: if (dev != rtl_ecat_dev.dev) fp@1: { fp@1: unregister_netdev (dev); fp@1: } fp@1: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: __rtl8139_cleanup_dev (dev); fp@0: } fp@0: fp@0: fp@0: /* Serial EEPROM section. */ fp@0: fp@0: /* EEPROM_Ctrl bits. */ fp@0: #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ fp@0: #define EE_CS 0x08 /* EEPROM chip select. */ fp@0: #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ fp@0: #define EE_WRITE_0 0x00 fp@0: #define EE_WRITE_1 0x02 fp@0: #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ fp@0: #define EE_ENB (0x80 | EE_CS) fp@0: fp@0: /* Delay between EEPROM clock transitions. fp@0: No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. fp@0: */ fp@0: fp@0: #define eeprom_delay() readl(ee_addr) fp@0: fp@0: /* The EEPROM commands include the alway-set leading bit. */ fp@0: #define EE_WRITE_CMD (5) fp@0: #define EE_READ_CMD (6) fp@0: #define EE_ERASE_CMD (7) fp@0: fp@0: static int __devinit read_eeprom (void *ioaddr, int location, int addr_len) fp@0: { fp@0: int i; fp@0: unsigned retval = 0; fp@0: void *ee_addr = ioaddr + Cfg9346; fp@0: int read_cmd = location | (EE_READ_CMD << addr_len); fp@0: fp@0: writeb (EE_ENB & ~EE_CS, ee_addr); fp@0: writeb (EE_ENB, ee_addr); fp@0: eeprom_delay (); fp@0: fp@0: /* Shift the read command bits out. */ fp@0: for (i = 4 + addr_len; i >= 0; i--) { fp@0: int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; fp@0: writeb (EE_ENB | dataval, ee_addr); fp@0: eeprom_delay (); fp@0: writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); fp@0: eeprom_delay (); fp@0: } fp@0: writeb (EE_ENB, ee_addr); fp@0: eeprom_delay (); fp@0: fp@0: for (i = 16; i > 0; i--) { fp@0: writeb (EE_ENB | EE_SHIFT_CLK, ee_addr); fp@0: eeprom_delay (); fp@0: retval = fp@0: (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 : fp@0: 0); fp@0: writeb (EE_ENB, ee_addr); fp@0: eeprom_delay (); fp@0: } fp@0: fp@0: /* Terminate the EEPROM access. */ fp@0: writeb (~EE_CS, ee_addr); fp@0: eeprom_delay (); fp@0: fp@0: return retval; fp@0: } fp@0: fp@0: /* MII serial management: mostly bogus for now. */ fp@0: /* Read and write the MII management registers using software-generated fp@0: serial MDIO protocol. fp@0: The maximum data clock rate is 2.5 Mhz. The minimum timing is usually fp@0: met by back-to-back PCI I/O cycles, but we insert a delay to avoid fp@0: "overclocking" issues. */ fp@0: #define MDIO_DIR 0x80 fp@0: #define MDIO_DATA_OUT 0x04 fp@0: #define MDIO_DATA_IN 0x02 fp@0: #define MDIO_CLK 0x01 fp@0: #define MDIO_WRITE0 (MDIO_DIR) fp@0: #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) fp@0: fp@0: #define mdio_delay(mdio_addr) readb(mdio_addr) fp@0: fp@0: fp@0: static char mii_2_8139_map[8] = { fp@0: BasicModeCtrl, fp@0: BasicModeStatus, fp@0: 0, fp@0: 0, fp@0: NWayAdvert, fp@0: NWayLPAR, fp@0: NWayExpansion, fp@0: 0 fp@0: }; fp@0: fp@0: fp@0: #ifdef CONFIG_8139TOO_8129 fp@0: /* Syncronize the MII management interface by shifting 32 one bits out. */ fp@0: static void mdio_sync (void *mdio_addr) fp@0: { fp@0: int i; fp@0: fp@0: for (i = 32; i >= 0; i--) { fp@0: writeb (MDIO_WRITE1, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: writeb (MDIO_WRITE1 | MDIO_CLK, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: } fp@0: } fp@0: #endif fp@0: fp@0: static int mdio_read (struct net_device *dev, int phy_id, int location) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: int retval = 0; fp@0: #ifdef CONFIG_8139TOO_8129 fp@0: void *mdio_addr = tp->mmio_addr + Config4; fp@0: int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; fp@0: int i; fp@0: #endif fp@0: fp@0: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ fp@0: return location < 8 && mii_2_8139_map[location] ? fp@0: readw (tp->mmio_addr + mii_2_8139_map[location]) : 0; fp@0: } fp@0: fp@0: #ifdef CONFIG_8139TOO_8129 fp@0: mdio_sync (mdio_addr); fp@0: /* Shift the read command bits out. */ fp@0: for (i = 15; i >= 0; i--) { fp@0: int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; fp@0: fp@0: writeb (MDIO_DIR | dataval, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: writeb (MDIO_DIR | dataval | MDIO_CLK, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: } fp@0: fp@0: /* Read the two transition, 16 data, and wire-idle bits. */ fp@0: for (i = 19; i > 0; i--) { fp@0: writeb (0, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: retval = (retval << 1) | ((readb (mdio_addr) & MDIO_DATA_IN) ? 1 : 0); fp@0: writeb (MDIO_CLK, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: } fp@0: #endif fp@0: fp@0: return (retval >> 1) & 0xffff; fp@0: } fp@0: fp@0: fp@0: static void mdio_write (struct net_device *dev, int phy_id, int location, fp@0: int value) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: #ifdef CONFIG_8139TOO_8129 fp@0: void *mdio_addr = tp->mmio_addr + Config4; fp@0: int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; fp@0: int i; fp@0: #endif fp@0: fp@0: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ fp@0: void *ioaddr = tp->mmio_addr; fp@0: if (location == 0) { fp@0: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@0: RTL_W16 (BasicModeCtrl, value); fp@0: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@0: } else if (location < 8 && mii_2_8139_map[location]) fp@0: RTL_W16 (mii_2_8139_map[location], value); fp@0: return; fp@0: } fp@0: fp@0: #ifdef CONFIG_8139TOO_8129 fp@0: mdio_sync (mdio_addr); fp@0: fp@0: /* Shift the command bits out. */ fp@0: for (i = 31; i >= 0; i--) { fp@0: int dataval = fp@0: (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; fp@0: writeb (dataval, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: writeb (dataval | MDIO_CLK, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: } fp@0: /* Clear out extra bits. */ fp@0: for (i = 2; i > 0; i--) { fp@0: writeb (0, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: writeb (MDIO_CLK, mdio_addr); fp@0: mdio_delay (mdio_addr); fp@0: } fp@0: #endif fp@0: } fp@0: fp@0: fp@0: static int rtl8139_open (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: int retval; fp@0: #ifdef RTL8139_DEBUG fp@0: void *ioaddr = tp->mmio_addr; fp@0: #endif fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: open\n", dev->name); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@0: if (dev != rtl_ecat_dev.dev) fp@1: { fp@1: retval = request_irq(dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev); fp@1: } fp@1: else fp@1: { fp@1: //rt_disable_irq(dev->irq); fp@1: retval = rt_request_global_irq(dev->irq,rt_rtl8139_interrupt); fp@0: //rt_enable_irq(dev->irq); fp@0: } fp@1: fp@0: if (retval) fp@0: return retval; fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN, fp@0: &tp->tx_bufs_dma); fp@0: tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN, fp@0: &tp->rx_ring_dma); fp@0: if (tp->tx_bufs == NULL || tp->rx_ring == NULL) fp@0: { fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@1: if (dev != rtl_ecat_dev.dev) fp@1: { fp@0: free_irq(dev->irq, dev); fp@1: } fp@0: else fp@1: { fp@0: rt_free_global_irq (dev->irq); fp@1: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: if (tp->tx_bufs) fp@0: pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, fp@0: tp->tx_bufs, tp->tx_bufs_dma); fp@0: if (tp->rx_ring) fp@0: pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, fp@0: tp->rx_ring, tp->rx_ring_dma); fp@0: fp@0: return -ENOMEM; fp@0: fp@0: } fp@0: fp@0: tp->mii.full_duplex = tp->mii.force_media; fp@0: tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; fp@0: tp->twistie = (tp->chipset == CH_8139_K) ? 1 : 0; fp@0: tp->time_to_die = 0; fp@0: fp@0: rtl8139_init_ring (dev); fp@0: rtl8139_hw_start (dev); fp@0: fp@0: DPRINTK ("%s: rtl8139_open() ioaddr %#lx IRQ %d" fp@0: " GP Pins %2.2x %s-duplex.\n", fp@0: dev->name, pci_resource_start (tp->pci_dev, 1), fp@0: dev->irq, RTL_R8 (MediaStatus), fp@0: tp->mii.full_duplex ? "full" : "half"); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev != rtl_ecat_dev.dev) fp@0: { fp@0: EC_DBG(KERN_DEBUG "%s: starting kernel thread...\n", dev->name); fp@0: tp->thr_pid = kernel_thread (rtl8139_thread, dev, CLONE_FS | CLONE_FILES); fp@0: fp@0: if (tp->thr_pid < 0) fp@0: EC_DBG (KERN_WARNING "%s: unable to start kernel thread\n", fp@0: dev->name); fp@0: } fp@0: #if 0 fp@0: else fp@0: { fp@0: rt_enable_irq(dev->irq); fp@0: } fp@0: #endif fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: open finished.\n", dev->name); fp@0: fp@0: return 0; fp@0: } fp@0: fp@0: fp@0: static void rtl_check_media (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: fp@0: if (tp->phys[0] >= 0) { fp@0: u16 mii_lpa = mdio_read(dev, tp->phys[0], MII_LPA); fp@0: if (mii_lpa == 0xffff) fp@0: ; /* Not there */ fp@0: else if ((mii_lpa & LPA_100FULL) == LPA_100FULL fp@0: || (mii_lpa & 0x00C0) == LPA_10FULL) fp@0: tp->mii.full_duplex = 1; fp@0: fp@0: EC_DBG (KERN_INFO "%s: Setting %s%s-duplex based on" fp@0: " auto-negotiated partner ability %4.4x.\n", fp@0: dev->name, mii_lpa == 0 ? "" : fp@0: (mii_lpa & 0x0180) ? "100mbps " : "10mbps ", fp@0: tp->mii.full_duplex ? "full" : "half", mii_lpa); fp@0: } fp@0: EC_DBG(KERN_DEBUG "rtl_check_media done.\n"); fp@0: } fp@0: fp@0: /* Start the hardware at open or resume. */ fp@0: static void rtl8139_hw_start (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: void *ioaddr = tp->mmio_addr; fp@0: u32 i; fp@0: u8 tmp; fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: rtl8139_hw_start\n", dev->name); fp@0: fp@0: /* Bring old chips out of low-power mode. */ fp@0: if (rtl_chip_info[tp->chipset].flags & HasHltClk) fp@0: RTL_W8 (HltClk, 'R'); fp@0: fp@0: rtl8139_chip_reset (ioaddr); fp@0: fp@0: /* unlock Config[01234] and BMCR register writes */ fp@0: RTL_W8_F (Cfg9346, Cfg9346_Unlock); fp@0: /* Restore our idea of the MAC address. */ fp@0: RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); fp@0: RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); fp@0: fp@0: /* Must enable Tx/Rx before setting transfer thresholds! */ fp@0: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); fp@0: fp@0: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; fp@0: RTL_W32 (RxConfig, tp->rx_config); fp@0: fp@0: /* Check this value: the documentation for IFG contradicts ifself. */ fp@0: RTL_W32 (TxConfig, rtl8139_tx_config); fp@0: fp@0: tp->cur_rx = 0; fp@0: fp@0: rtl_check_media (dev); fp@0: fp@0: if (tp->chipset >= CH_8139B) { fp@0: /* Disable magic packet scanning, which is enabled fp@0: * when PM is enabled in Config1. It can be reenabled fp@0: * via ETHTOOL_SWOL if desired. */ fp@0: RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); fp@0: } fp@0: fp@0: DPRINTK("init buffer addresses\n"); fp@0: fp@0: /* Lock Config[01234] and BMCR register writes */ fp@0: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@0: fp@0: /* init Rx ring buffer DMA address */ fp@0: RTL_W32_F (RxBuf, tp->rx_ring_dma); fp@0: fp@0: /* init Tx buffer DMA addresses */ fp@0: for (i = 0; i < NUM_TX_DESC; i++) fp@0: RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); fp@0: fp@0: RTL_W32 (RxMissed, 0); fp@0: fp@0: rtl8139_set_rx_mode (dev); fp@0: fp@0: /* no early-rx interrupts */ fp@0: RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); fp@0: fp@0: /* make sure RxTx has started */ fp@0: tmp = RTL_R8 (ChipCmd); fp@0: if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) fp@0: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); fp@0: fp@0: /* Enable all known interrupts by setting the interrupt mask. */ fp@0: RTL_W16 (IntrMask, rtl8139_intr_mask); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@0: if (dev != rtl_ecat_dev.dev) netif_start_queue (dev); fp@1: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: rtl8139_hw_start finished.\n", dev->name); fp@0: } fp@0: fp@0: fp@0: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ fp@0: static void rtl8139_init_ring (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: int i; fp@0: fp@0: tp->cur_rx = 0; fp@0: tp->cur_tx = 0; fp@0: tp->dirty_tx = 0; fp@0: fp@0: for (i = 0; i < NUM_TX_DESC; i++) fp@0: tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; fp@0: } fp@0: fp@0: fp@0: /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ fp@0: static int next_tick = 3 * HZ; fp@0: fp@0: #ifndef CONFIG_8139TOO_TUNE_TWISTER fp@0: static inline void rtl8139_tune_twister (struct net_device *dev, fp@0: struct rtl8139_private *tp) {} fp@0: #else fp@0: static void rtl8139_tune_twister (struct net_device *dev, fp@0: struct rtl8139_private *tp) fp@0: { fp@0: int linkcase; fp@0: void *ioaddr = tp->mmio_addr; fp@0: fp@0: /* This is a complicated state machine to configure the "twister" for fp@0: impedance/echos based on the cable length. fp@0: All of this is magic and undocumented. fp@0: */ fp@0: switch (tp->twistie) { fp@0: case 1: fp@0: if (RTL_R16 (CSCR) & CSCR_LinkOKBit) { fp@0: /* We have link beat, let us tune the twister. */ fp@0: RTL_W16 (CSCR, CSCR_LinkDownOffCmd); fp@0: tp->twistie = 2; /* Change to state 2. */ fp@0: next_tick = HZ / 10; fp@0: } else { fp@0: /* Just put in some reasonable defaults for when beat returns. */ fp@0: RTL_W16 (CSCR, CSCR_LinkDownCmd); fp@0: RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ fp@0: RTL_W32 (PARA78, PARA78_default); fp@0: RTL_W32 (PARA7c, PARA7c_default); fp@0: tp->twistie = 0; /* Bail from future actions. */ fp@0: } fp@0: break; fp@0: case 2: fp@0: /* Read how long it took to hear the echo. */ fp@0: linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; fp@0: if (linkcase == 0x7000) fp@0: tp->twist_row = 3; fp@0: else if (linkcase == 0x3000) fp@0: tp->twist_row = 2; fp@0: else if (linkcase == 0x1000) fp@0: tp->twist_row = 1; fp@0: else fp@0: tp->twist_row = 0; fp@0: tp->twist_col = 0; fp@0: tp->twistie = 3; /* Change to state 2. */ fp@0: next_tick = HZ / 10; fp@0: break; fp@0: case 3: fp@0: /* Put out four tuning parameters, one per 100msec. */ fp@0: if (tp->twist_col == 0) fp@0: RTL_W16 (FIFOTMS, 0); fp@0: RTL_W32 (PARA7c, param[(int) tp->twist_row] fp@0: [(int) tp->twist_col]); fp@0: next_tick = HZ / 10; fp@0: if (++tp->twist_col >= 4) { fp@0: /* For short cables we are done. fp@0: For long cables (row == 3) check for mistune. */ fp@0: tp->twistie = fp@0: (tp->twist_row == 3) ? 4 : 0; fp@0: } fp@0: break; fp@0: case 4: fp@0: /* Special case for long cables: check for mistune. */ fp@0: if ((RTL_R16 (CSCR) & fp@0: CSCR_LinkStatusBits) == 0x7000) { fp@0: tp->twistie = 0; fp@0: break; fp@0: } else { fp@0: RTL_W32 (PARA7c, 0xfb38de03); fp@0: tp->twistie = 5; fp@0: next_tick = HZ / 10; fp@0: } fp@0: break; fp@0: case 5: fp@0: /* Retune for shorter cable (column 2). */ fp@0: RTL_W32 (FIFOTMS, 0x20); fp@0: RTL_W32 (PARA78, PARA78_default); fp@0: RTL_W32 (PARA7c, PARA7c_default); fp@0: RTL_W32 (FIFOTMS, 0x00); fp@0: tp->twist_row = 2; fp@0: tp->twist_col = 0; fp@0: tp->twistie = 3; fp@0: next_tick = HZ / 10; fp@0: break; fp@0: fp@0: default: fp@0: /* do nothing */ fp@0: break; fp@0: } fp@0: } fp@0: #endif /* CONFIG_8139TOO_TUNE_TWISTER */ fp@0: fp@0: fp@0: static inline void rtl8139_thread_iter (struct net_device *dev, fp@0: struct rtl8139_private *tp, fp@0: void *ioaddr) fp@0: { fp@0: int mii_lpa; fp@0: fp@0: mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); fp@0: fp@0: if (!tp->mii.force_media && mii_lpa != 0xffff) { fp@0: int duplex = (mii_lpa & LPA_100FULL) fp@0: || (mii_lpa & 0x01C0) == 0x0040; fp@0: if (tp->mii.full_duplex != duplex) { fp@0: tp->mii.full_duplex = duplex; fp@0: fp@0: if (mii_lpa) { fp@0: EC_DBG (KERN_INFO fp@0: "%s: Setting %s-duplex based on MII #%d link" fp@0: " partner ability of %4.4x.\n", fp@0: dev->name, fp@0: tp->mii.full_duplex ? "full" : "half", fp@0: tp->phys[0], mii_lpa); fp@0: } else { fp@0: EC_DBG(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n", fp@0: dev->name); fp@0: } fp@0: #if 0 fp@0: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@0: RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); fp@0: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@0: #endif fp@0: } fp@0: } fp@0: fp@0: next_tick = HZ * 60; fp@0: fp@0: rtl8139_tune_twister (dev, tp); fp@0: fp@0: DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n", fp@0: dev->name, RTL_R16 (NWayLPAR)); fp@0: DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n", fp@0: dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); fp@0: DPRINTK ("%s: Chip config %2.2x %2.2x.\n", fp@0: dev->name, RTL_R8 (Config0), fp@0: RTL_R8 (Config1)); fp@0: } fp@0: fp@0: fp@0: static int rtl8139_thread (void *data) fp@0: { fp@0: struct net_device *dev = data; fp@0: struct rtl8139_private *tp = dev->priv; fp@0: unsigned long timeout; fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: thread\n", dev->name); fp@0: fp@0: daemonize (); fp@0: reparent_to_init(); fp@0: spin_lock_irq(¤t->sigmask_lock); fp@0: sigemptyset(¤t->blocked); fp@0: recalc_sigpending(current); fp@0: spin_unlock_irq(¤t->sigmask_lock); fp@0: fp@0: strncpy (current->comm, dev->name, sizeof(current->comm) - 1); fp@0: current->comm[sizeof(current->comm) - 1] = '\0'; fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: thread entering loop...\n", dev->name); fp@0: fp@0: while (1) { fp@0: timeout = next_tick; fp@0: do { fp@0: timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout); fp@0: } while (!signal_pending (current) && (timeout > 0)); fp@0: fp@0: if (signal_pending (current)) { fp@0: spin_lock_irq(¤t->sigmask_lock); fp@0: flush_signals(current); fp@0: spin_unlock_irq(¤t->sigmask_lock); fp@0: } fp@0: fp@0: if (tp->time_to_die) fp@0: break; fp@0: fp@0: rtnl_lock (); fp@0: EC_DBG(KERN_DEBUG "%s: thread iter\n", dev->name); fp@0: rtl8139_thread_iter (dev, tp, tp->mmio_addr); fp@0: EC_DBG(KERN_DEBUG "%s: thread iter finished.\n", dev->name); fp@0: rtnl_unlock (); fp@0: } fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: thread exiting...\n", dev->name); fp@0: fp@0: complete_and_exit (&tp->thr_exited, 0); fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: thread exit.\n", dev->name); fp@0: } fp@0: fp@0: fp@0: static void rtl8139_tx_clear (struct rtl8139_private *tp) fp@0: { fp@0: tp->cur_tx = 0; fp@0: tp->dirty_tx = 0; fp@0: fp@0: /* XXX account for unsent Tx packets in tp->stats.tx_dropped */ fp@0: } fp@0: fp@0: fp@0: static void rtl8139_tx_timeout (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: void *ioaddr = tp->mmio_addr; fp@0: int i; fp@0: u8 tmp8; fp@0: unsigned long flags; fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: tx_timeout\n", dev->name); fp@0: fp@0: DPRINTK ("%s: Transmit timeout, status %2.2x %4.4x " fp@0: "media %2.2x.\n", dev->name, fp@0: RTL_R8 (ChipCmd), fp@0: RTL_R16 (IntrStatus), fp@0: RTL_R8 (MediaStatus)); fp@0: fp@0: tp->xstats.tx_timeouts++; fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev == rtl_ecat_dev.dev) fp@0: { fp@0: if (rtl_ecat_dev.state != ECAT_DS_SENT) fp@0: { fp@0: EC_DBG(KERN_WARNING "EtherCAT: Wrong status at timeout!\n"); fp@0: } fp@0: else fp@0: { fp@0: rtl_ecat_dev.state = ECAT_DS_TIMEOUT; fp@0: } fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: /* disable Tx ASAP, if not already */ fp@0: tmp8 = RTL_R8 (ChipCmd); fp@0: if (tmp8 & CmdTxEnb) fp@0: RTL_W8 (ChipCmd, CmdRxEnb); fp@0: fp@0: /* Disable interrupts by clearing the interrupt mask. */ fp@0: RTL_W16 (IntrMask, 0x0000); fp@0: fp@0: /* Emit info to figure out what went wrong. */ fp@0: EC_DBG (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n", fp@0: dev->name, tp->cur_tx, tp->dirty_tx); fp@0: for (i = 0; i < NUM_TX_DESC; i++) fp@0: EC_DBG (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", fp@0: dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), fp@0: i == (int) (tp->dirty_tx % NUM_TX_DESC) ? fp@0: " (queue head)" : ""); fp@0: fp@0: /* Stop a shared interrupt from scavenging while we are. */ fp@0: if(dev == rtl_ecat_dev.dev) { fp@0: flags = rt_spin_lock_irqsave (&tp->lock); fp@0: rtl8139_tx_clear (tp); fp@0: rt_spin_unlock_irqrestore (&tp->lock,flags); fp@0: } fp@0: else { fp@0: spin_lock_irqsave (&tp->lock, flags); fp@0: rtl8139_tx_clear (tp); fp@0: spin_unlock_irqrestore (&tp->lock, flags); fp@0: } fp@0: /* ...and finally, reset everything */ fp@0: rtl8139_hw_start (dev); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@0: if (dev != rtl_ecat_dev.dev) netif_wake_queue (dev); fp@1: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: EC_DBG(KERN_DEBUG "%s: tx_timeout finished.\n", dev->name); fp@0: } fp@0: fp@0: static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: void *ioaddr = tp->mmio_addr; fp@0: unsigned int entry; fp@0: unsigned int len = skb->len; fp@0: fp@0: /* Calculate the next Tx descriptor entry. */ fp@0: entry = tp->cur_tx % NUM_TX_DESC; fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (likely(len < TX_BUF_SIZE)) fp@0: { fp@0: skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); fp@0: fp@0: // Socket buffer nicht löschen, wenn vom EtherCAT-device fp@0: if (dev != rtl_ecat_dev.dev) dev_kfree_skb(skb); fp@0: } fp@0: else fp@0: { fp@0: if (dev != rtl_ecat_dev.dev) dev_kfree_skb(skb); fp@0: tp->stats.tx_dropped++; fp@0: return 0; fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: /* Note: the chip doesn't have auto-pad! */ fp@0: if(dev == rtl_ecat_dev.dev) fp@0: rt_spin_lock_irq(&tp->lock); fp@0: else fp@0: spin_lock_irq(&tp->lock); fp@0: fp@0: RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), fp@0: tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); fp@0: fp@0: dev->trans_start = jiffies; fp@0: fp@0: tp->cur_tx++; fp@0: wmb(); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev != rtl_ecat_dev.dev && ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)) fp@0: netif_stop_queue (dev); fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: if(dev == rtl_ecat_dev.dev) fp@0: rt_spin_unlock_irq(&tp->lock); fp@0: else fp@0: spin_unlock_irq(&tp->lock); fp@0: DPRINTK ("%s: Queued Tx packet size %u to slot %d.\n", fp@0: dev->name, len, entry); fp@0: fp@0: return 0; fp@0: } fp@0: fp@0: fp@0: static void rtl8139_tx_interrupt (struct net_device *dev, fp@0: struct rtl8139_private *tp, fp@0: void *ioaddr) fp@0: { fp@0: unsigned long dirty_tx, tx_left; fp@0: fp@0: assert (dev != NULL); fp@0: assert (tp != NULL); fp@0: assert (ioaddr != NULL); fp@0: fp@0: dirty_tx = tp->dirty_tx; fp@0: tx_left = tp->cur_tx - dirty_tx; fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@1: if (dev == rtl_ecat_dev.dev) fp@1: { fp@0: (rtl_ecat_dev.tx_intr_cnt)++; fp@0: rdtscl(rtl_ecat_dev.tx_time); // Get CPU cycles fp@0: } fp@1: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: while (tx_left > 0) { fp@0: int entry = dirty_tx % NUM_TX_DESC; fp@0: int txstatus; fp@0: fp@0: txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); fp@0: fp@0: if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) fp@0: break; /* It still hasn't been Txed */ fp@0: fp@0: /* Note: TxCarrierLost is always asserted at 100mbps. */ fp@0: if (txstatus & (TxOutOfWindow | TxAborted)) { fp@0: /* There was an major error, log it. */ fp@0: DPRINTK ("%s: Transmit error, Tx status %8.8x.\n", fp@0: dev->name, txstatus); fp@0: tp->stats.tx_errors++; fp@0: if (txstatus & TxAborted) { fp@0: tp->stats.tx_aborted_errors++; fp@0: RTL_W32 (TxConfig, TxClearAbt); fp@0: RTL_W16 (IntrStatus, TxErr); fp@0: wmb(); fp@0: } fp@0: if (txstatus & TxCarrierLost) fp@0: tp->stats.tx_carrier_errors++; fp@0: if (txstatus & TxOutOfWindow) fp@0: tp->stats.tx_window_errors++; fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev == rtl_ecat_dev.dev) fp@0: { fp@0: rtl_ecat_dev.state = ECAT_DS_ERROR; fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: } else { fp@0: if (txstatus & TxUnderrun) { fp@0: /* Add 64 to the Tx FIFO threshold. */ fp@0: if (tp->tx_flag < 0x00300000) fp@0: tp->tx_flag += 0x00020000; fp@0: tp->stats.tx_fifo_errors++; fp@0: } fp@0: tp->stats.collisions += (txstatus >> 24) & 15; fp@0: tp->stats.tx_bytes += txstatus & 0x7ff; fp@0: tp->stats.tx_packets++; fp@0: } fp@0: fp@0: dirty_tx++; fp@0: tx_left--; fp@0: } fp@0: fp@0: #ifndef RTL8139_NDEBUG fp@0: if (tp->cur_tx - dirty_tx > NUM_TX_DESC) { fp@0: EC_DBG (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", fp@0: dev->name, dirty_tx, tp->cur_tx); fp@0: dirty_tx += NUM_TX_DESC; fp@0: } fp@0: #endif /* RTL8139_NDEBUG */ fp@0: fp@0: /* only wake the queue if we did work, and the queue is stopped */ fp@0: if (tp->dirty_tx != dirty_tx) { fp@0: tp->dirty_tx = dirty_tx; fp@0: mb(); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev != rtl_ecat_dev.dev && netif_queue_stopped (dev)) fp@0: netif_wake_queue (dev); fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: } fp@0: } fp@0: fp@0: fp@0: /* TODO: clean this up! Rx reset need not be this intensive */ fp@0: static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, fp@0: struct rtl8139_private *tp, void *ioaddr) fp@0: { fp@0: u8 tmp8; fp@0: #ifdef CONFIG_8139_OLD_RX_RESET fp@0: int tmp_work; fp@0: #endif fp@0: fp@0: DPRINTK ("%s: Ethernet frame had errors, status %8.8x.\n", fp@0: dev->name, rx_status); fp@0: tp->stats.rx_errors++; fp@0: if (!(rx_status & RxStatusOK)) { fp@0: if (rx_status & RxTooLong) { fp@0: DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n", fp@0: dev->name, rx_status); fp@0: /* A.C.: The chip hangs here. */ fp@0: } fp@0: if (rx_status & (RxBadSymbol | RxBadAlign)) fp@0: tp->stats.rx_frame_errors++; fp@0: if (rx_status & (RxRunt | RxTooLong)) fp@0: tp->stats.rx_length_errors++; fp@0: if (rx_status & RxCRCErr) fp@0: tp->stats.rx_crc_errors++; fp@0: } else { fp@0: tp->xstats.rx_lost_in_ring++; fp@0: } fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev == rtl_ecat_dev.dev) fp@0: { fp@0: rtl_ecat_dev.state = ECAT_DS_ERROR; fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: #ifndef CONFIG_8139_OLD_RX_RESET fp@0: tmp8 = RTL_R8 (ChipCmd); fp@0: RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); fp@0: RTL_W8 (ChipCmd, tmp8); fp@0: RTL_W32 (RxConfig, tp->rx_config); fp@0: tp->cur_rx = 0; fp@0: #else fp@0: /* Reset the receiver, based on RealTek recommendation. (Bug?) */ fp@0: fp@0: /* disable receive */ fp@0: RTL_W8_F (ChipCmd, CmdTxEnb); fp@0: tmp_work = 200; fp@0: while (--tmp_work > 0) { fp@0: udelay(1); fp@0: tmp8 = RTL_R8 (ChipCmd); fp@0: if (!(tmp8 & CmdRxEnb)) fp@0: break; fp@0: } fp@0: if (tmp_work <= 0) fp@0: EC_DBG (KERN_WARNING PFX "rx stop wait too long\n"); fp@0: /* restart receive */ fp@0: tmp_work = 200; fp@0: while (--tmp_work > 0) { fp@0: RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); fp@0: udelay(1); fp@0: tmp8 = RTL_R8 (ChipCmd); fp@0: if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) fp@0: break; fp@0: } fp@0: if (tmp_work <= 0) fp@0: EC_DBG (KERN_WARNING PFX "tx/rx enable wait too long\n"); fp@0: fp@0: /* and reinitialize all rx related registers */ fp@0: RTL_W8_F (Cfg9346, Cfg9346_Unlock); fp@0: /* Must enable Tx/Rx before setting transfer thresholds! */ fp@0: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); fp@0: fp@0: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; fp@0: RTL_W32 (RxConfig, tp->rx_config); fp@0: tp->cur_rx = 0; fp@0: fp@0: DPRINTK("init buffer addresses\n"); fp@0: fp@0: /* Lock Config[01234] and BMCR register writes */ fp@0: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@0: fp@0: /* init Rx ring buffer DMA address */ fp@0: RTL_W32_F (RxBuf, tp->rx_ring_dma); fp@0: fp@0: /* A.C.: Reset the multicast list. */ fp@0: __set_rx_mode (dev); fp@0: #endif fp@0: } fp@0: fp@0: static void rtl8139_rx_interrupt (struct net_device *dev, fp@0: struct rtl8139_private *tp, void *ioaddr) fp@0: { fp@0: unsigned char *rx_ring; fp@0: u16 cur_rx; fp@0: fp@0: assert (dev != NULL); fp@0: assert (tp != NULL); fp@0: assert (ioaddr != NULL); fp@0: fp@0: rx_ring = tp->rx_ring; fp@0: cur_rx = tp->cur_rx; fp@0: fp@0: DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x," fp@0: " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, fp@0: RTL_R16 (RxBufAddr), fp@0: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@1: if (dev == rtl_ecat_dev.dev) fp@1: { fp@1: (rtl_ecat_dev.rx_intr_cnt)++; fp@1: rdtscl(rtl_ecat_dev.rx_time); // Get CPU cycles fp@1: } fp@1: fp@1: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: while ((RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { fp@0: int ring_offset = cur_rx % RX_BUF_LEN; fp@0: u32 rx_status; fp@0: unsigned int rx_size; fp@0: unsigned int pkt_size; fp@0: struct sk_buff *skb; fp@0: fp@0: rmb(); fp@0: fp@0: /* read size+status of next frame from DMA ring buffer */ fp@0: rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset)); fp@0: rx_size = rx_status >> 16; fp@0: pkt_size = rx_size - 4; fp@0: fp@0: fp@0: DPRINTK ("%s: rtl8139_rx() status %4.4x, size %4.4x," fp@0: " cur %4.4x.\n", dev->name, rx_status, fp@0: rx_size, cur_rx); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@1: #if RTL8139_DEBUG > 2 fp@0: if (dev == rtl_ecat_dev.dev) fp@0: { fp@0: int i; fp@0: DPRINTK ("%s: Frame contents ", dev->name); fp@0: for (i = 0; i < 70; i++) fp@0: EC_DBG (" %2.2x", fp@0: rx_ring[ring_offset + i]); fp@0: EC_DBG (".\n"); fp@0: } fp@1: #endif fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: /* Packet copy from FIFO still in progress. fp@0: * Theoretically, this should never happen fp@0: * since EarlyRx is disabled. fp@0: */ fp@0: if (rx_size == 0xfff0) { fp@0: tp->xstats.early_rx++; fp@0: break; fp@0: } fp@0: fp@0: /* If Rx err or invalid rx_size/rx_status received fp@0: * (which happens if we get lost in the ring), fp@0: * Rx process gets reset, so we abort any further fp@0: * Rx processing. fp@0: */ fp@0: if ((rx_size > (MAX_ETH_FRAME_SIZE+4)) || fp@0: (rx_size < 8) || fp@0: (!(rx_status & RxStatusOK))) { fp@0: rtl8139_rx_err (rx_status, dev, tp, ioaddr); fp@0: return; fp@0: } fp@0: fp@0: /* Malloc up new buffer, compatible with net-2e. */ fp@0: /* Omit the four octet CRC from the length. */ fp@0: fp@0: /* TODO: consider allocating skb's outside of fp@0: * interrupt context, both to speed interrupt processing, fp@0: * and also to reduce the chances of having to fp@0: * drop packets here under memory pressure. fp@0: */ fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev != rtl_ecat_dev.dev) fp@0: { fp@0: skb = dev_alloc_skb(pkt_size + 2); fp@0: fp@0: if (skb) fp@0: { fp@0: skb->dev = dev; fp@0: skb_reserve (skb, 2); /* 16 byte align the IP fields. */ fp@0: eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0); fp@0: skb_put (skb, pkt_size); fp@0: skb->protocol = eth_type_trans (skb, dev); // Entfernt auch den Ethernet Header! fp@0: netif_rx(skb); fp@0: fp@0: fp@0: dev->last_rx = jiffies; fp@0: tp->stats.rx_bytes += pkt_size; fp@0: tp->stats.rx_packets++; fp@0: } fp@0: else fp@0: { fp@0: EC_DBG (KERN_WARNING fp@0: "%s: Memory squeeze, dropping packet.\n", fp@0: dev->name); fp@0: tp->stats.rx_dropped++; fp@0: } fp@0: } fp@0: else fp@0: { fp@0: if (rtl_ecat_dev.state != ECAT_DS_SENT) fp@0: { fp@0: EC_DBG(KERN_WARNING "EtherCAT: Received frame while not in SENT state!\n"); fp@0: } fp@0: else fp@0: { fp@0: // Copy received data to ethercat-device buffer, skip Ethernet-II header fp@0: memcpy(rtl_ecat_dev.rx_data, &rx_ring[ring_offset + 4] + ETH_HLEN, fp@0: pkt_size - ETH_HLEN); fp@0: rtl_ecat_dev.rx_data_length = pkt_size - ETH_HLEN; fp@0: fp@0: rtl_ecat_dev.state = ECAT_DS_RECEIVED; fp@0: fp@0: dev->last_rx = jiffies; fp@0: tp->stats.rx_bytes += pkt_size; fp@0: tp->stats.rx_packets++; fp@0: } fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; fp@0: RTL_W16 (RxBufPtr, cur_rx - 16); fp@0: fp@0: if (RTL_R16 (IntrStatus) & RxAckBits) fp@0: RTL_W16_F (IntrStatus, RxAckBits); fp@0: } fp@0: fp@0: DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x," fp@0: " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, fp@0: RTL_R16 (RxBufAddr), fp@0: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); fp@0: fp@0: tp->cur_rx = cur_rx; fp@0: } fp@0: fp@0: fp@0: static void rtl8139_weird_interrupt (struct net_device *dev, fp@0: struct rtl8139_private *tp, fp@0: void *ioaddr, fp@0: int status, int link_changed) fp@0: { fp@0: DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n", fp@0: dev->name, status); fp@0: fp@0: assert (dev != NULL); fp@0: assert (tp != NULL); fp@0: assert (ioaddr != NULL); fp@0: fp@0: /* Update the error count. */ fp@0: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@0: RTL_W32 (RxMissed, 0); fp@0: fp@0: if ((status & RxUnderrun) && link_changed && fp@0: (tp->drv_flags & HAS_LNK_CHNG)) { fp@0: /* Really link-change on new chips. */ fp@0: int lpar = RTL_R16 (NWayLPAR); fp@0: int duplex = (lpar & LPA_100FULL) || (lpar & 0x01C0) == 0x0040 fp@0: || tp->mii.force_media; fp@0: if (tp->mii.full_duplex != duplex) { fp@0: tp->mii.full_duplex = duplex; fp@0: #if 0 fp@0: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@0: RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); fp@0: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@0: #endif fp@0: } fp@0: status &= ~RxUnderrun; fp@0: } fp@0: fp@0: /* XXX along with rtl8139_rx_err, are we double-counting errors? */ fp@0: if (status & fp@0: (RxUnderrun | RxOverflow | RxErr | RxFIFOOver)) fp@0: tp->stats.rx_errors++; fp@0: fp@0: if (status & PCSTimeout) fp@0: tp->stats.rx_length_errors++; fp@0: if (status & (RxUnderrun | RxFIFOOver)) fp@0: tp->stats.rx_fifo_errors++; fp@0: if (status & PCIErr) { fp@0: u16 pci_cmd_status; fp@0: pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); fp@0: pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); fp@0: fp@0: EC_DBG (KERN_ERR "%s: PCI Bus error %4.4x.\n", fp@0: dev->name, pci_cmd_status); fp@0: } fp@0: } fp@0: fp@0: fp@0: fp@0: /* The interrupt handler does all of the Rx thread work and cleans up fp@0: after the Tx thread. */ fp@0: static void rtl8139_interrupt (int irq, void *dev_instance, fp@0: struct pt_regs *regs) fp@0: { fp@0: struct net_device *dev = (struct net_device *) dev_instance; fp@0: struct rtl8139_private *tp = dev->priv; fp@0: int boguscnt = max_interrupt_work; fp@0: void *ioaddr = tp->mmio_addr; fp@0: int ackstat, status; fp@0: int link_changed = 0; /* avoid bogus "uninit" warning */ fp@0: fp@0: if(dev == rtl_ecat_dev.dev) { fp@0: rt_spin_lock (&tp->lock); fp@0: (rtl_ecat_dev.intr_cnt)++; fp@0: } fp@0: else fp@0: spin_lock (&tp->lock); fp@0: fp@0: do { fp@0: status = RTL_R16 (IntrStatus); fp@0: fp@0: /* h/w no longer present (hotplug?) or major error, bail */ fp@0: if (status == 0xFFFF) fp@0: break; fp@0: fp@0: if ((status & fp@0: (PCIErr | PCSTimeout | RxUnderrun | RxOverflow | fp@0: RxFIFOOver | TxErr | TxOK | RxErr | RxOK)) == 0) fp@0: break; fp@0: fp@0: /* Acknowledge all of the current interrupt sources ASAP, but fp@0: an first get an additional status bit from CSCR. */ fp@0: if (status & RxUnderrun) fp@0: link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; fp@0: fp@0: /* The chip takes special action when we clear RxAckBits, fp@0: * so we clear them later in rtl8139_rx_interrupt fp@0: */ fp@0: ackstat = status & ~(RxAckBits | TxErr); fp@0: RTL_W16 (IntrStatus, ackstat); fp@0: fp@0: DPRINTK ("%s: interrupt status=%#4.4x ackstat=%#4.4x new intstat=%#4.4x.\n", fp@0: dev->name, ackstat, status, RTL_R16 (IntrStatus)); fp@0: fp@0: if ((dev == rtl_ecat_dev.dev || netif_running (dev)) && (status & RxAckBits)) fp@0: rtl8139_rx_interrupt (dev, tp, ioaddr); fp@0: fp@0: /* Check uncommon events with one test. */ fp@0: if (status & (PCIErr | PCSTimeout | RxUnderrun | RxOverflow | fp@0: RxFIFOOver | RxErr)) fp@0: rtl8139_weird_interrupt (dev, tp, ioaddr, fp@0: status, link_changed); fp@0: fp@0: if ((dev == rtl_ecat_dev.dev || netif_running (dev)) && (status & (TxOK | TxErr))) { fp@0: rtl8139_tx_interrupt (dev, tp, ioaddr); fp@0: if (status & TxErr) fp@0: RTL_W16 (IntrStatus, TxErr); fp@0: } fp@0: fp@0: boguscnt--; fp@0: } while (boguscnt > 0); fp@0: fp@0: if (boguscnt <= 0) { fp@0: EC_DBG (KERN_WARNING "%s: Too much work at interrupt, " fp@0: "IntrStatus=0x%4.4x.\n", dev->name, status); fp@0: fp@0: /* Clear all interrupt sources. */ fp@0: RTL_W16 (IntrStatus, 0xffff); fp@0: } fp@0: fp@0: if(dev == rtl_ecat_dev.dev) fp@0: rt_spin_unlock (&tp->lock); fp@0: else fp@0: spin_unlock (&tp->lock); fp@0: fp@0: DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n", fp@0: dev->name, RTL_R16 (IntrStatus)); fp@0: } fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: static void rt_rtl8139_interrupt(void) fp@0: { fp@0: rtl8139_interrupt(rtl_ecat_dev.dev->irq, rtl_ecat_dev.dev, NULL); fp@0: } fp@0: fp@1: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: static int rtl8139_close (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: void *ioaddr = tp->mmio_addr; fp@0: int ret = 0; fp@0: unsigned long flags; fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: if (dev != rtl_ecat_dev.dev) fp@0: { fp@0: netif_stop_queue(dev); fp@0: fp@0: if (tp->thr_pid >= 0) { fp@0: tp->time_to_die = 1; fp@0: wmb(); fp@0: ret = kill_proc (tp->thr_pid, SIGTERM, 1); fp@0: if (ret) { fp@0: EC_DBG (KERN_ERR "%s: unable to signal thread\n", dev->name); fp@0: return ret; fp@0: } fp@0: wait_for_completion (&tp->thr_exited); fp@0: } fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: DPRINTK ("%s: Shutting down ethercard, status was 0x%4.4x.\n", fp@0: dev->name, RTL_R16 (IntrStatus)); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: mdelay(1); //hm fp@0: fp@0: if (dev == rtl_ecat_dev.dev) fp@0: { fp@1: flags = rt_spin_lock_irqsave(&tp->lock); fp@0: } fp@0: else fp@0: { fp@1: spin_lock_irqsave(&tp->lock, flags); fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: /* Stop the chip's Tx and Rx DMA processes. */ fp@0: RTL_W8 (ChipCmd, 0); fp@0: fp@0: /* Disable interrupts by clearing the interrupt mask. */ fp@0: RTL_W16 (IntrMask, 0); fp@0: fp@0: /* Update the error counts. */ fp@0: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@0: RTL_W32 (RxMissed, 0); fp@0: fp@0: if (dev == rtl_ecat_dev.dev) { fp@0: rt_spin_unlock_irqrestore (&tp->lock, flags); fp@0: synchronize_irq (); fp@0: } fp@0: else { fp@0: spin_unlock_irqrestore (&tp->lock, flags); fp@0: synchronize_irq (); fp@0: } fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@0: EC_DBG ("rtl8139: freeing irq"); fp@0: mdelay(1); //hm fp@0: fp@0: if (dev != rtl_ecat_dev.dev) fp@0: { fp@0: free_irq (dev->irq, dev); fp@0: } fp@0: else fp@0: { fp@1: rt_disable_irq(dev->irq); fp@0: rt_free_global_irq (dev->irq); fp@0: rt_enable_irq(dev->irq); fp@0: } fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: rtl8139_tx_clear (tp); fp@0: fp@0: pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, fp@0: tp->rx_ring, tp->rx_ring_dma); fp@0: pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, fp@0: tp->tx_bufs, tp->tx_bufs_dma); fp@0: tp->rx_ring = NULL; fp@0: tp->tx_bufs = NULL; fp@0: fp@0: /* Green! Put the chip in low-power mode. */ fp@0: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@0: fp@0: if (rtl_chip_info[tp->chipset].flags & HasHltClk) fp@0: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ fp@0: fp@0: EC_DBG ("rtl8139: closing done\n"); fp@0: fp@0: return 0; fp@0: } fp@0: fp@0: fp@0: /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to fp@0: kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and fp@0: other threads or interrupts aren't messing with the 8139. */ fp@0: static void netdev_get_wol (struct net_device *dev, struct ethtool_wolinfo *wol) fp@0: { fp@0: struct rtl8139_private *np = dev->priv; fp@0: void *ioaddr = np->mmio_addr; fp@0: fp@0: if (rtl_chip_info[np->chipset].flags & HasLWake) { fp@0: u8 cfg3 = RTL_R8 (Config3); fp@0: u8 cfg5 = RTL_R8 (Config5); fp@0: fp@0: wol->supported = WAKE_PHY | WAKE_MAGIC fp@0: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; fp@0: fp@0: wol->wolopts = 0; fp@0: if (cfg3 & Cfg3_LinkUp) fp@0: wol->wolopts |= WAKE_PHY; fp@0: if (cfg3 & Cfg3_Magic) fp@0: wol->wolopts |= WAKE_MAGIC; fp@0: /* (KON)FIXME: See how netdev_set_wol() handles the fp@0: following constants. */ fp@0: if (cfg5 & Cfg5_UWF) fp@0: wol->wolopts |= WAKE_UCAST; fp@0: if (cfg5 & Cfg5_MWF) fp@0: wol->wolopts |= WAKE_MCAST; fp@0: if (cfg5 & Cfg5_BWF) fp@0: wol->wolopts |= WAKE_BCAST; fp@0: } fp@0: } fp@0: fp@0: fp@0: /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes fp@0: that wol points to kernel memory and other threads or interrupts fp@0: aren't messing with the 8139. */ fp@0: static int netdev_set_wol (struct net_device *dev, fp@0: const struct ethtool_wolinfo *wol) fp@0: { fp@0: struct rtl8139_private *np = dev->priv; fp@0: void *ioaddr = np->mmio_addr; fp@0: u32 support; fp@0: u8 cfg3, cfg5; fp@0: fp@0: support = ((rtl_chip_info[np->chipset].flags & HasLWake) fp@0: ? (WAKE_PHY | WAKE_MAGIC fp@0: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) fp@0: : 0); fp@0: if (wol->wolopts & ~support) fp@0: return -EINVAL; fp@0: fp@0: cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); fp@0: if (wol->wolopts & WAKE_PHY) fp@0: cfg3 |= Cfg3_LinkUp; fp@0: if (wol->wolopts & WAKE_MAGIC) fp@0: cfg3 |= Cfg3_Magic; fp@0: RTL_W8 (Cfg9346, Cfg9346_Unlock); fp@0: RTL_W8 (Config3, cfg3); fp@0: RTL_W8 (Cfg9346, Cfg9346_Lock); fp@0: fp@0: cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); fp@0: /* (KON)FIXME: These are untested. We may have to set the fp@0: CRC0, Wakeup0 and LSBCRC0 registers too, but I have no fp@0: documentation. */ fp@0: if (wol->wolopts & WAKE_UCAST) fp@0: cfg5 |= Cfg5_UWF; fp@0: if (wol->wolopts & WAKE_MCAST) fp@0: cfg5 |= Cfg5_MWF; fp@0: if (wol->wolopts & WAKE_BCAST) fp@0: cfg5 |= Cfg5_BWF; fp@0: RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ fp@0: fp@0: return 0; fp@0: } fp@0: fp@0: static int netdev_ethtool_ioctl (struct net_device *dev, void *useraddr) fp@0: { fp@0: struct rtl8139_private *np = dev->priv; fp@0: u32 ethcmd; fp@0: fp@0: /* dev_ioctl() in ../../net/core/dev.c has already checked fp@0: capable(CAP_NET_ADMIN), so don't bother with that here. */ fp@0: fp@0: if (get_user(ethcmd, (u32 *)useraddr)) fp@0: return -EFAULT; fp@0: fp@0: switch (ethcmd) { fp@0: fp@0: case ETHTOOL_GDRVINFO: { fp@0: struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO }; fp@0: strcpy (info.driver, DRV_NAME); fp@0: strcpy (info.version, DRV_VERSION); fp@0: strcpy (info.bus_info, np->pci_dev->slot_name); fp@0: info.regdump_len = np->regs_len; fp@0: if (copy_to_user (useraddr, &info, sizeof (info))) fp@0: return -EFAULT; fp@0: return 0; fp@0: } fp@0: fp@0: /* get settings */ fp@0: case ETHTOOL_GSET: { fp@0: struct ethtool_cmd ecmd = { ETHTOOL_GSET }; fp@0: spin_lock_irq(&np->lock); fp@0: mii_ethtool_gset(&np->mii, &ecmd); fp@0: spin_unlock_irq(&np->lock); fp@0: if (copy_to_user(useraddr, &ecmd, sizeof(ecmd))) fp@0: return -EFAULT; fp@0: return 0; fp@0: } fp@0: /* set settings */ fp@0: case ETHTOOL_SSET: { fp@0: int r; fp@0: struct ethtool_cmd ecmd; fp@0: if (copy_from_user(&ecmd, useraddr, sizeof(ecmd))) fp@0: return -EFAULT; fp@0: spin_lock_irq(&np->lock); fp@0: r = mii_ethtool_sset(&np->mii, &ecmd); fp@0: spin_unlock_irq(&np->lock); fp@0: return r; fp@0: } fp@0: /* restart autonegotiation */ fp@0: case ETHTOOL_NWAY_RST: { fp@0: return mii_nway_restart(&np->mii); fp@0: } fp@0: /* get link status */ fp@0: case ETHTOOL_GLINK: { fp@0: struct ethtool_value edata = {ETHTOOL_GLINK}; fp@0: edata.data = mii_link_ok(&np->mii); fp@0: if (copy_to_user(useraddr, &edata, sizeof(edata))) fp@0: return -EFAULT; fp@0: return 0; fp@0: } fp@0: fp@0: /* get message-level */ fp@0: case ETHTOOL_GMSGLVL: { fp@0: struct ethtool_value edata = {ETHTOOL_GMSGLVL}; fp@0: edata.data = debug; fp@0: if (copy_to_user(useraddr, &edata, sizeof(edata))) fp@0: return -EFAULT; fp@0: return 0; fp@0: } fp@0: /* set message-level */ fp@0: case ETHTOOL_SMSGLVL: { fp@0: struct ethtool_value edata; fp@0: if (copy_from_user(&edata, useraddr, sizeof(edata))) fp@0: return -EFAULT; fp@0: debug = edata.data; fp@0: return 0; fp@0: } fp@0: fp@0: case ETHTOOL_GWOL: fp@0: { fp@0: struct ethtool_wolinfo wol = { ETHTOOL_GWOL }; fp@0: spin_lock_irq (&np->lock); fp@0: netdev_get_wol (dev, &wol); fp@0: spin_unlock_irq (&np->lock); fp@0: if (copy_to_user (useraddr, &wol, sizeof (wol))) fp@0: return -EFAULT; fp@0: return 0; fp@0: } fp@0: fp@0: case ETHTOOL_SWOL: fp@0: { fp@0: struct ethtool_wolinfo wol; fp@0: int rc; fp@0: if (copy_from_user (&wol, useraddr, sizeof (wol))) fp@0: return -EFAULT; fp@0: spin_lock_irq (&np->lock); fp@0: rc = netdev_set_wol (dev, &wol); fp@0: spin_unlock_irq (&np->lock); fp@0: return rc; fp@0: } fp@0: fp@0: /* TODO: we are too slack to do reg dumping for pio, for now */ fp@0: #ifndef CONFIG_8139TOO_PIO fp@0: /* NIC register dump */ fp@0: case ETHTOOL_GREGS: { fp@0: struct ethtool_regs regs; fp@0: unsigned int regs_len = np->regs_len; fp@0: u8 *regbuf = kmalloc(regs_len, GFP_KERNEL); fp@0: int rc; fp@0: fp@0: if (!regbuf) fp@0: return -ENOMEM; fp@0: memset(regbuf, 0, regs_len); fp@0: fp@0: rc = copy_from_user(®s, useraddr, sizeof(regs)); fp@0: if (rc) { fp@0: rc = -EFAULT; fp@0: goto err_out_gregs; fp@0: } fp@0: fp@0: if (regs.len > regs_len) fp@0: regs.len = regs_len; fp@0: if (regs.len < regs_len) { fp@0: rc = -EINVAL; fp@0: goto err_out_gregs; fp@0: } fp@0: fp@0: regs.version = RTL_REGS_VER; fp@0: rc = copy_to_user(useraddr, ®s, sizeof(regs)); fp@0: if (rc) { fp@0: rc = -EFAULT; fp@0: goto err_out_gregs; fp@0: } fp@0: fp@0: useraddr += offsetof(struct ethtool_regs, data); fp@0: fp@0: spin_lock_irq(&np->lock); fp@0: memcpy_fromio(regbuf, np->mmio_addr, regs_len); fp@0: spin_unlock_irq(&np->lock); fp@0: fp@0: if (copy_to_user(useraddr, regbuf, regs_len)) fp@0: rc = -EFAULT; fp@0: fp@0: err_out_gregs: fp@0: kfree(regbuf); fp@0: return rc; fp@0: } fp@0: #endif /* CONFIG_8139TOO_PIO */ fp@0: fp@0: /* get string list(s) */ fp@0: case ETHTOOL_GSTRINGS: { fp@0: struct ethtool_gstrings estr = { ETHTOOL_GSTRINGS }; fp@0: fp@0: if (copy_from_user(&estr, useraddr, sizeof(estr))) fp@0: return -EFAULT; fp@0: if (estr.string_set != ETH_SS_STATS) fp@0: return -EINVAL; fp@0: fp@0: estr.len = RTL_NUM_STATS; fp@0: if (copy_to_user(useraddr, &estr, sizeof(estr))) fp@0: return -EFAULT; fp@0: if (copy_to_user(useraddr + sizeof(estr), fp@0: ðtool_stats_keys, fp@0: sizeof(ethtool_stats_keys))) fp@0: return -EFAULT; fp@0: return 0; fp@0: } fp@0: fp@0: /* get NIC-specific statistics */ fp@0: case ETHTOOL_GSTATS: { fp@0: struct ethtool_stats estats = { ETHTOOL_GSTATS }; fp@0: u64 *tmp_stats; fp@0: const unsigned int sz = sizeof(u64) * RTL_NUM_STATS; fp@0: int i; fp@0: fp@0: estats.n_stats = RTL_NUM_STATS; fp@0: if (copy_to_user(useraddr, &estats, sizeof(estats))) fp@0: return -EFAULT; fp@0: fp@0: tmp_stats = kmalloc(sz, GFP_KERNEL); fp@0: if (!tmp_stats) fp@0: return -ENOMEM; fp@0: memset(tmp_stats, 0, sz); fp@0: fp@0: i = 0; fp@0: tmp_stats[i++] = np->xstats.early_rx; fp@0: tmp_stats[i++] = np->xstats.tx_buf_mapped; fp@0: tmp_stats[i++] = np->xstats.tx_timeouts; fp@0: tmp_stats[i++] = np->xstats.rx_lost_in_ring; fp@0: if (i != RTL_NUM_STATS) fp@0: BUG(); fp@0: fp@0: i = copy_to_user(useraddr + sizeof(estats), tmp_stats, sz); fp@0: kfree(tmp_stats); fp@0: fp@0: if (i) fp@0: return -EFAULT; fp@0: return 0; fp@0: } fp@0: default: fp@0: break; fp@0: } fp@0: fp@0: return -EOPNOTSUPP; fp@0: } fp@0: fp@0: fp@0: static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) fp@0: { fp@0: struct rtl8139_private *np = dev->priv; fp@0: struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data; fp@0: int rc; fp@0: fp@0: if (dev == rtl_ecat_dev.dev || !netif_running(dev)) fp@0: return -EINVAL; fp@0: fp@0: if (cmd == SIOCETHTOOL) fp@0: rc = netdev_ethtool_ioctl(dev, (void *) rq->ifr_data); fp@0: fp@0: else { fp@0: spin_lock_irq(&np->lock); fp@0: rc = generic_mii_ioctl(&np->mii, data, cmd, NULL); fp@0: spin_unlock_irq(&np->lock); fp@0: } fp@0: fp@0: return rc; fp@0: } fp@0: fp@0: fp@0: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: void *ioaddr = tp->mmio_addr; fp@0: unsigned long flags; fp@0: fp@0: EC_DBG("%s: rtl8139 GETSTATS called...",dev->name); fp@0: fp@0: if (dev == rtl_ecat_dev.dev) { fp@0: flags = rt_spin_lock_irqsave (&tp->lock); fp@0: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@0: RTL_W32 (RxMissed, 0); fp@0: rt_spin_unlock_irqrestore (&tp->lock, flags); fp@0: } fp@0: else { fp@0: if (netif_running(dev)) { fp@0: spin_lock_irqsave (&tp->lock, flags); fp@0: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@0: RTL_W32 (RxMissed, 0); fp@0: spin_unlock_irqrestore (&tp->lock, flags); fp@0: } fp@0: } fp@0: fp@0: return &tp->stats; fp@0: } fp@0: fp@0: /* Set or clear the multicast filter for this adaptor. fp@0: This routine is not state sensitive and need not be SMP locked. */ fp@0: fp@0: static void __set_rx_mode (struct net_device *dev) fp@0: { fp@0: struct rtl8139_private *tp = dev->priv; fp@0: void *ioaddr = tp->mmio_addr; fp@0: u32 mc_filter[2]; /* Multicast hash filter */ fp@0: int i, rx_mode; fp@0: u32 tmp; fp@0: fp@0: DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n", fp@0: dev->name, dev->flags, RTL_R32 (RxConfig)); fp@0: fp@0: /* Note: do not reorder, GCC is clever about common statements. */ fp@0: if (dev->flags & IFF_PROMISC) { fp@0: /* Unconditionally log net taps. */ fp@0: EC_DBG (KERN_NOTICE "%s: Promiscuous mode enabled.\n", fp@0: dev->name); fp@0: rx_mode = fp@0: AcceptBroadcast | AcceptMulticast | AcceptMyPhys | fp@0: AcceptAllPhys; fp@0: mc_filter[1] = mc_filter[0] = 0xffffffff; fp@0: } else if ((dev->mc_count > multicast_filter_limit) fp@0: || (dev->flags & IFF_ALLMULTI)) { fp@0: /* Too many to filter perfectly -- accept all multicasts. */ fp@0: rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; fp@0: mc_filter[1] = mc_filter[0] = 0xffffffff; fp@0: } else { fp@0: struct dev_mc_list *mclist; fp@0: rx_mode = AcceptBroadcast | AcceptMyPhys; fp@0: mc_filter[1] = mc_filter[0] = 0; fp@0: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; fp@0: i++, mclist = mclist->next) { fp@0: int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; fp@0: fp@0: mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); fp@0: rx_mode |= AcceptMulticast; fp@0: } fp@0: } fp@0: fp@0: /* We can safely update without stopping the chip. */ fp@0: tmp = rtl8139_rx_config | rx_mode; fp@0: if (tp->rx_config != tmp) { fp@0: RTL_W32_F (RxConfig, tmp); fp@0: tp->rx_config = tmp; fp@0: } fp@0: RTL_W32_F (MAR0 + 0, mc_filter[0]); fp@0: RTL_W32_F (MAR0 + 4, mc_filter[1]); fp@0: } fp@0: fp@0: static void rtl8139_set_rx_mode (struct net_device *dev) fp@0: { fp@0: unsigned long flags; fp@0: struct rtl8139_private *tp = dev->priv; fp@0: fp@0: if(dev == rtl_ecat_dev.dev) { fp@0: flags = rt_spin_lock_irqsave (&tp->lock); fp@0: __set_rx_mode(dev); fp@0: rt_spin_unlock_irqrestore (&tp->lock, flags); fp@0: } fp@0: else { fp@0: spin_lock_irqsave (&tp->lock, flags); fp@0: __set_rx_mode(dev); fp@0: spin_unlock_irqrestore (&tp->lock, flags); fp@0: } fp@0: } fp@0: fp@0: #ifdef CONFIG_PM fp@0: fp@0: static int rtl8139_suspend (struct pci_dev *pdev, u32 state) fp@0: { fp@0: struct net_device *dev = pci_get_drvdata (pdev); fp@0: struct rtl8139_private *tp = dev->priv; fp@0: void *ioaddr = tp->mmio_addr; fp@0: unsigned long flags; fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@0: if (dev == rtl_ecat_dev.dev || !netif_running (dev)) fp@1: return 0; fp@1: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: netif_device_detach (dev); fp@0: fp@0: spin_lock_irqsave (&tp->lock, flags); fp@0: fp@0: /* Disable interrupts, stop Tx and Rx. */ fp@0: RTL_W16 (IntrMask, 0); fp@0: RTL_W8 (ChipCmd, 0); fp@0: fp@0: /* Update the error counts. */ fp@0: tp->stats.rx_missed_errors += RTL_R32 (RxMissed); fp@0: RTL_W32 (RxMissed, 0); fp@0: fp@0: spin_unlock_irqrestore (&tp->lock, flags); fp@0: return 0; fp@0: } fp@0: fp@0: fp@0: static int rtl8139_resume (struct pci_dev *pdev) fp@0: { fp@0: struct net_device *dev = pci_get_drvdata (pdev); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@1: fp@0: if (dev == rtl_ecat_dev.dev || !netif_running (dev)) fp@1: return 0; fp@1: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: netif_device_attach (dev); fp@0: fp@0: rtl8139_hw_start (dev); fp@0: return 0; fp@0: } fp@0: fp@0: #endif /* CONFIG_PM */ fp@0: fp@0: fp@0: static struct pci_driver rtl8139_pci_driver = { fp@0: .name = DRV_NAME, fp@0: .id_table = rtl8139_pci_tbl, fp@0: .probe = rtl8139_init_one, fp@0: .remove = __devexit_p(rtl8139_remove_one), fp@0: #ifdef CONFIG_PM fp@0: .suspend = rtl8139_suspend, fp@0: .resume = rtl8139_resume, fp@0: #endif /* CONFIG_PM */ fp@0: }; fp@0: fp@0: fp@0: static int rtl8139_init_module (void) fp@0: { fp@0: /* when we're a module, we always print a version message, fp@0: * even if no 8139 board is found. fp@0: */ fp@0: #ifdef MODULE fp@0: EC_DBG (KERN_INFO RTL8139_DRIVER_NAME "\n"); fp@0: #endif fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@0: EtherCAT_device_init(&rtl_ecat_dev); fp@0: fp@1: printk(KERN_DEBUG "Driver rtl_ecat_dev has address %X.\n", fp@1: (unsigned) &rtl_ecat_dev); fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: fp@0: return pci_module_init (&rtl8139_pci_driver); fp@0: } fp@0: fp@0: fp@0: static void rtl8139_cleanup_module (void) fp@0: { fp@0: pci_unregister_driver (&rtl8139_pci_driver); fp@0: fp@0: /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ fp@0: fp@1: EtherCAT_device_clear(&rtl_ecat_dev); fp@0: fp@0: /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ fp@0: } fp@0: fp@0: fp@0: module_init(rtl8139_init_module); fp@0: module_exit(rtl8139_cleanup_module);