fp@1515: /* fp@1515: * r8169.c: RealTek 8169/8168/8101 ethernet driver. fp@1515: * fp@1515: * Copyright (c) 2002 ShuChen fp@1515: * Copyright (c) 2003 - 2007 Francois Romieu fp@1515: * Copyright (c) a lot of people too. Please respect their work. fp@1515: * fp@1515: * See MAINTAINERS file for support contact information. fp@1515: * fp@1515: * vim: noexpandtab fp@1515: */ fp@1515: fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: fp@1515: #include fp@1515: #include fp@1515: #include fp@1515: fp@1515: #include "../globals.h" fp@1515: #include "ecdev.h" fp@1515: fp@1515: #define RTL8169_VERSION "2.3LK-NAPI" fp@1515: #define MODULENAME "ec_r8169" fp@1515: #define PFX MODULENAME ": " fp@1515: fp@1515: #ifdef RTL8169_DEBUG fp@1515: #define assert(expr) \ fp@1515: if (!(expr)) { \ fp@1515: printk( "Assertion failed! %s,%s,%s,line=%d\n", \ fp@1515: #expr,__FILE__,__func__,__LINE__); \ fp@1515: } fp@1515: #define dprintk(fmt, args...) \ fp@1515: do { printk(KERN_DEBUG PFX fmt, ## args); } while (0) fp@1515: #else fp@1515: #define assert(expr) do {} while (0) fp@1515: #define dprintk(fmt, args...) do {} while (0) fp@1515: #endif /* RTL8169_DEBUG */ fp@1515: fp@1515: #define R8169_MSG_DEFAULT \ fp@1515: (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN) fp@1515: fp@1515: #define TX_BUFFS_AVAIL(tp) \ fp@1515: (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1) fp@1515: fp@1515: /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ fp@1515: static const int max_interrupt_work = 20; fp@1515: fp@1515: /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). fp@1515: The RTL chips use a 64 element hash table based on the Ethernet CRC. */ fp@1515: static const int multicast_filter_limit = 32; fp@1515: fp@1515: /* MAC address length */ fp@1515: #define MAC_ADDR_LEN 6 fp@1515: fp@1515: #define MAX_READ_REQUEST_SHIFT 12 fp@1515: #define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */ fp@1515: #define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ fp@1515: #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ fp@1515: #define EarlyTxThld 0x3F /* 0x3F means NO early transmit */ fp@1515: #define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */ fp@1515: #define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */ fp@1515: #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ fp@1515: fp@1515: #define R8169_REGS_SIZE 256 fp@1515: #define R8169_NAPI_WEIGHT 64 fp@1515: #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */ fp@1515: #define NUM_RX_DESC 256 /* Number of Rx descriptor registers */ fp@1515: #define RX_BUF_SIZE 1536 /* Rx Buffer size */ fp@1515: #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) fp@1515: #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) fp@1515: fp@1515: #define RTL8169_TX_TIMEOUT (6*HZ) fp@1515: #define RTL8169_PHY_TIMEOUT (10*HZ) fp@1515: fp@1515: #define RTL_EEPROM_SIG cpu_to_le32(0x8129) fp@1515: #define RTL_EEPROM_SIG_MASK cpu_to_le32(0xffff) fp@1515: #define RTL_EEPROM_SIG_ADDR 0x0000 fp@1515: fp@1515: /* write/read MMIO register */ fp@1515: #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) fp@1515: #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) fp@1515: #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) fp@1515: #define RTL_R8(reg) readb (ioaddr + (reg)) fp@1515: #define RTL_R16(reg) readw (ioaddr + (reg)) fp@1515: #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) fp@1515: fp@1515: enum mac_version { fp@1515: RTL_GIGA_MAC_VER_01 = 0x01, // 8169 fp@1515: RTL_GIGA_MAC_VER_02 = 0x02, // 8169S fp@1515: RTL_GIGA_MAC_VER_03 = 0x03, // 8110S fp@1515: RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB fp@1515: RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd fp@1515: RTL_GIGA_MAC_VER_06 = 0x06, // 8110SCe fp@1515: RTL_GIGA_MAC_VER_07 = 0x07, // 8102e fp@1515: RTL_GIGA_MAC_VER_08 = 0x08, // 8102e fp@1515: RTL_GIGA_MAC_VER_09 = 0x09, // 8102e fp@1515: RTL_GIGA_MAC_VER_10 = 0x0a, // 8101e fp@1515: RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb fp@1515: RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be fp@1515: RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb fp@1515: RTL_GIGA_MAC_VER_14 = 0x0e, // 8101 ? fp@1515: RTL_GIGA_MAC_VER_15 = 0x0f, // 8101 ? fp@1515: RTL_GIGA_MAC_VER_16 = 0x11, // 8101Ec fp@1515: RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf fp@1515: RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP fp@1515: RTL_GIGA_MAC_VER_19 = 0x13, // 8168C fp@1515: RTL_GIGA_MAC_VER_20 = 0x14, // 8168C fp@1515: RTL_GIGA_MAC_VER_21 = 0x15, // 8168C fp@1515: RTL_GIGA_MAC_VER_22 = 0x16, // 8168C fp@1515: RTL_GIGA_MAC_VER_23 = 0x17, // 8168CP fp@1515: RTL_GIGA_MAC_VER_24 = 0x18, // 8168CP fp@1515: RTL_GIGA_MAC_VER_25 = 0x19 // 8168D fp@1515: }; fp@1515: fp@1515: #define _R(NAME,MAC,MASK) \ fp@1515: { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK } fp@1515: fp@1515: static const struct { fp@1515: const char *name; fp@1515: u8 mac_version; fp@1515: u32 RxConfigMask; /* Clears the bits supported by this chip */ fp@1515: } rtl_chip_info[] = { fp@1515: _R("RTL8169", RTL_GIGA_MAC_VER_01, 0xff7e1880), // 8169 fp@1515: _R("RTL8169s", RTL_GIGA_MAC_VER_02, 0xff7e1880), // 8169S fp@1515: _R("RTL8110s", RTL_GIGA_MAC_VER_03, 0xff7e1880), // 8110S fp@1515: _R("RTL8169sb/8110sb", RTL_GIGA_MAC_VER_04, 0xff7e1880), // 8169SB fp@1515: _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_05, 0xff7e1880), // 8110SCd fp@1515: _R("RTL8169sc/8110sc", RTL_GIGA_MAC_VER_06, 0xff7e1880), // 8110SCe fp@1515: _R("RTL8102e", RTL_GIGA_MAC_VER_07, 0xff7e1880), // PCI-E fp@1515: _R("RTL8102e", RTL_GIGA_MAC_VER_08, 0xff7e1880), // PCI-E fp@1515: _R("RTL8102e", RTL_GIGA_MAC_VER_09, 0xff7e1880), // PCI-E fp@1515: _R("RTL8101e", RTL_GIGA_MAC_VER_10, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E fp@1515: _R("RTL8101e", RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139 fp@1515: _R("RTL8100e", RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139 fp@1515: _R("RTL8100e", RTL_GIGA_MAC_VER_15, 0xff7e1880), // PCI-E 8139 fp@1515: _R("RTL8168b/8111b", RTL_GIGA_MAC_VER_17, 0xff7e1880), // PCI-E fp@1515: _R("RTL8101e", RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_21, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_23, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_24, 0xff7e1880), // PCI-E fp@1515: _R("RTL8168d/8111d", RTL_GIGA_MAC_VER_25, 0xff7e1880) // PCI-E fp@1515: }; fp@1515: #undef _R fp@1515: fp@1515: enum cfg_version { fp@1515: RTL_CFG_0 = 0x00, fp@1515: RTL_CFG_1, fp@1515: RTL_CFG_2 fp@1515: }; fp@1515: fp@1515: static void rtl_hw_start_8169(struct net_device *); fp@1515: static void rtl_hw_start_8168(struct net_device *); fp@1515: static void rtl_hw_start_8101(struct net_device *); fp@1515: fp@1515: static struct pci_device_id rtl8169_pci_tbl[] = { fp@1515: { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 }, fp@1515: { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 }, fp@1515: { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8167), 0, 0, RTL_CFG_0 }, fp@1515: { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), 0, 0, RTL_CFG_1 }, fp@1515: { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), 0, 0, RTL_CFG_0 }, fp@1515: { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), 0, 0, RTL_CFG_0 }, fp@1515: { PCI_DEVICE(PCI_VENDOR_ID_AT, 0xc107), 0, 0, RTL_CFG_0 }, fp@1515: { PCI_DEVICE(0x16ec, 0x0116), 0, 0, RTL_CFG_0 }, fp@1515: { PCI_VENDOR_ID_LINKSYS, 0x1032, fp@1515: PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 }, fp@1515: { 0x0001, 0x8168, fp@1515: PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 }, fp@1515: {0,}, fp@1515: }; fp@1515: fp@1515: /* prevent driver from being loaded automatically */ fp@1515: //MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl); fp@1515: fp@1515: static int rx_copybreak = 200; fp@1515: static int use_dac; fp@1515: static struct { fp@1515: u32 msg_enable; fp@1515: } debug = { -1 }; fp@1515: fp@1515: enum rtl_registers { fp@1515: MAC0 = 0, /* Ethernet hardware address. */ fp@1515: MAC4 = 4, fp@1515: MAR0 = 8, /* Multicast filter. */ fp@1515: CounterAddrLow = 0x10, fp@1515: CounterAddrHigh = 0x14, fp@1515: TxDescStartAddrLow = 0x20, fp@1515: TxDescStartAddrHigh = 0x24, fp@1515: TxHDescStartAddrLow = 0x28, fp@1515: TxHDescStartAddrHigh = 0x2c, fp@1515: FLASH = 0x30, fp@1515: ERSR = 0x36, fp@1515: ChipCmd = 0x37, fp@1515: TxPoll = 0x38, fp@1515: IntrMask = 0x3c, fp@1515: IntrStatus = 0x3e, fp@1515: TxConfig = 0x40, fp@1515: RxConfig = 0x44, fp@1515: RxMissed = 0x4c, fp@1515: Cfg9346 = 0x50, fp@1515: Config0 = 0x51, fp@1515: Config1 = 0x52, fp@1515: Config2 = 0x53, fp@1515: Config3 = 0x54, fp@1515: Config4 = 0x55, fp@1515: Config5 = 0x56, fp@1515: MultiIntr = 0x5c, fp@1515: PHYAR = 0x60, fp@1515: PHYstatus = 0x6c, fp@1515: RxMaxSize = 0xda, fp@1515: CPlusCmd = 0xe0, fp@1515: IntrMitigate = 0xe2, fp@1515: RxDescAddrLow = 0xe4, fp@1515: RxDescAddrHigh = 0xe8, fp@1515: EarlyTxThres = 0xec, fp@1515: FuncEvent = 0xf0, fp@1515: FuncEventMask = 0xf4, fp@1515: FuncPresetState = 0xf8, fp@1515: FuncForceEvent = 0xfc, fp@1515: }; fp@1515: fp@1515: enum rtl8110_registers { fp@1515: TBICSR = 0x64, fp@1515: TBI_ANAR = 0x68, fp@1515: TBI_LPAR = 0x6a, fp@1515: }; fp@1515: fp@1515: enum rtl8168_8101_registers { fp@1515: CSIDR = 0x64, fp@1515: CSIAR = 0x68, fp@1515: #define CSIAR_FLAG 0x80000000 fp@1515: #define CSIAR_WRITE_CMD 0x80000000 fp@1515: #define CSIAR_BYTE_ENABLE 0x0f fp@1515: #define CSIAR_BYTE_ENABLE_SHIFT 12 fp@1515: #define CSIAR_ADDR_MASK 0x0fff fp@1515: fp@1515: EPHYAR = 0x80, fp@1515: #define EPHYAR_FLAG 0x80000000 fp@1515: #define EPHYAR_WRITE_CMD 0x80000000 fp@1515: #define EPHYAR_REG_MASK 0x1f fp@1515: #define EPHYAR_REG_SHIFT 16 fp@1515: #define EPHYAR_DATA_MASK 0xffff fp@1515: DBG_REG = 0xd1, fp@1515: #define FIX_NAK_1 (1 << 4) fp@1515: #define FIX_NAK_2 (1 << 3) fp@1515: }; fp@1515: fp@1515: enum rtl_register_content { fp@1515: /* InterruptStatusBits */ fp@1515: SYSErr = 0x8000, fp@1515: PCSTimeout = 0x4000, fp@1515: SWInt = 0x0100, fp@1515: TxDescUnavail = 0x0080, fp@1515: RxFIFOOver = 0x0040, fp@1515: LinkChg = 0x0020, fp@1515: RxOverflow = 0x0010, fp@1515: TxErr = 0x0008, fp@1515: TxOK = 0x0004, fp@1515: RxErr = 0x0002, fp@1515: RxOK = 0x0001, fp@1515: fp@1515: /* RxStatusDesc */ fp@1515: RxFOVF = (1 << 23), fp@1515: RxRWT = (1 << 22), fp@1515: RxRES = (1 << 21), fp@1515: RxRUNT = (1 << 20), fp@1515: RxCRC = (1 << 19), fp@1515: fp@1515: /* ChipCmdBits */ fp@1515: CmdReset = 0x10, fp@1515: CmdRxEnb = 0x08, fp@1515: CmdTxEnb = 0x04, fp@1515: RxBufEmpty = 0x01, fp@1515: fp@1515: /* TXPoll register p.5 */ fp@1515: HPQ = 0x80, /* Poll cmd on the high prio queue */ fp@1515: NPQ = 0x40, /* Poll cmd on the low prio queue */ fp@1515: FSWInt = 0x01, /* Forced software interrupt */ fp@1515: fp@1515: /* Cfg9346Bits */ fp@1515: Cfg9346_Lock = 0x00, fp@1515: Cfg9346_Unlock = 0xc0, fp@1515: fp@1515: /* rx_mode_bits */ fp@1515: AcceptErr = 0x20, fp@1515: AcceptRunt = 0x10, fp@1515: AcceptBroadcast = 0x08, fp@1515: AcceptMulticast = 0x04, fp@1515: AcceptMyPhys = 0x02, fp@1515: AcceptAllPhys = 0x01, fp@1515: fp@1515: /* RxConfigBits */ fp@1515: RxCfgFIFOShift = 13, fp@1515: RxCfgDMAShift = 8, fp@1515: fp@1515: /* TxConfigBits */ fp@1515: TxInterFrameGapShift = 24, fp@1515: TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ fp@1515: fp@1515: /* Config1 register p.24 */ fp@1515: LEDS1 = (1 << 7), fp@1515: LEDS0 = (1 << 6), fp@1515: MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */ fp@1515: Speed_down = (1 << 4), fp@1515: MEMMAP = (1 << 3), fp@1515: IOMAP = (1 << 2), fp@1515: VPD = (1 << 1), fp@1515: PMEnable = (1 << 0), /* Power Management Enable */ fp@1515: fp@1515: /* Config2 register p. 25 */ fp@1515: PCI_Clock_66MHz = 0x01, fp@1515: PCI_Clock_33MHz = 0x00, fp@1515: fp@1515: /* Config3 register p.25 */ fp@1515: MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */ fp@1515: LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */ fp@1515: Beacon_en = (1 << 0), /* 8168 only. Reserved in the 8168b */ fp@1515: fp@1515: /* Config5 register p.27 */ fp@1515: BWF = (1 << 6), /* Accept Broadcast wakeup frame */ fp@1515: MWF = (1 << 5), /* Accept Multicast wakeup frame */ fp@1515: UWF = (1 << 4), /* Accept Unicast wakeup frame */ fp@1515: LanWake = (1 << 1), /* LanWake enable/disable */ fp@1515: PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */ fp@1515: fp@1515: /* TBICSR p.28 */ fp@1515: TBIReset = 0x80000000, fp@1515: TBILoopback = 0x40000000, fp@1515: TBINwEnable = 0x20000000, fp@1515: TBINwRestart = 0x10000000, fp@1515: TBILinkOk = 0x02000000, fp@1515: TBINwComplete = 0x01000000, fp@1515: fp@1515: /* CPlusCmd p.31 */ fp@1515: EnableBist = (1 << 15), // 8168 8101 fp@1515: Mac_dbgo_oe = (1 << 14), // 8168 8101 fp@1515: Normal_mode = (1 << 13), // unused fp@1515: Force_half_dup = (1 << 12), // 8168 8101 fp@1515: Force_rxflow_en = (1 << 11), // 8168 8101 fp@1515: Force_txflow_en = (1 << 10), // 8168 8101 fp@1515: Cxpl_dbg_sel = (1 << 9), // 8168 8101 fp@1515: ASF = (1 << 8), // 8168 8101 fp@1515: PktCntrDisable = (1 << 7), // 8168 8101 fp@1515: Mac_dbgo_sel = 0x001c, // 8168 fp@1515: RxVlan = (1 << 6), fp@1515: RxChkSum = (1 << 5), fp@1515: PCIDAC = (1 << 4), fp@1515: PCIMulRW = (1 << 3), fp@1515: INTT_0 = 0x0000, // 8168 fp@1515: INTT_1 = 0x0001, // 8168 fp@1515: INTT_2 = 0x0002, // 8168 fp@1515: INTT_3 = 0x0003, // 8168 fp@1515: fp@1515: /* rtl8169_PHYstatus */ fp@1515: TBI_Enable = 0x80, fp@1515: TxFlowCtrl = 0x40, fp@1515: RxFlowCtrl = 0x20, fp@1515: _1000bpsF = 0x10, fp@1515: _100bps = 0x08, fp@1515: _10bps = 0x04, fp@1515: LinkStatus = 0x02, fp@1515: FullDup = 0x01, fp@1515: fp@1515: /* _TBICSRBit */ fp@1515: TBILinkOK = 0x02000000, fp@1515: fp@1515: /* DumpCounterCommand */ fp@1515: CounterDump = 0x8, fp@1515: }; fp@1515: fp@1515: enum desc_status_bit { fp@1515: DescOwn = (1 << 31), /* Descriptor is owned by NIC */ fp@1515: RingEnd = (1 << 30), /* End of descriptor ring */ fp@1515: FirstFrag = (1 << 29), /* First segment of a packet */ fp@1515: LastFrag = (1 << 28), /* Final segment of a packet */ fp@1515: fp@1515: /* Tx private */ fp@1515: LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */ fp@1515: MSSShift = 16, /* MSS value position */ fp@1515: MSSMask = 0xfff, /* MSS value + LargeSend bit: 12 bits */ fp@1515: IPCS = (1 << 18), /* Calculate IP checksum */ fp@1515: UDPCS = (1 << 17), /* Calculate UDP/IP checksum */ fp@1515: TCPCS = (1 << 16), /* Calculate TCP/IP checksum */ fp@1515: TxVlanTag = (1 << 17), /* Add VLAN tag */ fp@1515: fp@1515: /* Rx private */ fp@1515: PID1 = (1 << 18), /* Protocol ID bit 1/2 */ fp@1515: PID0 = (1 << 17), /* Protocol ID bit 2/2 */ fp@1515: fp@1515: #define RxProtoUDP (PID1) fp@1515: #define RxProtoTCP (PID0) fp@1515: #define RxProtoIP (PID1 | PID0) fp@1515: #define RxProtoMask RxProtoIP fp@1515: fp@1515: IPFail = (1 << 16), /* IP checksum failed */ fp@1515: UDPFail = (1 << 15), /* UDP/IP checksum failed */ fp@1515: TCPFail = (1 << 14), /* TCP/IP checksum failed */ fp@1515: RxVlanTag = (1 << 16), /* VLAN tag available */ fp@1515: }; fp@1515: fp@1515: #define RsvdMask 0x3fffc000 fp@1515: fp@1515: struct TxDesc { fp@1515: __le32 opts1; fp@1515: __le32 opts2; fp@1515: __le64 addr; fp@1515: }; fp@1515: fp@1515: struct RxDesc { fp@1515: __le32 opts1; fp@1515: __le32 opts2; fp@1515: __le64 addr; fp@1515: }; fp@1515: fp@1515: struct ring_info { fp@1515: struct sk_buff *skb; fp@1515: u32 len; fp@1515: u8 __pad[sizeof(void *) - sizeof(u32)]; fp@1515: }; fp@1515: fp@1515: enum features { fp@1515: RTL_FEATURE_WOL = (1 << 0), fp@1515: RTL_FEATURE_MSI = (1 << 1), fp@1515: RTL_FEATURE_GMII = (1 << 2), fp@1515: }; fp@1515: fp@1515: struct rtl8169_counters { fp@1515: __le64 tx_packets; fp@1515: __le64 rx_packets; fp@1515: __le64 tx_errors; fp@1515: __le32 rx_errors; fp@1515: __le16 rx_missed; fp@1515: __le16 align_errors; fp@1515: __le32 tx_one_collision; fp@1515: __le32 tx_multi_collision; fp@1515: __le64 rx_unicast; fp@1515: __le64 rx_broadcast; fp@1515: __le32 rx_multicast; fp@1515: __le16 tx_aborted; fp@1515: __le16 tx_underun; fp@1515: }; fp@1515: fp@1515: struct rtl8169_private { fp@1515: void __iomem *mmio_addr; /* memory map physical address */ fp@1515: struct pci_dev *pci_dev; /* Index of PCI device */ fp@1515: struct net_device *dev; fp@1515: struct napi_struct napi; fp@1515: spinlock_t lock; /* spin lock flag */ fp@1515: u32 msg_enable; fp@1515: int chipset; fp@1515: int mac_version; fp@1515: u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */ fp@1515: u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ fp@1515: u32 dirty_rx; fp@1515: u32 dirty_tx; fp@1515: struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */ fp@1515: struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */ fp@1515: dma_addr_t TxPhyAddr; fp@1515: dma_addr_t RxPhyAddr; fp@1515: struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */ fp@1515: struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */ fp@1515: unsigned align; fp@1515: unsigned rx_buf_sz; fp@1515: struct timer_list timer; fp@1515: u16 cp_cmd; fp@1515: u16 intr_event; fp@1515: u16 napi_event; fp@1515: u16 intr_mask; fp@1515: int phy_auto_nego_reg; fp@1515: int phy_1000_ctrl_reg; fp@1515: #ifdef CONFIG_R8169_VLAN fp@1515: struct vlan_group *vlgrp; fp@1515: #endif fp@1515: int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); fp@1515: int (*get_settings)(struct net_device *, struct ethtool_cmd *); fp@1515: void (*phy_reset_enable)(void __iomem *); fp@1515: void (*hw_start)(struct net_device *); fp@1515: unsigned int (*phy_reset_pending)(void __iomem *); fp@1515: unsigned int (*link_ok)(void __iomem *); fp@1515: int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd); fp@1515: int pcie_cap; fp@1515: struct delayed_work task; fp@1515: unsigned features; fp@1515: fp@1515: struct mii_if_info mii; fp@1515: struct rtl8169_counters counters; fp@1515: fp@1515: ec_device_t *ecdev; fp@1515: unsigned long ec_watchdog_jiffies; fp@1515: }; fp@1515: fp@1515: MODULE_AUTHOR("Florian Pose "); fp@1515: MODULE_DESCRIPTION("EtherCAT-capable RealTek RTL-8169 Gigabit Ethernet driver"); fp@1515: module_param(rx_copybreak, int, 0); fp@1515: MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames"); fp@1515: module_param(use_dac, int, 0); fp@1515: MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot."); fp@1515: module_param_named(debug, debug.msg_enable, int, 0); fp@1515: MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)"); fp@1515: MODULE_LICENSE("GPL"); fp@1515: MODULE_VERSION(EC_MASTER_VERSION); fp@1515: fp@1515: static int rtl8169_open(struct net_device *dev); fp@1515: static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev); fp@1515: static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance); fp@1515: static int rtl8169_init_ring(struct net_device *dev); fp@1515: static void rtl_hw_start(struct net_device *dev); fp@1515: static int rtl8169_close(struct net_device *dev); fp@1515: static void rtl_set_rx_mode(struct net_device *dev); fp@1515: static void rtl8169_tx_timeout(struct net_device *dev); fp@1515: static struct net_device_stats *rtl8169_get_stats(struct net_device *dev); fp@1515: static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *, fp@1515: void __iomem *, u32 budget); fp@1515: static int rtl8169_change_mtu(struct net_device *dev, int new_mtu); fp@1515: static void rtl8169_down(struct net_device *dev); fp@1515: static void rtl8169_rx_clear(struct rtl8169_private *tp); fp@1515: static void ec_poll(struct net_device *dev); fp@1515: static int rtl8169_poll(struct napi_struct *napi, int budget); fp@1515: fp@1515: static const unsigned int rtl8169_rx_config = fp@1515: (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift); fp@1515: fp@1515: static void mdio_write(void __iomem *ioaddr, int reg_addr, int value) fp@1515: { fp@1515: int i; fp@1515: fp@1515: RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0x1f) << 16 | (value & 0xffff)); fp@1515: fp@1515: for (i = 20; i > 0; i--) { fp@1515: /* fp@1515: * Check if the RTL8169 has completed writing to the specified fp@1515: * MII register. fp@1515: */ fp@1515: if (!(RTL_R32(PHYAR) & 0x80000000)) fp@1515: break; fp@1515: udelay(25); fp@1515: } fp@1515: } fp@1515: fp@1515: static int mdio_read(void __iomem *ioaddr, int reg_addr) fp@1515: { fp@1515: int i, value = -1; fp@1515: fp@1515: RTL_W32(PHYAR, 0x0 | (reg_addr & 0x1f) << 16); fp@1515: fp@1515: for (i = 20; i > 0; i--) { fp@1515: /* fp@1515: * Check if the RTL8169 has completed retrieving data from fp@1515: * the specified MII register. fp@1515: */ fp@1515: if (RTL_R32(PHYAR) & 0x80000000) { fp@1515: value = RTL_R32(PHYAR) & 0xffff; fp@1515: break; fp@1515: } fp@1515: udelay(25); fp@1515: } fp@1515: return value; fp@1515: } fp@1515: fp@1515: static void mdio_patch(void __iomem *ioaddr, int reg_addr, int value) fp@1515: { fp@1515: mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value); fp@1515: } fp@1515: fp@1515: static void rtl_mdio_write(struct net_device *dev, int phy_id, int location, fp@1515: int val) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: fp@1515: mdio_write(ioaddr, location, val); fp@1515: } fp@1515: fp@1515: static int rtl_mdio_read(struct net_device *dev, int phy_id, int location) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: fp@1515: return mdio_read(ioaddr, location); fp@1515: } fp@1515: fp@1515: static void rtl_ephy_write(void __iomem *ioaddr, int reg_addr, int value) fp@1515: { fp@1515: unsigned int i; fp@1515: fp@1515: RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) | fp@1515: (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); fp@1515: fp@1515: for (i = 0; i < 100; i++) { fp@1515: if (!(RTL_R32(EPHYAR) & EPHYAR_FLAG)) fp@1515: break; fp@1515: udelay(10); fp@1515: } fp@1515: } fp@1515: fp@1515: static u16 rtl_ephy_read(void __iomem *ioaddr, int reg_addr) fp@1515: { fp@1515: u16 value = 0xffff; fp@1515: unsigned int i; fp@1515: fp@1515: RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT); fp@1515: fp@1515: for (i = 0; i < 100; i++) { fp@1515: if (RTL_R32(EPHYAR) & EPHYAR_FLAG) { fp@1515: value = RTL_R32(EPHYAR) & EPHYAR_DATA_MASK; fp@1515: break; fp@1515: } fp@1515: udelay(10); fp@1515: } fp@1515: fp@1515: return value; fp@1515: } fp@1515: fp@1515: static void rtl_csi_write(void __iomem *ioaddr, int addr, int value) fp@1515: { fp@1515: unsigned int i; fp@1515: fp@1515: RTL_W32(CSIDR, value); fp@1515: RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) | fp@1515: CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT); fp@1515: fp@1515: for (i = 0; i < 100; i++) { fp@1515: if (!(RTL_R32(CSIAR) & CSIAR_FLAG)) fp@1515: break; fp@1515: udelay(10); fp@1515: } fp@1515: } fp@1515: fp@1515: static u32 rtl_csi_read(void __iomem *ioaddr, int addr) fp@1515: { fp@1515: u32 value = ~0x00; fp@1515: unsigned int i; fp@1515: fp@1515: RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) | fp@1515: CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT); fp@1515: fp@1515: for (i = 0; i < 100; i++) { fp@1515: if (RTL_R32(CSIAR) & CSIAR_FLAG) { fp@1515: value = RTL_R32(CSIDR); fp@1515: break; fp@1515: } fp@1515: udelay(10); fp@1515: } fp@1515: fp@1515: return value; fp@1515: } fp@1515: fp@1515: static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr) fp@1515: { fp@1515: RTL_W16(IntrMask, 0x0000); fp@1515: fp@1515: RTL_W16(IntrStatus, 0xffff); fp@1515: } fp@1515: fp@1515: static void rtl8169_asic_down(void __iomem *ioaddr) fp@1515: { fp@1515: RTL_W8(ChipCmd, 0x00); fp@1515: rtl8169_irq_mask_and_ack(ioaddr); fp@1515: RTL_R16(CPlusCmd); fp@1515: } fp@1515: fp@1515: static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr) fp@1515: { fp@1515: return RTL_R32(TBICSR) & TBIReset; fp@1515: } fp@1515: fp@1515: static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr) fp@1515: { fp@1515: return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET; fp@1515: } fp@1515: fp@1515: static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr) fp@1515: { fp@1515: return RTL_R32(TBICSR) & TBILinkOk; fp@1515: } fp@1515: fp@1515: static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr) fp@1515: { fp@1515: return RTL_R8(PHYstatus) & LinkStatus; fp@1515: } fp@1515: fp@1515: static void rtl8169_tbi_reset_enable(void __iomem *ioaddr) fp@1515: { fp@1515: RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset); fp@1515: } fp@1515: fp@1515: static void rtl8169_xmii_reset_enable(void __iomem *ioaddr) fp@1515: { fp@1515: unsigned int val; fp@1515: fp@1515: val = mdio_read(ioaddr, MII_BMCR) | BMCR_RESET; fp@1515: mdio_write(ioaddr, MII_BMCR, val & 0xffff); fp@1515: } fp@1515: fp@1515: static void rtl8169_check_link_status(struct net_device *dev, fp@1515: struct rtl8169_private *tp, fp@1515: void __iomem *ioaddr) fp@1515: { fp@1515: unsigned long flags; fp@1515: fp@1515: if (tp->ecdev) { fp@1515: ecdev_set_link(tp->ecdev, tp->link_ok(ioaddr) ? 1 : 0); fp@1515: } else { fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: if (tp->link_ok(ioaddr)) { fp@1515: netif_carrier_on(dev); fp@1515: if (netif_msg_ifup(tp)) fp@1515: printk(KERN_INFO PFX "%s: link up\n", dev->name); fp@1515: } else { fp@1515: if (netif_msg_ifdown(tp)) fp@1515: printk(KERN_INFO PFX "%s: link down\n", dev->name); fp@1515: netif_carrier_off(dev); fp@1515: } fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: u8 options; fp@1515: fp@1515: wol->wolopts = 0; fp@1515: fp@1515: #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST) fp@1515: wol->supported = WAKE_ANY; fp@1515: fp@1515: spin_lock_irq(&tp->lock); fp@1515: fp@1515: options = RTL_R8(Config1); fp@1515: if (!(options & PMEnable)) fp@1515: goto out_unlock; fp@1515: fp@1515: options = RTL_R8(Config3); fp@1515: if (options & LinkUp) fp@1515: wol->wolopts |= WAKE_PHY; fp@1515: if (options & MagicPacket) fp@1515: wol->wolopts |= WAKE_MAGIC; fp@1515: fp@1515: options = RTL_R8(Config5); fp@1515: if (options & UWF) fp@1515: wol->wolopts |= WAKE_UCAST; fp@1515: if (options & BWF) fp@1515: wol->wolopts |= WAKE_BCAST; fp@1515: if (options & MWF) fp@1515: wol->wolopts |= WAKE_MCAST; fp@1515: fp@1515: out_unlock: fp@1515: spin_unlock_irq(&tp->lock); fp@1515: } fp@1515: fp@1515: static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned int i; fp@1515: static struct { fp@1515: u32 opt; fp@1515: u16 reg; fp@1515: u8 mask; fp@1515: } cfg[] = { fp@1515: { WAKE_ANY, Config1, PMEnable }, fp@1515: { WAKE_PHY, Config3, LinkUp }, fp@1515: { WAKE_MAGIC, Config3, MagicPacket }, fp@1515: { WAKE_UCAST, Config5, UWF }, fp@1515: { WAKE_BCAST, Config5, BWF }, fp@1515: { WAKE_MCAST, Config5, MWF }, fp@1515: { WAKE_ANY, Config5, LanWake } fp@1515: }; fp@1515: fp@1515: spin_lock_irq(&tp->lock); fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Unlock); fp@1515: fp@1515: for (i = 0; i < ARRAY_SIZE(cfg); i++) { fp@1515: u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask; fp@1515: if (wol->wolopts & cfg[i].opt) fp@1515: options |= cfg[i].mask; fp@1515: RTL_W8(cfg[i].reg, options); fp@1515: } fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Lock); fp@1515: fp@1515: if (wol->wolopts) fp@1515: tp->features |= RTL_FEATURE_WOL; fp@1515: else fp@1515: tp->features &= ~RTL_FEATURE_WOL; fp@1515: device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts); fp@1515: fp@1515: spin_unlock_irq(&tp->lock); fp@1515: fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static void rtl8169_get_drvinfo(struct net_device *dev, fp@1515: struct ethtool_drvinfo *info) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: strcpy(info->driver, MODULENAME); fp@1515: strcpy(info->version, RTL8169_VERSION); fp@1515: strcpy(info->bus_info, pci_name(tp->pci_dev)); fp@1515: } fp@1515: fp@1515: static int rtl8169_get_regs_len(struct net_device *dev) fp@1515: { fp@1515: return R8169_REGS_SIZE; fp@1515: } fp@1515: fp@1515: static int rtl8169_set_speed_tbi(struct net_device *dev, fp@1515: u8 autoneg, u16 speed, u8 duplex) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: int ret = 0; fp@1515: u32 reg; fp@1515: fp@1515: reg = RTL_R32(TBICSR); fp@1515: if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) && fp@1515: (duplex == DUPLEX_FULL)) { fp@1515: RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart)); fp@1515: } else if (autoneg == AUTONEG_ENABLE) fp@1515: RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart); fp@1515: else { fp@1515: if (netif_msg_link(tp)) { fp@1515: printk(KERN_WARNING "%s: " fp@1515: "incorrect speed setting refused in TBI mode\n", fp@1515: dev->name); fp@1515: } fp@1515: ret = -EOPNOTSUPP; fp@1515: } fp@1515: fp@1515: return ret; fp@1515: } fp@1515: fp@1515: static int rtl8169_set_speed_xmii(struct net_device *dev, fp@1515: u8 autoneg, u16 speed, u8 duplex) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: int auto_nego, giga_ctrl; fp@1515: fp@1515: auto_nego = mdio_read(ioaddr, MII_ADVERTISE); fp@1515: auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | fp@1515: ADVERTISE_100HALF | ADVERTISE_100FULL); fp@1515: giga_ctrl = mdio_read(ioaddr, MII_CTRL1000); fp@1515: giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); fp@1515: fp@1515: if (autoneg == AUTONEG_ENABLE) { fp@1515: auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | fp@1515: ADVERTISE_100HALF | ADVERTISE_100FULL); fp@1515: giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; fp@1515: } else { fp@1515: if (speed == SPEED_10) fp@1515: auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL; fp@1515: else if (speed == SPEED_100) fp@1515: auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL; fp@1515: else if (speed == SPEED_1000) fp@1515: giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; fp@1515: fp@1515: if (duplex == DUPLEX_HALF) fp@1515: auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL); fp@1515: fp@1515: if (duplex == DUPLEX_FULL) fp@1515: auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF); fp@1515: fp@1515: /* This tweak comes straight from Realtek's driver. */ fp@1515: if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) && fp@1515: ((tp->mac_version == RTL_GIGA_MAC_VER_13) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_16))) { fp@1515: auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA; fp@1515: } fp@1515: } fp@1515: fp@1515: /* The 8100e/8101e/8102e do Fast Ethernet only. */ fp@1515: if ((tp->mac_version == RTL_GIGA_MAC_VER_07) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_08) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_09) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_10) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_13) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_14) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_15) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_16)) { fp@1515: if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) && fp@1515: netif_msg_link(tp)) { fp@1515: printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", fp@1515: dev->name); fp@1515: } fp@1515: giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); fp@1515: } fp@1515: fp@1515: auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; fp@1515: fp@1515: if ((tp->mac_version == RTL_GIGA_MAC_VER_11) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_12) || fp@1515: (tp->mac_version >= RTL_GIGA_MAC_VER_17)) { fp@1515: /* fp@1515: * Wake up the PHY. fp@1515: * Vendor specific (0x1f) and reserved (0x0e) MII registers. fp@1515: */ fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); fp@1515: mdio_write(ioaddr, 0x0e, 0x0000); fp@1515: } fp@1515: fp@1515: tp->phy_auto_nego_reg = auto_nego; fp@1515: tp->phy_1000_ctrl_reg = giga_ctrl; fp@1515: fp@1515: mdio_write(ioaddr, MII_ADVERTISE, auto_nego); fp@1515: mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); fp@1515: mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static int rtl8169_set_speed(struct net_device *dev, fp@1515: u8 autoneg, u16 speed, u8 duplex) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: int ret; fp@1515: fp@1515: ret = tp->set_speed(dev, autoneg, speed, duplex); fp@1515: fp@1515: if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)) fp@1515: mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT); fp@1515: fp@1515: return ret; fp@1515: } fp@1515: fp@1515: static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: unsigned long flags; fp@1515: int ret; fp@1515: fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex); fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: fp@1515: return ret; fp@1515: } fp@1515: fp@1515: static u32 rtl8169_get_rx_csum(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: return tp->cp_cmd & RxChkSum; fp@1515: } fp@1515: fp@1515: static int rtl8169_set_rx_csum(struct net_device *dev, u32 data) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned long flags; fp@1515: fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: fp@1515: if (data) fp@1515: tp->cp_cmd |= RxChkSum; fp@1515: else fp@1515: tp->cp_cmd &= ~RxChkSum; fp@1515: fp@1515: RTL_W16(CPlusCmd, tp->cp_cmd); fp@1515: RTL_R16(CPlusCmd); fp@1515: fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: fp@1515: return 0; fp@1515: } fp@1515: fp@1515: #ifdef CONFIG_R8169_VLAN fp@1515: fp@1515: static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp, fp@1515: struct sk_buff *skb) fp@1515: { fp@1515: return (tp->vlgrp && vlan_tx_tag_present(skb)) ? fp@1515: TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00; fp@1515: } fp@1515: fp@1515: static void rtl8169_vlan_rx_register(struct net_device *dev, fp@1515: struct vlan_group *grp) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned long flags; fp@1515: fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: tp->vlgrp = grp; fp@1515: if (tp->vlgrp) fp@1515: tp->cp_cmd |= RxVlan; fp@1515: else fp@1515: tp->cp_cmd &= ~RxVlan; fp@1515: RTL_W16(CPlusCmd, tp->cp_cmd); fp@1515: RTL_R16(CPlusCmd); fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: } fp@1515: fp@1515: static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc, fp@1515: struct sk_buff *skb) fp@1515: { fp@1515: u32 opts2 = le32_to_cpu(desc->opts2); fp@1515: struct vlan_group *vlgrp = tp->vlgrp; fp@1515: int ret; fp@1515: fp@1515: if (vlgrp && (opts2 & RxVlanTag)) { fp@1515: vlan_hwaccel_receive_skb(skb, vlgrp, swab16(opts2 & 0xffff)); fp@1515: ret = 0; fp@1515: } else fp@1515: ret = -1; fp@1515: desc->opts2 = 0; fp@1515: return ret; fp@1515: } fp@1515: fp@1515: #else /* !CONFIG_R8169_VLAN */ fp@1515: fp@1515: static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp, fp@1515: struct sk_buff *skb) fp@1515: { fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc, fp@1515: struct sk_buff *skb) fp@1515: { fp@1515: return -1; fp@1515: } fp@1515: fp@1515: #endif fp@1515: fp@1515: static int rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: u32 status; fp@1515: fp@1515: cmd->supported = fp@1515: SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE; fp@1515: cmd->port = PORT_FIBRE; fp@1515: cmd->transceiver = XCVR_INTERNAL; fp@1515: fp@1515: status = RTL_R32(TBICSR); fp@1515: cmd->advertising = (status & TBINwEnable) ? ADVERTISED_Autoneg : 0; fp@1515: cmd->autoneg = !!(status & TBINwEnable); fp@1515: fp@1515: cmd->speed = SPEED_1000; fp@1515: cmd->duplex = DUPLEX_FULL; /* Always set */ fp@1515: fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static int rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: return mii_ethtool_gset(&tp->mii, cmd); fp@1515: } fp@1515: fp@1515: static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: unsigned long flags; fp@1515: int rc; fp@1515: fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: fp@1515: rc = tp->get_settings(dev, cmd); fp@1515: fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: return rc; fp@1515: } fp@1515: fp@1515: static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs, fp@1515: void *p) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: unsigned long flags; fp@1515: fp@1515: if (regs->len > R8169_REGS_SIZE) fp@1515: regs->len = R8169_REGS_SIZE; fp@1515: fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: memcpy_fromio(p, tp->mmio_addr, regs->len); fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: } fp@1515: fp@1515: static u32 rtl8169_get_msglevel(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: return tp->msg_enable; fp@1515: } fp@1515: fp@1515: static void rtl8169_set_msglevel(struct net_device *dev, u32 value) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: tp->msg_enable = value; fp@1515: } fp@1515: fp@1515: static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = { fp@1515: "tx_packets", fp@1515: "rx_packets", fp@1515: "tx_errors", fp@1515: "rx_errors", fp@1515: "rx_missed", fp@1515: "align_errors", fp@1515: "tx_single_collisions", fp@1515: "tx_multi_collisions", fp@1515: "unicast", fp@1515: "broadcast", fp@1515: "multicast", fp@1515: "tx_aborted", fp@1515: "tx_underrun", fp@1515: }; fp@1515: fp@1515: static int rtl8169_get_sset_count(struct net_device *dev, int sset) fp@1515: { fp@1515: switch (sset) { fp@1515: case ETH_SS_STATS: fp@1515: return ARRAY_SIZE(rtl8169_gstrings); fp@1515: default: fp@1515: return -EOPNOTSUPP; fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl8169_update_counters(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: struct rtl8169_counters *counters; fp@1515: dma_addr_t paddr; fp@1515: u32 cmd; fp@1515: int wait = 1000; fp@1515: fp@1515: /* fp@1515: * Some chips are unable to dump tally counters when the receiver fp@1515: * is disabled. fp@1515: */ fp@1515: if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0) fp@1515: return; fp@1515: fp@1515: counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); fp@1515: if (!counters) fp@1515: return; fp@1515: fp@1515: RTL_W32(CounterAddrHigh, (u64)paddr >> 32); fp@1515: cmd = (u64)paddr & DMA_32BIT_MASK; fp@1515: RTL_W32(CounterAddrLow, cmd); fp@1515: RTL_W32(CounterAddrLow, cmd | CounterDump); fp@1515: fp@1515: while (wait--) { fp@1515: if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) { fp@1515: /* copy updated counters */ fp@1515: memcpy(&tp->counters, counters, sizeof(*counters)); fp@1515: break; fp@1515: } fp@1515: udelay(10); fp@1515: } fp@1515: fp@1515: RTL_W32(CounterAddrLow, 0); fp@1515: RTL_W32(CounterAddrHigh, 0); fp@1515: fp@1515: pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); fp@1515: } fp@1515: fp@1515: static void rtl8169_get_ethtool_stats(struct net_device *dev, fp@1515: struct ethtool_stats *stats, u64 *data) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: ASSERT_RTNL(); fp@1515: fp@1515: rtl8169_update_counters(dev); fp@1515: fp@1515: data[0] = le64_to_cpu(tp->counters.tx_packets); fp@1515: data[1] = le64_to_cpu(tp->counters.rx_packets); fp@1515: data[2] = le64_to_cpu(tp->counters.tx_errors); fp@1515: data[3] = le32_to_cpu(tp->counters.rx_errors); fp@1515: data[4] = le16_to_cpu(tp->counters.rx_missed); fp@1515: data[5] = le16_to_cpu(tp->counters.align_errors); fp@1515: data[6] = le32_to_cpu(tp->counters.tx_one_collision); fp@1515: data[7] = le32_to_cpu(tp->counters.tx_multi_collision); fp@1515: data[8] = le64_to_cpu(tp->counters.rx_unicast); fp@1515: data[9] = le64_to_cpu(tp->counters.rx_broadcast); fp@1515: data[10] = le32_to_cpu(tp->counters.rx_multicast); fp@1515: data[11] = le16_to_cpu(tp->counters.tx_aborted); fp@1515: data[12] = le16_to_cpu(tp->counters.tx_underun); fp@1515: } fp@1515: fp@1515: static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data) fp@1515: { fp@1515: switch(stringset) { fp@1515: case ETH_SS_STATS: fp@1515: memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings)); fp@1515: break; fp@1515: } fp@1515: } fp@1515: fp@1515: static const struct ethtool_ops rtl8169_ethtool_ops = { fp@1515: .get_drvinfo = rtl8169_get_drvinfo, fp@1515: .get_regs_len = rtl8169_get_regs_len, fp@1515: .get_link = ethtool_op_get_link, fp@1515: .get_settings = rtl8169_get_settings, fp@1515: .set_settings = rtl8169_set_settings, fp@1515: .get_msglevel = rtl8169_get_msglevel, fp@1515: .set_msglevel = rtl8169_set_msglevel, fp@1515: .get_rx_csum = rtl8169_get_rx_csum, fp@1515: .set_rx_csum = rtl8169_set_rx_csum, fp@1515: .set_tx_csum = ethtool_op_set_tx_csum, fp@1515: .set_sg = ethtool_op_set_sg, fp@1515: .set_tso = ethtool_op_set_tso, fp@1515: .get_regs = rtl8169_get_regs, fp@1515: .get_wol = rtl8169_get_wol, fp@1515: .set_wol = rtl8169_set_wol, fp@1515: .get_strings = rtl8169_get_strings, fp@1515: .get_sset_count = rtl8169_get_sset_count, fp@1515: .get_ethtool_stats = rtl8169_get_ethtool_stats, fp@1515: }; fp@1515: fp@1515: static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, fp@1515: int bitnum, int bitval) fp@1515: { fp@1515: int val; fp@1515: fp@1515: val = mdio_read(ioaddr, reg); fp@1515: val = (bitval == 1) ? fp@1515: val | (bitval << bitnum) : val & ~(0x0001 << bitnum); fp@1515: mdio_write(ioaddr, reg, val & 0xffff); fp@1515: } fp@1515: fp@1515: static void rtl8169_get_mac_version(struct rtl8169_private *tp, fp@1515: void __iomem *ioaddr) fp@1515: { fp@1515: /* fp@1515: * The driver currently handles the 8168Bf and the 8168Be identically fp@1515: * but they can be identified more specifically through the test below fp@1515: * if needed: fp@1515: * fp@1515: * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be fp@1515: * fp@1515: * Same thing for the 8101Eb and the 8101Ec: fp@1515: * fp@1515: * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec fp@1515: */ fp@1515: const struct { fp@1515: u32 mask; fp@1515: u32 val; fp@1515: int mac_version; fp@1515: } mac_info[] = { fp@1515: /* 8168D family. */ fp@1515: { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_25 }, fp@1515: fp@1515: /* 8168C family. */ fp@1515: { 0x7cf00000, 0x3ca00000, RTL_GIGA_MAC_VER_24 }, fp@1515: { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 }, fp@1515: { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, fp@1515: { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_24 }, fp@1515: { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 }, fp@1515: { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 }, fp@1515: { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 }, fp@1515: { 0x7cf00000, 0x3c400000, RTL_GIGA_MAC_VER_22 }, fp@1515: { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_22 }, fp@1515: fp@1515: /* 8168B family. */ fp@1515: { 0x7cf00000, 0x38000000, RTL_GIGA_MAC_VER_12 }, fp@1515: { 0x7cf00000, 0x38500000, RTL_GIGA_MAC_VER_17 }, fp@1515: { 0x7c800000, 0x38000000, RTL_GIGA_MAC_VER_17 }, fp@1515: { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 }, fp@1515: fp@1515: /* 8101 family. */ fp@1515: { 0x7cf00000, 0x34a00000, RTL_GIGA_MAC_VER_09 }, fp@1515: { 0x7cf00000, 0x24a00000, RTL_GIGA_MAC_VER_09 }, fp@1515: { 0x7cf00000, 0x34900000, RTL_GIGA_MAC_VER_08 }, fp@1515: { 0x7cf00000, 0x24900000, RTL_GIGA_MAC_VER_08 }, fp@1515: { 0x7cf00000, 0x34800000, RTL_GIGA_MAC_VER_07 }, fp@1515: { 0x7cf00000, 0x24800000, RTL_GIGA_MAC_VER_07 }, fp@1515: { 0x7cf00000, 0x34000000, RTL_GIGA_MAC_VER_13 }, fp@1515: { 0x7cf00000, 0x34300000, RTL_GIGA_MAC_VER_10 }, fp@1515: { 0x7cf00000, 0x34200000, RTL_GIGA_MAC_VER_16 }, fp@1515: { 0x7c800000, 0x34800000, RTL_GIGA_MAC_VER_09 }, fp@1515: { 0x7c800000, 0x24800000, RTL_GIGA_MAC_VER_09 }, fp@1515: { 0x7c800000, 0x34000000, RTL_GIGA_MAC_VER_16 }, fp@1515: /* FIXME: where did these entries come from ? -- FR */ fp@1515: { 0xfc800000, 0x38800000, RTL_GIGA_MAC_VER_15 }, fp@1515: { 0xfc800000, 0x30800000, RTL_GIGA_MAC_VER_14 }, fp@1515: fp@1515: /* 8110 family. */ fp@1515: { 0xfc800000, 0x98000000, RTL_GIGA_MAC_VER_06 }, fp@1515: { 0xfc800000, 0x18000000, RTL_GIGA_MAC_VER_05 }, fp@1515: { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 }, fp@1515: { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 }, fp@1515: { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, fp@1515: { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, fp@1515: fp@1515: { 0x00000000, 0x00000000, RTL_GIGA_MAC_VER_01 } /* Catch-all */ fp@1515: }, *p = mac_info; fp@1515: u32 reg; fp@1515: fp@1515: reg = RTL_R32(TxConfig); fp@1515: while ((reg & p->mask) != p->val) fp@1515: p++; fp@1515: tp->mac_version = p->mac_version; fp@1515: fp@1515: if (p->mask == 0x00000000) { fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: dev_info(&pdev->dev, "unknown MAC (%08x)\n", reg); fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl8169_print_mac_version(struct rtl8169_private *tp) fp@1515: { fp@1515: dprintk("mac_version = 0x%02x\n", tp->mac_version); fp@1515: } fp@1515: fp@1515: struct phy_reg { fp@1515: u16 reg; fp@1515: u16 val; fp@1515: }; fp@1515: fp@1515: static void rtl_phy_write(void __iomem *ioaddr, struct phy_reg *regs, int len) fp@1515: { fp@1515: while (len-- > 0) { fp@1515: mdio_write(ioaddr, regs->reg, regs->val); fp@1515: regs++; fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl8169s_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct { fp@1515: u16 regs[5]; /* Beware of bit-sign propagation */ fp@1515: } phy_magic[5] = { { fp@1515: { 0x0000, //w 4 15 12 0 fp@1515: 0x00a1, //w 3 15 0 00a1 fp@1515: 0x0008, //w 2 15 0 0008 fp@1515: 0x1020, //w 1 15 0 1020 fp@1515: 0x1000 } },{ //w 0 15 0 1000 fp@1515: { 0x7000, //w 4 15 12 7 fp@1515: 0xff41, //w 3 15 0 ff41 fp@1515: 0xde60, //w 2 15 0 de60 fp@1515: 0x0140, //w 1 15 0 0140 fp@1515: 0x0077 } },{ //w 0 15 0 0077 fp@1515: { 0xa000, //w 4 15 12 a fp@1515: 0xdf01, //w 3 15 0 df01 fp@1515: 0xdf20, //w 2 15 0 df20 fp@1515: 0xff95, //w 1 15 0 ff95 fp@1515: 0xfa00 } },{ //w 0 15 0 fa00 fp@1515: { 0xb000, //w 4 15 12 b fp@1515: 0xff41, //w 3 15 0 ff41 fp@1515: 0xde20, //w 2 15 0 de20 fp@1515: 0x0140, //w 1 15 0 0140 fp@1515: 0x00bb } },{ //w 0 15 0 00bb fp@1515: { 0xf000, //w 4 15 12 f fp@1515: 0xdf01, //w 3 15 0 df01 fp@1515: 0xdf20, //w 2 15 0 df20 fp@1515: 0xff95, //w 1 15 0 ff95 fp@1515: 0xbf00 } //w 0 15 0 bf00 fp@1515: } fp@1515: }, *p = phy_magic; fp@1515: unsigned int i; fp@1515: fp@1515: mdio_write(ioaddr, 0x1f, 0x0001); //w 31 2 0 1 fp@1515: mdio_write(ioaddr, 0x15, 0x1000); //w 21 15 0 1000 fp@1515: mdio_write(ioaddr, 0x18, 0x65c7); //w 24 15 0 65c7 fp@1515: rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0 fp@1515: fp@1515: for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) { fp@1515: int val, pos = 4; fp@1515: fp@1515: val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff); fp@1515: mdio_write(ioaddr, pos, val); fp@1515: while (--pos >= 0) fp@1515: mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff); fp@1515: rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1 fp@1515: rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0 fp@1515: } fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); //w 31 2 0 0 fp@1515: } fp@1515: fp@1515: static void rtl8169sb_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x01, 0x90d0 }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: } fp@1515: fp@1515: static void rtl8168bb_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x10, 0xf41b }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: mdio_write(ioaddr, 0x1f, 0x0001); fp@1515: mdio_patch(ioaddr, 0x16, 1 << 0); fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: } fp@1515: fp@1515: static void rtl8168bef_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0001 }, fp@1515: { 0x10, 0xf41b }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: } fp@1515: fp@1515: static void rtl8168cp_1_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0000 }, fp@1515: { 0x1d, 0x0f00 }, fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x0c, 0x1ec8 }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: } fp@1515: fp@1515: static void rtl8168cp_2_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0001 }, fp@1515: { 0x1d, 0x3d98 }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); fp@1515: mdio_patch(ioaddr, 0x14, 1 << 5); fp@1515: mdio_patch(ioaddr, 0x0d, 1 << 5); fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: } fp@1515: fp@1515: static void rtl8168c_1_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0001 }, fp@1515: { 0x12, 0x2300 }, fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x00, 0x88d4 }, fp@1515: { 0x01, 0x82b1 }, fp@1515: { 0x03, 0x7002 }, fp@1515: { 0x08, 0x9e30 }, fp@1515: { 0x09, 0x01f0 }, fp@1515: { 0x0a, 0x5500 }, fp@1515: { 0x0c, 0x00c8 }, fp@1515: { 0x1f, 0x0003 }, fp@1515: { 0x12, 0xc096 }, fp@1515: { 0x16, 0x000a }, fp@1515: { 0x1f, 0x0000 }, fp@1515: { 0x1f, 0x0000 }, fp@1515: { 0x09, 0x2000 }, fp@1515: { 0x09, 0x0000 } fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: fp@1515: mdio_patch(ioaddr, 0x14, 1 << 5); fp@1515: mdio_patch(ioaddr, 0x0d, 1 << 5); fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); fp@1515: } fp@1515: fp@1515: static void rtl8168c_2_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0001 }, fp@1515: { 0x12, 0x2300 }, fp@1515: { 0x03, 0x802f }, fp@1515: { 0x02, 0x4f02 }, fp@1515: { 0x01, 0x0409 }, fp@1515: { 0x00, 0xf099 }, fp@1515: { 0x04, 0x9800 }, fp@1515: { 0x04, 0x9000 }, fp@1515: { 0x1d, 0x3d98 }, fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x0c, 0x7eb8 }, fp@1515: { 0x06, 0x0761 }, fp@1515: { 0x1f, 0x0003 }, fp@1515: { 0x16, 0x0f0a }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: fp@1515: mdio_patch(ioaddr, 0x16, 1 << 0); fp@1515: mdio_patch(ioaddr, 0x14, 1 << 5); fp@1515: mdio_patch(ioaddr, 0x0d, 1 << 5); fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); fp@1515: } fp@1515: fp@1515: static void rtl8168c_3_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0001 }, fp@1515: { 0x12, 0x2300 }, fp@1515: { 0x1d, 0x3d98 }, fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x0c, 0x7eb8 }, fp@1515: { 0x06, 0x5461 }, fp@1515: { 0x1f, 0x0003 }, fp@1515: { 0x16, 0x0f0a }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: fp@1515: mdio_patch(ioaddr, 0x16, 1 << 0); fp@1515: mdio_patch(ioaddr, 0x14, 1 << 5); fp@1515: mdio_patch(ioaddr, 0x0d, 1 << 5); fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); fp@1515: } fp@1515: fp@1515: static void rtl8168c_4_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: rtl8168c_3_hw_phy_config(ioaddr); fp@1515: } fp@1515: fp@1515: static void rtl8168d_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init_0[] = { fp@1515: { 0x1f, 0x0001 }, fp@1515: { 0x09, 0x2770 }, fp@1515: { 0x08, 0x04d0 }, fp@1515: { 0x0b, 0xad15 }, fp@1515: { 0x0c, 0x5bf0 }, fp@1515: { 0x1c, 0xf101 }, fp@1515: { 0x1f, 0x0003 }, fp@1515: { 0x14, 0x94d7 }, fp@1515: { 0x12, 0xf4d6 }, fp@1515: { 0x09, 0xca0f }, fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x0b, 0x0b10 }, fp@1515: { 0x0c, 0xd1f7 }, fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x06, 0x5461 }, fp@1515: { 0x1f, 0x0002 }, fp@1515: { 0x05, 0x6662 }, fp@1515: { 0x1f, 0x0000 }, fp@1515: { 0x14, 0x0060 }, fp@1515: { 0x1f, 0x0000 }, fp@1515: { 0x0d, 0xf8a0 }, fp@1515: { 0x1f, 0x0005 }, fp@1515: { 0x05, 0xffc2 } fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0)); fp@1515: fp@1515: if (mdio_read(ioaddr, 0x06) == 0xc400) { fp@1515: struct phy_reg phy_reg_init_1[] = { fp@1515: { 0x1f, 0x0005 }, fp@1515: { 0x01, 0x0300 }, fp@1515: { 0x1f, 0x0000 }, fp@1515: { 0x11, 0x401c }, fp@1515: { 0x16, 0x4100 }, fp@1515: { 0x1f, 0x0005 }, fp@1515: { 0x07, 0x0010 }, fp@1515: { 0x05, 0x83dc }, fp@1515: { 0x06, 0x087d }, fp@1515: { 0x05, 0x8300 }, fp@1515: { 0x06, 0x0101 }, fp@1515: { 0x06, 0x05f8 }, fp@1515: { 0x06, 0xf9fa }, fp@1515: { 0x06, 0xfbef }, fp@1515: { 0x06, 0x79e2 }, fp@1515: { 0x06, 0x835f }, fp@1515: { 0x06, 0xe0f8 }, fp@1515: { 0x06, 0x9ae1 }, fp@1515: { 0x06, 0xf89b }, fp@1515: { 0x06, 0xef31 }, fp@1515: { 0x06, 0x3b65 }, fp@1515: { 0x06, 0xaa07 }, fp@1515: { 0x06, 0x81e4 }, fp@1515: { 0x06, 0xf89a }, fp@1515: { 0x06, 0xe5f8 }, fp@1515: { 0x06, 0x9baf }, fp@1515: { 0x06, 0x06ae }, fp@1515: { 0x05, 0x83dc }, fp@1515: { 0x06, 0x8300 }, fp@1515: }; fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init_1, fp@1515: ARRAY_SIZE(phy_reg_init_1)); fp@1515: } fp@1515: fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); fp@1515: } fp@1515: fp@1515: static void rtl8102e_hw_phy_config(void __iomem *ioaddr) fp@1515: { fp@1515: struct phy_reg phy_reg_init[] = { fp@1515: { 0x1f, 0x0003 }, fp@1515: { 0x08, 0x441d }, fp@1515: { 0x01, 0x9100 }, fp@1515: { 0x1f, 0x0000 } fp@1515: }; fp@1515: fp@1515: mdio_write(ioaddr, 0x1f, 0x0000); fp@1515: mdio_patch(ioaddr, 0x11, 1 << 12); fp@1515: mdio_patch(ioaddr, 0x19, 1 << 13); fp@1515: fp@1515: rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init)); fp@1515: } fp@1515: fp@1515: static void rtl_hw_phy_config(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: fp@1515: rtl8169_print_mac_version(tp); fp@1515: fp@1515: switch (tp->mac_version) { fp@1515: case RTL_GIGA_MAC_VER_01: fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_02: fp@1515: case RTL_GIGA_MAC_VER_03: fp@1515: rtl8169s_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_04: fp@1515: rtl8169sb_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_07: fp@1515: case RTL_GIGA_MAC_VER_08: fp@1515: case RTL_GIGA_MAC_VER_09: fp@1515: rtl8102e_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_11: fp@1515: rtl8168bb_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_12: fp@1515: rtl8168bef_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_17: fp@1515: rtl8168bef_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_18: fp@1515: rtl8168cp_1_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_19: fp@1515: rtl8168c_1_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_20: fp@1515: rtl8168c_2_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_21: fp@1515: rtl8168c_3_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_22: fp@1515: rtl8168c_4_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_23: fp@1515: case RTL_GIGA_MAC_VER_24: fp@1515: rtl8168cp_2_hw_phy_config(ioaddr); fp@1515: break; fp@1515: case RTL_GIGA_MAC_VER_25: fp@1515: rtl8168d_hw_phy_config(ioaddr); fp@1515: break; fp@1515: fp@1515: default: fp@1515: break; fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl8169_phy_timer(unsigned long __opaque) fp@1515: { fp@1515: struct net_device *dev = (struct net_device *)__opaque; fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct timer_list *timer = &tp->timer; fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned long timeout = RTL8169_PHY_TIMEOUT; fp@1515: fp@1515: assert(tp->mac_version > RTL_GIGA_MAC_VER_01); fp@1515: fp@1515: if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)) fp@1515: return; fp@1515: fp@1515: if (!tp->ecdev) fp@1515: spin_lock_irq(&tp->lock); fp@1515: fp@1515: if (tp->phy_reset_pending(ioaddr)) { fp@1515: /* fp@1515: * A busy loop could burn quite a few cycles on nowadays CPU. fp@1515: * Let's delay the execution of the timer for a few ticks. fp@1515: */ fp@1515: timeout = HZ/10; fp@1515: goto out_mod_timer; fp@1515: } fp@1515: fp@1515: if (tp->link_ok(ioaddr)) fp@1515: goto out_unlock; fp@1515: fp@1515: if (netif_msg_link(tp)) fp@1515: printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name); fp@1515: fp@1515: tp->phy_reset_enable(ioaddr); fp@1515: fp@1515: out_mod_timer: fp@1515: if (!tp->ecdev) fp@1515: mod_timer(timer, jiffies + timeout); fp@1515: out_unlock: fp@1515: if (!tp->ecdev) fp@1515: spin_unlock_irq(&tp->lock); fp@1515: } fp@1515: fp@1515: static inline void rtl8169_delete_timer(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct timer_list *timer = &tp->timer; fp@1515: fp@1515: if (tp->ecdev || tp->mac_version <= RTL_GIGA_MAC_VER_01) fp@1515: return; fp@1515: fp@1515: del_timer_sync(timer); fp@1515: } fp@1515: fp@1515: static inline void rtl8169_request_timer(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct timer_list *timer = &tp->timer; fp@1515: fp@1515: if (tp->ecdev || tp->mac_version <= RTL_GIGA_MAC_VER_01) fp@1515: return; fp@1515: fp@1515: mod_timer(timer, jiffies + RTL8169_PHY_TIMEOUT); fp@1515: } fp@1515: fp@1515: #ifdef CONFIG_NET_POLL_CONTROLLER fp@1515: /* fp@1515: * Polling 'interrupt' - used by things like netconsole to send skbs fp@1515: * without having to re-enable interrupts. It's not called while fp@1515: * the interrupt routine is executing. fp@1515: */ fp@1515: static void rtl8169_netpoll(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: disable_irq(pdev->irq); fp@1515: rtl8169_interrupt(pdev->irq, dev); fp@1515: enable_irq(pdev->irq); fp@1515: } fp@1515: #endif fp@1515: fp@1515: static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev, fp@1515: void __iomem *ioaddr) fp@1515: { fp@1515: iounmap(ioaddr); fp@1515: pci_release_regions(pdev); fp@1515: pci_disable_device(pdev); fp@1515: free_netdev(dev); fp@1515: } fp@1515: fp@1515: static void rtl8169_phy_reset(struct net_device *dev, fp@1515: struct rtl8169_private *tp) fp@1515: { fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned int i; fp@1515: fp@1515: tp->phy_reset_enable(ioaddr); fp@1515: for (i = 0; i < 100; i++) { fp@1515: if (!tp->phy_reset_pending(ioaddr)) fp@1515: return; fp@1515: msleep(1); fp@1515: } fp@1515: if (netif_msg_link(tp)) fp@1515: printk(KERN_ERR "%s: PHY reset failed.\n", dev->name); fp@1515: } fp@1515: fp@1515: static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp) fp@1515: { fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: fp@1515: rtl_hw_phy_config(dev); fp@1515: fp@1515: if (tp->mac_version <= RTL_GIGA_MAC_VER_06) { fp@1515: dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); fp@1515: RTL_W8(0x82, 0x01); fp@1515: } fp@1515: fp@1515: pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40); fp@1515: fp@1515: if (tp->mac_version <= RTL_GIGA_MAC_VER_06) fp@1515: pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); fp@1515: fp@1515: if (tp->mac_version == RTL_GIGA_MAC_VER_02) { fp@1515: dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n"); fp@1515: RTL_W8(0x82, 0x01); fp@1515: dprintk("Set PHY Reg 0x0bh = 0x00h\n"); fp@1515: mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0 fp@1515: } fp@1515: fp@1515: rtl8169_phy_reset(dev, tp); fp@1515: fp@1515: /* fp@1515: * rtl8169_set_speed_xmii takes good care of the Fast Ethernet fp@1515: * only 8101. Don't panic. fp@1515: */ fp@1515: rtl8169_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL); fp@1515: fp@1515: if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp)) fp@1515: printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name); fp@1515: } fp@1515: fp@1515: static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr) fp@1515: { fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: u32 high; fp@1515: u32 low; fp@1515: fp@1515: low = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24); fp@1515: high = addr[4] | (addr[5] << 8); fp@1515: fp@1515: spin_lock_irq(&tp->lock); fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Unlock); fp@1515: RTL_W32(MAC0, low); fp@1515: RTL_W32(MAC4, high); fp@1515: RTL_W8(Cfg9346, Cfg9346_Lock); fp@1515: fp@1515: spin_unlock_irq(&tp->lock); fp@1515: } fp@1515: fp@1515: static int rtl_set_mac_address(struct net_device *dev, void *p) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct sockaddr *addr = p; fp@1515: fp@1515: if (!is_valid_ether_addr(addr->sa_data)) fp@1515: return -EADDRNOTAVAIL; fp@1515: fp@1515: memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); fp@1515: fp@1515: rtl_rar_set(tp, dev->dev_addr); fp@1515: fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct mii_ioctl_data *data = if_mii(ifr); fp@1515: fp@1515: return netif_running(dev) ? tp->do_ioctl(tp, data, cmd) : -ENODEV; fp@1515: } fp@1515: fp@1515: static int rtl_xmii_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd) fp@1515: { fp@1515: switch (cmd) { fp@1515: case SIOCGMIIPHY: fp@1515: data->phy_id = 32; /* Internal PHY */ fp@1515: return 0; fp@1515: fp@1515: case SIOCGMIIREG: fp@1515: data->val_out = mdio_read(tp->mmio_addr, data->reg_num & 0x1f); fp@1515: return 0; fp@1515: fp@1515: case SIOCSMIIREG: fp@1515: if (!capable(CAP_NET_ADMIN)) fp@1515: return -EPERM; fp@1515: mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in); fp@1515: return 0; fp@1515: } fp@1515: return -EOPNOTSUPP; fp@1515: } fp@1515: fp@1515: static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd) fp@1515: { fp@1515: return -EOPNOTSUPP; fp@1515: } fp@1515: fp@1515: static const struct rtl_cfg_info { fp@1515: void (*hw_start)(struct net_device *); fp@1515: unsigned int region; fp@1515: unsigned int align; fp@1515: u16 intr_event; fp@1515: u16 napi_event; fp@1515: unsigned features; fp@1515: } rtl_cfg_infos [] = { fp@1515: [RTL_CFG_0] = { fp@1515: .hw_start = rtl_hw_start_8169, fp@1515: .region = 1, fp@1515: .align = 0, fp@1515: .intr_event = SYSErr | LinkChg | RxOverflow | fp@1515: RxFIFOOver | TxErr | TxOK | RxOK | RxErr, fp@1515: .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, fp@1515: .features = RTL_FEATURE_GMII fp@1515: }, fp@1515: [RTL_CFG_1] = { fp@1515: .hw_start = rtl_hw_start_8168, fp@1515: .region = 2, fp@1515: .align = 8, fp@1515: .intr_event = SYSErr | LinkChg | RxOverflow | fp@1515: TxErr | TxOK | RxOK | RxErr, fp@1515: .napi_event = TxErr | TxOK | RxOK | RxOverflow, fp@1515: .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI fp@1515: }, fp@1515: [RTL_CFG_2] = { fp@1515: .hw_start = rtl_hw_start_8101, fp@1515: .region = 2, fp@1515: .align = 8, fp@1515: .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | fp@1515: RxFIFOOver | TxErr | TxOK | RxOK | RxErr, fp@1515: .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, fp@1515: .features = RTL_FEATURE_MSI fp@1515: } fp@1515: }; fp@1515: fp@1515: /* Cfg9346_Unlock assumed. */ fp@1515: static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, fp@1515: const struct rtl_cfg_info *cfg) fp@1515: { fp@1515: unsigned msi = 0; fp@1515: u8 cfg2; fp@1515: fp@1515: cfg2 = RTL_R8(Config2) & ~MSIEnable; fp@1515: if (cfg->features & RTL_FEATURE_MSI) { fp@1515: if (pci_enable_msi(pdev)) { fp@1515: dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); fp@1515: } else { fp@1515: cfg2 |= MSIEnable; fp@1515: msi = RTL_FEATURE_MSI; fp@1515: } fp@1515: } fp@1515: RTL_W8(Config2, cfg2); fp@1515: return msi; fp@1515: } fp@1515: fp@1515: static void rtl_disable_msi(struct pci_dev *pdev, struct rtl8169_private *tp) fp@1515: { fp@1515: if (tp->features & RTL_FEATURE_MSI) { fp@1515: pci_disable_msi(pdev); fp@1515: tp->features &= ~RTL_FEATURE_MSI; fp@1515: } fp@1515: } fp@1515: fp@1515: static const struct net_device_ops rtl8169_netdev_ops = { fp@1515: .ndo_open = rtl8169_open, fp@1515: .ndo_stop = rtl8169_close, fp@1515: .ndo_get_stats = rtl8169_get_stats, fp@1515: .ndo_start_xmit = rtl8169_start_xmit, fp@1515: .ndo_tx_timeout = rtl8169_tx_timeout, fp@1515: .ndo_validate_addr = eth_validate_addr, fp@1515: .ndo_change_mtu = rtl8169_change_mtu, fp@1515: .ndo_set_mac_address = rtl_set_mac_address, fp@1515: .ndo_do_ioctl = rtl8169_ioctl, fp@1515: .ndo_set_multicast_list = rtl_set_rx_mode, fp@1515: #ifdef CONFIG_R8169_VLAN fp@1515: .ndo_vlan_rx_register = rtl8169_vlan_rx_register, fp@1515: #endif fp@1515: #ifdef CONFIG_NET_POLL_CONTROLLER fp@1515: .ndo_poll_controller = rtl8169_netpoll, fp@1515: #endif fp@1515: fp@1515: }; fp@1515: fp@1515: static int __devinit fp@1515: rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) fp@1515: { fp@1515: const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; fp@1515: const unsigned int region = cfg->region; fp@1515: struct rtl8169_private *tp; fp@1515: struct mii_if_info *mii; fp@1515: struct net_device *dev; fp@1515: void __iomem *ioaddr; fp@1515: unsigned int i; fp@1515: int rc; fp@1515: fp@1515: if (netif_msg_drv(&debug)) { fp@1515: printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n", fp@1515: MODULENAME, RTL8169_VERSION); fp@1515: } fp@1515: fp@1515: dev = alloc_etherdev(sizeof (*tp)); fp@1515: if (!dev) { fp@1515: if (netif_msg_drv(&debug)) fp@1515: dev_err(&pdev->dev, "unable to alloc new ethernet\n"); fp@1515: rc = -ENOMEM; fp@1515: goto out; fp@1515: } fp@1515: fp@1515: SET_NETDEV_DEV(dev, &pdev->dev); fp@1515: dev->netdev_ops = &rtl8169_netdev_ops; fp@1515: tp = netdev_priv(dev); fp@1515: tp->dev = dev; fp@1515: tp->pci_dev = pdev; fp@1515: tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT); fp@1515: fp@1515: mii = &tp->mii; fp@1515: mii->dev = dev; fp@1515: mii->mdio_read = rtl_mdio_read; fp@1515: mii->mdio_write = rtl_mdio_write; fp@1515: mii->phy_id_mask = 0x1f; fp@1515: mii->reg_num_mask = 0x1f; fp@1515: mii->supports_gmii = !!(cfg->features & RTL_FEATURE_GMII); fp@1515: fp@1515: /* enable device (incl. PCI PM wakeup and hotplug setup) */ fp@1515: rc = pci_enable_device(pdev); fp@1515: if (rc < 0) { fp@1515: if (netif_msg_probe(tp)) fp@1515: dev_err(&pdev->dev, "enable failure\n"); fp@1515: goto err_out_free_dev_1; fp@1515: } fp@1515: fp@1515: rc = pci_set_mwi(pdev); fp@1515: if (rc < 0) fp@1515: goto err_out_disable_2; fp@1515: fp@1515: /* make sure PCI base addr 1 is MMIO */ fp@1515: if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) { fp@1515: if (netif_msg_probe(tp)) { fp@1515: dev_err(&pdev->dev, fp@1515: "region #%d not an MMIO resource, aborting\n", fp@1515: region); fp@1515: } fp@1515: rc = -ENODEV; fp@1515: goto err_out_mwi_3; fp@1515: } fp@1515: fp@1515: /* check for weird/broken PCI region reporting */ fp@1515: if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) { fp@1515: if (netif_msg_probe(tp)) { fp@1515: dev_err(&pdev->dev, fp@1515: "Invalid PCI region size(s), aborting\n"); fp@1515: } fp@1515: rc = -ENODEV; fp@1515: goto err_out_mwi_3; fp@1515: } fp@1515: fp@1515: rc = pci_request_regions(pdev, MODULENAME); fp@1515: if (rc < 0) { fp@1515: if (netif_msg_probe(tp)) fp@1515: dev_err(&pdev->dev, "could not request regions.\n"); fp@1515: goto err_out_mwi_3; fp@1515: } fp@1515: fp@1515: tp->cp_cmd = PCIMulRW | RxChkSum; fp@1515: fp@1515: if ((sizeof(dma_addr_t) > 4) && fp@1515: !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) { fp@1515: tp->cp_cmd |= PCIDAC; fp@1515: dev->features |= NETIF_F_HIGHDMA; fp@1515: } else { fp@1515: rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); fp@1515: if (rc < 0) { fp@1515: if (netif_msg_probe(tp)) { fp@1515: dev_err(&pdev->dev, fp@1515: "DMA configuration failed.\n"); fp@1515: } fp@1515: goto err_out_free_res_4; fp@1515: } fp@1515: } fp@1515: fp@1515: pci_set_master(pdev); fp@1515: fp@1515: /* ioremap MMIO region */ fp@1515: ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE); fp@1515: if (!ioaddr) { fp@1515: if (netif_msg_probe(tp)) fp@1515: dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); fp@1515: rc = -EIO; fp@1515: goto err_out_free_res_4; fp@1515: } fp@1515: fp@1515: tp->pcie_cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); fp@1515: if (!tp->pcie_cap && netif_msg_probe(tp)) fp@1515: dev_info(&pdev->dev, "no PCI Express capability\n"); fp@1515: fp@1515: RTL_W16(IntrMask, 0x0000); fp@1515: fp@1515: /* Soft reset the chip. */ fp@1515: RTL_W8(ChipCmd, CmdReset); fp@1515: fp@1515: /* Check that the chip has finished the reset. */ fp@1515: for (i = 0; i < 100; i++) { fp@1515: if ((RTL_R8(ChipCmd) & CmdReset) == 0) fp@1515: break; fp@1515: msleep_interruptible(1); fp@1515: } fp@1515: fp@1515: RTL_W16(IntrStatus, 0xffff); fp@1515: fp@1515: /* Identify chip attached to board */ fp@1515: rtl8169_get_mac_version(tp, ioaddr); fp@1515: fp@1515: rtl8169_print_mac_version(tp); fp@1515: fp@1515: for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) { fp@1515: if (tp->mac_version == rtl_chip_info[i].mac_version) fp@1515: break; fp@1515: } fp@1515: if (i == ARRAY_SIZE(rtl_chip_info)) { fp@1515: /* Unknown chip: assume array element #0, original RTL-8169 */ fp@1515: if (netif_msg_probe(tp)) { fp@1515: dev_printk(KERN_DEBUG, &pdev->dev, fp@1515: "unknown chip version, assuming %s\n", fp@1515: rtl_chip_info[0].name); fp@1515: } fp@1515: i = 0; fp@1515: } fp@1515: tp->chipset = i; fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Unlock); fp@1515: RTL_W8(Config1, RTL_R8(Config1) | PMEnable); fp@1515: RTL_W8(Config5, RTL_R8(Config5) & PMEStatus); fp@1515: if ((RTL_R8(Config3) & (LinkUp | MagicPacket)) != 0) fp@1515: tp->features |= RTL_FEATURE_WOL; fp@1515: if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0) fp@1515: tp->features |= RTL_FEATURE_WOL; fp@1515: tp->features |= rtl_try_msi(pdev, ioaddr, cfg); fp@1515: RTL_W8(Cfg9346, Cfg9346_Lock); fp@1515: fp@1515: if ((tp->mac_version <= RTL_GIGA_MAC_VER_06) && fp@1515: (RTL_R8(PHYstatus) & TBI_Enable)) { fp@1515: tp->set_speed = rtl8169_set_speed_tbi; fp@1515: tp->get_settings = rtl8169_gset_tbi; fp@1515: tp->phy_reset_enable = rtl8169_tbi_reset_enable; fp@1515: tp->phy_reset_pending = rtl8169_tbi_reset_pending; fp@1515: tp->link_ok = rtl8169_tbi_link_ok; fp@1515: tp->do_ioctl = rtl_tbi_ioctl; fp@1515: fp@1515: tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */ fp@1515: } else { fp@1515: tp->set_speed = rtl8169_set_speed_xmii; fp@1515: tp->get_settings = rtl8169_gset_xmii; fp@1515: tp->phy_reset_enable = rtl8169_xmii_reset_enable; fp@1515: tp->phy_reset_pending = rtl8169_xmii_reset_pending; fp@1515: tp->link_ok = rtl8169_xmii_link_ok; fp@1515: tp->do_ioctl = rtl_xmii_ioctl; fp@1515: } fp@1515: fp@1515: spin_lock_init(&tp->lock); fp@1515: fp@1515: tp->mmio_addr = ioaddr; fp@1515: fp@1515: /* Get MAC address */ fp@1515: for (i = 0; i < MAC_ADDR_LEN; i++) fp@1515: dev->dev_addr[i] = RTL_R8(MAC0 + i); fp@1515: memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); fp@1515: fp@1515: SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops); fp@1515: dev->watchdog_timeo = RTL8169_TX_TIMEOUT; fp@1515: dev->irq = pdev->irq; fp@1515: dev->base_addr = (unsigned long) ioaddr; fp@1515: fp@1515: netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT); fp@1515: fp@1515: #ifdef CONFIG_R8169_VLAN fp@1515: dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; fp@1515: #endif fp@1515: fp@1515: tp->intr_mask = 0xffff; fp@1515: tp->align = cfg->align; fp@1515: tp->hw_start = cfg->hw_start; fp@1515: tp->intr_event = cfg->intr_event; fp@1515: tp->napi_event = cfg->napi_event; fp@1515: fp@1515: init_timer(&tp->timer); fp@1515: tp->timer.data = (unsigned long) dev; fp@1515: tp->timer.function = rtl8169_phy_timer; fp@1515: fp@1515: // offer device to EtherCAT master module fp@1515: tp->ecdev = ecdev_offer(dev, ec_poll, THIS_MODULE); fp@1515: fp@1515: if (!tp->ecdev) { fp@1515: rc = register_netdev(dev); fp@1515: if (rc < 0) fp@1515: goto err_out_msi_5; fp@1515: } fp@1515: fp@1515: pci_set_drvdata(pdev, dev); fp@1515: fp@1515: if (netif_msg_probe(tp)) { fp@1515: u32 xid = RTL_R32(TxConfig) & 0x7cf0f8ff; fp@1515: fp@1515: printk(KERN_INFO "%s: %s at 0x%lx, " fp@1515: "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " fp@1515: "XID %08x IRQ %d\n", fp@1515: dev->name, fp@1515: rtl_chip_info[tp->chipset].name, fp@1515: dev->base_addr, fp@1515: dev->dev_addr[0], dev->dev_addr[1], fp@1515: dev->dev_addr[2], dev->dev_addr[3], fp@1515: dev->dev_addr[4], dev->dev_addr[5], xid, dev->irq); fp@1515: } fp@1515: fp@1515: rtl8169_init_phy(dev, tp); fp@1515: device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL); fp@1897: fp@1515: if (tp->ecdev && ecdev_open(tp->ecdev)) { fp@1515: ecdev_withdraw(tp->ecdev); fp@1515: goto err_out_msi_5; fp@1515: } fp@1515: fp@1515: out: fp@1515: return rc; fp@1515: fp@1515: err_out_msi_5: fp@1515: rtl_disable_msi(pdev, tp); fp@1515: iounmap(ioaddr); fp@1515: err_out_free_res_4: fp@1515: pci_release_regions(pdev); fp@1515: err_out_mwi_3: fp@1515: pci_clear_mwi(pdev); fp@1515: err_out_disable_2: fp@1515: pci_disable_device(pdev); fp@1515: err_out_free_dev_1: fp@1515: free_netdev(dev); fp@1515: goto out; fp@1515: } fp@1515: fp@1515: static void __devexit rtl8169_remove_one(struct pci_dev *pdev) fp@1515: { fp@1515: struct net_device *dev = pci_get_drvdata(pdev); fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: flush_scheduled_work(); fp@1515: fp@1515: if (tp->ecdev) { fp@1515: ecdev_close(tp->ecdev); fp@1515: ecdev_withdraw(tp->ecdev); fp@1515: } else { fp@1515: unregister_netdev(dev); fp@1515: } fp@1515: rtl_disable_msi(pdev, tp); fp@1515: rtl8169_release_board(pdev, dev, tp->mmio_addr); fp@1515: pci_set_drvdata(pdev, NULL); fp@1515: } fp@1515: fp@1515: static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, fp@1515: struct net_device *dev) fp@1515: { fp@1515: unsigned int mtu = dev->mtu; fp@1515: fp@1515: tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE; fp@1515: } fp@1515: fp@1515: static int rtl8169_open(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: int retval = -ENOMEM; fp@1515: fp@1515: fp@1515: rtl8169_set_rxbufsize(tp, dev); fp@1515: fp@1515: /* fp@1515: * Rx and Tx desscriptors needs 256 bytes alignment. fp@1515: * pci_alloc_consistent provides more. fp@1515: */ fp@1515: tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES, fp@1515: &tp->TxPhyAddr); fp@1515: if (!tp->TxDescArray) fp@1515: goto out; fp@1515: fp@1515: tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES, fp@1515: &tp->RxPhyAddr); fp@1515: if (!tp->RxDescArray) fp@1515: goto err_free_tx_0; fp@1515: fp@1515: retval = rtl8169_init_ring(dev); fp@1515: if (retval < 0) fp@1515: goto err_free_rx_1; fp@1515: fp@1515: INIT_DELAYED_WORK(&tp->task, NULL); fp@1515: fp@1515: smp_mb(); fp@1515: fp@1515: if (!tp->ecdev) { fp@1515: retval = request_irq(dev->irq, rtl8169_interrupt, fp@1515: (tp->features & RTL_FEATURE_MSI) ? 0 : IRQF_SHARED, fp@1515: dev->name, dev); fp@1515: if (retval < 0) fp@1515: goto err_release_ring_2; fp@1515: fp@1515: napi_enable(&tp->napi); fp@1515: fp@1515: } fp@1515: rtl_hw_start(dev); fp@1515: fp@1515: rtl8169_request_timer(dev); fp@1515: fp@1515: rtl8169_check_link_status(dev, tp, tp->mmio_addr); fp@1515: out: fp@1515: return retval; fp@1515: fp@1515: err_release_ring_2: fp@1515: rtl8169_rx_clear(tp); fp@1515: err_free_rx_1: fp@1515: pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray, fp@1515: tp->RxPhyAddr); fp@1515: err_free_tx_0: fp@1515: pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray, fp@1515: tp->TxPhyAddr); fp@1515: goto out; fp@1515: } fp@1515: fp@1515: static void rtl8169_hw_reset(void __iomem *ioaddr) fp@1515: { fp@1515: /* Disable interrupts */ fp@1515: rtl8169_irq_mask_and_ack(ioaddr); fp@1515: fp@1515: /* Reset the chipset */ fp@1515: RTL_W8(ChipCmd, CmdReset); fp@1515: fp@1515: /* PCI commit */ fp@1515: RTL_R8(ChipCmd); fp@1515: } fp@1515: fp@1515: static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp) fp@1515: { fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: u32 cfg = rtl8169_rx_config; fp@1515: fp@1515: cfg |= (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); fp@1515: RTL_W32(RxConfig, cfg); fp@1515: fp@1515: /* Set DMA burst size and Interframe Gap Time */ fp@1515: RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) | fp@1515: (InterFrameGap << TxInterFrameGapShift)); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned int i; fp@1515: fp@1515: /* Soft reset the chip. */ fp@1515: RTL_W8(ChipCmd, CmdReset); fp@1515: fp@1515: /* Check that the chip has finished the reset. */ fp@1515: for (i = 0; i < 100; i++) { fp@1515: if ((RTL_R8(ChipCmd) & CmdReset) == 0) fp@1515: break; fp@1515: msleep_interruptible(1); fp@1515: } fp@1515: fp@1515: tp->hw_start(dev); fp@1515: fp@1515: if (!tp->ecdev) fp@1515: netif_start_queue(dev); fp@1515: } fp@1515: fp@1515: fp@1515: static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp, fp@1515: void __iomem *ioaddr) fp@1515: { fp@1515: /* fp@1515: * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh fp@1515: * register to be written before TxDescAddrLow to work. fp@1515: * Switching from MMIO to I/O access fixes the issue as well. fp@1515: */ fp@1515: RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32); fp@1515: RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_32BIT_MASK); fp@1515: RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32); fp@1515: RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_32BIT_MASK); fp@1515: } fp@1515: fp@1515: static u16 rtl_rw_cpluscmd(void __iomem *ioaddr) fp@1515: { fp@1515: u16 cmd; fp@1515: fp@1515: cmd = RTL_R16(CPlusCmd); fp@1515: RTL_W16(CPlusCmd, cmd); fp@1515: return cmd; fp@1515: } fp@1515: fp@1515: static void rtl_set_rx_max_size(void __iomem *ioaddr) fp@1515: { fp@1515: /* Low hurts. Let's disable the filtering. */ fp@1515: RTL_W16(RxMaxSize, 16383); fp@1515: } fp@1515: fp@1515: static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version) fp@1515: { fp@1515: struct { fp@1515: u32 mac_version; fp@1515: u32 clk; fp@1515: u32 val; fp@1515: } cfg2_info [] = { fp@1515: { RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd fp@1515: { RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff }, fp@1515: { RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe fp@1515: { RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff } fp@1515: }, *p = cfg2_info; fp@1515: unsigned int i; fp@1515: u32 clk; fp@1515: fp@1515: clk = RTL_R8(Config2) & PCI_Clock_66MHz; fp@1515: for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) { fp@1515: if ((p->mac_version == mac_version) && (p->clk == clk)) { fp@1515: RTL_W32(0x7c, p->val); fp@1515: break; fp@1515: } fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8169(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: if (tp->mac_version == RTL_GIGA_MAC_VER_05) { fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW); fp@1515: pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08); fp@1515: } fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Unlock); fp@1515: if ((tp->mac_version == RTL_GIGA_MAC_VER_01) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_02) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_03) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_04)) fp@1515: RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); fp@1515: fp@1515: RTL_W8(EarlyTxThres, EarlyTxThld); fp@1515: fp@1515: rtl_set_rx_max_size(ioaddr); fp@1515: fp@1515: if ((tp->mac_version == RTL_GIGA_MAC_VER_01) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_02) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_03) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_04)) fp@1515: rtl_set_rx_tx_config_registers(tp); fp@1515: fp@1515: tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW; fp@1515: fp@1515: if ((tp->mac_version == RTL_GIGA_MAC_VER_02) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_03)) { fp@1515: dprintk("Set MAC Reg C+CR Offset 0xE0. " fp@1515: "Bit-3 and bit-14 MUST be 1\n"); fp@1515: tp->cp_cmd |= (1 << 14); fp@1515: } fp@1515: fp@1515: RTL_W16(CPlusCmd, tp->cp_cmd); fp@1515: fp@1515: rtl8169_set_magic_reg(ioaddr, tp->mac_version); fp@1515: fp@1515: /* fp@1515: * Undocumented corner. Supposedly: fp@1515: * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets fp@1515: */ fp@1515: RTL_W16(IntrMitigate, 0x0000); fp@1515: fp@1515: rtl_set_rx_tx_desc_registers(tp, ioaddr); fp@1515: fp@1515: if ((tp->mac_version != RTL_GIGA_MAC_VER_01) && fp@1515: (tp->mac_version != RTL_GIGA_MAC_VER_02) && fp@1515: (tp->mac_version != RTL_GIGA_MAC_VER_03) && fp@1515: (tp->mac_version != RTL_GIGA_MAC_VER_04)) { fp@1515: RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); fp@1515: rtl_set_rx_tx_config_registers(tp); fp@1515: } fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Lock); fp@1515: fp@1515: /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ fp@1515: RTL_R8(IntrMask); fp@1515: fp@1515: RTL_W32(RxMissed, 0); fp@1515: fp@1515: rtl_set_rx_mode(dev); fp@1515: fp@1515: /* no early-rx interrupts */ fp@1515: RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000); fp@1515: fp@1515: /* Enable all known interrupts by setting the interrupt mask. */ fp@1515: if (!tp->ecdev) fp@1515: RTL_W16(IntrMask, tp->intr_event); fp@1515: } fp@1515: fp@1515: static void rtl_tx_performance_tweak(struct pci_dev *pdev, u16 force) fp@1515: { fp@1515: struct net_device *dev = pci_get_drvdata(pdev); fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: int cap = tp->pcie_cap; fp@1515: fp@1515: if (cap) { fp@1515: u16 ctl; fp@1515: fp@1515: pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl); fp@1515: ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force; fp@1515: pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl); fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl_csi_access_enable(void __iomem *ioaddr) fp@1515: { fp@1515: u32 csi; fp@1515: fp@1515: csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff; fp@1515: rtl_csi_write(ioaddr, 0x070c, csi | 0x27000000); fp@1515: } fp@1515: fp@1515: struct ephy_info { fp@1515: unsigned int offset; fp@1515: u16 mask; fp@1515: u16 bits; fp@1515: }; fp@1515: fp@1515: static void rtl_ephy_init(void __iomem *ioaddr, struct ephy_info *e, int len) fp@1515: { fp@1515: u16 w; fp@1515: fp@1515: while (len-- > 0) { fp@1515: w = (rtl_ephy_read(ioaddr, e->offset) & ~e->mask) | e->bits; fp@1515: rtl_ephy_write(ioaddr, e->offset, w); fp@1515: e++; fp@1515: } fp@1515: } fp@1515: fp@1515: static void rtl_disable_clock_request(struct pci_dev *pdev) fp@1515: { fp@1515: struct net_device *dev = pci_get_drvdata(pdev); fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: int cap = tp->pcie_cap; fp@1515: fp@1515: if (cap) { fp@1515: u16 ctl; fp@1515: fp@1515: pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl); fp@1515: ctl &= ~PCI_EXP_LNKCTL_CLKREQ_EN; fp@1515: pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl); fp@1515: } fp@1515: } fp@1515: fp@1515: #define R8168_CPCMD_QUIRK_MASK (\ fp@1515: EnableBist | \ fp@1515: Mac_dbgo_oe | \ fp@1515: Force_half_dup | \ fp@1515: Force_rxflow_en | \ fp@1515: Force_txflow_en | \ fp@1515: Cxpl_dbg_sel | \ fp@1515: ASF | \ fp@1515: PktCntrDisable | \ fp@1515: Mac_dbgo_sel) fp@1515: fp@1515: static void rtl_hw_start_8168bb(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); fp@1515: fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); fp@1515: fp@1515: rtl_tx_performance_tweak(pdev, fp@1515: (0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168bef(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_hw_start_8168bb(ioaddr, pdev); fp@1515: fp@1515: RTL_W8(EarlyTxThres, EarlyTxThld); fp@1515: fp@1515: RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0)); fp@1515: } fp@1515: fp@1515: static void __rtl_hw_start_8168cp(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: RTL_W8(Config1, RTL_R8(Config1) | Speed_down); fp@1515: fp@1515: RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); fp@1515: fp@1515: rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); fp@1515: fp@1515: rtl_disable_clock_request(pdev); fp@1515: fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168cp_1(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: static struct ephy_info e_info_8168cp[] = { fp@1515: { 0x01, 0, 0x0001 }, fp@1515: { 0x02, 0x0800, 0x1000 }, fp@1515: { 0x03, 0, 0x0042 }, fp@1515: { 0x06, 0x0080, 0x0000 }, fp@1515: { 0x07, 0, 0x2000 } fp@1515: }; fp@1515: fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp)); fp@1515: fp@1515: __rtl_hw_start_8168cp(ioaddr, pdev); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168cp_2(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); fp@1515: fp@1515: rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); fp@1515: fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168cp_3(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); fp@1515: fp@1515: /* Magic. */ fp@1515: RTL_W8(DBG_REG, 0x20); fp@1515: fp@1515: RTL_W8(EarlyTxThres, EarlyTxThld); fp@1515: fp@1515: rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); fp@1515: fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168c_1(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: static struct ephy_info e_info_8168c_1[] = { fp@1515: { 0x02, 0x0800, 0x1000 }, fp@1515: { 0x03, 0, 0x0002 }, fp@1515: { 0x06, 0x0080, 0x0000 } fp@1515: }; fp@1515: fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2); fp@1515: fp@1515: rtl_ephy_init(ioaddr, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1)); fp@1515: fp@1515: __rtl_hw_start_8168cp(ioaddr, pdev); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168c_2(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: static struct ephy_info e_info_8168c_2[] = { fp@1515: { 0x01, 0, 0x0001 }, fp@1515: { 0x03, 0x0400, 0x0220 } fp@1515: }; fp@1515: fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2)); fp@1515: fp@1515: __rtl_hw_start_8168cp(ioaddr, pdev); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168c_3(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_hw_start_8168c_2(ioaddr, pdev); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168c_4(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: __rtl_hw_start_8168cp(ioaddr, pdev); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168d(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: rtl_disable_clock_request(pdev); fp@1515: fp@1515: RTL_W8(EarlyTxThres, EarlyTxThld); fp@1515: fp@1515: rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); fp@1515: fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8168(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Unlock); fp@1515: fp@1515: RTL_W8(EarlyTxThres, EarlyTxThld); fp@1515: fp@1515: rtl_set_rx_max_size(ioaddr); fp@1515: fp@1515: tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1; fp@1515: fp@1515: RTL_W16(CPlusCmd, tp->cp_cmd); fp@1515: fp@1515: RTL_W16(IntrMitigate, 0x5151); fp@1515: fp@1515: /* Work around for RxFIFO overflow. */ fp@1515: if (tp->mac_version == RTL_GIGA_MAC_VER_11) { fp@1515: tp->intr_event |= RxFIFOOver | PCSTimeout; fp@1515: tp->intr_event &= ~RxOverflow; fp@1515: } fp@1515: fp@1515: rtl_set_rx_tx_desc_registers(tp, ioaddr); fp@1515: fp@1515: rtl_set_rx_mode(dev); fp@1515: fp@1515: RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) | fp@1515: (InterFrameGap << TxInterFrameGapShift)); fp@1515: fp@1515: RTL_R8(IntrMask); fp@1515: fp@1515: switch (tp->mac_version) { fp@1515: case RTL_GIGA_MAC_VER_11: fp@1515: rtl_hw_start_8168bb(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_12: fp@1515: case RTL_GIGA_MAC_VER_17: fp@1515: rtl_hw_start_8168bef(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_18: fp@1515: rtl_hw_start_8168cp_1(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_19: fp@1515: rtl_hw_start_8168c_1(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_20: fp@1515: rtl_hw_start_8168c_2(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_21: fp@1515: rtl_hw_start_8168c_3(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_22: fp@1515: rtl_hw_start_8168c_4(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_23: fp@1515: rtl_hw_start_8168cp_2(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_24: fp@1515: rtl_hw_start_8168cp_3(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_25: fp@1515: rtl_hw_start_8168d(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: default: fp@1515: printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n", fp@1515: dev->name, tp->mac_version); fp@1515: break; fp@1515: } fp@1515: fp@1515: RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Lock); fp@1515: fp@1515: RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000); fp@1515: fp@1515: if (!tp->ecdev) fp@1515: RTL_W16(IntrMask, tp->intr_event); fp@1515: } fp@1515: fp@1515: #define R810X_CPCMD_QUIRK_MASK (\ fp@1515: EnableBist | \ fp@1515: Mac_dbgo_oe | \ fp@1515: Force_half_dup | \ fp@1515: Force_half_dup | \ fp@1515: Force_txflow_en | \ fp@1515: Cxpl_dbg_sel | \ fp@1515: ASF | \ fp@1515: PktCntrDisable | \ fp@1515: PCIDAC | \ fp@1515: PCIMulRW) fp@1515: fp@1515: static void rtl_hw_start_8102e_1(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: static struct ephy_info e_info_8102e_1[] = { fp@1515: { 0x01, 0, 0x6e65 }, fp@1515: { 0x02, 0, 0x091f }, fp@1515: { 0x03, 0, 0xc2f9 }, fp@1515: { 0x06, 0, 0xafb5 }, fp@1515: { 0x07, 0, 0x0e00 }, fp@1515: { 0x19, 0, 0xec80 }, fp@1515: { 0x01, 0, 0x2e65 }, fp@1515: { 0x01, 0, 0x6e65 } fp@1515: }; fp@1515: u8 cfg1; fp@1515: fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: RTL_W8(DBG_REG, FIX_NAK_1); fp@1515: fp@1515: rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); fp@1515: fp@1515: RTL_W8(Config1, fp@1515: LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable); fp@1515: RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); fp@1515: fp@1515: cfg1 = RTL_R8(Config1); fp@1515: if ((cfg1 & LEDS0) && (cfg1 & LEDS1)) fp@1515: RTL_W8(Config1, cfg1 & ~LEDS0); fp@1515: fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); fp@1515: fp@1515: rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1)); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8102e_2(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_csi_access_enable(ioaddr); fp@1515: fp@1515: rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT); fp@1515: fp@1515: RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable); fp@1515: RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en); fp@1515: fp@1515: RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8102e_3(void __iomem *ioaddr, struct pci_dev *pdev) fp@1515: { fp@1515: rtl_hw_start_8102e_2(ioaddr, pdev); fp@1515: fp@1515: rtl_ephy_write(ioaddr, 0x03, 0xc2f9); fp@1515: } fp@1515: fp@1515: static void rtl_hw_start_8101(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: if ((tp->mac_version == RTL_GIGA_MAC_VER_13) || fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_16)) { fp@1515: int cap = tp->pcie_cap; fp@1515: fp@1515: if (cap) { fp@1515: pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, fp@1515: PCI_EXP_DEVCTL_NOSNOOP_EN); fp@1515: } fp@1515: } fp@1515: fp@1515: switch (tp->mac_version) { fp@1515: case RTL_GIGA_MAC_VER_07: fp@1515: rtl_hw_start_8102e_1(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_08: fp@1515: rtl_hw_start_8102e_3(ioaddr, pdev); fp@1515: break; fp@1515: fp@1515: case RTL_GIGA_MAC_VER_09: fp@1515: rtl_hw_start_8102e_2(ioaddr, pdev); fp@1515: break; fp@1515: } fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Unlock); fp@1515: fp@1515: RTL_W8(EarlyTxThres, EarlyTxThld); fp@1515: fp@1515: rtl_set_rx_max_size(ioaddr); fp@1515: fp@1515: tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW; fp@1515: fp@1515: RTL_W16(CPlusCmd, tp->cp_cmd); fp@1515: fp@1515: RTL_W16(IntrMitigate, 0x0000); fp@1515: fp@1515: rtl_set_rx_tx_desc_registers(tp, ioaddr); fp@1515: fp@1515: RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); fp@1515: rtl_set_rx_tx_config_registers(tp); fp@1515: fp@1515: RTL_W8(Cfg9346, Cfg9346_Lock); fp@1515: fp@1515: RTL_R8(IntrMask); fp@1515: fp@1515: rtl_set_rx_mode(dev); fp@1515: fp@1515: RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); fp@1515: fp@1515: RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); fp@1515: fp@1515: if (!tp->ecdev) fp@1515: RTL_W16(IntrMask, tp->intr_event); fp@1515: } fp@1515: fp@1515: static int rtl8169_change_mtu(struct net_device *dev, int new_mtu) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: int ret = 0; fp@1515: fp@1515: if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu) fp@1515: return -EINVAL; fp@1515: fp@1515: dev->mtu = new_mtu; fp@1515: fp@1515: if (!netif_running(dev)) fp@1515: goto out; fp@1515: fp@1515: rtl8169_down(dev); fp@1515: fp@1515: rtl8169_set_rxbufsize(tp, dev); fp@1515: fp@1515: ret = rtl8169_init_ring(dev); fp@1515: if (ret < 0) fp@1515: goto out; fp@1515: fp@1515: napi_enable(&tp->napi); fp@1515: fp@1515: rtl_hw_start(dev); fp@1515: fp@1515: rtl8169_request_timer(dev); fp@1515: fp@1515: out: fp@1515: return ret; fp@1515: } fp@1515: fp@1515: static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc) fp@1515: { fp@1515: desc->addr = cpu_to_le64(0x0badbadbadbadbadull); fp@1515: desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask); fp@1515: } fp@1515: fp@1515: static void rtl8169_free_rx_skb(struct rtl8169_private *tp, fp@1515: struct sk_buff **sk_buff, struct RxDesc *desc) fp@1515: { fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz, fp@1515: PCI_DMA_FROMDEVICE); fp@1515: dev_kfree_skb(*sk_buff); fp@1515: *sk_buff = NULL; fp@1515: rtl8169_make_unusable_by_asic(desc); fp@1515: } fp@1515: fp@1515: static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz) fp@1515: { fp@1515: u32 eor = le32_to_cpu(desc->opts1) & RingEnd; fp@1515: fp@1515: desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz); fp@1515: } fp@1515: fp@1515: static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping, fp@1515: u32 rx_buf_sz) fp@1515: { fp@1515: desc->addr = cpu_to_le64(mapping); fp@1515: wmb(); fp@1515: rtl8169_mark_to_asic(desc, rx_buf_sz); fp@1515: } fp@1515: fp@1515: static struct sk_buff *rtl8169_alloc_rx_skb(struct pci_dev *pdev, fp@1515: struct net_device *dev, fp@1515: struct RxDesc *desc, int rx_buf_sz, fp@1515: unsigned int align) fp@1515: { fp@1515: struct sk_buff *skb; fp@1515: dma_addr_t mapping; fp@1515: unsigned int pad; fp@1515: fp@1515: pad = align ? align : NET_IP_ALIGN; fp@1515: fp@1515: skb = netdev_alloc_skb(dev, rx_buf_sz + pad); fp@1515: if (!skb) fp@1515: goto err_out; fp@1515: fp@1515: skb_reserve(skb, align ? ((pad - 1) & (unsigned long)skb->data) : pad); fp@1515: fp@1515: mapping = pci_map_single(pdev, skb->data, rx_buf_sz, fp@1515: PCI_DMA_FROMDEVICE); fp@1515: fp@1515: rtl8169_map_to_asic(desc, mapping, rx_buf_sz); fp@1515: out: fp@1515: return skb; fp@1515: fp@1515: err_out: fp@1515: rtl8169_make_unusable_by_asic(desc); fp@1515: goto out; fp@1515: } fp@1515: fp@1515: static void rtl8169_rx_clear(struct rtl8169_private *tp) fp@1515: { fp@1515: unsigned int i; fp@1515: fp@1515: for (i = 0; i < NUM_RX_DESC; i++) { fp@1515: if (tp->Rx_skbuff[i]) { fp@1515: rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i, fp@1515: tp->RxDescArray + i); fp@1515: } fp@1515: } fp@1515: } fp@1515: fp@1515: static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev, fp@1515: u32 start, u32 end) fp@1515: { fp@1515: u32 cur; fp@1515: fp@1515: for (cur = start; end - cur != 0; cur++) { fp@1515: struct sk_buff *skb; fp@1515: unsigned int i = cur % NUM_RX_DESC; fp@1515: fp@1515: WARN_ON((s32)(end - cur) < 0); fp@1515: fp@1515: if (tp->Rx_skbuff[i]) fp@1515: continue; fp@1515: fp@1515: skb = rtl8169_alloc_rx_skb(tp->pci_dev, dev, fp@1515: tp->RxDescArray + i, fp@1515: tp->rx_buf_sz, tp->align); fp@1515: if (!skb) fp@1515: break; fp@1515: fp@1515: tp->Rx_skbuff[i] = skb; fp@1515: } fp@1515: return cur - start; fp@1515: } fp@1515: fp@1515: static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc) fp@1515: { fp@1515: desc->opts1 |= cpu_to_le32(RingEnd); fp@1515: } fp@1515: fp@1515: static void rtl8169_init_ring_indexes(struct rtl8169_private *tp) fp@1515: { fp@1515: tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0; fp@1515: } fp@1515: fp@1515: static int rtl8169_init_ring(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: rtl8169_init_ring_indexes(tp); fp@1515: fp@1515: memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info)); fp@1515: memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *)); fp@1515: fp@1515: if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC) fp@1515: goto err_out; fp@1515: fp@1515: rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1); fp@1515: fp@1515: return 0; fp@1515: fp@1515: err_out: fp@1515: rtl8169_rx_clear(tp); fp@1515: return -ENOMEM; fp@1515: } fp@1515: fp@1515: static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb, fp@1515: struct TxDesc *desc) fp@1515: { fp@1515: unsigned int len = tx_skb->len; fp@1515: fp@1515: pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE); fp@1515: desc->opts1 = 0x00; fp@1515: desc->opts2 = 0x00; fp@1515: desc->addr = 0x00; fp@1515: tx_skb->len = 0; fp@1515: } fp@1515: fp@1515: static void rtl8169_tx_clear(struct rtl8169_private *tp) fp@1515: { fp@1515: unsigned int i; fp@1515: fp@1515: for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) { fp@1515: unsigned int entry = i % NUM_TX_DESC; fp@1515: struct ring_info *tx_skb = tp->tx_skb + entry; fp@1515: unsigned int len = tx_skb->len; fp@1515: fp@1515: if (len) { fp@1515: struct sk_buff *skb = tx_skb->skb; fp@1515: fp@1515: rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, fp@1515: tp->TxDescArray + entry); fp@1515: if (skb) { fp@1515: if (!tp->ecdev) fp@1515: dev_kfree_skb(skb); fp@1515: tx_skb->skb = NULL; fp@1515: } fp@1515: tp->dev->stats.tx_dropped++; fp@1515: } fp@1515: } fp@1515: tp->cur_tx = tp->dirty_tx = 0; fp@1515: } fp@1515: fp@1515: static void rtl8169_schedule_work(struct net_device *dev, work_func_t task) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: PREPARE_DELAYED_WORK(&tp->task, task); fp@1515: schedule_delayed_work(&tp->task, 4); fp@1515: } fp@1515: fp@1515: static void rtl8169_wait_for_quiescence(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: fp@1515: synchronize_irq(dev->irq); fp@1515: fp@1515: /* Wait for any pending NAPI task to complete */ fp@1515: napi_disable(&tp->napi); fp@1515: fp@1515: rtl8169_irq_mask_and_ack(ioaddr); fp@1515: fp@1515: tp->intr_mask = 0xffff; fp@1515: RTL_W16(IntrMask, tp->intr_event); fp@1515: napi_enable(&tp->napi); fp@1515: } fp@1515: fp@1515: static void rtl8169_reinit_task(struct work_struct *work) fp@1515: { fp@1515: struct rtl8169_private *tp = fp@1515: container_of(work, struct rtl8169_private, task.work); fp@1515: struct net_device *dev = tp->dev; fp@1515: int ret; fp@1515: fp@1515: rtnl_lock(); fp@1515: fp@1515: if (!netif_running(dev)) fp@1515: goto out_unlock; fp@1515: fp@1515: rtl8169_wait_for_quiescence(dev); fp@1515: rtl8169_close(dev); fp@1515: fp@1515: ret = rtl8169_open(dev); fp@1515: if (unlikely(ret < 0)) { fp@1515: if (net_ratelimit() && netif_msg_drv(tp)) { fp@1515: printk(KERN_ERR PFX "%s: reinit failure (status = %d)." fp@1515: " Rescheduling.\n", dev->name, ret); fp@1515: } fp@1515: rtl8169_schedule_work(dev, rtl8169_reinit_task); fp@1515: } fp@1515: fp@1515: out_unlock: fp@1515: rtnl_unlock(); fp@1515: } fp@1515: fp@1515: static void rtl8169_reset_task(struct work_struct *work) fp@1515: { fp@1515: struct rtl8169_private *tp = fp@1515: container_of(work, struct rtl8169_private, task.work); fp@1515: struct net_device *dev = tp->dev; fp@1515: fp@1515: rtnl_lock(); fp@1515: fp@1515: if (!netif_running(dev)) fp@1515: goto out_unlock; fp@1515: fp@1515: rtl8169_wait_for_quiescence(dev); fp@1515: fp@1515: rtl8169_rx_interrupt(dev, tp, tp->mmio_addr, ~(u32)0); fp@1515: rtl8169_tx_clear(tp); fp@1515: fp@1515: if (tp->dirty_rx == tp->cur_rx) { fp@1515: rtl8169_init_ring_indexes(tp); fp@1515: rtl_hw_start(dev); fp@1515: netif_wake_queue(dev); fp@1515: rtl8169_check_link_status(dev, tp, tp->mmio_addr); fp@1515: } else { fp@1515: if (net_ratelimit() && netif_msg_intr(tp)) { fp@1515: printk(KERN_EMERG PFX "%s: Rx buffers shortage\n", fp@1515: dev->name); fp@1515: } fp@1515: rtl8169_schedule_work(dev, rtl8169_reset_task); fp@1515: } fp@1515: fp@1515: out_unlock: fp@1515: rtnl_unlock(); fp@1515: } fp@1515: fp@1515: static void rtl8169_tx_timeout(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: if (tp->ecdev) fp@1515: return; fp@1515: fp@1515: rtl8169_hw_reset(tp->mmio_addr); fp@1515: fp@1515: /* Let's wait a bit while any (async) irq lands on */ fp@1515: rtl8169_schedule_work(dev, rtl8169_reset_task); fp@1515: } fp@1515: fp@1515: static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb, fp@1515: u32 opts1) fp@1515: { fp@1515: struct skb_shared_info *info = skb_shinfo(skb); fp@1515: unsigned int cur_frag, entry; fp@1515: struct TxDesc * uninitialized_var(txd); fp@1515: fp@1515: entry = tp->cur_tx; fp@1515: for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) { fp@1515: skb_frag_t *frag = info->frags + cur_frag; fp@1515: dma_addr_t mapping; fp@1515: u32 status, len; fp@1515: void *addr; fp@1515: fp@1515: entry = (entry + 1) % NUM_TX_DESC; fp@1515: fp@1515: txd = tp->TxDescArray + entry; fp@1515: len = frag->size; fp@1515: addr = ((void *) page_address(frag->page)) + frag->page_offset; fp@1515: mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE); fp@1515: fp@1515: /* anti gcc 2.95.3 bugware (sic) */ fp@1515: status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); fp@1515: fp@1515: txd->opts1 = cpu_to_le32(status); fp@1515: txd->addr = cpu_to_le64(mapping); fp@1515: fp@1515: tp->tx_skb[entry].len = len; fp@1515: } fp@1515: fp@1515: if (cur_frag) { fp@1515: tp->tx_skb[entry].skb = skb; fp@1515: txd->opts1 |= cpu_to_le32(LastFrag); fp@1515: } fp@1515: fp@1515: return cur_frag; fp@1515: } fp@1515: fp@1515: static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev) fp@1515: { fp@1515: if (dev->features & NETIF_F_TSO) { fp@1515: u32 mss = skb_shinfo(skb)->gso_size; fp@1515: fp@1515: if (mss) fp@1515: return LargeSend | ((mss & MSSMask) << MSSShift); fp@1515: } fp@1515: if (skb->ip_summed == CHECKSUM_PARTIAL) { fp@1515: const struct iphdr *ip = ip_hdr(skb); fp@1515: fp@1515: if (ip->protocol == IPPROTO_TCP) fp@1515: return IPCS | TCPCS; fp@1515: else if (ip->protocol == IPPROTO_UDP) fp@1515: return IPCS | UDPCS; fp@1515: WARN_ON(1); /* we need a WARN() */ fp@1515: } fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC; fp@1515: struct TxDesc *txd = tp->TxDescArray + entry; fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: dma_addr_t mapping; fp@1515: u32 status, len; fp@1515: u32 opts1; fp@1515: int ret = NETDEV_TX_OK; fp@1515: fp@1515: if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) { fp@1515: if (netif_msg_drv(tp)) { fp@1515: printk(KERN_ERR fp@1515: "%s: BUG! Tx Ring full when queue awake!\n", fp@1515: dev->name); fp@1515: } fp@1515: goto err_stop; fp@1515: } fp@1515: fp@1515: if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) fp@1515: goto err_stop; fp@1515: fp@1515: opts1 = DescOwn | rtl8169_tso_csum(skb, dev); fp@1515: fp@1515: frags = rtl8169_xmit_frags(tp, skb, opts1); fp@1515: if (frags) { fp@1515: len = skb_headlen(skb); fp@1515: opts1 |= FirstFrag; fp@1515: } else { fp@1515: len = skb->len; fp@1515: opts1 |= FirstFrag | LastFrag; fp@1515: tp->tx_skb[entry].skb = skb; fp@1515: } fp@1515: fp@1515: mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE); fp@1515: fp@1515: tp->tx_skb[entry].len = len; fp@1515: txd->addr = cpu_to_le64(mapping); fp@1515: txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb)); fp@1515: fp@1515: wmb(); fp@1515: fp@1515: /* anti gcc 2.95.3 bugware (sic) */ fp@1515: status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC)); fp@1515: txd->opts1 = cpu_to_le32(status); fp@1515: fp@1515: dev->trans_start = jiffies; fp@1515: fp@1515: tp->cur_tx += frags + 1; fp@1515: fp@1515: smp_wmb(); fp@1515: fp@1515: RTL_W8(TxPoll, NPQ); /* set polling bit */ fp@1515: fp@1515: if (!tp->ecdev) { fp@1515: if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) { fp@1515: netif_stop_queue(dev); fp@1515: smp_rmb(); fp@1515: if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS) fp@1515: netif_wake_queue(dev); fp@1515: } fp@1515: } fp@1515: fp@1515: out: fp@1515: return ret; fp@1515: fp@1515: err_stop: fp@1515: if (!tp->ecdev) fp@1515: netif_stop_queue(dev); fp@1515: ret = NETDEV_TX_BUSY; fp@1515: dev->stats.tx_dropped++; fp@1515: goto out; fp@1515: } fp@1515: fp@1515: static void rtl8169_pcierr_interrupt(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: u16 pci_status, pci_cmd; fp@1515: fp@1515: pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd); fp@1515: pci_read_config_word(pdev, PCI_STATUS, &pci_status); fp@1515: fp@1515: if (netif_msg_intr(tp)) { fp@1515: printk(KERN_ERR fp@1515: "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n", fp@1515: dev->name, pci_cmd, pci_status); fp@1515: } fp@1515: fp@1515: /* fp@1515: * The recovery sequence below admits a very elaborated explanation: fp@1515: * - it seems to work; fp@1515: * - I did not see what else could be done; fp@1515: * - it makes iop3xx happy. fp@1515: * fp@1515: * Feel free to adjust to your needs. fp@1515: */ fp@1515: if (pdev->broken_parity_status) fp@1515: pci_cmd &= ~PCI_COMMAND_PARITY; fp@1515: else fp@1515: pci_cmd |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY; fp@1515: fp@1515: pci_write_config_word(pdev, PCI_COMMAND, pci_cmd); fp@1515: fp@1515: pci_write_config_word(pdev, PCI_STATUS, fp@1515: pci_status & (PCI_STATUS_DETECTED_PARITY | fp@1515: PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT | fp@1515: PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT)); fp@1515: fp@1515: /* The infamous DAC f*ckup only happens at boot time */ fp@1515: if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) { fp@1515: if (netif_msg_intr(tp)) fp@1515: printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name); fp@1515: tp->cp_cmd &= ~PCIDAC; fp@1515: RTL_W16(CPlusCmd, tp->cp_cmd); fp@1515: dev->features &= ~NETIF_F_HIGHDMA; fp@1515: } fp@1515: fp@1515: rtl8169_hw_reset(ioaddr); fp@1515: fp@1515: rtl8169_schedule_work(dev, rtl8169_reinit_task); fp@1515: } fp@1515: fp@1515: static void rtl8169_tx_interrupt(struct net_device *dev, fp@1515: struct rtl8169_private *tp, fp@1515: void __iomem *ioaddr) fp@1515: { fp@1515: unsigned int dirty_tx, tx_left; fp@1515: fp@1515: dirty_tx = tp->dirty_tx; fp@1515: smp_rmb(); fp@1515: tx_left = tp->cur_tx - dirty_tx; fp@1515: fp@1515: while (tx_left > 0) { fp@1515: unsigned int entry = dirty_tx % NUM_TX_DESC; fp@1515: struct ring_info *tx_skb = tp->tx_skb + entry; fp@1515: u32 len = tx_skb->len; fp@1515: u32 status; fp@1515: fp@1515: rmb(); fp@1515: status = le32_to_cpu(tp->TxDescArray[entry].opts1); fp@1515: if (status & DescOwn) fp@1515: break; fp@1515: fp@1515: dev->stats.tx_bytes += len; fp@1515: dev->stats.tx_packets++; fp@1515: fp@1515: rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry); fp@1515: fp@1515: if (status & LastFrag) { fp@1515: if (!tp->ecdev) fp@1515: dev_kfree_skb_irq(tx_skb->skb); fp@1515: tx_skb->skb = NULL; fp@1515: } fp@1515: dirty_tx++; fp@1515: tx_left--; fp@1515: } fp@1515: fp@1515: if (tp->dirty_tx != dirty_tx) { fp@1515: tp->dirty_tx = dirty_tx; fp@1515: smp_wmb(); fp@1515: if (!tp->ecdev && netif_queue_stopped(dev) && fp@1515: (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) { fp@1515: netif_wake_queue(dev); fp@1515: } fp@1515: /* fp@1515: * 8168 hack: TxPoll requests are lost when the Tx packets are fp@1515: * too close. Let's kick an extra TxPoll request when a burst fp@1515: * of start_xmit activity is detected (if it is not detected, fp@1515: * it is slow enough). -- FR fp@1515: */ fp@1515: smp_rmb(); fp@1515: if (tp->cur_tx != dirty_tx) fp@1515: RTL_W8(TxPoll, NPQ); fp@1515: } fp@1515: } fp@1515: fp@1515: static inline int rtl8169_fragmented_frame(u32 status) fp@1515: { fp@1515: return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag); fp@1515: } fp@1515: fp@1515: static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc) fp@1515: { fp@1515: u32 opts1 = le32_to_cpu(desc->opts1); fp@1515: u32 status = opts1 & RxProtoMask; fp@1515: fp@1515: if (((status == RxProtoTCP) && !(opts1 & TCPFail)) || fp@1515: ((status == RxProtoUDP) && !(opts1 & UDPFail)) || fp@1515: ((status == RxProtoIP) && !(opts1 & IPFail))) fp@1515: skb->ip_summed = CHECKSUM_UNNECESSARY; fp@1515: else fp@1515: skb->ip_summed = CHECKSUM_NONE; fp@1515: } fp@1515: fp@1515: static inline bool rtl8169_try_rx_copy(struct sk_buff **sk_buff, fp@1515: struct rtl8169_private *tp, int pkt_size, fp@1515: dma_addr_t addr) fp@1515: { fp@1515: struct sk_buff *skb; fp@1515: bool done = false; fp@1515: fp@1515: if (pkt_size >= rx_copybreak) fp@1515: goto out; fp@1515: fp@1515: skb = netdev_alloc_skb(tp->dev, pkt_size + NET_IP_ALIGN); fp@1515: if (!skb) fp@1515: goto out; fp@1515: fp@1515: pci_dma_sync_single_for_cpu(tp->pci_dev, addr, pkt_size, fp@1515: PCI_DMA_FROMDEVICE); fp@1515: skb_reserve(skb, NET_IP_ALIGN); fp@1515: skb_copy_from_linear_data(*sk_buff, skb->data, pkt_size); fp@1515: *sk_buff = skb; fp@1515: done = true; fp@1515: out: fp@1515: return done; fp@1515: } fp@1515: fp@1515: static int rtl8169_rx_interrupt(struct net_device *dev, fp@1515: struct rtl8169_private *tp, fp@1515: void __iomem *ioaddr, u32 budget) fp@1515: { fp@1515: unsigned int cur_rx, rx_left; fp@1515: unsigned int delta, count; fp@1515: fp@1515: cur_rx = tp->cur_rx; fp@1515: rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx; fp@1515: rx_left = min(rx_left, budget); fp@1515: fp@1515: for (; rx_left > 0; rx_left--, cur_rx++) { fp@1515: unsigned int entry = cur_rx % NUM_RX_DESC; fp@1515: struct RxDesc *desc = tp->RxDescArray + entry; fp@1515: u32 status; fp@1515: fp@1515: rmb(); fp@1515: status = le32_to_cpu(desc->opts1); fp@1515: fp@1515: if (status & DescOwn) fp@1515: break; fp@1515: if (unlikely(status & RxRES)) { fp@1515: if (netif_msg_rx_err(tp)) { fp@1515: printk(KERN_INFO fp@1515: "%s: Rx ERROR. status = %08x\n", fp@1515: dev->name, status); fp@1515: } fp@1515: dev->stats.rx_errors++; fp@1515: if (status & (RxRWT | RxRUNT)) fp@1515: dev->stats.rx_length_errors++; fp@1515: if (status & RxCRC) fp@1515: dev->stats.rx_crc_errors++; fp@1515: if (status & RxFOVF) { fp@1515: if (!tp->ecdev) fp@1515: rtl8169_schedule_work(dev, rtl8169_reset_task); fp@1515: dev->stats.rx_fifo_errors++; fp@1515: } fp@1515: rtl8169_mark_to_asic(desc, tp->rx_buf_sz); fp@1515: } else { fp@1515: struct sk_buff *skb = tp->Rx_skbuff[entry]; fp@1515: dma_addr_t addr = le64_to_cpu(desc->addr); fp@1515: int pkt_size = (status & 0x00001FFF) - 4; fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: /* fp@1515: * The driver does not support incoming fragmented fp@1515: * frames. They are seen as a symptom of over-mtu fp@1515: * sized frames. fp@1515: */ fp@1515: if (unlikely(rtl8169_fragmented_frame(status))) { fp@1515: dev->stats.rx_dropped++; fp@1515: dev->stats.rx_length_errors++; fp@1515: rtl8169_mark_to_asic(desc, tp->rx_buf_sz); fp@1515: continue; fp@1515: } fp@1515: fp@1515: rtl8169_rx_csum(skb, desc); fp@1515: fp@1515: if (tp->ecdev) { fp@1515: pci_dma_sync_single_for_cpu(pdev, addr, pkt_size, fp@1515: PCI_DMA_FROMDEVICE); fp@1515: fp@1515: ecdev_receive(tp->ecdev, skb->data, pkt_size); fp@1515: fp@1515: pci_dma_sync_single_for_device(pdev, addr, fp@1515: pkt_size, PCI_DMA_FROMDEVICE); fp@1515: rtl8169_mark_to_asic(desc, tp->rx_buf_sz); fp@1515: fp@1515: // No need to detect link status as fp@1515: // long as frames are received: Reset watchdog. fp@1515: tp->ec_watchdog_jiffies = jiffies; fp@1515: } else { fp@1515: if (rtl8169_try_rx_copy(&skb, tp, pkt_size, addr)) { fp@1515: pci_dma_sync_single_for_device(pdev, addr, fp@1515: pkt_size, PCI_DMA_FROMDEVICE); fp@1515: rtl8169_mark_to_asic(desc, tp->rx_buf_sz); fp@1515: } else { fp@1515: pci_unmap_single(pdev, addr, tp->rx_buf_sz, fp@1515: PCI_DMA_FROMDEVICE); fp@1515: tp->Rx_skbuff[entry] = NULL; fp@1515: } fp@1515: fp@1515: skb_put(skb, pkt_size); fp@1515: skb->protocol = eth_type_trans(skb, dev); fp@1515: fp@1515: if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0) fp@1515: netif_receive_skb(skb); fp@1515: } fp@1515: fp@1515: dev->stats.rx_bytes += pkt_size; fp@1515: dev->stats.rx_packets++; fp@1515: } fp@1515: fp@1515: /* Work around for AMD plateform. */ fp@1515: if ((desc->opts2 & cpu_to_le32(0xfffe000)) && fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_05)) { fp@1515: desc->opts2 = 0; fp@1515: cur_rx++; fp@1515: } fp@1515: } fp@1515: fp@1515: count = cur_rx - tp->cur_rx; fp@1515: tp->cur_rx = cur_rx; fp@1515: fp@1515: if (tp->ecdev) { fp@1515: /* descriptors are cleaned up immediately. */ fp@1515: tp->dirty_rx = tp->cur_rx; fp@1515: } else { fp@1515: delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx); fp@1515: if (!delta && count && netif_msg_intr(tp)) fp@1515: printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name); fp@1515: tp->dirty_rx += delta; fp@1515: fp@1515: /* fp@1515: * FIXME: until there is periodic timer to try and refill the ring, fp@1515: * a temporary shortage may definitely kill the Rx process. fp@1515: * - disable the asic to try and avoid an overflow and kick it again fp@1515: * after refill ? fp@1515: * - how do others driver handle this condition (Uh oh...). fp@1515: */ fp@1515: if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp)) fp@1515: printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name); fp@1515: } fp@1515: fp@1515: return count; fp@1515: } fp@1515: fp@1515: static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) fp@1515: { fp@1515: struct net_device *dev = dev_instance; fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: int handled = 0; fp@1515: int status; fp@1515: fp@1515: status = RTL_R16(IntrStatus); fp@1515: fp@1515: /* hotplug/major error/no more work/shared irq */ fp@1515: if ((status == 0xffff) || !status) fp@1515: goto out; fp@1515: fp@1515: handled = 1; fp@1515: fp@1515: if (unlikely(!tp->ecdev && !netif_running(dev))) { fp@1515: rtl8169_asic_down(ioaddr); fp@1515: goto out; fp@1515: } fp@1515: fp@1515: status &= tp->intr_mask; fp@1515: RTL_W16(IntrStatus, fp@1515: (status & RxFIFOOver) ? (status | RxOverflow) : status); fp@1515: fp@1515: if (!(status & tp->intr_event)) fp@1515: goto out; fp@1515: fp@1515: /* Work around for rx fifo overflow */ fp@1515: if (unlikely(status & RxFIFOOver) && fp@1515: (tp->mac_version == RTL_GIGA_MAC_VER_11)) { fp@1515: netif_stop_queue(dev); fp@1515: rtl8169_tx_timeout(dev); fp@1515: goto out; fp@1515: } fp@1515: fp@1515: if (unlikely(status & SYSErr)) { fp@1515: rtl8169_pcierr_interrupt(dev); fp@1515: goto out; fp@1515: } fp@1515: fp@1515: if (status & LinkChg) fp@1515: rtl8169_check_link_status(dev, tp, ioaddr); fp@1515: fp@1515: if (status & tp->napi_event) { fp@1515: RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event); fp@1515: tp->intr_mask = ~tp->napi_event; fp@1515: fp@1515: if (likely(netif_rx_schedule_prep(&tp->napi))) fp@1515: __netif_rx_schedule(&tp->napi); fp@1515: else if (netif_msg_intr(tp)) { fp@1515: printk(KERN_INFO "%s: interrupt %04x in poll\n", fp@1515: dev->name, status); fp@1515: } fp@1515: } fp@1515: out: fp@1515: return IRQ_RETVAL(handled); fp@1515: } fp@1515: fp@1515: static void ec_poll(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: rtl8169_interrupt(pdev->irq, dev); fp@1515: rtl8169_rx_interrupt(dev, tp, tp->mmio_addr, 100); // FIXME fp@1515: rtl8169_tx_interrupt(dev, tp, tp->mmio_addr); fp@1515: fp@1515: if (jiffies - tp->ec_watchdog_jiffies >= 2 * HZ) { fp@1515: rtl8169_phy_timer((unsigned long) dev); fp@1515: tp->ec_watchdog_jiffies = jiffies; fp@1515: } fp@1515: } fp@1515: fp@1515: static int rtl8169_poll(struct napi_struct *napi, int budget) fp@1515: { fp@1515: struct rtl8169_private *tp = container_of(napi, struct rtl8169_private, napi); fp@1515: struct net_device *dev = tp->dev; fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: int work_done; fp@1515: fp@1515: work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget); fp@1515: rtl8169_tx_interrupt(dev, tp, ioaddr); fp@1515: fp@1515: if (work_done < budget) { fp@1515: netif_rx_complete(napi); fp@1515: tp->intr_mask = 0xffff; fp@1515: /* fp@1515: * 20040426: the barrier is not strictly required but the fp@1515: * behavior of the irq handler could be less predictable fp@1515: * without it. Btw, the lack of flush for the posted pci fp@1515: * write is safe - FR fp@1515: */ fp@1515: smp_wmb(); fp@1515: RTL_W16(IntrMask, tp->intr_event); fp@1515: } fp@1515: fp@1515: return work_done; fp@1515: } fp@1515: fp@1515: static void rtl8169_rx_missed(struct net_device *dev, void __iomem *ioaddr) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: if (tp->mac_version > RTL_GIGA_MAC_VER_06) fp@1515: return; fp@1515: fp@1515: dev->stats.rx_missed_errors += (RTL_R32(RxMissed) & 0xffffff); fp@1515: RTL_W32(RxMissed, 0); fp@1515: } fp@1515: fp@1515: static void rtl8169_down(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned int intrmask; fp@1515: fp@1515: rtl8169_delete_timer(dev); fp@1515: fp@1515: if (!tp->ecdev) { fp@1515: netif_stop_queue(dev); fp@1515: fp@1515: napi_disable(&tp->napi); fp@1515: fp@1515: } fp@1515: core_down: fp@1515: if (!tp->ecdev) fp@1515: spin_lock_irq(&tp->lock); fp@1515: fp@1515: rtl8169_asic_down(ioaddr); fp@1515: fp@1515: rtl8169_rx_missed(dev, ioaddr); fp@1515: fp@1515: if (!tp->ecdev) fp@1515: spin_unlock_irq(&tp->lock); fp@1515: fp@1515: if (!tp->ecdev) fp@1515: synchronize_irq(dev->irq); fp@1515: fp@1515: /* Give a racing hard_start_xmit a few cycles to complete. */ fp@1515: synchronize_sched(); /* FIXME: should this be synchronize_irq()? */ fp@1515: fp@1515: /* fp@1515: * And now for the 50k$ question: are IRQ disabled or not ? fp@1515: * fp@1515: * Two paths lead here: fp@1515: * 1) dev->close fp@1515: * -> netif_running() is available to sync the current code and the fp@1515: * IRQ handler. See rtl8169_interrupt for details. fp@1515: * 2) dev->change_mtu fp@1515: * -> rtl8169_poll can not be issued again and re-enable the fp@1515: * interruptions. Let's simply issue the IRQ down sequence again. fp@1515: * fp@1515: * No loop if hotpluged or major error (0xffff). fp@1515: */ fp@1515: intrmask = RTL_R16(IntrMask); fp@1515: if (intrmask && (intrmask != 0xffff)) fp@1515: goto core_down; fp@1515: fp@1515: rtl8169_tx_clear(tp); fp@1515: fp@1515: rtl8169_rx_clear(tp); fp@1515: } fp@1515: fp@1515: static int rtl8169_close(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: struct pci_dev *pdev = tp->pci_dev; fp@1515: fp@1515: /* update counters before going down */ fp@1515: rtl8169_update_counters(dev); fp@1515: fp@1515: rtl8169_down(dev); fp@1515: fp@1515: if (!tp->ecdev) fp@1515: free_irq(dev->irq, dev); fp@1515: fp@1515: pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray, fp@1515: tp->RxPhyAddr); fp@1515: pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray, fp@1515: tp->TxPhyAddr); fp@1515: tp->TxDescArray = NULL; fp@1515: tp->RxDescArray = NULL; fp@1515: fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static void rtl_set_rx_mode(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned long flags; fp@1515: u32 mc_filter[2]; /* Multicast hash filter */ fp@1515: int rx_mode; fp@1515: u32 tmp = 0; fp@1515: fp@1515: if (dev->flags & IFF_PROMISC) { fp@1515: /* Unconditionally log net taps. */ fp@1515: if (netif_msg_link(tp)) { fp@1515: printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", fp@1515: dev->name); fp@1515: } fp@1515: rx_mode = fp@1515: AcceptBroadcast | AcceptMulticast | AcceptMyPhys | fp@1515: AcceptAllPhys; fp@1515: mc_filter[1] = mc_filter[0] = 0xffffffff; fp@1515: } else if ((dev->mc_count > multicast_filter_limit) fp@1515: || (dev->flags & IFF_ALLMULTI)) { fp@1515: /* Too many to filter perfectly -- accept all multicasts. */ fp@1515: rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; fp@1515: mc_filter[1] = mc_filter[0] = 0xffffffff; fp@1515: } else { fp@1515: struct dev_mc_list *mclist; fp@1515: unsigned int i; fp@1515: fp@1515: rx_mode = AcceptBroadcast | AcceptMyPhys; fp@1515: mc_filter[1] = mc_filter[0] = 0; fp@1515: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; fp@1515: i++, mclist = mclist->next) { fp@1515: int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; fp@1515: mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); fp@1515: rx_mode |= AcceptMulticast; fp@1515: } fp@1515: } fp@1515: fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: fp@1515: tmp = rtl8169_rx_config | rx_mode | fp@1515: (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); fp@1515: fp@1515: if (tp->mac_version > RTL_GIGA_MAC_VER_06) { fp@1515: u32 data = mc_filter[0]; fp@1515: fp@1515: mc_filter[0] = swab32(mc_filter[1]); fp@1515: mc_filter[1] = swab32(data); fp@1515: } fp@1515: fp@1515: RTL_W32(MAR0 + 0, mc_filter[0]); fp@1515: RTL_W32(MAR0 + 4, mc_filter[1]); fp@1515: fp@1515: RTL_W32(RxConfig, tmp); fp@1515: fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: } fp@1515: fp@1515: /** fp@1515: * rtl8169_get_stats - Get rtl8169 read/write statistics fp@1515: * @dev: The Ethernet Device to get statistics for fp@1515: * fp@1515: * Get TX/RX statistics for rtl8169 fp@1515: */ fp@1515: static struct net_device_stats *rtl8169_get_stats(struct net_device *dev) fp@1515: { fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: unsigned long flags; fp@1515: fp@1515: if (netif_running(dev)) { fp@1515: spin_lock_irqsave(&tp->lock, flags); fp@1515: rtl8169_rx_missed(dev, ioaddr); fp@1515: spin_unlock_irqrestore(&tp->lock, flags); fp@1515: } fp@1515: fp@1515: return &dev->stats; fp@1515: } fp@1515: fp@1515: #ifdef CONFIG_PM fp@1515: fp@1515: static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state) fp@1515: { fp@1515: struct net_device *dev = pci_get_drvdata(pdev); fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: void __iomem *ioaddr = tp->mmio_addr; fp@1515: fp@1515: if (tp->ecdev) fp@1515: return -EBUSY; fp@1515: fp@1515: if (!netif_running(dev)) fp@1515: goto out_pci_suspend; fp@1515: fp@1515: netif_device_detach(dev); fp@1515: netif_stop_queue(dev); fp@1515: fp@1515: spin_lock_irq(&tp->lock); fp@1515: fp@1515: rtl8169_asic_down(ioaddr); fp@1515: fp@1515: rtl8169_rx_missed(dev, ioaddr); fp@1515: fp@1515: spin_unlock_irq(&tp->lock); fp@1515: fp@1515: out_pci_suspend: fp@1515: pci_save_state(pdev); fp@1515: pci_enable_wake(pdev, pci_choose_state(pdev, state), fp@1515: (tp->features & RTL_FEATURE_WOL) ? 1 : 0); fp@1515: pci_set_power_state(pdev, pci_choose_state(pdev, state)); fp@1515: fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static int rtl8169_resume(struct pci_dev *pdev) fp@1515: { fp@1515: struct net_device *dev = pci_get_drvdata(pdev); fp@1515: struct rtl8169_private *tp = netdev_priv(dev); fp@1515: fp@1515: if (tp->ecdev) fp@1515: return -EBUSY; fp@1515: fp@1515: pci_set_power_state(pdev, PCI_D0); fp@1515: pci_restore_state(pdev); fp@1515: pci_enable_wake(pdev, PCI_D0, 0); fp@1515: fp@1515: if (!netif_running(dev)) fp@1515: goto out; fp@1515: fp@1515: netif_device_attach(dev); fp@1515: fp@1515: rtl8169_schedule_work(dev, rtl8169_reset_task); fp@1515: out: fp@1515: return 0; fp@1515: } fp@1515: fp@1515: static void rtl_shutdown(struct pci_dev *pdev) fp@1515: { fp@1515: rtl8169_suspend(pdev, PMSG_SUSPEND); fp@1515: } fp@1515: fp@1515: #endif /* CONFIG_PM */ fp@1515: fp@1515: static struct pci_driver rtl8169_pci_driver = { fp@1515: .name = MODULENAME, fp@1515: .id_table = rtl8169_pci_tbl, fp@1515: .probe = rtl8169_init_one, fp@1515: .remove = __devexit_p(rtl8169_remove_one), fp@1515: #ifdef CONFIG_PM fp@1515: .suspend = rtl8169_suspend, fp@1515: .resume = rtl8169_resume, fp@1515: .shutdown = rtl_shutdown, fp@1515: #endif fp@1515: }; fp@1515: fp@1515: static int __init rtl8169_init_module(void) fp@1515: { fp@1515: return pci_register_driver(&rtl8169_pci_driver); fp@1515: } fp@1515: fp@1515: static void __exit rtl8169_cleanup_module(void) fp@1515: { fp@1515: pci_unregister_driver(&rtl8169_pci_driver); fp@1515: } fp@1515: fp@1515: module_init(rtl8169_init_module); fp@1515: module_exit(rtl8169_cleanup_module);