fp@1812: /******************************************************************************* fp@1812: fp@1812: Intel PRO/100 Linux driver fp@1812: Copyright(c) 1999 - 2006 Intel Corporation. fp@1812: fp@1812: This program is free software; you can redistribute it and/or modify it fp@1812: under the terms and conditions of the GNU General Public License, fp@1812: version 2, as published by the Free Software Foundation. fp@1812: fp@1812: This program is distributed in the hope it will be useful, but WITHOUT fp@1812: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or fp@1812: FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for fp@1812: more details. fp@1812: fp@1812: You should have received a copy of the GNU General Public License along with fp@1812: this program; if not, write to the Free Software Foundation, Inc., fp@1812: 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. fp@1812: fp@1812: The full GNU General Public License is included in this distribution in fp@1812: the file called "COPYING". fp@1812: fp@1812: Contact Information: fp@1812: Linux NICS fp@1812: e1000-devel Mailing List fp@1812: Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 fp@1812: fp@1812: *******************************************************************************/ fp@1812: fp@1812: /* fp@1812: * e100.c: Intel(R) PRO/100 ethernet driver fp@1812: * fp@1812: * (Re)written 2003 by scott.feldman@intel.com. Based loosely on fp@1812: * original e100 driver, but better described as a munging of fp@1812: * e100, e1000, eepro100, tg3, 8139cp, and other drivers. fp@1812: * fp@1812: * References: fp@1812: * Intel 8255x 10/100 Mbps Ethernet Controller Family, fp@1812: * Open Source Software Developers Manual, fp@1812: * http://sourceforge.net/projects/e1000 fp@1812: * fp@1812: * fp@1812: * Theory of Operation fp@1812: * fp@1812: * I. General fp@1812: * fp@1812: * The driver supports Intel(R) 10/100 Mbps PCI Fast Ethernet fp@1812: * controller family, which includes the 82557, 82558, 82559, 82550, fp@1812: * 82551, and 82562 devices. 82558 and greater controllers fp@1812: * integrate the Intel 82555 PHY. The controllers are used in fp@1812: * server and client network interface cards, as well as in fp@1812: * LAN-On-Motherboard (LOM), CardBus, MiniPCI, and ICHx fp@1812: * configurations. 8255x supports a 32-bit linear addressing fp@1812: * mode and operates at 33Mhz PCI clock rate. fp@1812: * fp@1812: * II. Driver Operation fp@1812: * fp@1812: * Memory-mapped mode is used exclusively to access the device's fp@1812: * shared-memory structure, the Control/Status Registers (CSR). All fp@1812: * setup, configuration, and control of the device, including queuing fp@1812: * of Tx, Rx, and configuration commands is through the CSR. fp@1812: * cmd_lock serializes accesses to the CSR command register. cb_lock fp@1812: * protects the shared Command Block List (CBL). fp@1812: * fp@1812: * 8255x is highly MII-compliant and all access to the PHY go fp@1812: * through the Management Data Interface (MDI). Consequently, the fp@1812: * driver leverages the mii.c library shared with other MII-compliant fp@1812: * devices. fp@1812: * fp@1812: * Big- and Little-Endian byte order as well as 32- and 64-bit fp@1812: * archs are supported. Weak-ordered memory and non-cache-coherent fp@1812: * archs are supported. fp@1812: * fp@1812: * III. Transmit fp@1812: * fp@1812: * A Tx skb is mapped and hangs off of a TCB. TCBs are linked fp@1812: * together in a fixed-size ring (CBL) thus forming the flexible mode fp@1812: * memory structure. A TCB marked with the suspend-bit indicates fp@1812: * the end of the ring. The last TCB processed suspends the fp@1812: * controller, and the controller can be restarted by issue a CU fp@1812: * resume command to continue from the suspend point, or a CU start fp@1812: * command to start at a given position in the ring. fp@1812: * fp@1812: * Non-Tx commands (config, multicast setup, etc) are linked fp@1812: * into the CBL ring along with Tx commands. The common structure fp@1812: * used for both Tx and non-Tx commands is the Command Block (CB). fp@1812: * fp@1812: * cb_to_use is the next CB to use for queuing a command; cb_to_clean fp@1812: * is the next CB to check for completion; cb_to_send is the first fp@1812: * CB to start on in case of a previous failure to resume. CB clean fp@1812: * up happens in interrupt context in response to a CU interrupt. fp@1812: * cbs_avail keeps track of number of free CB resources available. fp@1812: * fp@1812: * Hardware padding of short packets to minimum packet size is fp@1812: * enabled. 82557 pads with 7Eh, while the later controllers pad fp@1812: * with 00h. fp@1812: * fp@1812: * IV. Receive fp@1812: * fp@1812: * The Receive Frame Area (RFA) comprises a ring of Receive Frame fp@1812: * Descriptors (RFD) + data buffer, thus forming the simplified mode fp@1812: * memory structure. Rx skbs are allocated to contain both the RFD fp@1812: * and the data buffer, but the RFD is pulled off before the skb is fp@1812: * indicated. The data buffer is aligned such that encapsulated fp@1812: * protocol headers are u32-aligned. Since the RFD is part of the fp@1812: * mapped shared memory, and completion status is contained within fp@1812: * the RFD, the RFD must be dma_sync'ed to maintain a consistent fp@1812: * view from software and hardware. fp@1812: * fp@1812: * In order to keep updates to the RFD link field from colliding with fp@1812: * hardware writes to mark packets complete, we use the feature that fp@1812: * hardware will not write to a size 0 descriptor and mark the previous fp@1812: * packet as end-of-list (EL). After updating the link, we remove EL fp@1812: * and only then restore the size such that hardware may use the fp@1812: * previous-to-end RFD. fp@1812: * fp@1812: * Under typical operation, the receive unit (RU) is start once, fp@1812: * and the controller happily fills RFDs as frames arrive. If fp@1812: * replacement RFDs cannot be allocated, or the RU goes non-active, fp@1812: * the RU must be restarted. Frame arrival generates an interrupt, fp@1812: * and Rx indication and re-allocation happen in the same context, fp@1812: * therefore no locking is required. A software-generated interrupt fp@1812: * is generated from the watchdog to recover from a failed allocation fp@1812: * scenario where all Rx resources have been indicated and none re- fp@1812: * placed. fp@1812: * fp@1812: * V. Miscellaneous fp@1812: * fp@1812: * VLAN offloading of tagging, stripping and filtering is not fp@1812: * supported, but driver will accommodate the extra 4-byte VLAN tag fp@1812: * for processing by upper layers. Tx/Rx Checksum offloading is not fp@1812: * supported. Tx Scatter/Gather is not supported. Jumbo Frames is fp@1812: * not supported (hardware limitation). fp@1812: * fp@1812: * MagicPacket(tm) WoL support is enabled/disabled via ethtool. fp@1812: * fp@1812: * Thanks to JC (jchapman@katalix.com) for helping with fp@1812: * testing/troubleshooting the development driver. fp@1812: * fp@1812: * TODO: fp@1812: * o several entry points race with dev->close fp@1812: * o check for tx-no-resources/stop Q races with tx clean/wake Q fp@1812: * fp@1812: * FIXES: fp@1812: * 2005/12/02 - Michael O'Donnell fp@1812: * - Stratus87247: protect MDI control register manipulations fp@1812: * 2009/06/01 - Andreas Mohr fp@1812: * - add clean lowlevel I/O emulation for cards with MII-lacking PHYs fp@1812: */ fp@1812: fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: #include fp@1812: fp@1812: fp@1812: #define DRV_NAME "e100" fp@1812: #define DRV_EXT "-NAPI" fp@1812: #define DRV_VERSION "3.5.24-k2"DRV_EXT fp@1812: #define DRV_DESCRIPTION "Intel(R) PRO/100 Network Driver" fp@1812: #define DRV_COPYRIGHT "Copyright(c) 1999-2006 Intel Corporation" fp@1812: #define PFX DRV_NAME ": " fp@1812: fp@1812: #define E100_WATCHDOG_PERIOD (2 * HZ) fp@1812: #define E100_NAPI_WEIGHT 16 fp@1812: fp@1812: #define FIRMWARE_D101M "e100/d101m_ucode.bin" fp@1812: #define FIRMWARE_D101S "e100/d101s_ucode.bin" fp@1812: #define FIRMWARE_D102E "e100/d102e_ucode.bin" fp@1812: fp@1812: MODULE_DESCRIPTION(DRV_DESCRIPTION); fp@1812: MODULE_AUTHOR(DRV_COPYRIGHT); fp@1812: MODULE_LICENSE("GPL"); fp@1812: MODULE_VERSION(DRV_VERSION); fp@1812: MODULE_FIRMWARE(FIRMWARE_D101M); fp@1812: MODULE_FIRMWARE(FIRMWARE_D101S); fp@1812: MODULE_FIRMWARE(FIRMWARE_D102E); fp@1812: fp@1812: static int debug = 3; fp@1812: static int eeprom_bad_csum_allow = 0; fp@1812: static int use_io = 0; fp@1812: module_param(debug, int, 0); fp@1812: module_param(eeprom_bad_csum_allow, int, 0); fp@1812: module_param(use_io, int, 0); fp@1812: MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); fp@1812: MODULE_PARM_DESC(eeprom_bad_csum_allow, "Allow bad eeprom checksums"); fp@1812: MODULE_PARM_DESC(use_io, "Force use of i/o access mode"); fp@1812: #define DPRINTK(nlevel, klevel, fmt, args...) \ fp@1812: (void)((NETIF_MSG_##nlevel & nic->msg_enable) && \ fp@1812: printk(KERN_##klevel PFX "%s: %s: " fmt, nic->netdev->name, \ fp@1812: __func__ , ## args)) fp@1812: fp@1812: #define INTEL_8255X_ETHERNET_DEVICE(device_id, ich) {\ fp@1812: PCI_VENDOR_ID_INTEL, device_id, PCI_ANY_ID, PCI_ANY_ID, \ fp@1812: PCI_CLASS_NETWORK_ETHERNET << 8, 0xFFFF00, ich } fp@1812: static struct pci_device_id e100_id_table[] = { fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1029, 0), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1030, 0), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1031, 3), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1032, 3), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1033, 3), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1034, 3), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1038, 3), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1039, 4), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x103A, 4), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x103B, 4), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x103C, 4), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x103D, 4), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x103E, 4), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1050, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1051, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1052, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1053, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1054, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1055, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1056, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1057, 5), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1059, 0), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1064, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1065, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1066, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1067, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1068, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1069, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x106A, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x106B, 6), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1091, 7), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1092, 7), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1093, 7), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1094, 7), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1095, 7), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x10fe, 7), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1209, 0), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x1229, 0), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x2449, 2), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x2459, 2), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x245D, 2), fp@1812: INTEL_8255X_ETHERNET_DEVICE(0x27DC, 7), fp@1812: { 0, } fp@1812: }; fp@1812: MODULE_DEVICE_TABLE(pci, e100_id_table); fp@1812: fp@1812: enum mac { fp@1812: mac_82557_D100_A = 0, fp@1812: mac_82557_D100_B = 1, fp@1812: mac_82557_D100_C = 2, fp@1812: mac_82558_D101_A4 = 4, fp@1812: mac_82558_D101_B0 = 5, fp@1812: mac_82559_D101M = 8, fp@1812: mac_82559_D101S = 9, fp@1812: mac_82550_D102 = 12, fp@1812: mac_82550_D102_C = 13, fp@1812: mac_82551_E = 14, fp@1812: mac_82551_F = 15, fp@1812: mac_82551_10 = 16, fp@1812: mac_unknown = 0xFF, fp@1812: }; fp@1812: fp@1812: enum phy { fp@1812: phy_100a = 0x000003E0, fp@1812: phy_100c = 0x035002A8, fp@1812: phy_82555_tx = 0x015002A8, fp@1812: phy_nsc_tx = 0x5C002000, fp@1812: phy_82562_et = 0x033002A8, fp@1812: phy_82562_em = 0x032002A8, fp@1812: phy_82562_ek = 0x031002A8, fp@1812: phy_82562_eh = 0x017002A8, fp@1812: phy_82552_v = 0xd061004d, fp@1812: phy_unknown = 0xFFFFFFFF, fp@1812: }; fp@1812: fp@1812: /* CSR (Control/Status Registers) */ fp@1812: struct csr { fp@1812: struct { fp@1812: u8 status; fp@1812: u8 stat_ack; fp@1812: u8 cmd_lo; fp@1812: u8 cmd_hi; fp@1812: u32 gen_ptr; fp@1812: } scb; fp@1812: u32 port; fp@1812: u16 flash_ctrl; fp@1812: u8 eeprom_ctrl_lo; fp@1812: u8 eeprom_ctrl_hi; fp@1812: u32 mdi_ctrl; fp@1812: u32 rx_dma_count; fp@1812: }; fp@1812: fp@1812: enum scb_status { fp@1812: rus_no_res = 0x08, fp@1812: rus_ready = 0x10, fp@1812: rus_mask = 0x3C, fp@1812: }; fp@1812: fp@1812: enum ru_state { fp@1812: RU_SUSPENDED = 0, fp@1812: RU_RUNNING = 1, fp@1812: RU_UNINITIALIZED = -1, fp@1812: }; fp@1812: fp@1812: enum scb_stat_ack { fp@1812: stat_ack_not_ours = 0x00, fp@1812: stat_ack_sw_gen = 0x04, fp@1812: stat_ack_rnr = 0x10, fp@1812: stat_ack_cu_idle = 0x20, fp@1812: stat_ack_frame_rx = 0x40, fp@1812: stat_ack_cu_cmd_done = 0x80, fp@1812: stat_ack_not_present = 0xFF, fp@1812: stat_ack_rx = (stat_ack_sw_gen | stat_ack_rnr | stat_ack_frame_rx), fp@1812: stat_ack_tx = (stat_ack_cu_idle | stat_ack_cu_cmd_done), fp@1812: }; fp@1812: fp@1812: enum scb_cmd_hi { fp@1812: irq_mask_none = 0x00, fp@1812: irq_mask_all = 0x01, fp@1812: irq_sw_gen = 0x02, fp@1812: }; fp@1812: fp@1812: enum scb_cmd_lo { fp@1812: cuc_nop = 0x00, fp@1812: ruc_start = 0x01, fp@1812: ruc_load_base = 0x06, fp@1812: cuc_start = 0x10, fp@1812: cuc_resume = 0x20, fp@1812: cuc_dump_addr = 0x40, fp@1812: cuc_dump_stats = 0x50, fp@1812: cuc_load_base = 0x60, fp@1812: cuc_dump_reset = 0x70, fp@1812: }; fp@1812: fp@1812: enum cuc_dump { fp@1812: cuc_dump_complete = 0x0000A005, fp@1812: cuc_dump_reset_complete = 0x0000A007, fp@1812: }; fp@1812: fp@1812: enum port { fp@1812: software_reset = 0x0000, fp@1812: selftest = 0x0001, fp@1812: selective_reset = 0x0002, fp@1812: }; fp@1812: fp@1812: enum eeprom_ctrl_lo { fp@1812: eesk = 0x01, fp@1812: eecs = 0x02, fp@1812: eedi = 0x04, fp@1812: eedo = 0x08, fp@1812: }; fp@1812: fp@1812: enum mdi_ctrl { fp@1812: mdi_write = 0x04000000, fp@1812: mdi_read = 0x08000000, fp@1812: mdi_ready = 0x10000000, fp@1812: }; fp@1812: fp@1812: enum eeprom_op { fp@1812: op_write = 0x05, fp@1812: op_read = 0x06, fp@1812: op_ewds = 0x10, fp@1812: op_ewen = 0x13, fp@1812: }; fp@1812: fp@1812: enum eeprom_offsets { fp@1812: eeprom_cnfg_mdix = 0x03, fp@1812: eeprom_phy_iface = 0x06, fp@1812: eeprom_id = 0x0A, fp@1812: eeprom_config_asf = 0x0D, fp@1812: eeprom_smbus_addr = 0x90, fp@1812: }; fp@1812: fp@1812: enum eeprom_cnfg_mdix { fp@1812: eeprom_mdix_enabled = 0x0080, fp@1812: }; fp@1812: fp@1812: enum eeprom_phy_iface { fp@1812: NoSuchPhy = 0, fp@1812: I82553AB, fp@1812: I82553C, fp@1812: I82503, fp@1812: DP83840, fp@1812: S80C240, fp@1812: S80C24, fp@1812: I82555, fp@1812: DP83840A = 10, fp@1812: }; fp@1812: fp@1812: enum eeprom_id { fp@1812: eeprom_id_wol = 0x0020, fp@1812: }; fp@1812: fp@1812: enum eeprom_config_asf { fp@1812: eeprom_asf = 0x8000, fp@1812: eeprom_gcl = 0x4000, fp@1812: }; fp@1812: fp@1812: enum cb_status { fp@1812: cb_complete = 0x8000, fp@1812: cb_ok = 0x2000, fp@1812: }; fp@1812: fp@1812: enum cb_command { fp@1812: cb_nop = 0x0000, fp@1812: cb_iaaddr = 0x0001, fp@1812: cb_config = 0x0002, fp@1812: cb_multi = 0x0003, fp@1812: cb_tx = 0x0004, fp@1812: cb_ucode = 0x0005, fp@1812: cb_dump = 0x0006, fp@1812: cb_tx_sf = 0x0008, fp@1812: cb_cid = 0x1f00, fp@1812: cb_i = 0x2000, fp@1812: cb_s = 0x4000, fp@1812: cb_el = 0x8000, fp@1812: }; fp@1812: fp@1812: struct rfd { fp@1812: __le16 status; fp@1812: __le16 command; fp@1812: __le32 link; fp@1812: __le32 rbd; fp@1812: __le16 actual_size; fp@1812: __le16 size; fp@1812: }; fp@1812: fp@1812: struct rx { fp@1812: struct rx *next, *prev; fp@1812: struct sk_buff *skb; fp@1812: dma_addr_t dma_addr; fp@1812: }; fp@1812: fp@1812: #if defined(__BIG_ENDIAN_BITFIELD) fp@1812: #define X(a,b) b,a fp@1812: #else fp@1812: #define X(a,b) a,b fp@1812: #endif fp@1812: struct config { fp@1812: /*0*/ u8 X(byte_count:6, pad0:2); fp@1812: /*1*/ u8 X(X(rx_fifo_limit:4, tx_fifo_limit:3), pad1:1); fp@1812: /*2*/ u8 adaptive_ifs; fp@1812: /*3*/ u8 X(X(X(X(mwi_enable:1, type_enable:1), read_align_enable:1), fp@1812: term_write_cache_line:1), pad3:4); fp@1812: /*4*/ u8 X(rx_dma_max_count:7, pad4:1); fp@1812: /*5*/ u8 X(tx_dma_max_count:7, dma_max_count_enable:1); fp@1812: /*6*/ u8 X(X(X(X(X(X(X(late_scb_update:1, direct_rx_dma:1), fp@1812: tno_intr:1), cna_intr:1), standard_tcb:1), standard_stat_counter:1), fp@1812: rx_discard_overruns:1), rx_save_bad_frames:1); fp@1812: /*7*/ u8 X(X(X(X(X(rx_discard_short_frames:1, tx_underrun_retry:2), fp@1812: pad7:2), rx_extended_rfd:1), tx_two_frames_in_fifo:1), fp@1812: tx_dynamic_tbd:1); fp@1812: /*8*/ u8 X(X(mii_mode:1, pad8:6), csma_disabled:1); fp@1812: /*9*/ u8 X(X(X(X(X(rx_tcpudp_checksum:1, pad9:3), vlan_arp_tco:1), fp@1812: link_status_wake:1), arp_wake:1), mcmatch_wake:1); fp@1812: /*10*/ u8 X(X(X(pad10:3, no_source_addr_insertion:1), preamble_length:2), fp@1812: loopback:2); fp@1812: /*11*/ u8 X(linear_priority:3, pad11:5); fp@1812: /*12*/ u8 X(X(linear_priority_mode:1, pad12:3), ifs:4); fp@1812: /*13*/ u8 ip_addr_lo; fp@1812: /*14*/ u8 ip_addr_hi; fp@1812: /*15*/ u8 X(X(X(X(X(X(X(promiscuous_mode:1, broadcast_disabled:1), fp@1812: wait_after_win:1), pad15_1:1), ignore_ul_bit:1), crc_16_bit:1), fp@1812: pad15_2:1), crs_or_cdt:1); fp@1812: /*16*/ u8 fc_delay_lo; fp@1812: /*17*/ u8 fc_delay_hi; fp@1812: /*18*/ u8 X(X(X(X(X(rx_stripping:1, tx_padding:1), rx_crc_transfer:1), fp@1812: rx_long_ok:1), fc_priority_threshold:3), pad18:1); fp@1812: /*19*/ u8 X(X(X(X(X(X(X(addr_wake:1, magic_packet_disable:1), fp@1812: fc_disable:1), fc_restop:1), fc_restart:1), fc_reject:1), fp@1812: full_duplex_force:1), full_duplex_pin:1); fp@1812: /*20*/ u8 X(X(X(pad20_1:5, fc_priority_location:1), multi_ia:1), pad20_2:1); fp@1812: /*21*/ u8 X(X(pad21_1:3, multicast_all:1), pad21_2:4); fp@1812: /*22*/ u8 X(X(rx_d102_mode:1, rx_vlan_drop:1), pad22:6); fp@1812: u8 pad_d102[9]; fp@1812: }; fp@1812: fp@1812: #define E100_MAX_MULTICAST_ADDRS 64 fp@1812: struct multi { fp@1812: __le16 count; fp@1812: u8 addr[E100_MAX_MULTICAST_ADDRS * ETH_ALEN + 2/*pad*/]; fp@1812: }; fp@1812: fp@1812: /* Important: keep total struct u32-aligned */ fp@1812: #define UCODE_SIZE 134 fp@1812: struct cb { fp@1812: __le16 status; fp@1812: __le16 command; fp@1812: __le32 link; fp@1812: union { fp@1812: u8 iaaddr[ETH_ALEN]; fp@1812: __le32 ucode[UCODE_SIZE]; fp@1812: struct config config; fp@1812: struct multi multi; fp@1812: struct { fp@1812: u32 tbd_array; fp@1812: u16 tcb_byte_count; fp@1812: u8 threshold; fp@1812: u8 tbd_count; fp@1812: struct { fp@1812: __le32 buf_addr; fp@1812: __le16 size; fp@1812: u16 eol; fp@1812: } tbd; fp@1812: } tcb; fp@1812: __le32 dump_buffer_addr; fp@1812: } u; fp@1812: struct cb *next, *prev; fp@1812: dma_addr_t dma_addr; fp@1812: struct sk_buff *skb; fp@1812: }; fp@1812: fp@1812: enum loopback { fp@1812: lb_none = 0, lb_mac = 1, lb_phy = 3, fp@1812: }; fp@1812: fp@1812: struct stats { fp@1812: __le32 tx_good_frames, tx_max_collisions, tx_late_collisions, fp@1812: tx_underruns, tx_lost_crs, tx_deferred, tx_single_collisions, fp@1812: tx_multiple_collisions, tx_total_collisions; fp@1812: __le32 rx_good_frames, rx_crc_errors, rx_alignment_errors, fp@1812: rx_resource_errors, rx_overrun_errors, rx_cdt_errors, fp@1812: rx_short_frame_errors; fp@1812: __le32 fc_xmt_pause, fc_rcv_pause, fc_rcv_unsupported; fp@1812: __le16 xmt_tco_frames, rcv_tco_frames; fp@1812: __le32 complete; fp@1812: }; fp@1812: fp@1812: struct mem { fp@1812: struct { fp@1812: u32 signature; fp@1812: u32 result; fp@1812: } selftest; fp@1812: struct stats stats; fp@1812: u8 dump_buf[596]; fp@1812: }; fp@1812: fp@1812: struct param_range { fp@1812: u32 min; fp@1812: u32 max; fp@1812: u32 count; fp@1812: }; fp@1812: fp@1812: struct params { fp@1812: struct param_range rfds; fp@1812: struct param_range cbs; fp@1812: }; fp@1812: fp@1812: struct nic { fp@1812: /* Begin: frequently used values: keep adjacent for cache effect */ fp@1812: u32 msg_enable ____cacheline_aligned; fp@1812: struct net_device *netdev; fp@1812: struct pci_dev *pdev; fp@1812: u16 (*mdio_ctrl)(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data); fp@1812: fp@1812: struct rx *rxs ____cacheline_aligned; fp@1812: struct rx *rx_to_use; fp@1812: struct rx *rx_to_clean; fp@1812: struct rfd blank_rfd; fp@1812: enum ru_state ru_running; fp@1812: fp@1812: spinlock_t cb_lock ____cacheline_aligned; fp@1812: spinlock_t cmd_lock; fp@1812: struct csr __iomem *csr; fp@1812: enum scb_cmd_lo cuc_cmd; fp@1812: unsigned int cbs_avail; fp@1812: struct napi_struct napi; fp@1812: struct cb *cbs; fp@1812: struct cb *cb_to_use; fp@1812: struct cb *cb_to_send; fp@1812: struct cb *cb_to_clean; fp@1812: __le16 tx_command; fp@1812: /* End: frequently used values: keep adjacent for cache effect */ fp@1812: fp@1812: enum { fp@1812: ich = (1 << 0), fp@1812: promiscuous = (1 << 1), fp@1812: multicast_all = (1 << 2), fp@1812: wol_magic = (1 << 3), fp@1812: ich_10h_workaround = (1 << 4), fp@1812: } flags ____cacheline_aligned; fp@1812: fp@1812: enum mac mac; fp@1812: enum phy phy; fp@1812: struct params params; fp@1812: struct timer_list watchdog; fp@1812: struct timer_list blink_timer; fp@1812: struct mii_if_info mii; fp@1812: struct work_struct tx_timeout_task; fp@1812: enum loopback loopback; fp@1812: fp@1812: struct mem *mem; fp@1812: dma_addr_t dma_addr; fp@1812: fp@1812: dma_addr_t cbs_dma_addr; fp@1812: u8 adaptive_ifs; fp@1812: u8 tx_threshold; fp@1812: u32 tx_frames; fp@1812: u32 tx_collisions; fp@1812: u32 tx_deferred; fp@1812: u32 tx_single_collisions; fp@1812: u32 tx_multiple_collisions; fp@1812: u32 tx_fc_pause; fp@1812: u32 tx_tco_frames; fp@1812: fp@1812: u32 rx_fc_pause; fp@1812: u32 rx_fc_unsupported; fp@1812: u32 rx_tco_frames; fp@1812: u32 rx_over_length_errors; fp@1812: fp@1812: u16 leds; fp@1812: u16 eeprom_wc; fp@1812: __le16 eeprom[256]; fp@1812: spinlock_t mdio_lock; fp@1812: }; fp@1812: fp@1812: static inline void e100_write_flush(struct nic *nic) fp@1812: { fp@1812: /* Flush previous PCI writes through intermediate bridges fp@1812: * by doing a benign read */ fp@1812: (void)ioread8(&nic->csr->scb.status); fp@1812: } fp@1812: fp@1812: static void e100_enable_irq(struct nic *nic) fp@1812: { fp@1812: unsigned long flags; fp@1812: fp@1812: spin_lock_irqsave(&nic->cmd_lock, flags); fp@1812: iowrite8(irq_mask_none, &nic->csr->scb.cmd_hi); fp@1812: e100_write_flush(nic); fp@1812: spin_unlock_irqrestore(&nic->cmd_lock, flags); fp@1812: } fp@1812: fp@1812: static void e100_disable_irq(struct nic *nic) fp@1812: { fp@1812: unsigned long flags; fp@1812: fp@1812: spin_lock_irqsave(&nic->cmd_lock, flags); fp@1812: iowrite8(irq_mask_all, &nic->csr->scb.cmd_hi); fp@1812: e100_write_flush(nic); fp@1812: spin_unlock_irqrestore(&nic->cmd_lock, flags); fp@1812: } fp@1812: fp@1812: static void e100_hw_reset(struct nic *nic) fp@1812: { fp@1812: /* Put CU and RU into idle with a selective reset to get fp@1812: * device off of PCI bus */ fp@1812: iowrite32(selective_reset, &nic->csr->port); fp@1812: e100_write_flush(nic); udelay(20); fp@1812: fp@1812: /* Now fully reset device */ fp@1812: iowrite32(software_reset, &nic->csr->port); fp@1812: e100_write_flush(nic); udelay(20); fp@1812: fp@1812: /* Mask off our interrupt line - it's unmasked after reset */ fp@1812: e100_disable_irq(nic); fp@1812: } fp@1812: fp@1812: static int e100_self_test(struct nic *nic) fp@1812: { fp@1812: u32 dma_addr = nic->dma_addr + offsetof(struct mem, selftest); fp@1812: fp@1812: /* Passing the self-test is a pretty good indication fp@1812: * that the device can DMA to/from host memory */ fp@1812: fp@1812: nic->mem->selftest.signature = 0; fp@1812: nic->mem->selftest.result = 0xFFFFFFFF; fp@1812: fp@1812: iowrite32(selftest | dma_addr, &nic->csr->port); fp@1812: e100_write_flush(nic); fp@1812: /* Wait 10 msec for self-test to complete */ fp@1812: msleep(10); fp@1812: fp@1812: /* Interrupts are enabled after self-test */ fp@1812: e100_disable_irq(nic); fp@1812: fp@1812: /* Check results of self-test */ fp@1812: if (nic->mem->selftest.result != 0) { fp@1812: DPRINTK(HW, ERR, "Self-test failed: result=0x%08X\n", fp@1812: nic->mem->selftest.result); fp@1812: return -ETIMEDOUT; fp@1812: } fp@1812: if (nic->mem->selftest.signature == 0) { fp@1812: DPRINTK(HW, ERR, "Self-test failed: timed out\n"); fp@1812: return -ETIMEDOUT; fp@1812: } fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static void e100_eeprom_write(struct nic *nic, u16 addr_len, u16 addr, __le16 data) fp@1812: { fp@1812: u32 cmd_addr_data[3]; fp@1812: u8 ctrl; fp@1812: int i, j; fp@1812: fp@1812: /* Three cmds: write/erase enable, write data, write/erase disable */ fp@1812: cmd_addr_data[0] = op_ewen << (addr_len - 2); fp@1812: cmd_addr_data[1] = (((op_write << addr_len) | addr) << 16) | fp@1812: le16_to_cpu(data); fp@1812: cmd_addr_data[2] = op_ewds << (addr_len - 2); fp@1812: fp@1812: /* Bit-bang cmds to write word to eeprom */ fp@1812: for (j = 0; j < 3; j++) { fp@1812: fp@1812: /* Chip select */ fp@1812: iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: fp@1812: for (i = 31; i >= 0; i--) { fp@1812: ctrl = (cmd_addr_data[j] & (1 << i)) ? fp@1812: eecs | eedi : eecs; fp@1812: iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: fp@1812: iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: } fp@1812: /* Wait 10 msec for cmd to complete */ fp@1812: msleep(10); fp@1812: fp@1812: /* Chip deselect */ fp@1812: iowrite8(0, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: } fp@1812: }; fp@1812: fp@1812: /* General technique stolen from the eepro100 driver - very clever */ fp@1812: static __le16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr) fp@1812: { fp@1812: u32 cmd_addr_data; fp@1812: u16 data = 0; fp@1812: u8 ctrl; fp@1812: int i; fp@1812: fp@1812: cmd_addr_data = ((op_read << *addr_len) | addr) << 16; fp@1812: fp@1812: /* Chip select */ fp@1812: iowrite8(eecs | eesk, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: fp@1812: /* Bit-bang to read word from eeprom */ fp@1812: for (i = 31; i >= 0; i--) { fp@1812: ctrl = (cmd_addr_data & (1 << i)) ? eecs | eedi : eecs; fp@1812: iowrite8(ctrl, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: fp@1812: iowrite8(ctrl | eesk, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: fp@1812: /* Eeprom drives a dummy zero to EEDO after receiving fp@1812: * complete address. Use this to adjust addr_len. */ fp@1812: ctrl = ioread8(&nic->csr->eeprom_ctrl_lo); fp@1812: if (!(ctrl & eedo) && i > 16) { fp@1812: *addr_len -= (i - 16); fp@1812: i = 17; fp@1812: } fp@1812: fp@1812: data = (data << 1) | (ctrl & eedo ? 1 : 0); fp@1812: } fp@1812: fp@1812: /* Chip deselect */ fp@1812: iowrite8(0, &nic->csr->eeprom_ctrl_lo); fp@1812: e100_write_flush(nic); udelay(4); fp@1812: fp@1812: return cpu_to_le16(data); fp@1812: }; fp@1812: fp@1812: /* Load entire EEPROM image into driver cache and validate checksum */ fp@1812: static int e100_eeprom_load(struct nic *nic) fp@1812: { fp@1812: u16 addr, addr_len = 8, checksum = 0; fp@1812: fp@1812: /* Try reading with an 8-bit addr len to discover actual addr len */ fp@1812: e100_eeprom_read(nic, &addr_len, 0); fp@1812: nic->eeprom_wc = 1 << addr_len; fp@1812: fp@1812: for (addr = 0; addr < nic->eeprom_wc; addr++) { fp@1812: nic->eeprom[addr] = e100_eeprom_read(nic, &addr_len, addr); fp@1812: if (addr < nic->eeprom_wc - 1) fp@1812: checksum += le16_to_cpu(nic->eeprom[addr]); fp@1812: } fp@1812: fp@1812: /* The checksum, stored in the last word, is calculated such that fp@1812: * the sum of words should be 0xBABA */ fp@1812: if (cpu_to_le16(0xBABA - checksum) != nic->eeprom[nic->eeprom_wc - 1]) { fp@1812: DPRINTK(PROBE, ERR, "EEPROM corrupted\n"); fp@1812: if (!eeprom_bad_csum_allow) fp@1812: return -EAGAIN; fp@1812: } fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: /* Save (portion of) driver EEPROM cache to device and update checksum */ fp@1812: static int e100_eeprom_save(struct nic *nic, u16 start, u16 count) fp@1812: { fp@1812: u16 addr, addr_len = 8, checksum = 0; fp@1812: fp@1812: /* Try reading with an 8-bit addr len to discover actual addr len */ fp@1812: e100_eeprom_read(nic, &addr_len, 0); fp@1812: nic->eeprom_wc = 1 << addr_len; fp@1812: fp@1812: if (start + count >= nic->eeprom_wc) fp@1812: return -EINVAL; fp@1812: fp@1812: for (addr = start; addr < start + count; addr++) fp@1812: e100_eeprom_write(nic, addr_len, addr, nic->eeprom[addr]); fp@1812: fp@1812: /* The checksum, stored in the last word, is calculated such that fp@1812: * the sum of words should be 0xBABA */ fp@1812: for (addr = 0; addr < nic->eeprom_wc - 1; addr++) fp@1812: checksum += le16_to_cpu(nic->eeprom[addr]); fp@1812: nic->eeprom[nic->eeprom_wc - 1] = cpu_to_le16(0xBABA - checksum); fp@1812: e100_eeprom_write(nic, addr_len, nic->eeprom_wc - 1, fp@1812: nic->eeprom[nic->eeprom_wc - 1]); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: #define E100_WAIT_SCB_TIMEOUT 20000 /* we might have to wait 100ms!!! */ fp@1812: #define E100_WAIT_SCB_FAST 20 /* delay like the old code */ fp@1812: static int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr) fp@1812: { fp@1812: unsigned long flags; fp@1812: unsigned int i; fp@1812: int err = 0; fp@1812: fp@1812: spin_lock_irqsave(&nic->cmd_lock, flags); fp@1812: fp@1812: /* Previous command is accepted when SCB clears */ fp@1812: for (i = 0; i < E100_WAIT_SCB_TIMEOUT; i++) { fp@1812: if (likely(!ioread8(&nic->csr->scb.cmd_lo))) fp@1812: break; fp@1812: cpu_relax(); fp@1812: if (unlikely(i > E100_WAIT_SCB_FAST)) fp@1812: udelay(5); fp@1812: } fp@1812: if (unlikely(i == E100_WAIT_SCB_TIMEOUT)) { fp@1812: err = -EAGAIN; fp@1812: goto err_unlock; fp@1812: } fp@1812: fp@1812: if (unlikely(cmd != cuc_resume)) fp@1812: iowrite32(dma_addr, &nic->csr->scb.gen_ptr); fp@1812: iowrite8(cmd, &nic->csr->scb.cmd_lo); fp@1812: fp@1812: err_unlock: fp@1812: spin_unlock_irqrestore(&nic->cmd_lock, flags); fp@1812: fp@1812: return err; fp@1812: } fp@1812: fp@1812: static int e100_exec_cb(struct nic *nic, struct sk_buff *skb, fp@1812: void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *)) fp@1812: { fp@1812: struct cb *cb; fp@1812: unsigned long flags; fp@1812: int err = 0; fp@1812: fp@1812: spin_lock_irqsave(&nic->cb_lock, flags); fp@1812: fp@1812: if (unlikely(!nic->cbs_avail)) { fp@1812: err = -ENOMEM; fp@1812: goto err_unlock; fp@1812: } fp@1812: fp@1812: cb = nic->cb_to_use; fp@1812: nic->cb_to_use = cb->next; fp@1812: nic->cbs_avail--; fp@1812: cb->skb = skb; fp@1812: fp@1812: if (unlikely(!nic->cbs_avail)) fp@1812: err = -ENOSPC; fp@1812: fp@1812: cb_prepare(nic, cb, skb); fp@1812: fp@1812: /* Order is important otherwise we'll be in a race with h/w: fp@1812: * set S-bit in current first, then clear S-bit in previous. */ fp@1812: cb->command |= cpu_to_le16(cb_s); fp@1812: wmb(); fp@1812: cb->prev->command &= cpu_to_le16(~cb_s); fp@1812: fp@1812: while (nic->cb_to_send != nic->cb_to_use) { fp@1812: if (unlikely(e100_exec_cmd(nic, nic->cuc_cmd, fp@1812: nic->cb_to_send->dma_addr))) { fp@1812: /* Ok, here's where things get sticky. It's fp@1812: * possible that we can't schedule the command fp@1812: * because the controller is too busy, so fp@1812: * let's just queue the command and try again fp@1812: * when another command is scheduled. */ fp@1812: if (err == -ENOSPC) { fp@1812: //request a reset fp@1812: schedule_work(&nic->tx_timeout_task); fp@1812: } fp@1812: break; fp@1812: } else { fp@1812: nic->cuc_cmd = cuc_resume; fp@1812: nic->cb_to_send = nic->cb_to_send->next; fp@1812: } fp@1812: } fp@1812: fp@1812: err_unlock: fp@1812: spin_unlock_irqrestore(&nic->cb_lock, flags); fp@1812: fp@1812: return err; fp@1812: } fp@1812: fp@1812: static int mdio_read(struct net_device *netdev, int addr, int reg) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: return nic->mdio_ctrl(nic, addr, mdi_read, reg, 0); fp@1812: } fp@1812: fp@1812: static void mdio_write(struct net_device *netdev, int addr, int reg, int data) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: nic->mdio_ctrl(nic, addr, mdi_write, reg, data); fp@1812: } fp@1812: fp@1812: /* the standard mdio_ctrl() function for usual MII-compliant hardware */ fp@1812: static u16 mdio_ctrl_hw(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data) fp@1812: { fp@1812: u32 data_out = 0; fp@1812: unsigned int i; fp@1812: unsigned long flags; fp@1812: fp@1812: fp@1812: /* fp@1812: * Stratus87247: we shouldn't be writing the MDI control fp@1812: * register until the Ready bit shows True. Also, since fp@1812: * manipulation of the MDI control registers is a multi-step fp@1812: * procedure it should be done under lock. fp@1812: */ fp@1812: spin_lock_irqsave(&nic->mdio_lock, flags); fp@1812: for (i = 100; i; --i) { fp@1812: if (ioread32(&nic->csr->mdi_ctrl) & mdi_ready) fp@1812: break; fp@1812: udelay(20); fp@1812: } fp@1812: if (unlikely(!i)) { fp@1812: printk("e100.mdio_ctrl(%s) won't go Ready\n", fp@1812: nic->netdev->name ); fp@1812: spin_unlock_irqrestore(&nic->mdio_lock, flags); fp@1812: return 0; /* No way to indicate timeout error */ fp@1812: } fp@1812: iowrite32((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl); fp@1812: fp@1812: for (i = 0; i < 100; i++) { fp@1812: udelay(20); fp@1812: if ((data_out = ioread32(&nic->csr->mdi_ctrl)) & mdi_ready) fp@1812: break; fp@1812: } fp@1812: spin_unlock_irqrestore(&nic->mdio_lock, flags); fp@1812: DPRINTK(HW, DEBUG, fp@1812: "%s:addr=%d, reg=%d, data_in=0x%04X, data_out=0x%04X\n", fp@1812: dir == mdi_read ? "READ" : "WRITE", addr, reg, data, data_out); fp@1812: return (u16)data_out; fp@1812: } fp@1812: fp@1812: /* slightly tweaked mdio_ctrl() function for phy_82552_v specifics */ fp@1812: static u16 mdio_ctrl_phy_82552_v(struct nic *nic, fp@1812: u32 addr, fp@1812: u32 dir, fp@1812: u32 reg, fp@1812: u16 data) fp@1812: { fp@1812: if ((reg == MII_BMCR) && (dir == mdi_write)) { fp@1812: if (data & (BMCR_ANRESTART | BMCR_ANENABLE)) { fp@1812: u16 advert = mdio_read(nic->netdev, nic->mii.phy_id, fp@1812: MII_ADVERTISE); fp@1812: fp@1812: /* fp@1812: * Workaround Si issue where sometimes the part will not fp@1812: * autoneg to 100Mbps even when advertised. fp@1812: */ fp@1812: if (advert & ADVERTISE_100FULL) fp@1812: data |= BMCR_SPEED100 | BMCR_FULLDPLX; fp@1812: else if (advert & ADVERTISE_100HALF) fp@1812: data |= BMCR_SPEED100; fp@1812: } fp@1812: } fp@1812: return mdio_ctrl_hw(nic, addr, dir, reg, data); fp@1812: } fp@1812: fp@1812: /* Fully software-emulated mdio_ctrl() function for cards without fp@1812: * MII-compliant PHYs. fp@1812: * For now, this is mainly geared towards 80c24 support; in case of further fp@1812: * requirements for other types (i82503, ...?) either extend this mechanism fp@1812: * or split it, whichever is cleaner. fp@1812: */ fp@1812: static u16 mdio_ctrl_phy_mii_emulated(struct nic *nic, fp@1812: u32 addr, fp@1812: u32 dir, fp@1812: u32 reg, fp@1812: u16 data) fp@1812: { fp@1812: /* might need to allocate a netdev_priv'ed register array eventually fp@1812: * to be able to record state changes, but for now fp@1812: * some fully hardcoded register handling ought to be ok I guess. */ fp@1812: fp@1812: if (dir == mdi_read) { fp@1812: switch (reg) { fp@1812: case MII_BMCR: fp@1812: /* Auto-negotiation, right? */ fp@1812: return BMCR_ANENABLE | fp@1812: BMCR_FULLDPLX; fp@1812: case MII_BMSR: fp@1812: return BMSR_LSTATUS /* for mii_link_ok() */ | fp@1812: BMSR_ANEGCAPABLE | fp@1812: BMSR_10FULL; fp@1812: case MII_ADVERTISE: fp@1812: /* 80c24 is a "combo card" PHY, right? */ fp@1812: return ADVERTISE_10HALF | fp@1812: ADVERTISE_10FULL; fp@1812: default: fp@1812: DPRINTK(HW, DEBUG, fp@1812: "%s:addr=%d, reg=%d, data=0x%04X: unimplemented emulation!\n", fp@1812: dir == mdi_read ? "READ" : "WRITE", addr, reg, data); fp@1812: return 0xFFFF; fp@1812: } fp@1812: } else { fp@1812: switch (reg) { fp@1812: default: fp@1812: DPRINTK(HW, DEBUG, fp@1812: "%s:addr=%d, reg=%d, data=0x%04X: unimplemented emulation!\n", fp@1812: dir == mdi_read ? "READ" : "WRITE", addr, reg, data); fp@1812: return 0xFFFF; fp@1812: } fp@1812: } fp@1812: } fp@1812: static inline int e100_phy_supports_mii(struct nic *nic) fp@1812: { fp@1812: /* for now, just check it by comparing whether we fp@1812: are using MII software emulation. fp@1812: */ fp@1812: return (nic->mdio_ctrl != mdio_ctrl_phy_mii_emulated); fp@1812: } fp@1812: fp@1812: static void e100_get_defaults(struct nic *nic) fp@1812: { fp@1812: struct param_range rfds = { .min = 16, .max = 256, .count = 256 }; fp@1812: struct param_range cbs = { .min = 64, .max = 256, .count = 128 }; fp@1812: fp@1812: /* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */ fp@1812: nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->pdev->revision; fp@1812: if (nic->mac == mac_unknown) fp@1812: nic->mac = mac_82557_D100_A; fp@1812: fp@1812: nic->params.rfds = rfds; fp@1812: nic->params.cbs = cbs; fp@1812: fp@1812: /* Quadwords to DMA into FIFO before starting frame transmit */ fp@1812: nic->tx_threshold = 0xE0; fp@1812: fp@1812: /* no interrupt for every tx completion, delay = 256us if not 557 */ fp@1812: nic->tx_command = cpu_to_le16(cb_tx | cb_tx_sf | fp@1812: ((nic->mac >= mac_82558_D101_A4) ? cb_cid : cb_i)); fp@1812: fp@1812: /* Template for a freshly allocated RFD */ fp@1812: nic->blank_rfd.command = 0; fp@1812: nic->blank_rfd.rbd = cpu_to_le32(0xFFFFFFFF); fp@1812: nic->blank_rfd.size = cpu_to_le16(VLAN_ETH_FRAME_LEN); fp@1812: fp@1812: /* MII setup */ fp@1812: nic->mii.phy_id_mask = 0x1F; fp@1812: nic->mii.reg_num_mask = 0x1F; fp@1812: nic->mii.dev = nic->netdev; fp@1812: nic->mii.mdio_read = mdio_read; fp@1812: nic->mii.mdio_write = mdio_write; fp@1812: } fp@1812: fp@1812: static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb) fp@1812: { fp@1812: struct config *config = &cb->u.config; fp@1812: u8 *c = (u8 *)config; fp@1812: fp@1812: cb->command = cpu_to_le16(cb_config); fp@1812: fp@1812: memset(config, 0, sizeof(struct config)); fp@1812: fp@1812: config->byte_count = 0x16; /* bytes in this struct */ fp@1812: config->rx_fifo_limit = 0x8; /* bytes in FIFO before DMA */ fp@1812: config->direct_rx_dma = 0x1; /* reserved */ fp@1812: config->standard_tcb = 0x1; /* 1=standard, 0=extended */ fp@1812: config->standard_stat_counter = 0x1; /* 1=standard, 0=extended */ fp@1812: config->rx_discard_short_frames = 0x1; /* 1=discard, 0=pass */ fp@1812: config->tx_underrun_retry = 0x3; /* # of underrun retries */ fp@1812: if (e100_phy_supports_mii(nic)) fp@1812: config->mii_mode = 1; /* 1=MII mode, 0=i82503 mode */ fp@1812: config->pad10 = 0x6; fp@1812: config->no_source_addr_insertion = 0x1; /* 1=no, 0=yes */ fp@1812: config->preamble_length = 0x2; /* 0=1, 1=3, 2=7, 3=15 bytes */ fp@1812: config->ifs = 0x6; /* x16 = inter frame spacing */ fp@1812: config->ip_addr_hi = 0xF2; /* ARP IP filter - not used */ fp@1812: config->pad15_1 = 0x1; fp@1812: config->pad15_2 = 0x1; fp@1812: config->crs_or_cdt = 0x0; /* 0=CRS only, 1=CRS or CDT */ fp@1812: config->fc_delay_hi = 0x40; /* time delay for fc frame */ fp@1812: config->tx_padding = 0x1; /* 1=pad short frames */ fp@1812: config->fc_priority_threshold = 0x7; /* 7=priority fc disabled */ fp@1812: config->pad18 = 0x1; fp@1812: config->full_duplex_pin = 0x1; /* 1=examine FDX# pin */ fp@1812: config->pad20_1 = 0x1F; fp@1812: config->fc_priority_location = 0x1; /* 1=byte#31, 0=byte#19 */ fp@1812: config->pad21_1 = 0x5; fp@1812: fp@1812: config->adaptive_ifs = nic->adaptive_ifs; fp@1812: config->loopback = nic->loopback; fp@1812: fp@1812: if (nic->mii.force_media && nic->mii.full_duplex) fp@1812: config->full_duplex_force = 0x1; /* 1=force, 0=auto */ fp@1812: fp@1812: if (nic->flags & promiscuous || nic->loopback) { fp@1812: config->rx_save_bad_frames = 0x1; /* 1=save, 0=discard */ fp@1812: config->rx_discard_short_frames = 0x0; /* 1=discard, 0=save */ fp@1812: config->promiscuous_mode = 0x1; /* 1=on, 0=off */ fp@1812: } fp@1812: fp@1812: if (nic->flags & multicast_all) fp@1812: config->multicast_all = 0x1; /* 1=accept, 0=no */ fp@1812: fp@1812: /* disable WoL when up */ fp@1812: if (netif_running(nic->netdev) || !(nic->flags & wol_magic)) fp@1812: config->magic_packet_disable = 0x1; /* 1=off, 0=on */ fp@1812: fp@1812: if (nic->mac >= mac_82558_D101_A4) { fp@1812: config->fc_disable = 0x1; /* 1=Tx fc off, 0=Tx fc on */ fp@1812: config->mwi_enable = 0x1; /* 1=enable, 0=disable */ fp@1812: config->standard_tcb = 0x0; /* 1=standard, 0=extended */ fp@1812: config->rx_long_ok = 0x1; /* 1=VLANs ok, 0=standard */ fp@1812: if (nic->mac >= mac_82559_D101M) { fp@1812: config->tno_intr = 0x1; /* TCO stats enable */ fp@1812: /* Enable TCO in extended config */ fp@1812: if (nic->mac >= mac_82551_10) { fp@1812: config->byte_count = 0x20; /* extended bytes */ fp@1812: config->rx_d102_mode = 0x1; /* GMRC for TCO */ fp@1812: } fp@1812: } else { fp@1812: config->standard_stat_counter = 0x0; fp@1812: } fp@1812: } fp@1812: fp@1812: DPRINTK(HW, DEBUG, "[00-07]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", fp@1812: c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7]); fp@1812: DPRINTK(HW, DEBUG, "[08-15]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", fp@1812: c[8], c[9], c[10], c[11], c[12], c[13], c[14], c[15]); fp@1812: DPRINTK(HW, DEBUG, "[16-23]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", fp@1812: c[16], c[17], c[18], c[19], c[20], c[21], c[22], c[23]); fp@1812: } fp@1812: fp@1812: /************************************************************************* fp@1812: * CPUSaver parameters fp@1812: * fp@1812: * All CPUSaver parameters are 16-bit literals that are part of a fp@1812: * "move immediate value" instruction. By changing the value of fp@1812: * the literal in the instruction before the code is loaded, the fp@1812: * driver can change the algorithm. fp@1812: * fp@1812: * INTDELAY - This loads the dead-man timer with its initial value. fp@1812: * When this timer expires the interrupt is asserted, and the fp@1812: * timer is reset each time a new packet is received. (see fp@1812: * BUNDLEMAX below to set the limit on number of chained packets) fp@1812: * The current default is 0x600 or 1536. Experiments show that fp@1812: * the value should probably stay within the 0x200 - 0x1000. fp@1812: * fp@1812: * BUNDLEMAX - fp@1812: * This sets the maximum number of frames that will be bundled. In fp@1812: * some situations, such as the TCP windowing algorithm, it may be fp@1812: * better to limit the growth of the bundle size than let it go as fp@1812: * high as it can, because that could cause too much added latency. fp@1812: * The default is six, because this is the number of packets in the fp@1812: * default TCP window size. A value of 1 would make CPUSaver indicate fp@1812: * an interrupt for every frame received. If you do not want to put fp@1812: * a limit on the bundle size, set this value to xFFFF. fp@1812: * fp@1812: * BUNDLESMALL - fp@1812: * This contains a bit-mask describing the minimum size frame that fp@1812: * will be bundled. The default masks the lower 7 bits, which means fp@1812: * that any frame less than 128 bytes in length will not be bundled, fp@1812: * but will instead immediately generate an interrupt. This does fp@1812: * not affect the current bundle in any way. Any frame that is 128 fp@1812: * bytes or large will be bundled normally. This feature is meant fp@1812: * to provide immediate indication of ACK frames in a TCP environment. fp@1812: * Customers were seeing poor performance when a machine with CPUSaver fp@1812: * enabled was sending but not receiving. The delay introduced when fp@1812: * the ACKs were received was enough to reduce total throughput, because fp@1812: * the sender would sit idle until the ACK was finally seen. fp@1812: * fp@1812: * The current default is 0xFF80, which masks out the lower 7 bits. fp@1812: * This means that any frame which is x7F (127) bytes or smaller fp@1812: * will cause an immediate interrupt. Because this value must be a fp@1812: * bit mask, there are only a few valid values that can be used. To fp@1812: * turn this feature off, the driver can write the value xFFFF to the fp@1812: * lower word of this instruction (in the same way that the other fp@1812: * parameters are used). Likewise, a value of 0xF800 (2047) would fp@1812: * cause an interrupt to be generated for every frame, because all fp@1812: * standard Ethernet frames are <= 2047 bytes in length. fp@1812: *************************************************************************/ fp@1812: fp@1812: /* if you wish to disable the ucode functionality, while maintaining the fp@1812: * workarounds it provides, set the following defines to: fp@1812: * BUNDLESMALL 0 fp@1812: * BUNDLEMAX 1 fp@1812: * INTDELAY 1 fp@1812: */ fp@1812: #define BUNDLESMALL 1 fp@1812: #define BUNDLEMAX (u16)6 fp@1812: #define INTDELAY (u16)1536 /* 0x600 */ fp@1812: fp@1812: /* Initialize firmware */ fp@1812: static const struct firmware *e100_request_firmware(struct nic *nic) fp@1812: { fp@1812: const char *fw_name; fp@1812: const struct firmware *fw; fp@1812: u8 timer, bundle, min_size; fp@1812: int err; fp@1812: fp@1812: /* do not load u-code for ICH devices */ fp@1812: if (nic->flags & ich) fp@1812: return NULL; fp@1812: fp@1812: /* Search for ucode match against h/w revision */ fp@1812: if (nic->mac == mac_82559_D101M) fp@1812: fw_name = FIRMWARE_D101M; fp@1812: else if (nic->mac == mac_82559_D101S) fp@1812: fw_name = FIRMWARE_D101S; fp@1812: else if (nic->mac == mac_82551_F || nic->mac == mac_82551_10) fp@1812: fw_name = FIRMWARE_D102E; fp@1812: else /* No ucode on other devices */ fp@1812: return NULL; fp@1812: fp@1812: err = request_firmware(&fw, fw_name, &nic->pdev->dev); fp@1812: if (err) { fp@1812: DPRINTK(PROBE, ERR, "Failed to load firmware \"%s\": %d\n", fp@1812: fw_name, err); fp@1812: return ERR_PTR(err); fp@1812: } fp@1812: /* Firmware should be precisely UCODE_SIZE (words) plus three bytes fp@1812: indicating the offsets for BUNDLESMALL, BUNDLEMAX, INTDELAY */ fp@1812: if (fw->size != UCODE_SIZE * 4 + 3) { fp@1812: DPRINTK(PROBE, ERR, "Firmware \"%s\" has wrong size %zu\n", fp@1812: fw_name, fw->size); fp@1812: release_firmware(fw); fp@1812: return ERR_PTR(-EINVAL); fp@1812: } fp@1812: fp@1812: /* Read timer, bundle and min_size from end of firmware blob */ fp@1812: timer = fw->data[UCODE_SIZE * 4]; fp@1812: bundle = fw->data[UCODE_SIZE * 4 + 1]; fp@1812: min_size = fw->data[UCODE_SIZE * 4 + 2]; fp@1812: fp@1812: if (timer >= UCODE_SIZE || bundle >= UCODE_SIZE || fp@1812: min_size >= UCODE_SIZE) { fp@1812: DPRINTK(PROBE, ERR, fp@1812: "\"%s\" has bogus offset values (0x%x,0x%x,0x%x)\n", fp@1812: fw_name, timer, bundle, min_size); fp@1812: release_firmware(fw); fp@1812: return ERR_PTR(-EINVAL); fp@1812: } fp@1812: /* OK, firmware is validated and ready to use... */ fp@1812: return fw; fp@1812: } fp@1812: fp@1812: static void e100_setup_ucode(struct nic *nic, struct cb *cb, fp@1812: struct sk_buff *skb) fp@1812: { fp@1812: const struct firmware *fw = (void *)skb; fp@1812: u8 timer, bundle, min_size; fp@1812: fp@1812: /* It's not a real skb; we just abused the fact that e100_exec_cb fp@1812: will pass it through to here... */ fp@1812: cb->skb = NULL; fp@1812: fp@1812: /* firmware is stored as little endian already */ fp@1812: memcpy(cb->u.ucode, fw->data, UCODE_SIZE * 4); fp@1812: fp@1812: /* Read timer, bundle and min_size from end of firmware blob */ fp@1812: timer = fw->data[UCODE_SIZE * 4]; fp@1812: bundle = fw->data[UCODE_SIZE * 4 + 1]; fp@1812: min_size = fw->data[UCODE_SIZE * 4 + 2]; fp@1812: fp@1812: /* Insert user-tunable settings in cb->u.ucode */ fp@1812: cb->u.ucode[timer] &= cpu_to_le32(0xFFFF0000); fp@1812: cb->u.ucode[timer] |= cpu_to_le32(INTDELAY); fp@1812: cb->u.ucode[bundle] &= cpu_to_le32(0xFFFF0000); fp@1812: cb->u.ucode[bundle] |= cpu_to_le32(BUNDLEMAX); fp@1812: cb->u.ucode[min_size] &= cpu_to_le32(0xFFFF0000); fp@1812: cb->u.ucode[min_size] |= cpu_to_le32((BUNDLESMALL) ? 0xFFFF : 0xFF80); fp@1812: fp@1812: cb->command = cpu_to_le16(cb_ucode | cb_el); fp@1812: } fp@1812: fp@1812: static inline int e100_load_ucode_wait(struct nic *nic) fp@1812: { fp@1812: const struct firmware *fw; fp@1812: int err = 0, counter = 50; fp@1812: struct cb *cb = nic->cb_to_clean; fp@1812: fp@1812: fw = e100_request_firmware(nic); fp@1812: /* If it's NULL, then no ucode is required */ fp@1812: if (!fw || IS_ERR(fw)) fp@1812: return PTR_ERR(fw); fp@1812: fp@1812: if ((err = e100_exec_cb(nic, (void *)fw, e100_setup_ucode))) fp@1812: DPRINTK(PROBE,ERR, "ucode cmd failed with error %d\n", err); fp@1812: fp@1812: /* must restart cuc */ fp@1812: nic->cuc_cmd = cuc_start; fp@1812: fp@1812: /* wait for completion */ fp@1812: e100_write_flush(nic); fp@1812: udelay(10); fp@1812: fp@1812: /* wait for possibly (ouch) 500ms */ fp@1812: while (!(cb->status & cpu_to_le16(cb_complete))) { fp@1812: msleep(10); fp@1812: if (!--counter) break; fp@1812: } fp@1812: fp@1812: /* ack any interrupts, something could have been set */ fp@1812: iowrite8(~0, &nic->csr->scb.stat_ack); fp@1812: fp@1812: /* if the command failed, or is not OK, notify and return */ fp@1812: if (!counter || !(cb->status & cpu_to_le16(cb_ok))) { fp@1812: DPRINTK(PROBE,ERR, "ucode load failed\n"); fp@1812: err = -EPERM; fp@1812: } fp@1812: fp@1812: return err; fp@1812: } fp@1812: fp@1812: static void e100_setup_iaaddr(struct nic *nic, struct cb *cb, fp@1812: struct sk_buff *skb) fp@1812: { fp@1812: cb->command = cpu_to_le16(cb_iaaddr); fp@1812: memcpy(cb->u.iaaddr, nic->netdev->dev_addr, ETH_ALEN); fp@1812: } fp@1812: fp@1812: static void e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb) fp@1812: { fp@1812: cb->command = cpu_to_le16(cb_dump); fp@1812: cb->u.dump_buffer_addr = cpu_to_le32(nic->dma_addr + fp@1812: offsetof(struct mem, dump_buf)); fp@1812: } fp@1812: fp@1812: static int e100_phy_check_without_mii(struct nic *nic) fp@1812: { fp@1812: u8 phy_type; fp@1812: int without_mii; fp@1812: fp@1812: phy_type = (nic->eeprom[eeprom_phy_iface] >> 8) & 0x0f; fp@1812: fp@1812: switch (phy_type) { fp@1812: case NoSuchPhy: /* Non-MII PHY; UNTESTED! */ fp@1812: case I82503: /* Non-MII PHY; UNTESTED! */ fp@1812: case S80C24: /* Non-MII PHY; tested and working */ fp@1812: /* paragraph from the FreeBSD driver, "FXP_PHY_80C24": fp@1812: * The Seeq 80c24 AutoDUPLEX(tm) Ethernet Interface Adapter fp@1812: * doesn't have a programming interface of any sort. The fp@1812: * media is sensed automatically based on how the link partner fp@1812: * is configured. This is, in essence, manual configuration. fp@1812: */ fp@1812: DPRINTK(PROBE, INFO, fp@1812: "found MII-less i82503 or 80c24 or other PHY\n"); fp@1812: fp@1812: nic->mdio_ctrl = mdio_ctrl_phy_mii_emulated; fp@1812: nic->mii.phy_id = 0; /* is this ok for an MII-less PHY? */ fp@1812: fp@1812: /* these might be needed for certain MII-less cards... fp@1812: * nic->flags |= ich; fp@1812: * nic->flags |= ich_10h_workaround; */ fp@1812: fp@1812: without_mii = 1; fp@1812: break; fp@1812: default: fp@1812: without_mii = 0; fp@1812: break; fp@1812: } fp@1812: return without_mii; fp@1812: } fp@1812: fp@1812: #define NCONFIG_AUTO_SWITCH 0x0080 fp@1812: #define MII_NSC_CONG MII_RESV1 fp@1812: #define NSC_CONG_ENABLE 0x0100 fp@1812: #define NSC_CONG_TXREADY 0x0400 fp@1812: #define ADVERTISE_FC_SUPPORTED 0x0400 fp@1812: static int e100_phy_init(struct nic *nic) fp@1812: { fp@1812: struct net_device *netdev = nic->netdev; fp@1812: u32 addr; fp@1812: u16 bmcr, stat, id_lo, id_hi, cong; fp@1812: fp@1812: /* Discover phy addr by searching addrs in order {1,0,2,..., 31} */ fp@1812: for (addr = 0; addr < 32; addr++) { fp@1812: nic->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr; fp@1812: bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR); fp@1812: stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR); fp@1812: stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR); fp@1812: if (!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0)))) fp@1812: break; fp@1812: } fp@1812: if (addr == 32) { fp@1812: /* uhoh, no PHY detected: check whether we seem to be some fp@1812: * weird, rare variant which is *known* to not have any MII. fp@1812: * But do this AFTER MII checking only, since this does fp@1812: * lookup of EEPROM values which may easily be unreliable. */ fp@1812: if (e100_phy_check_without_mii(nic)) fp@1812: return 0; /* simply return and hope for the best */ fp@1812: else { fp@1812: /* for unknown cases log a fatal error */ fp@1812: DPRINTK(HW, ERR, fp@1812: "Failed to locate any known PHY, aborting.\n"); fp@1812: return -EAGAIN; fp@1812: } fp@1812: } else fp@1812: DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id); fp@1812: fp@1812: /* Isolate all the PHY ids */ fp@1812: for (addr = 0; addr < 32; addr++) fp@1812: mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE); fp@1812: /* Select the discovered PHY */ fp@1812: bmcr &= ~BMCR_ISOLATE; fp@1812: mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr); fp@1812: fp@1812: /* Get phy ID */ fp@1812: id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1); fp@1812: id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2); fp@1812: nic->phy = (u32)id_hi << 16 | (u32)id_lo; fp@1812: DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy); fp@1812: fp@1812: /* Handle National tx phys */ fp@1812: #define NCS_PHY_MODEL_MASK 0xFFF0FFFF fp@1812: if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) { fp@1812: /* Disable congestion control */ fp@1812: cong = mdio_read(netdev, nic->mii.phy_id, MII_NSC_CONG); fp@1812: cong |= NSC_CONG_TXREADY; fp@1812: cong &= ~NSC_CONG_ENABLE; fp@1812: mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong); fp@1812: } fp@1812: fp@1812: if (nic->phy == phy_82552_v) { fp@1812: u16 advert = mdio_read(netdev, nic->mii.phy_id, MII_ADVERTISE); fp@1812: fp@1812: /* assign special tweaked mdio_ctrl() function */ fp@1812: nic->mdio_ctrl = mdio_ctrl_phy_82552_v; fp@1812: fp@1812: /* Workaround Si not advertising flow-control during autoneg */ fp@1812: advert |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; fp@1812: mdio_write(netdev, nic->mii.phy_id, MII_ADVERTISE, advert); fp@1812: fp@1812: /* Reset for the above changes to take effect */ fp@1812: bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR); fp@1812: bmcr |= BMCR_RESET; fp@1812: mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr); fp@1812: } else if ((nic->mac >= mac_82550_D102) || ((nic->flags & ich) && fp@1812: (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000) && fp@1812: !(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))) { fp@1812: /* enable/disable MDI/MDI-X auto-switching. */ fp@1812: mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, fp@1812: nic->mii.force_media ? 0 : NCONFIG_AUTO_SWITCH); fp@1812: } fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static int e100_hw_init(struct nic *nic) fp@1812: { fp@1812: int err; fp@1812: fp@1812: e100_hw_reset(nic); fp@1812: fp@1812: DPRINTK(HW, ERR, "e100_hw_init\n"); fp@1812: if (!in_interrupt() && (err = e100_self_test(nic))) fp@1812: return err; fp@1812: fp@1812: if ((err = e100_phy_init(nic))) fp@1812: return err; fp@1812: if ((err = e100_exec_cmd(nic, cuc_load_base, 0))) fp@1812: return err; fp@1812: if ((err = e100_exec_cmd(nic, ruc_load_base, 0))) fp@1812: return err; fp@1812: if ((err = e100_load_ucode_wait(nic))) fp@1812: return err; fp@1812: if ((err = e100_exec_cb(nic, NULL, e100_configure))) fp@1812: return err; fp@1812: if ((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr))) fp@1812: return err; fp@1812: if ((err = e100_exec_cmd(nic, cuc_dump_addr, fp@1812: nic->dma_addr + offsetof(struct mem, stats)))) fp@1812: return err; fp@1812: if ((err = e100_exec_cmd(nic, cuc_dump_reset, 0))) fp@1812: return err; fp@1812: fp@1812: e100_disable_irq(nic); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static void e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb) fp@1812: { fp@1812: struct net_device *netdev = nic->netdev; fp@1812: struct dev_mc_list *list = netdev->mc_list; fp@1812: u16 i, count = min(netdev->mc_count, E100_MAX_MULTICAST_ADDRS); fp@1812: fp@1812: cb->command = cpu_to_le16(cb_multi); fp@1812: cb->u.multi.count = cpu_to_le16(count * ETH_ALEN); fp@1812: for (i = 0; list && i < count; i++, list = list->next) fp@1812: memcpy(&cb->u.multi.addr[i*ETH_ALEN], &list->dmi_addr, fp@1812: ETH_ALEN); fp@1812: } fp@1812: fp@1812: static void e100_set_multicast_list(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: DPRINTK(HW, DEBUG, "mc_count=%d, flags=0x%04X\n", fp@1812: netdev->mc_count, netdev->flags); fp@1812: fp@1812: if (netdev->flags & IFF_PROMISC) fp@1812: nic->flags |= promiscuous; fp@1812: else fp@1812: nic->flags &= ~promiscuous; fp@1812: fp@1812: if (netdev->flags & IFF_ALLMULTI || fp@1812: netdev->mc_count > E100_MAX_MULTICAST_ADDRS) fp@1812: nic->flags |= multicast_all; fp@1812: else fp@1812: nic->flags &= ~multicast_all; fp@1812: fp@1812: e100_exec_cb(nic, NULL, e100_configure); fp@1812: e100_exec_cb(nic, NULL, e100_multi); fp@1812: } fp@1812: fp@1812: static void e100_update_stats(struct nic *nic) fp@1812: { fp@1812: struct net_device *dev = nic->netdev; fp@1812: struct net_device_stats *ns = &dev->stats; fp@1812: struct stats *s = &nic->mem->stats; fp@1812: __le32 *complete = (nic->mac < mac_82558_D101_A4) ? &s->fc_xmt_pause : fp@1812: (nic->mac < mac_82559_D101M) ? (__le32 *)&s->xmt_tco_frames : fp@1812: &s->complete; fp@1812: fp@1812: /* Device's stats reporting may take several microseconds to fp@1812: * complete, so we're always waiting for results of the fp@1812: * previous command. */ fp@1812: fp@1812: if (*complete == cpu_to_le32(cuc_dump_reset_complete)) { fp@1812: *complete = 0; fp@1812: nic->tx_frames = le32_to_cpu(s->tx_good_frames); fp@1812: nic->tx_collisions = le32_to_cpu(s->tx_total_collisions); fp@1812: ns->tx_aborted_errors += le32_to_cpu(s->tx_max_collisions); fp@1812: ns->tx_window_errors += le32_to_cpu(s->tx_late_collisions); fp@1812: ns->tx_carrier_errors += le32_to_cpu(s->tx_lost_crs); fp@1812: ns->tx_fifo_errors += le32_to_cpu(s->tx_underruns); fp@1812: ns->collisions += nic->tx_collisions; fp@1812: ns->tx_errors += le32_to_cpu(s->tx_max_collisions) + fp@1812: le32_to_cpu(s->tx_lost_crs); fp@1812: ns->rx_length_errors += le32_to_cpu(s->rx_short_frame_errors) + fp@1812: nic->rx_over_length_errors; fp@1812: ns->rx_crc_errors += le32_to_cpu(s->rx_crc_errors); fp@1812: ns->rx_frame_errors += le32_to_cpu(s->rx_alignment_errors); fp@1812: ns->rx_over_errors += le32_to_cpu(s->rx_overrun_errors); fp@1812: ns->rx_fifo_errors += le32_to_cpu(s->rx_overrun_errors); fp@1812: ns->rx_missed_errors += le32_to_cpu(s->rx_resource_errors); fp@1812: ns->rx_errors += le32_to_cpu(s->rx_crc_errors) + fp@1812: le32_to_cpu(s->rx_alignment_errors) + fp@1812: le32_to_cpu(s->rx_short_frame_errors) + fp@1812: le32_to_cpu(s->rx_cdt_errors); fp@1812: nic->tx_deferred += le32_to_cpu(s->tx_deferred); fp@1812: nic->tx_single_collisions += fp@1812: le32_to_cpu(s->tx_single_collisions); fp@1812: nic->tx_multiple_collisions += fp@1812: le32_to_cpu(s->tx_multiple_collisions); fp@1812: if (nic->mac >= mac_82558_D101_A4) { fp@1812: nic->tx_fc_pause += le32_to_cpu(s->fc_xmt_pause); fp@1812: nic->rx_fc_pause += le32_to_cpu(s->fc_rcv_pause); fp@1812: nic->rx_fc_unsupported += fp@1812: le32_to_cpu(s->fc_rcv_unsupported); fp@1812: if (nic->mac >= mac_82559_D101M) { fp@1812: nic->tx_tco_frames += fp@1812: le16_to_cpu(s->xmt_tco_frames); fp@1812: nic->rx_tco_frames += fp@1812: le16_to_cpu(s->rcv_tco_frames); fp@1812: } fp@1812: } fp@1812: } fp@1812: fp@1812: fp@1812: if (e100_exec_cmd(nic, cuc_dump_reset, 0)) fp@1812: DPRINTK(TX_ERR, DEBUG, "exec cuc_dump_reset failed\n"); fp@1812: } fp@1812: fp@1812: static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex) fp@1812: { fp@1812: /* Adjust inter-frame-spacing (IFS) between two transmits if fp@1812: * we're getting collisions on a half-duplex connection. */ fp@1812: fp@1812: if (duplex == DUPLEX_HALF) { fp@1812: u32 prev = nic->adaptive_ifs; fp@1812: u32 min_frames = (speed == SPEED_100) ? 1000 : 100; fp@1812: fp@1812: if ((nic->tx_frames / 32 < nic->tx_collisions) && fp@1812: (nic->tx_frames > min_frames)) { fp@1812: if (nic->adaptive_ifs < 60) fp@1812: nic->adaptive_ifs += 5; fp@1812: } else if (nic->tx_frames < min_frames) { fp@1812: if (nic->adaptive_ifs >= 5) fp@1812: nic->adaptive_ifs -= 5; fp@1812: } fp@1812: if (nic->adaptive_ifs != prev) fp@1812: e100_exec_cb(nic, NULL, e100_configure); fp@1812: } fp@1812: } fp@1812: fp@1812: static void e100_watchdog(unsigned long data) fp@1812: { fp@1812: struct nic *nic = (struct nic *)data; fp@1812: struct ethtool_cmd cmd; fp@1812: fp@1812: DPRINTK(TIMER, DEBUG, "right now = %ld\n", jiffies); fp@1812: fp@1812: /* mii library handles link maintenance tasks */ fp@1812: fp@1812: mii_ethtool_gset(&nic->mii, &cmd); fp@1812: fp@1812: if (mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) { fp@1812: printk(KERN_INFO "e100: %s NIC Link is Up %s Mbps %s Duplex\n", fp@1812: nic->netdev->name, fp@1812: cmd.speed == SPEED_100 ? "100" : "10", fp@1812: cmd.duplex == DUPLEX_FULL ? "Full" : "Half"); fp@1812: } else if (!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) { fp@1812: printk(KERN_INFO "e100: %s NIC Link is Down\n", fp@1812: nic->netdev->name); fp@1812: } fp@1812: fp@1812: mii_check_link(&nic->mii); fp@1812: fp@1812: /* Software generated interrupt to recover from (rare) Rx fp@1812: * allocation failure. fp@1812: * Unfortunately have to use a spinlock to not re-enable interrupts fp@1812: * accidentally, due to hardware that shares a register between the fp@1812: * interrupt mask bit and the SW Interrupt generation bit */ fp@1812: spin_lock_irq(&nic->cmd_lock); fp@1812: iowrite8(ioread8(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi); fp@1812: e100_write_flush(nic); fp@1812: spin_unlock_irq(&nic->cmd_lock); fp@1812: fp@1812: e100_update_stats(nic); fp@1812: e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex); fp@1812: fp@1812: if (nic->mac <= mac_82557_D100_C) fp@1812: /* Issue a multicast command to workaround a 557 lock up */ fp@1812: e100_set_multicast_list(nic->netdev); fp@1812: fp@1812: if (nic->flags & ich && cmd.speed==SPEED_10 && cmd.duplex==DUPLEX_HALF) fp@1812: /* Need SW workaround for ICH[x] 10Mbps/half duplex Tx hang. */ fp@1812: nic->flags |= ich_10h_workaround; fp@1812: else fp@1812: nic->flags &= ~ich_10h_workaround; fp@1812: fp@1812: mod_timer(&nic->watchdog, fp@1812: round_jiffies(jiffies + E100_WATCHDOG_PERIOD)); fp@1812: } fp@1812: fp@1812: static void e100_xmit_prepare(struct nic *nic, struct cb *cb, fp@1812: struct sk_buff *skb) fp@1812: { fp@1812: cb->command = nic->tx_command; fp@1812: /* interrupt every 16 packets regardless of delay */ fp@1812: if ((nic->cbs_avail & ~15) == nic->cbs_avail) fp@1812: cb->command |= cpu_to_le16(cb_i); fp@1812: cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd); fp@1812: cb->u.tcb.tcb_byte_count = 0; fp@1812: cb->u.tcb.threshold = nic->tx_threshold; fp@1812: cb->u.tcb.tbd_count = 1; fp@1812: cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev, fp@1812: skb->data, skb->len, PCI_DMA_TODEVICE)); fp@1812: /* check for mapping failure? */ fp@1812: cb->u.tcb.tbd.size = cpu_to_le16(skb->len); fp@1812: } fp@1812: fp@1812: static int e100_xmit_frame(struct sk_buff *skb, struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: int err; fp@1812: fp@1812: if (nic->flags & ich_10h_workaround) { fp@1812: /* SW workaround for ICH[x] 10Mbps/half duplex Tx hang. fp@1812: Issue a NOP command followed by a 1us delay before fp@1812: issuing the Tx command. */ fp@1812: if (e100_exec_cmd(nic, cuc_nop, 0)) fp@1812: DPRINTK(TX_ERR, DEBUG, "exec cuc_nop failed\n"); fp@1812: udelay(1); fp@1812: } fp@1812: fp@1812: err = e100_exec_cb(nic, skb, e100_xmit_prepare); fp@1812: fp@1812: switch (err) { fp@1812: case -ENOSPC: fp@1812: /* We queued the skb, but now we're out of space. */ fp@1812: DPRINTK(TX_ERR, DEBUG, "No space for CB\n"); fp@1812: netif_stop_queue(netdev); fp@1812: break; fp@1812: case -ENOMEM: fp@1812: /* This is a hard error - log it. */ fp@1812: DPRINTK(TX_ERR, DEBUG, "Out of Tx resources, returning skb\n"); fp@1812: netif_stop_queue(netdev); fp@1812: return NETDEV_TX_BUSY; fp@1812: } fp@1812: fp@1812: netdev->trans_start = jiffies; fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static int e100_tx_clean(struct nic *nic) fp@1812: { fp@1812: struct net_device *dev = nic->netdev; fp@1812: struct cb *cb; fp@1812: int tx_cleaned = 0; fp@1812: fp@1812: spin_lock(&nic->cb_lock); fp@1812: fp@1812: /* Clean CBs marked complete */ fp@1812: for (cb = nic->cb_to_clean; fp@1812: cb->status & cpu_to_le16(cb_complete); fp@1812: cb = nic->cb_to_clean = cb->next) { fp@1812: DPRINTK(TX_DONE, DEBUG, "cb[%d]->status = 0x%04X\n", fp@1812: (int)(((void*)cb - (void*)nic->cbs)/sizeof(struct cb)), fp@1812: cb->status); fp@1812: fp@1812: if (likely(cb->skb != NULL)) { fp@1812: dev->stats.tx_packets++; fp@1812: dev->stats.tx_bytes += cb->skb->len; fp@1812: fp@1812: pci_unmap_single(nic->pdev, fp@1812: le32_to_cpu(cb->u.tcb.tbd.buf_addr), fp@1812: le16_to_cpu(cb->u.tcb.tbd.size), fp@1812: PCI_DMA_TODEVICE); fp@1812: dev_kfree_skb_any(cb->skb); fp@1812: cb->skb = NULL; fp@1812: tx_cleaned = 1; fp@1812: } fp@1812: cb->status = 0; fp@1812: nic->cbs_avail++; fp@1812: } fp@1812: fp@1812: spin_unlock(&nic->cb_lock); fp@1812: fp@1812: /* Recover from running out of Tx resources in xmit_frame */ fp@1812: if (unlikely(tx_cleaned && netif_queue_stopped(nic->netdev))) fp@1812: netif_wake_queue(nic->netdev); fp@1812: fp@1812: return tx_cleaned; fp@1812: } fp@1812: fp@1812: static void e100_clean_cbs(struct nic *nic) fp@1812: { fp@1812: if (nic->cbs) { fp@1812: while (nic->cbs_avail != nic->params.cbs.count) { fp@1812: struct cb *cb = nic->cb_to_clean; fp@1812: if (cb->skb) { fp@1812: pci_unmap_single(nic->pdev, fp@1812: le32_to_cpu(cb->u.tcb.tbd.buf_addr), fp@1812: le16_to_cpu(cb->u.tcb.tbd.size), fp@1812: PCI_DMA_TODEVICE); fp@1812: dev_kfree_skb(cb->skb); fp@1812: } fp@1812: nic->cb_to_clean = nic->cb_to_clean->next; fp@1812: nic->cbs_avail++; fp@1812: } fp@1812: pci_free_consistent(nic->pdev, fp@1812: sizeof(struct cb) * nic->params.cbs.count, fp@1812: nic->cbs, nic->cbs_dma_addr); fp@1812: nic->cbs = NULL; fp@1812: nic->cbs_avail = 0; fp@1812: } fp@1812: nic->cuc_cmd = cuc_start; fp@1812: nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = fp@1812: nic->cbs; fp@1812: } fp@1812: fp@1812: static int e100_alloc_cbs(struct nic *nic) fp@1812: { fp@1812: struct cb *cb; fp@1812: unsigned int i, count = nic->params.cbs.count; fp@1812: fp@1812: nic->cuc_cmd = cuc_start; fp@1812: nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL; fp@1812: nic->cbs_avail = 0; fp@1812: fp@1812: nic->cbs = pci_alloc_consistent(nic->pdev, fp@1812: sizeof(struct cb) * count, &nic->cbs_dma_addr); fp@1812: if (!nic->cbs) fp@1812: return -ENOMEM; fp@1812: fp@1812: for (cb = nic->cbs, i = 0; i < count; cb++, i++) { fp@1812: cb->next = (i + 1 < count) ? cb + 1 : nic->cbs; fp@1812: cb->prev = (i == 0) ? nic->cbs + count - 1 : cb - 1; fp@1812: fp@1812: cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb); fp@1812: cb->link = cpu_to_le32(nic->cbs_dma_addr + fp@1812: ((i+1) % count) * sizeof(struct cb)); fp@1812: cb->skb = NULL; fp@1812: } fp@1812: fp@1812: nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs; fp@1812: nic->cbs_avail = count; fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static inline void e100_start_receiver(struct nic *nic, struct rx *rx) fp@1812: { fp@1812: if (!nic->rxs) return; fp@1812: if (RU_SUSPENDED != nic->ru_running) return; fp@1812: fp@1812: /* handle init time starts */ fp@1812: if (!rx) rx = nic->rxs; fp@1812: fp@1812: /* (Re)start RU if suspended or idle and RFA is non-NULL */ fp@1812: if (rx->skb) { fp@1812: e100_exec_cmd(nic, ruc_start, rx->dma_addr); fp@1812: nic->ru_running = RU_RUNNING; fp@1812: } fp@1812: } fp@1812: fp@1812: #define RFD_BUF_LEN (sizeof(struct rfd) + VLAN_ETH_FRAME_LEN) fp@1812: static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx) fp@1812: { fp@1812: if (!(rx->skb = netdev_alloc_skb(nic->netdev, RFD_BUF_LEN + NET_IP_ALIGN))) fp@1812: return -ENOMEM; fp@1812: fp@1812: /* Align, init, and map the RFD. */ fp@1812: skb_reserve(rx->skb, NET_IP_ALIGN); fp@1812: skb_copy_to_linear_data(rx->skb, &nic->blank_rfd, sizeof(struct rfd)); fp@1812: rx->dma_addr = pci_map_single(nic->pdev, rx->skb->data, fp@1812: RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL); fp@1812: fp@1812: if (pci_dma_mapping_error(nic->pdev, rx->dma_addr)) { fp@1812: dev_kfree_skb_any(rx->skb); fp@1812: rx->skb = NULL; fp@1812: rx->dma_addr = 0; fp@1812: return -ENOMEM; fp@1812: } fp@1812: fp@1812: /* Link the RFD to end of RFA by linking previous RFD to fp@1812: * this one. We are safe to touch the previous RFD because fp@1812: * it is protected by the before last buffer's el bit being set */ fp@1812: if (rx->prev->skb) { fp@1812: struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data; fp@1812: put_unaligned_le32(rx->dma_addr, &prev_rfd->link); fp@1812: pci_dma_sync_single_for_device(nic->pdev, rx->prev->dma_addr, fp@1812: sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL); fp@1812: } fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static int e100_rx_indicate(struct nic *nic, struct rx *rx, fp@1812: unsigned int *work_done, unsigned int work_to_do) fp@1812: { fp@1812: struct net_device *dev = nic->netdev; fp@1812: struct sk_buff *skb = rx->skb; fp@1812: struct rfd *rfd = (struct rfd *)skb->data; fp@1812: u16 rfd_status, actual_size; fp@1812: fp@1812: if (unlikely(work_done && *work_done >= work_to_do)) fp@1812: return -EAGAIN; fp@1812: fp@1812: /* Need to sync before taking a peek at cb_complete bit */ fp@1812: pci_dma_sync_single_for_cpu(nic->pdev, rx->dma_addr, fp@1812: sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL); fp@1812: rfd_status = le16_to_cpu(rfd->status); fp@1812: fp@1812: DPRINTK(RX_STATUS, DEBUG, "status=0x%04X\n", rfd_status); fp@1812: fp@1812: /* If data isn't ready, nothing to indicate */ fp@1812: if (unlikely(!(rfd_status & cb_complete))) { fp@1812: /* If the next buffer has the el bit, but we think the receiver fp@1812: * is still running, check to see if it really stopped while fp@1812: * we had interrupts off. fp@1812: * This allows for a fast restart without re-enabling fp@1812: * interrupts */ fp@1812: if ((le16_to_cpu(rfd->command) & cb_el) && fp@1812: (RU_RUNNING == nic->ru_running)) fp@1812: fp@1812: if (ioread8(&nic->csr->scb.status) & rus_no_res) fp@1812: nic->ru_running = RU_SUSPENDED; fp@1812: pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr, fp@1812: sizeof(struct rfd), fp@1812: PCI_DMA_FROMDEVICE); fp@1812: return -ENODATA; fp@1812: } fp@1812: fp@1812: /* Get actual data size */ fp@1812: actual_size = le16_to_cpu(rfd->actual_size) & 0x3FFF; fp@1812: if (unlikely(actual_size > RFD_BUF_LEN - sizeof(struct rfd))) fp@1812: actual_size = RFD_BUF_LEN - sizeof(struct rfd); fp@1812: fp@1812: /* Get data */ fp@1812: pci_unmap_single(nic->pdev, rx->dma_addr, fp@1812: RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL); fp@1812: fp@1812: /* If this buffer has the el bit, but we think the receiver fp@1812: * is still running, check to see if it really stopped while fp@1812: * we had interrupts off. fp@1812: * This allows for a fast restart without re-enabling interrupts. fp@1812: * This can happen when the RU sees the size change but also sees fp@1812: * the el bit set. */ fp@1812: if ((le16_to_cpu(rfd->command) & cb_el) && fp@1812: (RU_RUNNING == nic->ru_running)) { fp@1812: fp@1812: if (ioread8(&nic->csr->scb.status) & rus_no_res) fp@1812: nic->ru_running = RU_SUSPENDED; fp@1812: } fp@1812: fp@1812: /* Pull off the RFD and put the actual data (minus eth hdr) */ fp@1812: skb_reserve(skb, sizeof(struct rfd)); fp@1812: skb_put(skb, actual_size); fp@1812: skb->protocol = eth_type_trans(skb, nic->netdev); fp@1812: fp@1812: if (unlikely(!(rfd_status & cb_ok))) { fp@1812: /* Don't indicate if hardware indicates errors */ fp@1812: dev_kfree_skb_any(skb); fp@1812: } else if (actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN) { fp@1812: /* Don't indicate oversized frames */ fp@1812: nic->rx_over_length_errors++; fp@1812: dev_kfree_skb_any(skb); fp@1812: } else { fp@1812: dev->stats.rx_packets++; fp@1812: dev->stats.rx_bytes += actual_size; fp@1812: netif_receive_skb(skb); fp@1812: if (work_done) fp@1812: (*work_done)++; fp@1812: } fp@1812: fp@1812: rx->skb = NULL; fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static void e100_rx_clean(struct nic *nic, unsigned int *work_done, fp@1812: unsigned int work_to_do) fp@1812: { fp@1812: struct rx *rx; fp@1812: int restart_required = 0, err = 0; fp@1812: struct rx *old_before_last_rx, *new_before_last_rx; fp@1812: struct rfd *old_before_last_rfd, *new_before_last_rfd; fp@1812: fp@1812: /* Indicate newly arrived packets */ fp@1812: for (rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) { fp@1812: err = e100_rx_indicate(nic, rx, work_done, work_to_do); fp@1812: /* Hit quota or no more to clean */ fp@1812: if (-EAGAIN == err || -ENODATA == err) fp@1812: break; fp@1812: } fp@1812: fp@1812: fp@1812: /* On EAGAIN, hit quota so have more work to do, restart once fp@1812: * cleanup is complete. fp@1812: * Else, are we already rnr? then pay attention!!! this ensures that fp@1812: * the state machine progression never allows a start with a fp@1812: * partially cleaned list, avoiding a race between hardware fp@1812: * and rx_to_clean when in NAPI mode */ fp@1812: if (-EAGAIN != err && RU_SUSPENDED == nic->ru_running) fp@1812: restart_required = 1; fp@1812: fp@1812: old_before_last_rx = nic->rx_to_use->prev->prev; fp@1812: old_before_last_rfd = (struct rfd *)old_before_last_rx->skb->data; fp@1812: fp@1812: /* Alloc new skbs to refill list */ fp@1812: for (rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) { fp@1812: if (unlikely(e100_rx_alloc_skb(nic, rx))) fp@1812: break; /* Better luck next time (see watchdog) */ fp@1812: } fp@1812: fp@1812: new_before_last_rx = nic->rx_to_use->prev->prev; fp@1812: if (new_before_last_rx != old_before_last_rx) { fp@1812: /* Set the el-bit on the buffer that is before the last buffer. fp@1812: * This lets us update the next pointer on the last buffer fp@1812: * without worrying about hardware touching it. fp@1812: * We set the size to 0 to prevent hardware from touching this fp@1812: * buffer. fp@1812: * When the hardware hits the before last buffer with el-bit fp@1812: * and size of 0, it will RNR interrupt, the RUS will go into fp@1812: * the No Resources state. It will not complete nor write to fp@1812: * this buffer. */ fp@1812: new_before_last_rfd = fp@1812: (struct rfd *)new_before_last_rx->skb->data; fp@1812: new_before_last_rfd->size = 0; fp@1812: new_before_last_rfd->command |= cpu_to_le16(cb_el); fp@1812: pci_dma_sync_single_for_device(nic->pdev, fp@1812: new_before_last_rx->dma_addr, sizeof(struct rfd), fp@1812: PCI_DMA_BIDIRECTIONAL); fp@1812: fp@1812: /* Now that we have a new stopping point, we can clear the old fp@1812: * stopping point. We must sync twice to get the proper fp@1812: * ordering on the hardware side of things. */ fp@1812: old_before_last_rfd->command &= ~cpu_to_le16(cb_el); fp@1812: pci_dma_sync_single_for_device(nic->pdev, fp@1812: old_before_last_rx->dma_addr, sizeof(struct rfd), fp@1812: PCI_DMA_BIDIRECTIONAL); fp@1812: old_before_last_rfd->size = cpu_to_le16(VLAN_ETH_FRAME_LEN); fp@1812: pci_dma_sync_single_for_device(nic->pdev, fp@1812: old_before_last_rx->dma_addr, sizeof(struct rfd), fp@1812: PCI_DMA_BIDIRECTIONAL); fp@1812: } fp@1812: fp@1812: if (restart_required) { fp@1812: // ack the rnr? fp@1812: iowrite8(stat_ack_rnr, &nic->csr->scb.stat_ack); fp@1812: e100_start_receiver(nic, nic->rx_to_clean); fp@1812: if (work_done) fp@1812: (*work_done)++; fp@1812: } fp@1812: } fp@1812: fp@1812: static void e100_rx_clean_list(struct nic *nic) fp@1812: { fp@1812: struct rx *rx; fp@1812: unsigned int i, count = nic->params.rfds.count; fp@1812: fp@1812: nic->ru_running = RU_UNINITIALIZED; fp@1812: fp@1812: if (nic->rxs) { fp@1812: for (rx = nic->rxs, i = 0; i < count; rx++, i++) { fp@1812: if (rx->skb) { fp@1812: pci_unmap_single(nic->pdev, rx->dma_addr, fp@1812: RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL); fp@1812: dev_kfree_skb(rx->skb); fp@1812: } fp@1812: } fp@1812: kfree(nic->rxs); fp@1812: nic->rxs = NULL; fp@1812: } fp@1812: fp@1812: nic->rx_to_use = nic->rx_to_clean = NULL; fp@1812: } fp@1812: fp@1812: static int e100_rx_alloc_list(struct nic *nic) fp@1812: { fp@1812: struct rx *rx; fp@1812: unsigned int i, count = nic->params.rfds.count; fp@1812: struct rfd *before_last; fp@1812: fp@1812: nic->rx_to_use = nic->rx_to_clean = NULL; fp@1812: nic->ru_running = RU_UNINITIALIZED; fp@1812: fp@1812: if (!(nic->rxs = kcalloc(count, sizeof(struct rx), GFP_ATOMIC))) fp@1812: return -ENOMEM; fp@1812: fp@1812: for (rx = nic->rxs, i = 0; i < count; rx++, i++) { fp@1812: rx->next = (i + 1 < count) ? rx + 1 : nic->rxs; fp@1812: rx->prev = (i == 0) ? nic->rxs + count - 1 : rx - 1; fp@1812: if (e100_rx_alloc_skb(nic, rx)) { fp@1812: e100_rx_clean_list(nic); fp@1812: return -ENOMEM; fp@1812: } fp@1812: } fp@1812: /* Set the el-bit on the buffer that is before the last buffer. fp@1812: * This lets us update the next pointer on the last buffer without fp@1812: * worrying about hardware touching it. fp@1812: * We set the size to 0 to prevent hardware from touching this buffer. fp@1812: * When the hardware hits the before last buffer with el-bit and size fp@1812: * of 0, it will RNR interrupt, the RU will go into the No Resources fp@1812: * state. It will not complete nor write to this buffer. */ fp@1812: rx = nic->rxs->prev->prev; fp@1812: before_last = (struct rfd *)rx->skb->data; fp@1812: before_last->command |= cpu_to_le16(cb_el); fp@1812: before_last->size = 0; fp@1812: pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr, fp@1812: sizeof(struct rfd), PCI_DMA_BIDIRECTIONAL); fp@1812: fp@1812: nic->rx_to_use = nic->rx_to_clean = nic->rxs; fp@1812: nic->ru_running = RU_SUSPENDED; fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static irqreturn_t e100_intr(int irq, void *dev_id) fp@1812: { fp@1812: struct net_device *netdev = dev_id; fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: u8 stat_ack = ioread8(&nic->csr->scb.stat_ack); fp@1812: fp@1812: DPRINTK(INTR, DEBUG, "stat_ack = 0x%02X\n", stat_ack); fp@1812: fp@1812: if (stat_ack == stat_ack_not_ours || /* Not our interrupt */ fp@1812: stat_ack == stat_ack_not_present) /* Hardware is ejected */ fp@1812: return IRQ_NONE; fp@1812: fp@1812: /* Ack interrupt(s) */ fp@1812: iowrite8(stat_ack, &nic->csr->scb.stat_ack); fp@1812: fp@1812: /* We hit Receive No Resource (RNR); restart RU after cleaning */ fp@1812: if (stat_ack & stat_ack_rnr) fp@1812: nic->ru_running = RU_SUSPENDED; fp@1812: fp@1812: if (likely(napi_schedule_prep(&nic->napi))) { fp@1812: e100_disable_irq(nic); fp@1812: __napi_schedule(&nic->napi); fp@1812: } fp@1812: fp@1812: return IRQ_HANDLED; fp@1812: } fp@1812: fp@1812: static int e100_poll(struct napi_struct *napi, int budget) fp@1812: { fp@1812: struct nic *nic = container_of(napi, struct nic, napi); fp@1812: unsigned int work_done = 0; fp@1812: fp@1812: e100_rx_clean(nic, &work_done, budget); fp@1812: e100_tx_clean(nic); fp@1812: fp@1812: /* If budget not fully consumed, exit the polling mode */ fp@1812: if (work_done < budget) { fp@1812: napi_complete(napi); fp@1812: e100_enable_irq(nic); fp@1812: } fp@1812: fp@1812: return work_done; fp@1812: } fp@1812: fp@1812: #ifdef CONFIG_NET_POLL_CONTROLLER fp@1812: static void e100_netpoll(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: e100_disable_irq(nic); fp@1812: e100_intr(nic->pdev->irq, netdev); fp@1812: e100_tx_clean(nic); fp@1812: e100_enable_irq(nic); fp@1812: } fp@1812: #endif fp@1812: fp@1812: static int e100_set_mac_address(struct net_device *netdev, void *p) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: struct sockaddr *addr = p; fp@1812: fp@1812: if (!is_valid_ether_addr(addr->sa_data)) fp@1812: return -EADDRNOTAVAIL; fp@1812: fp@1812: memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); fp@1812: e100_exec_cb(nic, NULL, e100_setup_iaaddr); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static int e100_change_mtu(struct net_device *netdev, int new_mtu) fp@1812: { fp@1812: if (new_mtu < ETH_ZLEN || new_mtu > ETH_DATA_LEN) fp@1812: return -EINVAL; fp@1812: netdev->mtu = new_mtu; fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static int e100_asf(struct nic *nic) fp@1812: { fp@1812: /* ASF can be enabled from eeprom */ fp@1812: return((nic->pdev->device >= 0x1050) && (nic->pdev->device <= 0x1057) && fp@1812: (nic->eeprom[eeprom_config_asf] & eeprom_asf) && fp@1812: !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) && fp@1812: ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE)); fp@1812: } fp@1812: fp@1812: static int e100_up(struct nic *nic) fp@1812: { fp@1812: int err; fp@1812: fp@1812: if ((err = e100_rx_alloc_list(nic))) fp@1812: return err; fp@1812: if ((err = e100_alloc_cbs(nic))) fp@1812: goto err_rx_clean_list; fp@1812: if ((err = e100_hw_init(nic))) fp@1812: goto err_clean_cbs; fp@1812: e100_set_multicast_list(nic->netdev); fp@1812: e100_start_receiver(nic, NULL); fp@1812: mod_timer(&nic->watchdog, jiffies); fp@1812: if ((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED, fp@1812: nic->netdev->name, nic->netdev))) fp@1812: goto err_no_irq; fp@1812: netif_wake_queue(nic->netdev); fp@1812: napi_enable(&nic->napi); fp@1812: /* enable ints _after_ enabling poll, preventing a race between fp@1812: * disable ints+schedule */ fp@1812: e100_enable_irq(nic); fp@1812: return 0; fp@1812: fp@1812: err_no_irq: fp@1812: del_timer_sync(&nic->watchdog); fp@1812: err_clean_cbs: fp@1812: e100_clean_cbs(nic); fp@1812: err_rx_clean_list: fp@1812: e100_rx_clean_list(nic); fp@1812: return err; fp@1812: } fp@1812: fp@1812: static void e100_down(struct nic *nic) fp@1812: { fp@1812: /* wait here for poll to complete */ fp@1812: napi_disable(&nic->napi); fp@1812: netif_stop_queue(nic->netdev); fp@1812: e100_hw_reset(nic); fp@1812: free_irq(nic->pdev->irq, nic->netdev); fp@1812: del_timer_sync(&nic->watchdog); fp@1812: netif_carrier_off(nic->netdev); fp@1812: e100_clean_cbs(nic); fp@1812: e100_rx_clean_list(nic); fp@1812: } fp@1812: fp@1812: static void e100_tx_timeout(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: /* Reset outside of interrupt context, to avoid request_irq fp@1812: * in interrupt context */ fp@1812: schedule_work(&nic->tx_timeout_task); fp@1812: } fp@1812: fp@1812: static void e100_tx_timeout_task(struct work_struct *work) fp@1812: { fp@1812: struct nic *nic = container_of(work, struct nic, tx_timeout_task); fp@1812: struct net_device *netdev = nic->netdev; fp@1812: fp@1812: DPRINTK(TX_ERR, DEBUG, "scb.status=0x%02X\n", fp@1812: ioread8(&nic->csr->scb.status)); fp@1812: e100_down(netdev_priv(netdev)); fp@1812: e100_up(netdev_priv(netdev)); fp@1812: } fp@1812: fp@1812: static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode) fp@1812: { fp@1812: int err; fp@1812: struct sk_buff *skb; fp@1812: fp@1812: /* Use driver resources to perform internal MAC or PHY fp@1812: * loopback test. A single packet is prepared and transmitted fp@1812: * in loopback mode, and the test passes if the received fp@1812: * packet compares byte-for-byte to the transmitted packet. */ fp@1812: fp@1812: if ((err = e100_rx_alloc_list(nic))) fp@1812: return err; fp@1812: if ((err = e100_alloc_cbs(nic))) fp@1812: goto err_clean_rx; fp@1812: fp@1812: /* ICH PHY loopback is broken so do MAC loopback instead */ fp@1812: if (nic->flags & ich && loopback_mode == lb_phy) fp@1812: loopback_mode = lb_mac; fp@1812: fp@1812: nic->loopback = loopback_mode; fp@1812: if ((err = e100_hw_init(nic))) fp@1812: goto err_loopback_none; fp@1812: fp@1812: if (loopback_mode == lb_phy) fp@1812: mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, fp@1812: BMCR_LOOPBACK); fp@1812: fp@1812: e100_start_receiver(nic, NULL); fp@1812: fp@1812: if (!(skb = netdev_alloc_skb(nic->netdev, ETH_DATA_LEN))) { fp@1812: err = -ENOMEM; fp@1812: goto err_loopback_none; fp@1812: } fp@1812: skb_put(skb, ETH_DATA_LEN); fp@1812: memset(skb->data, 0xFF, ETH_DATA_LEN); fp@1812: e100_xmit_frame(skb, nic->netdev); fp@1812: fp@1812: msleep(10); fp@1812: fp@1812: pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr, fp@1812: RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL); fp@1812: fp@1812: if (memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd), fp@1812: skb->data, ETH_DATA_LEN)) fp@1812: err = -EAGAIN; fp@1812: fp@1812: err_loopback_none: fp@1812: mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0); fp@1812: nic->loopback = lb_none; fp@1812: e100_clean_cbs(nic); fp@1812: e100_hw_reset(nic); fp@1812: err_clean_rx: fp@1812: e100_rx_clean_list(nic); fp@1812: return err; fp@1812: } fp@1812: fp@1812: #define MII_LED_CONTROL 0x1B fp@1812: #define E100_82552_LED_OVERRIDE 0x19 fp@1812: #define E100_82552_LED_ON 0x000F /* LEDTX and LED_RX both on */ fp@1812: #define E100_82552_LED_OFF 0x000A /* LEDTX and LED_RX both off */ fp@1812: static void e100_blink_led(unsigned long data) fp@1812: { fp@1812: struct nic *nic = (struct nic *)data; fp@1812: enum led_state { fp@1812: led_on = 0x01, fp@1812: led_off = 0x04, fp@1812: led_on_559 = 0x05, fp@1812: led_on_557 = 0x07, fp@1812: }; fp@1812: u16 led_reg = MII_LED_CONTROL; fp@1812: fp@1812: if (nic->phy == phy_82552_v) { fp@1812: led_reg = E100_82552_LED_OVERRIDE; fp@1812: fp@1812: nic->leds = (nic->leds == E100_82552_LED_ON) ? fp@1812: E100_82552_LED_OFF : E100_82552_LED_ON; fp@1812: } else { fp@1812: nic->leds = (nic->leds & led_on) ? led_off : fp@1812: (nic->mac < mac_82559_D101M) ? led_on_557 : fp@1812: led_on_559; fp@1812: } fp@1812: mdio_write(nic->netdev, nic->mii.phy_id, led_reg, nic->leds); fp@1812: mod_timer(&nic->blink_timer, jiffies + HZ / 4); fp@1812: } fp@1812: fp@1812: static int e100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: return mii_ethtool_gset(&nic->mii, cmd); fp@1812: } fp@1812: fp@1812: static int e100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: int err; fp@1812: fp@1812: mdio_write(netdev, nic->mii.phy_id, MII_BMCR, BMCR_RESET); fp@1812: err = mii_ethtool_sset(&nic->mii, cmd); fp@1812: e100_exec_cb(nic, NULL, e100_configure); fp@1812: fp@1812: return err; fp@1812: } fp@1812: fp@1812: static void e100_get_drvinfo(struct net_device *netdev, fp@1812: struct ethtool_drvinfo *info) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: strcpy(info->driver, DRV_NAME); fp@1812: strcpy(info->version, DRV_VERSION); fp@1812: strcpy(info->fw_version, "N/A"); fp@1812: strcpy(info->bus_info, pci_name(nic->pdev)); fp@1812: } fp@1812: fp@1812: #define E100_PHY_REGS 0x1C fp@1812: static int e100_get_regs_len(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: return 1 + E100_PHY_REGS + sizeof(nic->mem->dump_buf); fp@1812: } fp@1812: fp@1812: static void e100_get_regs(struct net_device *netdev, fp@1812: struct ethtool_regs *regs, void *p) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: u32 *buff = p; fp@1812: int i; fp@1812: fp@1812: regs->version = (1 << 24) | nic->pdev->revision; fp@1812: buff[0] = ioread8(&nic->csr->scb.cmd_hi) << 24 | fp@1812: ioread8(&nic->csr->scb.cmd_lo) << 16 | fp@1812: ioread16(&nic->csr->scb.status); fp@1812: for (i = E100_PHY_REGS; i >= 0; i--) fp@1812: buff[1 + E100_PHY_REGS - i] = fp@1812: mdio_read(netdev, nic->mii.phy_id, i); fp@1812: memset(nic->mem->dump_buf, 0, sizeof(nic->mem->dump_buf)); fp@1812: e100_exec_cb(nic, NULL, e100_dump); fp@1812: msleep(10); fp@1812: memcpy(&buff[2 + E100_PHY_REGS], nic->mem->dump_buf, fp@1812: sizeof(nic->mem->dump_buf)); fp@1812: } fp@1812: fp@1812: static void e100_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: wol->supported = (nic->mac >= mac_82558_D101_A4) ? WAKE_MAGIC : 0; fp@1812: wol->wolopts = (nic->flags & wol_magic) ? WAKE_MAGIC : 0; fp@1812: } fp@1812: fp@1812: static int e100_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: if ((wol->wolopts && wol->wolopts != WAKE_MAGIC) || fp@1812: !device_can_wakeup(&nic->pdev->dev)) fp@1812: return -EOPNOTSUPP; fp@1812: fp@1812: if (wol->wolopts) fp@1812: nic->flags |= wol_magic; fp@1812: else fp@1812: nic->flags &= ~wol_magic; fp@1812: fp@1812: device_set_wakeup_enable(&nic->pdev->dev, wol->wolopts); fp@1812: fp@1812: e100_exec_cb(nic, NULL, e100_configure); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static u32 e100_get_msglevel(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: return nic->msg_enable; fp@1812: } fp@1812: fp@1812: static void e100_set_msglevel(struct net_device *netdev, u32 value) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: nic->msg_enable = value; fp@1812: } fp@1812: fp@1812: static int e100_nway_reset(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: return mii_nway_restart(&nic->mii); fp@1812: } fp@1812: fp@1812: static u32 e100_get_link(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: return mii_link_ok(&nic->mii); fp@1812: } fp@1812: fp@1812: static int e100_get_eeprom_len(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: return nic->eeprom_wc << 1; fp@1812: } fp@1812: fp@1812: #define E100_EEPROM_MAGIC 0x1234 fp@1812: static int e100_get_eeprom(struct net_device *netdev, fp@1812: struct ethtool_eeprom *eeprom, u8 *bytes) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: eeprom->magic = E100_EEPROM_MAGIC; fp@1812: memcpy(bytes, &((u8 *)nic->eeprom)[eeprom->offset], eeprom->len); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static int e100_set_eeprom(struct net_device *netdev, fp@1812: struct ethtool_eeprom *eeprom, u8 *bytes) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: if (eeprom->magic != E100_EEPROM_MAGIC) fp@1812: return -EINVAL; fp@1812: fp@1812: memcpy(&((u8 *)nic->eeprom)[eeprom->offset], bytes, eeprom->len); fp@1812: fp@1812: return e100_eeprom_save(nic, eeprom->offset >> 1, fp@1812: (eeprom->len >> 1) + 1); fp@1812: } fp@1812: fp@1812: static void e100_get_ringparam(struct net_device *netdev, fp@1812: struct ethtool_ringparam *ring) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: struct param_range *rfds = &nic->params.rfds; fp@1812: struct param_range *cbs = &nic->params.cbs; fp@1812: fp@1812: ring->rx_max_pending = rfds->max; fp@1812: ring->tx_max_pending = cbs->max; fp@1812: ring->rx_mini_max_pending = 0; fp@1812: ring->rx_jumbo_max_pending = 0; fp@1812: ring->rx_pending = rfds->count; fp@1812: ring->tx_pending = cbs->count; fp@1812: ring->rx_mini_pending = 0; fp@1812: ring->rx_jumbo_pending = 0; fp@1812: } fp@1812: fp@1812: static int e100_set_ringparam(struct net_device *netdev, fp@1812: struct ethtool_ringparam *ring) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: struct param_range *rfds = &nic->params.rfds; fp@1812: struct param_range *cbs = &nic->params.cbs; fp@1812: fp@1812: if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) fp@1812: return -EINVAL; fp@1812: fp@1812: if (netif_running(netdev)) fp@1812: e100_down(nic); fp@1812: rfds->count = max(ring->rx_pending, rfds->min); fp@1812: rfds->count = min(rfds->count, rfds->max); fp@1812: cbs->count = max(ring->tx_pending, cbs->min); fp@1812: cbs->count = min(cbs->count, cbs->max); fp@1812: DPRINTK(DRV, INFO, "Ring Param settings: rx: %d, tx %d\n", fp@1812: rfds->count, cbs->count); fp@1812: if (netif_running(netdev)) fp@1812: e100_up(nic); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static const char e100_gstrings_test[][ETH_GSTRING_LEN] = { fp@1812: "Link test (on/offline)", fp@1812: "Eeprom test (on/offline)", fp@1812: "Self test (offline)", fp@1812: "Mac loopback (offline)", fp@1812: "Phy loopback (offline)", fp@1812: }; fp@1812: #define E100_TEST_LEN ARRAY_SIZE(e100_gstrings_test) fp@1812: fp@1812: static void e100_diag_test(struct net_device *netdev, fp@1812: struct ethtool_test *test, u64 *data) fp@1812: { fp@1812: struct ethtool_cmd cmd; fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: int i, err; fp@1812: fp@1812: memset(data, 0, E100_TEST_LEN * sizeof(u64)); fp@1812: data[0] = !mii_link_ok(&nic->mii); fp@1812: data[1] = e100_eeprom_load(nic); fp@1812: if (test->flags & ETH_TEST_FL_OFFLINE) { fp@1812: fp@1812: /* save speed, duplex & autoneg settings */ fp@1812: err = mii_ethtool_gset(&nic->mii, &cmd); fp@1812: fp@1812: if (netif_running(netdev)) fp@1812: e100_down(nic); fp@1812: data[2] = e100_self_test(nic); fp@1812: data[3] = e100_loopback_test(nic, lb_mac); fp@1812: data[4] = e100_loopback_test(nic, lb_phy); fp@1812: fp@1812: /* restore speed, duplex & autoneg settings */ fp@1812: err = mii_ethtool_sset(&nic->mii, &cmd); fp@1812: fp@1812: if (netif_running(netdev)) fp@1812: e100_up(nic); fp@1812: } fp@1812: for (i = 0; i < E100_TEST_LEN; i++) fp@1812: test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0; fp@1812: fp@1812: msleep_interruptible(4 * 1000); fp@1812: } fp@1812: fp@1812: static int e100_phys_id(struct net_device *netdev, u32 data) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: u16 led_reg = (nic->phy == phy_82552_v) ? E100_82552_LED_OVERRIDE : fp@1812: MII_LED_CONTROL; fp@1812: fp@1812: if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)) fp@1812: data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ); fp@1812: mod_timer(&nic->blink_timer, jiffies); fp@1812: msleep_interruptible(data * 1000); fp@1812: del_timer_sync(&nic->blink_timer); fp@1812: mdio_write(netdev, nic->mii.phy_id, led_reg, 0); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static const char e100_gstrings_stats[][ETH_GSTRING_LEN] = { fp@1812: "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors", fp@1812: "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions", fp@1812: "rx_length_errors", "rx_over_errors", "rx_crc_errors", fp@1812: "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors", fp@1812: "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors", fp@1812: "tx_heartbeat_errors", "tx_window_errors", fp@1812: /* device-specific stats */ fp@1812: "tx_deferred", "tx_single_collisions", "tx_multi_collisions", fp@1812: "tx_flow_control_pause", "rx_flow_control_pause", fp@1812: "rx_flow_control_unsupported", "tx_tco_packets", "rx_tco_packets", fp@1812: }; fp@1812: #define E100_NET_STATS_LEN 21 fp@1812: #define E100_STATS_LEN ARRAY_SIZE(e100_gstrings_stats) fp@1812: fp@1812: static int e100_get_sset_count(struct net_device *netdev, int sset) fp@1812: { fp@1812: switch (sset) { fp@1812: case ETH_SS_TEST: fp@1812: return E100_TEST_LEN; fp@1812: case ETH_SS_STATS: fp@1812: return E100_STATS_LEN; fp@1812: default: fp@1812: return -EOPNOTSUPP; fp@1812: } fp@1812: } fp@1812: fp@1812: static void e100_get_ethtool_stats(struct net_device *netdev, fp@1812: struct ethtool_stats *stats, u64 *data) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: int i; fp@1812: fp@1812: for (i = 0; i < E100_NET_STATS_LEN; i++) fp@1812: data[i] = ((unsigned long *)&netdev->stats)[i]; fp@1812: fp@1812: data[i++] = nic->tx_deferred; fp@1812: data[i++] = nic->tx_single_collisions; fp@1812: data[i++] = nic->tx_multiple_collisions; fp@1812: data[i++] = nic->tx_fc_pause; fp@1812: data[i++] = nic->rx_fc_pause; fp@1812: data[i++] = nic->rx_fc_unsupported; fp@1812: data[i++] = nic->tx_tco_frames; fp@1812: data[i++] = nic->rx_tco_frames; fp@1812: } fp@1812: fp@1812: static void e100_get_strings(struct net_device *netdev, u32 stringset, u8 *data) fp@1812: { fp@1812: switch (stringset) { fp@1812: case ETH_SS_TEST: fp@1812: memcpy(data, *e100_gstrings_test, sizeof(e100_gstrings_test)); fp@1812: break; fp@1812: case ETH_SS_STATS: fp@1812: memcpy(data, *e100_gstrings_stats, sizeof(e100_gstrings_stats)); fp@1812: break; fp@1812: } fp@1812: } fp@1812: fp@1812: static const struct ethtool_ops e100_ethtool_ops = { fp@1812: .get_settings = e100_get_settings, fp@1812: .set_settings = e100_set_settings, fp@1812: .get_drvinfo = e100_get_drvinfo, fp@1812: .get_regs_len = e100_get_regs_len, fp@1812: .get_regs = e100_get_regs, fp@1812: .get_wol = e100_get_wol, fp@1812: .set_wol = e100_set_wol, fp@1812: .get_msglevel = e100_get_msglevel, fp@1812: .set_msglevel = e100_set_msglevel, fp@1812: .nway_reset = e100_nway_reset, fp@1812: .get_link = e100_get_link, fp@1812: .get_eeprom_len = e100_get_eeprom_len, fp@1812: .get_eeprom = e100_get_eeprom, fp@1812: .set_eeprom = e100_set_eeprom, fp@1812: .get_ringparam = e100_get_ringparam, fp@1812: .set_ringparam = e100_set_ringparam, fp@1812: .self_test = e100_diag_test, fp@1812: .get_strings = e100_get_strings, fp@1812: .phys_id = e100_phys_id, fp@1812: .get_ethtool_stats = e100_get_ethtool_stats, fp@1812: .get_sset_count = e100_get_sset_count, fp@1812: }; fp@1812: fp@1812: static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: return generic_mii_ioctl(&nic->mii, if_mii(ifr), cmd, NULL); fp@1812: } fp@1812: fp@1812: static int e100_alloc(struct nic *nic) fp@1812: { fp@1812: nic->mem = pci_alloc_consistent(nic->pdev, sizeof(struct mem), fp@1812: &nic->dma_addr); fp@1812: return nic->mem ? 0 : -ENOMEM; fp@1812: } fp@1812: fp@1812: static void e100_free(struct nic *nic) fp@1812: { fp@1812: if (nic->mem) { fp@1812: pci_free_consistent(nic->pdev, sizeof(struct mem), fp@1812: nic->mem, nic->dma_addr); fp@1812: nic->mem = NULL; fp@1812: } fp@1812: } fp@1812: fp@1812: static int e100_open(struct net_device *netdev) fp@1812: { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: int err = 0; fp@1812: fp@1812: netif_carrier_off(netdev); fp@1812: if ((err = e100_up(nic))) fp@1812: DPRINTK(IFUP, ERR, "Cannot open interface, aborting.\n"); fp@1812: return err; fp@1812: } fp@1812: fp@1812: static int e100_close(struct net_device *netdev) fp@1812: { fp@1812: e100_down(netdev_priv(netdev)); fp@1812: return 0; fp@1812: } fp@1812: fp@1812: static const struct net_device_ops e100_netdev_ops = { fp@1812: .ndo_open = e100_open, fp@1812: .ndo_stop = e100_close, fp@1812: .ndo_start_xmit = e100_xmit_frame, fp@1812: .ndo_validate_addr = eth_validate_addr, fp@1812: .ndo_set_multicast_list = e100_set_multicast_list, fp@1812: .ndo_set_mac_address = e100_set_mac_address, fp@1812: .ndo_change_mtu = e100_change_mtu, fp@1812: .ndo_do_ioctl = e100_do_ioctl, fp@1812: .ndo_tx_timeout = e100_tx_timeout, fp@1812: #ifdef CONFIG_NET_POLL_CONTROLLER fp@1812: .ndo_poll_controller = e100_netpoll, fp@1812: #endif fp@1812: }; fp@1812: fp@1812: static int __devinit e100_probe(struct pci_dev *pdev, fp@1812: const struct pci_device_id *ent) fp@1812: { fp@1812: struct net_device *netdev; fp@1812: struct nic *nic; fp@1812: int err; fp@1812: fp@1812: if (!(netdev = alloc_etherdev(sizeof(struct nic)))) { fp@1812: if (((1 << debug) - 1) & NETIF_MSG_PROBE) fp@1812: printk(KERN_ERR PFX "Etherdev alloc failed, abort.\n"); fp@1812: return -ENOMEM; fp@1812: } fp@1812: fp@1812: netdev->netdev_ops = &e100_netdev_ops; fp@1812: SET_ETHTOOL_OPS(netdev, &e100_ethtool_ops); fp@1812: netdev->watchdog_timeo = E100_WATCHDOG_PERIOD; fp@1812: strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); fp@1812: fp@1812: nic = netdev_priv(netdev); fp@1812: netif_napi_add(netdev, &nic->napi, e100_poll, E100_NAPI_WEIGHT); fp@1812: nic->netdev = netdev; fp@1812: nic->pdev = pdev; fp@1812: nic->msg_enable = (1 << debug) - 1; fp@1812: nic->mdio_ctrl = mdio_ctrl_hw; fp@1812: pci_set_drvdata(pdev, netdev); fp@1812: fp@1812: if ((err = pci_enable_device(pdev))) { fp@1812: DPRINTK(PROBE, ERR, "Cannot enable PCI device, aborting.\n"); fp@1812: goto err_out_free_dev; fp@1812: } fp@1812: fp@1812: if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { fp@1812: DPRINTK(PROBE, ERR, "Cannot find proper PCI device " fp@1812: "base address, aborting.\n"); fp@1812: err = -ENODEV; fp@1812: goto err_out_disable_pdev; fp@1812: } fp@1812: fp@1812: if ((err = pci_request_regions(pdev, DRV_NAME))) { fp@1812: DPRINTK(PROBE, ERR, "Cannot obtain PCI resources, aborting.\n"); fp@1812: goto err_out_disable_pdev; fp@1812: } fp@1812: fp@1812: if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))) { fp@1812: DPRINTK(PROBE, ERR, "No usable DMA configuration, aborting.\n"); fp@1812: goto err_out_free_res; fp@1812: } fp@1812: fp@1812: SET_NETDEV_DEV(netdev, &pdev->dev); fp@1812: fp@1812: if (use_io) fp@1812: DPRINTK(PROBE, INFO, "using i/o access mode\n"); fp@1812: fp@1812: nic->csr = pci_iomap(pdev, (use_io ? 1 : 0), sizeof(struct csr)); fp@1812: if (!nic->csr) { fp@1812: DPRINTK(PROBE, ERR, "Cannot map device registers, aborting.\n"); fp@1812: err = -ENOMEM; fp@1812: goto err_out_free_res; fp@1812: } fp@1812: fp@1812: if (ent->driver_data) fp@1812: nic->flags |= ich; fp@1812: else fp@1812: nic->flags &= ~ich; fp@1812: fp@1812: e100_get_defaults(nic); fp@1812: fp@1812: /* locks must be initialized before calling hw_reset */ fp@1812: spin_lock_init(&nic->cb_lock); fp@1812: spin_lock_init(&nic->cmd_lock); fp@1812: spin_lock_init(&nic->mdio_lock); fp@1812: fp@1812: /* Reset the device before pci_set_master() in case device is in some fp@1812: * funky state and has an interrupt pending - hint: we don't have the fp@1812: * interrupt handler registered yet. */ fp@1812: e100_hw_reset(nic); fp@1812: fp@1812: pci_set_master(pdev); fp@1812: fp@1812: init_timer(&nic->watchdog); fp@1812: nic->watchdog.function = e100_watchdog; fp@1812: nic->watchdog.data = (unsigned long)nic; fp@1812: init_timer(&nic->blink_timer); fp@1812: nic->blink_timer.function = e100_blink_led; fp@1812: nic->blink_timer.data = (unsigned long)nic; fp@1812: fp@1812: INIT_WORK(&nic->tx_timeout_task, e100_tx_timeout_task); fp@1812: fp@1812: if ((err = e100_alloc(nic))) { fp@1812: DPRINTK(PROBE, ERR, "Cannot alloc driver memory, aborting.\n"); fp@1812: goto err_out_iounmap; fp@1812: } fp@1812: fp@1812: if ((err = e100_eeprom_load(nic))) fp@1812: goto err_out_free; fp@1812: fp@1812: e100_phy_init(nic); fp@1812: fp@1812: memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN); fp@1812: memcpy(netdev->perm_addr, nic->eeprom, ETH_ALEN); fp@1812: if (!is_valid_ether_addr(netdev->perm_addr)) { fp@1812: if (!eeprom_bad_csum_allow) { fp@1812: DPRINTK(PROBE, ERR, "Invalid MAC address from " fp@1812: "EEPROM, aborting.\n"); fp@1812: err = -EAGAIN; fp@1812: goto err_out_free; fp@1812: } else { fp@1812: DPRINTK(PROBE, ERR, "Invalid MAC address from EEPROM, " fp@1812: "you MUST configure one.\n"); fp@1812: } fp@1812: } fp@1812: fp@1812: /* Wol magic packet can be enabled from eeprom */ fp@1812: if ((nic->mac >= mac_82558_D101_A4) && fp@1812: (nic->eeprom[eeprom_id] & eeprom_id_wol)) { fp@1812: nic->flags |= wol_magic; fp@1812: device_set_wakeup_enable(&pdev->dev, true); fp@1812: } fp@1812: fp@1812: /* ack any pending wake events, disable PME */ fp@1812: pci_pme_active(pdev, false); fp@1812: fp@1812: strcpy(netdev->name, "eth%d"); fp@1812: if ((err = register_netdev(netdev))) { fp@1812: DPRINTK(PROBE, ERR, "Cannot register net device, aborting.\n"); fp@1812: goto err_out_free; fp@1812: } fp@1812: fp@1812: DPRINTK(PROBE, INFO, "addr 0x%llx, irq %d, MAC addr %pM\n", fp@1812: (unsigned long long)pci_resource_start(pdev, use_io ? 1 : 0), fp@1812: pdev->irq, netdev->dev_addr); fp@1812: fp@1812: return 0; fp@1812: fp@1812: err_out_free: fp@1812: e100_free(nic); fp@1812: err_out_iounmap: fp@1812: pci_iounmap(pdev, nic->csr); fp@1812: err_out_free_res: fp@1812: pci_release_regions(pdev); fp@1812: err_out_disable_pdev: fp@1812: pci_disable_device(pdev); fp@1812: err_out_free_dev: fp@1812: pci_set_drvdata(pdev, NULL); fp@1812: free_netdev(netdev); fp@1812: return err; fp@1812: } fp@1812: fp@1812: static void __devexit e100_remove(struct pci_dev *pdev) fp@1812: { fp@1812: struct net_device *netdev = pci_get_drvdata(pdev); fp@1812: fp@1812: if (netdev) { fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: unregister_netdev(netdev); fp@1812: e100_free(nic); fp@1812: pci_iounmap(pdev, nic->csr); fp@1812: free_netdev(netdev); fp@1812: pci_release_regions(pdev); fp@1812: pci_disable_device(pdev); fp@1812: pci_set_drvdata(pdev, NULL); fp@1812: } fp@1812: } fp@1812: fp@1812: #define E100_82552_SMARTSPEED 0x14 /* SmartSpeed Ctrl register */ fp@1812: #define E100_82552_REV_ANEG 0x0200 /* Reverse auto-negotiation */ fp@1812: #define E100_82552_ANEG_NOW 0x0400 /* Auto-negotiate now */ fp@1812: static void __e100_shutdown(struct pci_dev *pdev, bool *enable_wake) fp@1812: { fp@1812: struct net_device *netdev = pci_get_drvdata(pdev); fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: if (netif_running(netdev)) fp@1812: e100_down(nic); fp@1812: netif_device_detach(netdev); fp@1812: fp@1812: pci_save_state(pdev); fp@1812: fp@1812: if ((nic->flags & wol_magic) | e100_asf(nic)) { fp@1812: /* enable reverse auto-negotiation */ fp@1812: if (nic->phy == phy_82552_v) { fp@1812: u16 smartspeed = mdio_read(netdev, nic->mii.phy_id, fp@1812: E100_82552_SMARTSPEED); fp@1812: fp@1812: mdio_write(netdev, nic->mii.phy_id, fp@1812: E100_82552_SMARTSPEED, smartspeed | fp@1812: E100_82552_REV_ANEG | E100_82552_ANEG_NOW); fp@1812: } fp@1812: *enable_wake = true; fp@1812: } else { fp@1812: *enable_wake = false; fp@1812: } fp@1812: fp@1812: pci_disable_device(pdev); fp@1812: } fp@1812: fp@1812: static int __e100_power_off(struct pci_dev *pdev, bool wake) fp@1812: { fp@1812: if (wake) fp@1812: return pci_prepare_to_sleep(pdev); fp@1812: fp@1812: pci_wake_from_d3(pdev, false); fp@1812: pci_set_power_state(pdev, PCI_D3hot); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: fp@1812: #ifdef CONFIG_PM fp@1812: static int e100_suspend(struct pci_dev *pdev, pm_message_t state) fp@1812: { fp@1812: bool wake; fp@1812: __e100_shutdown(pdev, &wake); fp@1812: return __e100_power_off(pdev, wake); fp@1812: } fp@1812: fp@1812: static int e100_resume(struct pci_dev *pdev) fp@1812: { fp@1812: struct net_device *netdev = pci_get_drvdata(pdev); fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: pci_set_power_state(pdev, PCI_D0); fp@1812: pci_restore_state(pdev); fp@1812: /* ack any pending wake events, disable PME */ fp@1812: pci_enable_wake(pdev, 0, 0); fp@1812: fp@1812: /* disable reverse auto-negotiation */ fp@1812: if (nic->phy == phy_82552_v) { fp@1812: u16 smartspeed = mdio_read(netdev, nic->mii.phy_id, fp@1812: E100_82552_SMARTSPEED); fp@1812: fp@1812: mdio_write(netdev, nic->mii.phy_id, fp@1812: E100_82552_SMARTSPEED, fp@1812: smartspeed & ~(E100_82552_REV_ANEG)); fp@1812: } fp@1812: fp@1812: netif_device_attach(netdev); fp@1812: if (netif_running(netdev)) fp@1812: e100_up(nic); fp@1812: fp@1812: return 0; fp@1812: } fp@1812: #endif /* CONFIG_PM */ fp@1812: fp@1812: static void e100_shutdown(struct pci_dev *pdev) fp@1812: { fp@1812: bool wake; fp@1812: __e100_shutdown(pdev, &wake); fp@1812: if (system_state == SYSTEM_POWER_OFF) fp@1812: __e100_power_off(pdev, wake); fp@1812: } fp@1812: fp@1812: /* ------------------ PCI Error Recovery infrastructure -------------- */ fp@1812: /** fp@1812: * e100_io_error_detected - called when PCI error is detected. fp@1812: * @pdev: Pointer to PCI device fp@1812: * @state: The current pci connection state fp@1812: */ fp@1812: static pci_ers_result_t e100_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) fp@1812: { fp@1812: struct net_device *netdev = pci_get_drvdata(pdev); fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: netif_device_detach(netdev); fp@1812: fp@1812: if (state == pci_channel_io_perm_failure) fp@1812: return PCI_ERS_RESULT_DISCONNECT; fp@1812: fp@1812: if (netif_running(netdev)) fp@1812: e100_down(nic); fp@1812: pci_disable_device(pdev); fp@1812: fp@1812: /* Request a slot reset. */ fp@1812: return PCI_ERS_RESULT_NEED_RESET; fp@1812: } fp@1812: fp@1812: /** fp@1812: * e100_io_slot_reset - called after the pci bus has been reset. fp@1812: * @pdev: Pointer to PCI device fp@1812: * fp@1812: * Restart the card from scratch. fp@1812: */ fp@1812: static pci_ers_result_t e100_io_slot_reset(struct pci_dev *pdev) fp@1812: { fp@1812: struct net_device *netdev = pci_get_drvdata(pdev); fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: if (pci_enable_device(pdev)) { fp@1812: printk(KERN_ERR "e100: Cannot re-enable PCI device after reset.\n"); fp@1812: return PCI_ERS_RESULT_DISCONNECT; fp@1812: } fp@1812: pci_set_master(pdev); fp@1812: fp@1812: /* Only one device per card can do a reset */ fp@1812: if (0 != PCI_FUNC(pdev->devfn)) fp@1812: return PCI_ERS_RESULT_RECOVERED; fp@1812: e100_hw_reset(nic); fp@1812: e100_phy_init(nic); fp@1812: fp@1812: return PCI_ERS_RESULT_RECOVERED; fp@1812: } fp@1812: fp@1812: /** fp@1812: * e100_io_resume - resume normal operations fp@1812: * @pdev: Pointer to PCI device fp@1812: * fp@1812: * Resume normal operations after an error recovery fp@1812: * sequence has been completed. fp@1812: */ fp@1812: static void e100_io_resume(struct pci_dev *pdev) fp@1812: { fp@1812: struct net_device *netdev = pci_get_drvdata(pdev); fp@1812: struct nic *nic = netdev_priv(netdev); fp@1812: fp@1812: /* ack any pending wake events, disable PME */ fp@1812: pci_enable_wake(pdev, 0, 0); fp@1812: fp@1812: netif_device_attach(netdev); fp@1812: if (netif_running(netdev)) { fp@1812: e100_open(netdev); fp@1812: mod_timer(&nic->watchdog, jiffies); fp@1812: } fp@1812: } fp@1812: fp@1812: static struct pci_error_handlers e100_err_handler = { fp@1812: .error_detected = e100_io_error_detected, fp@1812: .slot_reset = e100_io_slot_reset, fp@1812: .resume = e100_io_resume, fp@1812: }; fp@1812: fp@1812: static struct pci_driver e100_driver = { fp@1812: .name = DRV_NAME, fp@1812: .id_table = e100_id_table, fp@1812: .probe = e100_probe, fp@1812: .remove = __devexit_p(e100_remove), fp@1812: #ifdef CONFIG_PM fp@1812: /* Power Management hooks */ fp@1812: .suspend = e100_suspend, fp@1812: .resume = e100_resume, fp@1812: #endif fp@1812: .shutdown = e100_shutdown, fp@1812: .err_handler = &e100_err_handler, fp@1812: }; fp@1812: fp@1812: static int __init e100_init_module(void) fp@1812: { fp@1812: if (((1 << debug) - 1) & NETIF_MSG_DRV) { fp@1812: printk(KERN_INFO PFX "%s, %s\n", DRV_DESCRIPTION, DRV_VERSION); fp@1812: printk(KERN_INFO PFX "%s\n", DRV_COPYRIGHT); fp@1812: } fp@1812: return pci_register_driver(&e100_driver); fp@1812: } fp@1812: fp@1812: static void __exit e100_cleanup_module(void) fp@1812: { fp@1812: pci_unregister_driver(&e100_driver); fp@1812: } fp@1812: fp@1812: module_init(e100_init_module); fp@1812: module_exit(e100_cleanup_module);