ab@2316: /****************************************************************************** ab@2316: * ab@2316: * $Id$ ab@2316: * ab@2316: * Copyright (C) 2006-2009 Florian Pose, Ingenieurgemeinschaft IgH ab@2316: * ab@2316: * This file is part of the IgH EtherCAT Master. ab@2316: * ab@2316: * The IgH EtherCAT Master is free software; you can redistribute it and/or ab@2316: * modify it under the terms of the GNU General Public License version 2, as ab@2316: * published by the Free Software Foundation. ab@2316: * ab@2316: * The IgH EtherCAT Master is distributed in the hope that it will be useful, ab@2316: * but WITHOUT ANY WARRANTY; without even the implied warranty of ab@2316: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General ab@2316: * Public License for more details. ab@2316: * ab@2316: * You should have received a copy of the GNU General Public License along ab@2316: * with the IgH EtherCAT Master; if not, write to the Free Software ab@2316: * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ab@2316: * ab@2316: * --- ab@2316: * ab@2316: * The license mentioned above concerns the source code only. Using the ab@2316: * EtherCAT technology and brand is only permitted in compliance with the ab@2316: * industrial property and similar rights of Beckhoff Automation GmbH. ab@2316: * ab@2316: *****************************************************************************/ ab@2316: ab@2316: /** ab@2316: \file ab@2316: EtherCAT driver for RTL8139-compatible NICs. ab@2316: */ ab@2316: ab@2316: /*****************************************************************************/ ab@2316: ab@2316: /* ab@2316: Former documentation: ab@2316: ab@2316: 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. ab@2316: ab@2316: Maintained by Jeff Garzik ab@2316: Copyright 2000-2002 Jeff Garzik ab@2316: ab@2316: Much code comes from Donald Becker's rtl8139.c driver, ab@2316: versions 1.13 and older. This driver was originally based ab@2316: on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: ab@2316: ab@2316: ---------- ab@2316: ab@2316: Written 1997-2001 by Donald Becker. ab@2316: This software may be used and distributed according to the ab@2316: terms of the GNU General Public License (GPL), incorporated ab@2316: herein by reference. Drivers based on or derived from this ab@2316: code fall under the GPL and must retain the authorship, ab@2316: copyright and license notice. This file is not a complete ab@2316: program and may only be used when the entire operating ab@2316: system is licensed under the GPL. ab@2316: ab@2316: This driver is for boards based on the RTL8129 and RTL8139 ab@2316: PCI ethernet chips. ab@2316: ab@2316: The author may be reached as becker@scyld.com, or C/O Scyld ab@2316: Computing Corporation 410 Severn Ave., Suite 210 Annapolis ab@2316: MD 21403 ab@2316: ab@2316: Support and updates available at ab@2316: http://www.scyld.com/network/rtl8139.html ab@2316: ab@2316: Twister-tuning table provided by Kinston ab@2316: . ab@2316: ab@2316: ---------- ab@2316: ab@2316: This software may be used and distributed according to the terms ab@2316: of the GNU General Public License, incorporated herein by reference. ab@2316: ab@2316: Contributors: ab@2316: ab@2316: Donald Becker - he wrote the original driver, kudos to him! ab@2316: (but please don't e-mail him for support, this isn't his driver) ab@2316: ab@2316: Tigran Aivazian - bug fixes, skbuff free cleanup ab@2316: ab@2316: Martin Mares - suggestions for PCI cleanup ab@2316: ab@2316: David S. Miller - PCI DMA and softnet updates ab@2316: ab@2316: Ernst Gill - fixes ported from BSD driver ab@2316: ab@2316: Daniel Kobras - identified specific locations of ab@2316: posted MMIO write bugginess ab@2316: ab@2316: Gerard Sharp - bug fix, testing and feedback ab@2316: ab@2316: David Ford - Rx ring wrap fix ab@2316: ab@2316: Dan DeMaggio - swapped RTL8139 cards with me, and allowed me ab@2316: to find and fix a crucial bug on older chipsets. ab@2316: ab@2316: Donald Becker/Chris Butterworth/Marcus Westergren - ab@2316: Noticed various Rx packet size-related buglets. ab@2316: ab@2316: Santiago Garcia Mantinan - testing and feedback ab@2316: ab@2316: Jens David - 2.2.x kernel backports ab@2316: ab@2316: Martin Dennett - incredibly helpful insight on undocumented ab@2316: features of the 8139 chips ab@2316: ab@2316: Jean-Jacques Michel - bug fix ab@2316: ab@2316: Tobias Ringström - Rx interrupt status checking suggestion ab@2316: ab@2316: Andrew Morton - Clear blocked signals, avoid ab@2316: buffer overrun setting current->comm. ab@2316: ab@2316: Kalle Olavi Niemitalo - Wake-on-LAN ioctls ab@2316: ab@2316: Robert Kuebel - Save kernel thread from dying on any signal. ab@2316: ab@2316: Submitting bug reports: ab@2316: ab@2316: "rtl8139-diag -mmmaaavvveefN" output ab@2316: enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log ab@2316: ab@2316: */ ab@2316: ab@2316: #define DRV_NAME "ec_8139too" ab@2316: #define DRV_VERSION "0.9.28" ab@2316: ab@2316: ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: #include ab@2316: ab@2316: #include "../globals.h" ab@2316: #include "ecdev.h" ab@2316: ab@2316: #define RTL8139_DRIVER_NAME DRV_NAME \ ab@2316: " EtherCAT-capable Fast Ethernet driver " \ ab@2316: DRV_VERSION ", master " EC_MASTER_VERSION ab@2316: ab@2316: #define PFX DRV_NAME ": " ab@2316: ab@2316: /* Default Message level */ ab@2316: #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \ ab@2316: NETIF_MSG_PROBE | \ ab@2316: NETIF_MSG_LINK) ab@2316: ab@2316: ab@2316: /* define to 1, 2 or 3 to enable copious debugging info */ ab@2316: #define RTL8139_DEBUG 0 ab@2316: ab@2316: /* define to 1 to disable lightweight runtime debugging checks */ ab@2316: #undef RTL8139_NDEBUG ab@2316: ab@2316: ab@2316: #ifdef RTL8139_NDEBUG ab@2316: # define assert(expr) do {} while (0) ab@2316: #else ab@2316: # define assert(expr) \ ab@2316: if(unlikely(!(expr))) { \ ab@2316: pr_err("Assertion failed! %s,%s,%s,line=%d\n", \ ab@2316: #expr, __FILE__, __func__, __LINE__); \ ab@2316: } ab@2316: #endif ab@2316: ab@2316: ab@2316: /* A few user-configurable values. */ ab@2316: /* media options */ ab@2316: #define MAX_UNITS 8 ab@2316: static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; ab@2316: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; ab@2316: ab@2316: /* Whether to use MMIO or PIO. Default to MMIO. */ ab@2316: #ifdef CONFIG_8139TOO_PIO ab@2316: static int use_io = 1; ab@2316: #else ab@2316: static int use_io = 0; ab@2316: #endif ab@2316: ab@2316: /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). ab@2316: The RTL chips use a 64 element hash table based on the Ethernet CRC. */ ab@2316: static int multicast_filter_limit = 32; ab@2316: ab@2316: /* bitmapped message enable number */ ab@2316: static int debug = -1; ab@2316: ab@2316: /* ab@2316: * Receive ring size ab@2316: * Warning: 64K ring has hardware issues and may lock up. ab@2316: */ ab@2316: #if defined(CONFIG_SH_DREAMCAST) ab@2316: #define RX_BUF_IDX 0 /* 8K ring */ ab@2316: #else ab@2316: #define RX_BUF_IDX 2 /* 32K ring */ ab@2316: #endif ab@2316: #define RX_BUF_LEN (8192 << RX_BUF_IDX) ab@2316: #define RX_BUF_PAD 16 ab@2316: #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ ab@2316: ab@2316: #if RX_BUF_LEN == 65536 ab@2316: #define RX_BUF_TOT_LEN RX_BUF_LEN ab@2316: #else ab@2316: #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) ab@2316: #endif ab@2316: ab@2316: /* Number of Tx descriptor registers. */ ab@2316: #define NUM_TX_DESC 4 ab@2316: ab@2316: /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ ab@2316: #define MAX_ETH_FRAME_SIZE 1536 ab@2316: ab@2316: /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ ab@2316: #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE ab@2316: #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) ab@2316: ab@2316: /* PCI Tuning Parameters ab@2316: Threshold is bytes transferred to chip before transmission starts. */ ab@2316: #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ ab@2316: ab@2316: /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ ab@2316: #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ ab@2316: #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ ab@2316: #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ ab@2316: #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ ab@2316: ab@2316: /* Operational parameters that usually are not changed. */ ab@2316: /* Time in jiffies before concluding the transmitter is hung. */ ab@2316: #define TX_TIMEOUT (6*HZ) ab@2316: ab@2316: ab@2316: enum { ab@2316: HAS_MII_XCVR = 0x010000, ab@2316: HAS_CHIP_XCVR = 0x020000, ab@2316: HAS_LNK_CHNG = 0x040000, ab@2316: }; ab@2316: ab@2316: #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ ab@2316: #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ ab@2316: #define RTL_MIN_IO_SIZE 0x80 ab@2316: #define RTL8139B_IO_SIZE 256 ab@2316: ab@2316: #define RTL8129_CAPS HAS_MII_XCVR ab@2316: #define RTL8139_CAPS (HAS_CHIP_XCVR|HAS_LNK_CHNG) ab@2316: ab@2316: typedef enum { ab@2316: RTL8139 = 0, ab@2316: RTL8129, ab@2316: } board_t; ab@2316: ab@2316: ab@2316: /* indexed by board_t, above */ ab@2316: static const struct { ab@2316: const char *name; ab@2316: u32 hw_flags; ab@2316: } board_info[] __devinitdata = { ab@2316: { "RealTek RTL8139", RTL8139_CAPS }, ab@2316: { "RealTek RTL8129", RTL8129_CAPS }, ab@2316: }; ab@2316: ab@2316: ab@2316: static struct pci_device_id rtl8139_pci_tbl[] = { ab@2316: {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: ab@2316: #ifdef CONFIG_SH_SECUREEDGE5410 ab@2316: /* Bogus 8139 silicon reports 8129 without external PROM :-( */ ab@2316: {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, ab@2316: #endif ab@2316: #ifdef CONFIG_8139TOO_8129 ab@2316: {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 }, ab@2316: #endif ab@2316: ab@2316: /* some crazy cards report invalid vendor ids like ab@2316: * 0x0001 here. The other ids are valid and constant, ab@2316: * so we simply don't match on the main vendor id. ab@2316: */ ab@2316: {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 }, ab@2316: {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 }, ab@2316: {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 }, ab@2316: ab@2316: {0,} ab@2316: }; ab@2316: ab@2316: /* prevent driver from being loaded automatically */ ab@2316: //MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); ab@2316: ab@2316: static struct { ab@2316: const char str[ETH_GSTRING_LEN]; ab@2316: } ethtool_stats_keys[] = { ab@2316: { "early_rx" }, ab@2316: { "tx_buf_mapped" }, ab@2316: { "tx_timeouts" }, ab@2316: { "rx_lost_in_ring" }, ab@2316: }; ab@2316: ab@2316: /* The rest of these values should never change. */ ab@2316: ab@2316: /* Symbolic offsets to registers. */ ab@2316: enum RTL8139_registers { ab@2316: MAC0 = 0, /* Ethernet hardware address. */ ab@2316: MAR0 = 8, /* Multicast filter. */ ab@2316: TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ ab@2316: TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ ab@2316: RxBuf = 0x30, ab@2316: ChipCmd = 0x37, ab@2316: RxBufPtr = 0x38, ab@2316: RxBufAddr = 0x3A, ab@2316: IntrMask = 0x3C, ab@2316: IntrStatus = 0x3E, ab@2316: TxConfig = 0x40, ab@2316: RxConfig = 0x44, ab@2316: Timer = 0x48, /* A general-purpose counter. */ ab@2316: RxMissed = 0x4C, /* 24 bits valid, write clears. */ ab@2316: Cfg9346 = 0x50, ab@2316: Config0 = 0x51, ab@2316: Config1 = 0x52, ab@2316: TimerInt = 0x54, ab@2316: MediaStatus = 0x58, ab@2316: Config3 = 0x59, ab@2316: Config4 = 0x5A, /* absent on RTL-8139A */ ab@2316: HltClk = 0x5B, ab@2316: MultiIntr = 0x5C, ab@2316: TxSummary = 0x60, ab@2316: BasicModeCtrl = 0x62, ab@2316: BasicModeStatus = 0x64, ab@2316: NWayAdvert = 0x66, ab@2316: NWayLPAR = 0x68, ab@2316: NWayExpansion = 0x6A, ab@2316: /* Undocumented registers, but required for proper operation. */ ab@2316: FIFOTMS = 0x70, /* FIFO Control and test. */ ab@2316: CSCR = 0x74, /* Chip Status and Configuration Register. */ ab@2316: PARA78 = 0x78, ab@2316: FlashReg = 0xD4, /* Communication with Flash ROM, four bytes. */ ab@2316: PARA7c = 0x7c, /* Magic transceiver parameter register. */ ab@2316: Config5 = 0xD8, /* absent on RTL-8139A */ ab@2316: }; ab@2316: ab@2316: enum ClearBitMasks { ab@2316: MultiIntrClear = 0xF000, ab@2316: ChipCmdClear = 0xE2, ab@2316: Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), ab@2316: }; ab@2316: ab@2316: enum ChipCmdBits { ab@2316: CmdReset = 0x10, ab@2316: CmdRxEnb = 0x08, ab@2316: CmdTxEnb = 0x04, ab@2316: RxBufEmpty = 0x01, ab@2316: }; ab@2316: ab@2316: /* Interrupt register bits, using my own meaningful names. */ ab@2316: enum IntrStatusBits { ab@2316: PCIErr = 0x8000, ab@2316: PCSTimeout = 0x4000, ab@2316: RxFIFOOver = 0x40, ab@2316: RxUnderrun = 0x20, ab@2316: RxOverflow = 0x10, ab@2316: TxErr = 0x08, ab@2316: TxOK = 0x04, ab@2316: RxErr = 0x02, ab@2316: RxOK = 0x01, ab@2316: ab@2316: RxAckBits = RxFIFOOver | RxOverflow | RxOK, ab@2316: }; ab@2316: ab@2316: enum TxStatusBits { ab@2316: TxHostOwns = 0x2000, ab@2316: TxUnderrun = 0x4000, ab@2316: TxStatOK = 0x8000, ab@2316: TxOutOfWindow = 0x20000000, ab@2316: TxAborted = 0x40000000, ab@2316: TxCarrierLost = 0x80000000, ab@2316: }; ab@2316: enum RxStatusBits { ab@2316: RxMulticast = 0x8000, ab@2316: RxPhysical = 0x4000, ab@2316: RxBroadcast = 0x2000, ab@2316: RxBadSymbol = 0x0020, ab@2316: RxRunt = 0x0010, ab@2316: RxTooLong = 0x0008, ab@2316: RxCRCErr = 0x0004, ab@2316: RxBadAlign = 0x0002, ab@2316: RxStatusOK = 0x0001, ab@2316: }; ab@2316: ab@2316: /* Bits in RxConfig. */ ab@2316: enum rx_mode_bits { ab@2316: AcceptErr = 0x20, ab@2316: AcceptRunt = 0x10, ab@2316: AcceptBroadcast = 0x08, ab@2316: AcceptMulticast = 0x04, ab@2316: AcceptMyPhys = 0x02, ab@2316: AcceptAllPhys = 0x01, ab@2316: }; ab@2316: ab@2316: /* Bits in TxConfig. */ ab@2316: enum tx_config_bits { ab@2316: /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */ ab@2316: TxIFGShift = 24, ab@2316: TxIFG84 = (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */ ab@2316: TxIFG88 = (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */ ab@2316: TxIFG92 = (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */ ab@2316: TxIFG96 = (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */ ab@2316: ab@2316: TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ ab@2316: TxCRC = (1 << 16), /* DISABLE Tx pkt CRC append */ ab@2316: TxClearAbt = (1 << 0), /* Clear abort (WO) */ ab@2316: TxDMAShift = 8, /* DMA burst value (0-7) is shifted X many bits */ ab@2316: TxRetryShift = 4, /* TXRR value (0-15) is shifted X many bits */ ab@2316: ab@2316: TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ ab@2316: }; ab@2316: ab@2316: /* Bits in Config1 */ ab@2316: enum Config1Bits { ab@2316: Cfg1_PM_Enable = 0x01, ab@2316: Cfg1_VPD_Enable = 0x02, ab@2316: Cfg1_PIO = 0x04, ab@2316: Cfg1_MMIO = 0x08, ab@2316: LWAKE = 0x10, /* not on 8139, 8139A */ ab@2316: Cfg1_Driver_Load = 0x20, ab@2316: Cfg1_LED0 = 0x40, ab@2316: Cfg1_LED1 = 0x80, ab@2316: SLEEP = (1 << 1), /* only on 8139, 8139A */ ab@2316: PWRDN = (1 << 0), /* only on 8139, 8139A */ ab@2316: }; ab@2316: ab@2316: /* Bits in Config3 */ ab@2316: enum Config3Bits { ab@2316: Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ ab@2316: Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ ab@2316: Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ ab@2316: Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ ab@2316: Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ ab@2316: Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ ab@2316: Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ ab@2316: Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ ab@2316: }; ab@2316: ab@2316: /* Bits in Config4 */ ab@2316: enum Config4Bits { ab@2316: LWPTN = (1 << 2), /* not on 8139, 8139A */ ab@2316: }; ab@2316: ab@2316: /* Bits in Config5 */ ab@2316: enum Config5Bits { ab@2316: Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ ab@2316: Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ ab@2316: Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ ab@2316: Cfg5_FIFOAddrPtr= (1 << 3), /* Realtek internal SRAM testing */ ab@2316: Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ ab@2316: Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ ab@2316: Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ ab@2316: }; ab@2316: ab@2316: enum RxConfigBits { ab@2316: /* rx fifo threshold */ ab@2316: RxCfgFIFOShift = 13, ab@2316: RxCfgFIFONone = (7 << RxCfgFIFOShift), ab@2316: ab@2316: /* Max DMA burst */ ab@2316: RxCfgDMAShift = 8, ab@2316: RxCfgDMAUnlimited = (7 << RxCfgDMAShift), ab@2316: ab@2316: /* rx ring buffer length */ ab@2316: RxCfgRcv8K = 0, ab@2316: RxCfgRcv16K = (1 << 11), ab@2316: RxCfgRcv32K = (1 << 12), ab@2316: RxCfgRcv64K = (1 << 11) | (1 << 12), ab@2316: ab@2316: /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */ ab@2316: RxNoWrap = (1 << 7), ab@2316: }; ab@2316: ab@2316: /* Twister tuning parameters from RealTek. ab@2316: Completely undocumented, but required to tune bad links on some boards. */ ab@2316: enum CSCRBits { ab@2316: CSCR_LinkOKBit = 0x0400, ab@2316: CSCR_LinkChangeBit = 0x0800, ab@2316: CSCR_LinkStatusBits = 0x0f000, ab@2316: CSCR_LinkDownOffCmd = 0x003c0, ab@2316: CSCR_LinkDownCmd = 0x0f3c0, ab@2316: }; ab@2316: ab@2316: enum Cfg9346Bits { ab@2316: Cfg9346_Lock = 0x00, ab@2316: Cfg9346_Unlock = 0xC0, ab@2316: }; ab@2316: ab@2316: typedef enum { ab@2316: CH_8139 = 0, ab@2316: CH_8139_K, ab@2316: CH_8139A, ab@2316: CH_8139A_G, ab@2316: CH_8139B, ab@2316: CH_8130, ab@2316: CH_8139C, ab@2316: CH_8100, ab@2316: CH_8100B_8139D, ab@2316: CH_8101, ab@2316: } chip_t; ab@2316: ab@2316: enum chip_flags { ab@2316: HasHltClk = (1 << 0), ab@2316: HasLWake = (1 << 1), ab@2316: }; ab@2316: ab@2316: #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \ ab@2316: (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22) ab@2316: #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1) ab@2316: ab@2316: /* directly indexed by chip_t, above */ ab@2316: static const struct { ab@2316: const char *name; ab@2316: u32 version; /* from RTL8139C/RTL8139D docs */ ab@2316: u32 flags; ab@2316: } rtl_chip_info[] = { ab@2316: { "RTL-8139", ab@2316: HW_REVID(1, 0, 0, 0, 0, 0, 0), ab@2316: HasHltClk, ab@2316: }, ab@2316: ab@2316: { "RTL-8139 rev K", ab@2316: HW_REVID(1, 1, 0, 0, 0, 0, 0), ab@2316: HasHltClk, ab@2316: }, ab@2316: ab@2316: { "RTL-8139A", ab@2316: HW_REVID(1, 1, 1, 0, 0, 0, 0), ab@2316: HasHltClk, /* XXX undocumented? */ ab@2316: }, ab@2316: ab@2316: { "RTL-8139A rev G", ab@2316: HW_REVID(1, 1, 1, 0, 0, 1, 0), ab@2316: HasHltClk, /* XXX undocumented? */ ab@2316: }, ab@2316: ab@2316: { "RTL-8139B", ab@2316: HW_REVID(1, 1, 1, 1, 0, 0, 0), ab@2316: HasLWake, ab@2316: }, ab@2316: ab@2316: { "RTL-8130", ab@2316: HW_REVID(1, 1, 1, 1, 1, 0, 0), ab@2316: HasLWake, ab@2316: }, ab@2316: ab@2316: { "RTL-8139C", ab@2316: HW_REVID(1, 1, 1, 0, 1, 0, 0), ab@2316: HasLWake, ab@2316: }, ab@2316: ab@2316: { "RTL-8100", ab@2316: HW_REVID(1, 1, 1, 1, 0, 1, 0), ab@2316: HasLWake, ab@2316: }, ab@2316: ab@2316: { "RTL-8100B/8139D", ab@2316: HW_REVID(1, 1, 1, 0, 1, 0, 1), ab@2316: HasHltClk /* XXX undocumented? */ ab@2316: | HasLWake, ab@2316: }, ab@2316: ab@2316: { "RTL-8101", ab@2316: HW_REVID(1, 1, 1, 0, 1, 1, 1), ab@2316: HasLWake, ab@2316: }, ab@2316: }; ab@2316: ab@2316: struct rtl_extra_stats { ab@2316: unsigned long early_rx; ab@2316: unsigned long tx_buf_mapped; ab@2316: unsigned long tx_timeouts; ab@2316: unsigned long rx_lost_in_ring; ab@2316: }; ab@2316: ab@2316: struct rtl8139_private { ab@2316: void __iomem *mmio_addr; ab@2316: int drv_flags; ab@2316: struct pci_dev *pci_dev; ab@2316: u32 msg_enable; ab@2316: struct napi_struct napi; ab@2316: struct net_device *dev; ab@2316: ab@2316: unsigned char *rx_ring; ab@2316: unsigned int cur_rx; /* RX buf index of next pkt */ ab@2316: dma_addr_t rx_ring_dma; ab@2316: ab@2316: unsigned int tx_flag; ab@2316: unsigned long cur_tx; ab@2316: unsigned long dirty_tx; ab@2316: unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ ab@2316: unsigned char *tx_bufs; /* Tx bounce buffer region. */ ab@2316: dma_addr_t tx_bufs_dma; ab@2316: ab@2316: signed char phys[4]; /* MII device addresses. */ ab@2316: ab@2316: /* Twister tune state. */ ab@2316: char twistie, twist_row, twist_col; ab@2316: ab@2316: unsigned int watchdog_fired : 1; ab@2316: unsigned int default_port : 4; /* Last dev->if_port value. */ ab@2316: unsigned int have_thread : 1; ab@2316: ab@2316: spinlock_t lock; ab@2316: spinlock_t rx_lock; ab@2316: ab@2316: chip_t chipset; ab@2316: u32 rx_config; ab@2316: struct rtl_extra_stats xstats; ab@2316: ab@2316: struct delayed_work thread; ab@2316: ab@2316: struct mii_if_info mii; ab@2316: unsigned int regs_len; ab@2316: unsigned long fifo_copy_timeout; ab@2316: ab@2316: ec_device_t *ecdev; ab@2316: }; ab@2316: ab@2316: MODULE_AUTHOR("Florian Pose "); ab@2316: MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver"); ab@2316: MODULE_LICENSE("GPL"); ab@2316: MODULE_VERSION(EC_MASTER_VERSION); ab@2316: ab@2316: module_param(use_io, int, 0); ab@2316: MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO"); ab@2316: module_param(multicast_filter_limit, int, 0); ab@2316: module_param_array(media, int, NULL, 0); ab@2316: module_param_array(full_duplex, int, NULL, 0); ab@2316: module_param(debug, int, 0); ab@2316: MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); ab@2316: MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); ab@2316: MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); ab@2316: MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); ab@2316: ab@2316: void ec_poll(struct net_device *); ab@2316: ab@2316: static int read_eeprom (void __iomem *ioaddr, int location, int addr_len); ab@2316: static int rtl8139_open (struct net_device *dev); ab@2316: static int mdio_read (struct net_device *dev, int phy_id, int location); ab@2316: static void mdio_write (struct net_device *dev, int phy_id, int location, ab@2316: int val); ab@2316: static void rtl8139_start_thread(struct rtl8139_private *tp); ab@2316: static void rtl8139_tx_timeout (struct net_device *dev); ab@2316: static void rtl8139_init_ring (struct net_device *dev); ab@2316: static netdev_tx_t rtl8139_start_xmit (struct sk_buff *skb, ab@2316: struct net_device *dev); ab@2316: #ifdef CONFIG_NET_POLL_CONTROLLER ab@2316: static void rtl8139_poll_controller(struct net_device *dev); ab@2316: #endif ab@2316: static int rtl8139_set_mac_address(struct net_device *dev, void *p); ab@2316: static int rtl8139_poll(struct napi_struct *napi, int budget); ab@2316: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance); ab@2316: static int rtl8139_close (struct net_device *dev); ab@2316: static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); ab@2316: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); ab@2316: static void rtl8139_set_rx_mode (struct net_device *dev); ab@2316: static void __set_rx_mode (struct net_device *dev); ab@2316: static void rtl8139_hw_start (struct net_device *dev); ab@2316: static void rtl8139_thread (struct work_struct *work); ab@2316: static void rtl8139_tx_timeout_task(struct work_struct *work); ab@2316: static const struct ethtool_ops rtl8139_ethtool_ops; ab@2316: ab@2316: /* write MMIO register, with flush */ ab@2316: /* Flush avoids rtl8139 bug w/ posted MMIO writes */ ab@2316: #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0) ab@2316: #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0) ab@2316: #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0) ab@2316: ab@2316: /* write MMIO register */ ab@2316: #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg)) ab@2316: #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg)) ab@2316: #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg)) ab@2316: ab@2316: /* read MMIO register */ ab@2316: #define RTL_R8(reg) ioread8 (ioaddr + (reg)) ab@2316: #define RTL_R16(reg) ioread16 (ioaddr + (reg)) ab@2316: #define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) ab@2316: ab@2316: ab@2316: static const u16 rtl8139_intr_mask = ab@2316: PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | ab@2316: TxErr | TxOK | RxErr | RxOK; ab@2316: ab@2316: static const u16 rtl8139_norx_intr_mask = ab@2316: PCIErr | PCSTimeout | RxUnderrun | ab@2316: TxErr | TxOK | RxErr ; ab@2316: ab@2316: #if RX_BUF_IDX == 0 ab@2316: static const unsigned int rtl8139_rx_config = ab@2316: RxCfgRcv8K | RxNoWrap | ab@2316: (RX_FIFO_THRESH << RxCfgFIFOShift) | ab@2316: (RX_DMA_BURST << RxCfgDMAShift); ab@2316: #elif RX_BUF_IDX == 1 ab@2316: static const unsigned int rtl8139_rx_config = ab@2316: RxCfgRcv16K | RxNoWrap | ab@2316: (RX_FIFO_THRESH << RxCfgFIFOShift) | ab@2316: (RX_DMA_BURST << RxCfgDMAShift); ab@2316: #elif RX_BUF_IDX == 2 ab@2316: static const unsigned int rtl8139_rx_config = ab@2316: RxCfgRcv32K | RxNoWrap | ab@2316: (RX_FIFO_THRESH << RxCfgFIFOShift) | ab@2316: (RX_DMA_BURST << RxCfgDMAShift); ab@2316: #elif RX_BUF_IDX == 3 ab@2316: static const unsigned int rtl8139_rx_config = ab@2316: RxCfgRcv64K | ab@2316: (RX_FIFO_THRESH << RxCfgFIFOShift) | ab@2316: (RX_DMA_BURST << RxCfgDMAShift); ab@2316: #else ab@2316: #error "Invalid configuration for 8139_RXBUF_IDX" ab@2316: #endif ab@2316: ab@2316: static const unsigned int rtl8139_tx_config = ab@2316: TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); ab@2316: ab@2316: static void __rtl8139_cleanup_dev (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: struct pci_dev *pdev; ab@2316: ab@2316: assert (dev != NULL); ab@2316: assert (tp->pci_dev != NULL); ab@2316: pdev = tp->pci_dev; ab@2316: ab@2316: if (tp->mmio_addr) ab@2316: pci_iounmap (pdev, tp->mmio_addr); ab@2316: ab@2316: /* it's ok to call this even if we have no regions to free */ ab@2316: pci_release_regions (pdev); ab@2316: ab@2316: free_netdev(dev); ab@2316: pci_set_drvdata (pdev, NULL); ab@2316: } ab@2316: ab@2316: ab@2316: static void rtl8139_chip_reset (void __iomem *ioaddr) ab@2316: { ab@2316: int i; ab@2316: ab@2316: /* Soft reset the chip. */ ab@2316: RTL_W8 (ChipCmd, CmdReset); ab@2316: ab@2316: /* Check that the chip has finished the reset. */ ab@2316: for (i = 1000; i > 0; i--) { ab@2316: barrier(); ab@2316: if ((RTL_R8 (ChipCmd) & CmdReset) == 0) ab@2316: break; ab@2316: udelay (10); ab@2316: } ab@2316: } ab@2316: ab@2316: ab@2316: static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev) ab@2316: { ab@2316: void __iomem *ioaddr; ab@2316: struct net_device *dev; ab@2316: struct rtl8139_private *tp; ab@2316: u8 tmp8; ab@2316: int rc, disable_dev_on_err = 0; ab@2316: unsigned int i; ab@2316: unsigned long pio_start, pio_end, pio_flags, pio_len; ab@2316: unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; ab@2316: u32 version; ab@2316: ab@2316: assert (pdev != NULL); ab@2316: ab@2316: /* dev and priv zeroed in alloc_etherdev */ ab@2316: dev = alloc_etherdev (sizeof (*tp)); ab@2316: if (dev == NULL) { ab@2316: dev_err(&pdev->dev, "Unable to alloc new net device\n"); ab@2316: return ERR_PTR(-ENOMEM); ab@2316: } ab@2316: SET_NETDEV_DEV(dev, &pdev->dev); ab@2316: ab@2316: tp = netdev_priv(dev); ab@2316: tp->pci_dev = pdev; ab@2316: ab@2316: /* enable device (incl. PCI PM wakeup and hotplug setup) */ ab@2316: rc = pci_enable_device (pdev); ab@2316: if (rc) ab@2316: goto err_out; ab@2316: ab@2316: pio_start = pci_resource_start (pdev, 0); ab@2316: pio_end = pci_resource_end (pdev, 0); ab@2316: pio_flags = pci_resource_flags (pdev, 0); ab@2316: pio_len = pci_resource_len (pdev, 0); ab@2316: ab@2316: mmio_start = pci_resource_start (pdev, 1); ab@2316: mmio_end = pci_resource_end (pdev, 1); ab@2316: mmio_flags = pci_resource_flags (pdev, 1); ab@2316: mmio_len = pci_resource_len (pdev, 1); ab@2316: ab@2316: /* set this immediately, we need to know before ab@2316: * we talk to the chip directly */ ab@2316: pr_debug("PIO region size == 0x%02lX\n", pio_len); ab@2316: pr_debug("MMIO region size == 0x%02lX\n", mmio_len); ab@2316: ab@2316: retry: ab@2316: if (use_io) { ab@2316: /* make sure PCI base addr 0 is PIO */ ab@2316: if (!(pio_flags & IORESOURCE_IO)) { ab@2316: dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n"); ab@2316: rc = -ENODEV; ab@2316: goto err_out; ab@2316: } ab@2316: /* check for weird/broken PCI region reporting */ ab@2316: if (pio_len < RTL_MIN_IO_SIZE) { ab@2316: dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n"); ab@2316: rc = -ENODEV; ab@2316: goto err_out; ab@2316: } ab@2316: } else { ab@2316: /* make sure PCI base addr 1 is MMIO */ ab@2316: if (!(mmio_flags & IORESOURCE_MEM)) { ab@2316: dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); ab@2316: rc = -ENODEV; ab@2316: goto err_out; ab@2316: } ab@2316: if (mmio_len < RTL_MIN_IO_SIZE) { ab@2316: dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n"); ab@2316: rc = -ENODEV; ab@2316: goto err_out; ab@2316: } ab@2316: } ab@2316: ab@2316: rc = pci_request_regions (pdev, DRV_NAME); ab@2316: if (rc) ab@2316: goto err_out; ab@2316: disable_dev_on_err = 1; ab@2316: ab@2316: /* enable PCI bus-mastering */ ab@2316: pci_set_master (pdev); ab@2316: ab@2316: if (use_io) { ab@2316: ioaddr = pci_iomap(pdev, 0, 0); ab@2316: if (!ioaddr) { ab@2316: dev_err(&pdev->dev, "cannot map PIO, aborting\n"); ab@2316: rc = -EIO; ab@2316: goto err_out; ab@2316: } ab@2316: dev->base_addr = pio_start; ab@2316: tp->regs_len = pio_len; ab@2316: } else { ab@2316: /* ioremap MMIO region */ ab@2316: ioaddr = pci_iomap(pdev, 1, 0); ab@2316: if (ioaddr == NULL) { ab@2316: dev_err(&pdev->dev, "cannot remap MMIO, trying PIO\n"); ab@2316: pci_release_regions(pdev); ab@2316: use_io = 1; ab@2316: goto retry; ab@2316: } ab@2316: dev->base_addr = (long) ioaddr; ab@2316: tp->regs_len = mmio_len; ab@2316: } ab@2316: tp->mmio_addr = ioaddr; ab@2316: ab@2316: /* Bring old chips out of low-power mode. */ ab@2316: RTL_W8 (HltClk, 'R'); ab@2316: ab@2316: /* check for missing/broken hardware */ ab@2316: if (RTL_R32 (TxConfig) == 0xFFFFFFFF) { ab@2316: dev_err(&pdev->dev, "Chip not responding, ignoring board\n"); ab@2316: rc = -EIO; ab@2316: goto err_out; ab@2316: } ab@2316: ab@2316: /* identify chip attached to board */ ab@2316: version = RTL_R32 (TxConfig) & HW_REVID_MASK; ab@2316: for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) ab@2316: if (version == rtl_chip_info[i].version) { ab@2316: tp->chipset = i; ab@2316: goto match; ab@2316: } ab@2316: ab@2316: /* if unknown chip, assume array element #0, original RTL-8139 in this case */ ab@2316: dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n"); ab@2316: dev_dbg(&pdev->dev, "TxConfig = 0x%lx\n", RTL_R32 (TxConfig)); ab@2316: tp->chipset = 0; ab@2316: ab@2316: match: ab@2316: pr_debug("chipset id (%d) == index %d, '%s'\n", ab@2316: version, i, rtl_chip_info[i].name); ab@2316: ab@2316: if (tp->chipset >= CH_8139B) { ab@2316: u8 new_tmp8 = tmp8 = RTL_R8 (Config1); ab@2316: pr_debug("PCI PM wakeup\n"); ab@2316: if ((rtl_chip_info[tp->chipset].flags & HasLWake) && ab@2316: (tmp8 & LWAKE)) ab@2316: new_tmp8 &= ~LWAKE; ab@2316: new_tmp8 |= Cfg1_PM_Enable; ab@2316: if (new_tmp8 != tmp8) { ab@2316: RTL_W8 (Cfg9346, Cfg9346_Unlock); ab@2316: RTL_W8 (Config1, tmp8); ab@2316: RTL_W8 (Cfg9346, Cfg9346_Lock); ab@2316: } ab@2316: if (rtl_chip_info[tp->chipset].flags & HasLWake) { ab@2316: tmp8 = RTL_R8 (Config4); ab@2316: if (tmp8 & LWPTN) { ab@2316: RTL_W8 (Cfg9346, Cfg9346_Unlock); ab@2316: RTL_W8 (Config4, tmp8 & ~LWPTN); ab@2316: RTL_W8 (Cfg9346, Cfg9346_Lock); ab@2316: } ab@2316: } ab@2316: } else { ab@2316: pr_debug("Old chip wakeup\n"); ab@2316: tmp8 = RTL_R8 (Config1); ab@2316: tmp8 &= ~(SLEEP | PWRDN); ab@2316: RTL_W8 (Config1, tmp8); ab@2316: } ab@2316: ab@2316: rtl8139_chip_reset (ioaddr); ab@2316: ab@2316: return dev; ab@2316: ab@2316: err_out: ab@2316: __rtl8139_cleanup_dev (dev); ab@2316: if (disable_dev_on_err) ab@2316: pci_disable_device (pdev); ab@2316: return ERR_PTR(rc); ab@2316: } ab@2316: ab@2316: static const struct net_device_ops rtl8139_netdev_ops = { ab@2316: .ndo_open = rtl8139_open, ab@2316: .ndo_stop = rtl8139_close, ab@2316: .ndo_get_stats = rtl8139_get_stats, ab@2316: .ndo_change_mtu = eth_change_mtu, ab@2316: .ndo_validate_addr = eth_validate_addr, ab@2316: .ndo_set_mac_address = rtl8139_set_mac_address, ab@2316: .ndo_start_xmit = rtl8139_start_xmit, ab@2316: .ndo_set_multicast_list = rtl8139_set_rx_mode, ab@2316: .ndo_do_ioctl = netdev_ioctl, ab@2316: .ndo_tx_timeout = rtl8139_tx_timeout, ab@2316: #ifdef CONFIG_NET_POLL_CONTROLLER ab@2316: .ndo_poll_controller = rtl8139_poll_controller, ab@2316: #endif ab@2316: }; ab@2316: ab@2316: static int __devinit rtl8139_init_one (struct pci_dev *pdev, ab@2316: const struct pci_device_id *ent) ab@2316: { ab@2316: struct net_device *dev = NULL; ab@2316: struct rtl8139_private *tp; ab@2316: int i, addr_len, option; ab@2316: void __iomem *ioaddr; ab@2316: static int board_idx = -1; ab@2316: ab@2316: assert (pdev != NULL); ab@2316: assert (ent != NULL); ab@2316: ab@2316: board_idx++; ab@2316: ab@2316: /* when we're built into the kernel, the driver version message ab@2316: * is only printed if at least one 8139 board has been found ab@2316: */ ab@2316: #ifndef MODULE ab@2316: { ab@2316: static int printed_version; ab@2316: if (!printed_version++) ab@2316: pr_info(RTL8139_DRIVER_NAME "\n"); ab@2316: } ab@2316: #endif ab@2316: ab@2316: if (pdev->vendor == PCI_VENDOR_ID_REALTEK && ab@2316: pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) { ab@2316: dev_info(&pdev->dev, ab@2316: "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip, use 8139cp\n", ab@2316: pdev->vendor, pdev->device, pdev->revision); ab@2316: return -ENODEV; ab@2316: } ab@2316: ab@2316: if (pdev->vendor == PCI_VENDOR_ID_REALTEK && ab@2316: pdev->device == PCI_DEVICE_ID_REALTEK_8139 && ab@2316: pdev->subsystem_vendor == PCI_VENDOR_ID_ATHEROS && ab@2316: pdev->subsystem_device == PCI_DEVICE_ID_REALTEK_8139) { ab@2316: pr_info("8139too: OQO Model 2 detected. Forcing PIO\n"); ab@2316: use_io = 1; ab@2316: } ab@2316: ab@2316: dev = rtl8139_init_board (pdev); ab@2316: if (IS_ERR(dev)) ab@2316: return PTR_ERR(dev); ab@2316: ab@2316: assert (dev != NULL); ab@2316: tp = netdev_priv(dev); ab@2316: tp->dev = dev; ab@2316: ab@2316: ioaddr = tp->mmio_addr; ab@2316: assert (ioaddr != NULL); ab@2316: ab@2316: addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; ab@2316: for (i = 0; i < 3; i++) ab@2316: ((__le16 *) (dev->dev_addr))[i] = ab@2316: cpu_to_le16(read_eeprom (ioaddr, i + 7, addr_len)); ab@2316: memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); ab@2316: ab@2316: /* The Rtl8139-specific entries in the device structure. */ ab@2316: dev->netdev_ops = &rtl8139_netdev_ops; ab@2316: dev->ethtool_ops = &rtl8139_ethtool_ops; ab@2316: dev->watchdog_timeo = TX_TIMEOUT; ab@2316: netif_napi_add(dev, &tp->napi, rtl8139_poll, 64); ab@2316: ab@2316: /* note: the hardware is not capable of sg/csum/highdma, however ab@2316: * through the use of skb_copy_and_csum_dev we enable these ab@2316: * features ab@2316: */ ab@2316: dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA; ab@2316: ab@2316: dev->irq = pdev->irq; ab@2316: ab@2316: /* tp zeroed and aligned in alloc_etherdev */ ab@2316: tp = netdev_priv(dev); ab@2316: ab@2316: /* note: tp->chipset set in rtl8139_init_board */ ab@2316: tp->drv_flags = board_info[ent->driver_data].hw_flags; ab@2316: tp->mmio_addr = ioaddr; ab@2316: tp->msg_enable = ab@2316: (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1)); ab@2316: spin_lock_init (&tp->lock); ab@2316: spin_lock_init (&tp->rx_lock); ab@2316: INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); ab@2316: tp->mii.dev = dev; ab@2316: tp->mii.mdio_read = mdio_read; ab@2316: tp->mii.mdio_write = mdio_write; ab@2316: tp->mii.phy_id_mask = 0x3f; ab@2316: tp->mii.reg_num_mask = 0x1f; ab@2316: ab@2316: /* dev is fully set up and ready to use now */ ab@2316: // offer device to EtherCAT master module ab@2316: tp->ecdev = ecdev_offer(dev, ec_poll, THIS_MODULE); ab@2316: ab@2316: if (!tp->ecdev) { ab@2316: pr_debug("about to register device named %s (%p)...\n", dev->name, dev); ab@2316: i = register_netdev (dev); ab@2316: if (i) goto err_out; ab@2316: } ab@2316: ab@2316: pci_set_drvdata (pdev, dev); ab@2316: ab@2316: pr_info("%s: %s at 0x%lx, %pM, IRQ %d\n", ab@2316: dev->name, ab@2316: board_info[ent->driver_data].name, ab@2316: dev->base_addr, ab@2316: dev->dev_addr, ab@2316: dev->irq); ab@2316: ab@2316: pr_debug("%s: Identified 8139 chip type '%s'\n", ab@2316: dev->name, rtl_chip_info[tp->chipset].name); ab@2316: ab@2316: /* Find the connected MII xcvrs. ab@2316: Doing this in open() would allow detecting external xcvrs later, but ab@2316: takes too much time. */ ab@2316: #ifdef CONFIG_8139TOO_8129 ab@2316: if (tp->drv_flags & HAS_MII_XCVR) { ab@2316: int phy, phy_idx = 0; ab@2316: for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) { ab@2316: int mii_status = mdio_read(dev, phy, 1); ab@2316: if (mii_status != 0xffff && mii_status != 0x0000) { ab@2316: u16 advertising = mdio_read(dev, phy, 4); ab@2316: tp->phys[phy_idx++] = phy; ab@2316: pr_info("%s: MII transceiver %d status 0x%4.4x advertising %4.4x.\n", ab@2316: dev->name, phy, mii_status, advertising); ab@2316: } ab@2316: } ab@2316: if (phy_idx == 0) { ab@2316: pr_info("%s: No MII transceivers found! Assuming SYM transceiver.\n", ab@2316: dev->name); ab@2316: tp->phys[0] = 32; ab@2316: } ab@2316: } else ab@2316: #endif ab@2316: tp->phys[0] = 32; ab@2316: tp->mii.phy_id = tp->phys[0]; ab@2316: ab@2316: /* The lower four bits are the media type. */ ab@2316: option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; ab@2316: if (option > 0) { ab@2316: tp->mii.full_duplex = (option & 0x210) ? 1 : 0; ab@2316: tp->default_port = option & 0xFF; ab@2316: if (tp->default_port) ab@2316: tp->mii.force_media = 1; ab@2316: } ab@2316: if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) ab@2316: tp->mii.full_duplex = full_duplex[board_idx]; ab@2316: if (tp->mii.full_duplex) { ab@2316: pr_info("%s: Media type forced to Full Duplex.\n", dev->name); ab@2316: /* Changing the MII-advertised media because might prevent ab@2316: re-connection. */ ab@2316: tp->mii.force_media = 1; ab@2316: } ab@2316: if (tp->default_port) { ab@2316: pr_info(" Forcing %dMbps %s-duplex operation.\n", ab@2316: (option & 0x20 ? 100 : 10), ab@2316: (option & 0x10 ? "full" : "half")); ab@2316: mdio_write(dev, tp->phys[0], 0, ab@2316: ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ ab@2316: ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ ab@2316: } ab@2316: ab@2316: /* Put the chip into low-power mode. */ ab@2316: if (rtl_chip_info[tp->chipset].flags & HasHltClk) ab@2316: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ ab@2316: ab@2316: if (tp->ecdev && ecdev_open(tp->ecdev)) { ab@2316: ecdev_withdraw(tp->ecdev); ab@2316: goto err_out; ab@2316: } ab@2316: ab@2316: return 0; ab@2316: ab@2316: err_out: ab@2316: __rtl8139_cleanup_dev (dev); ab@2316: pci_disable_device (pdev); ab@2316: return i; ab@2316: } ab@2316: ab@2316: ab@2316: static void __devexit rtl8139_remove_one (struct pci_dev *pdev) ab@2316: { ab@2316: struct net_device *dev = pci_get_drvdata (pdev); ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: ab@2316: assert (dev != NULL); ab@2316: ab@2316: flush_scheduled_work(); ab@2316: ab@2316: if (tp->ecdev) { ab@2316: ecdev_close(tp->ecdev); ab@2316: ecdev_withdraw(tp->ecdev); ab@2316: } ab@2316: else { ab@2316: unregister_netdev (dev); ab@2316: } ab@2316: ab@2316: __rtl8139_cleanup_dev (dev); ab@2316: pci_disable_device (pdev); ab@2316: } ab@2316: ab@2316: ab@2316: /* Serial EEPROM section. */ ab@2316: ab@2316: /* EEPROM_Ctrl bits. */ ab@2316: #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ ab@2316: #define EE_CS 0x08 /* EEPROM chip select. */ ab@2316: #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ ab@2316: #define EE_WRITE_0 0x00 ab@2316: #define EE_WRITE_1 0x02 ab@2316: #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ ab@2316: #define EE_ENB (0x80 | EE_CS) ab@2316: ab@2316: /* Delay between EEPROM clock transitions. ab@2316: No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. ab@2316: */ ab@2316: ab@2316: #define eeprom_delay() (void)RTL_R32(Cfg9346) ab@2316: ab@2316: /* The EEPROM commands include the alway-set leading bit. */ ab@2316: #define EE_WRITE_CMD (5) ab@2316: #define EE_READ_CMD (6) ab@2316: #define EE_ERASE_CMD (7) ab@2316: ab@2316: static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len) ab@2316: { ab@2316: int i; ab@2316: unsigned retval = 0; ab@2316: int read_cmd = location | (EE_READ_CMD << addr_len); ab@2316: ab@2316: RTL_W8 (Cfg9346, EE_ENB & ~EE_CS); ab@2316: RTL_W8 (Cfg9346, EE_ENB); ab@2316: eeprom_delay (); ab@2316: ab@2316: /* Shift the read command bits out. */ ab@2316: for (i = 4 + addr_len; i >= 0; i--) { ab@2316: int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; ab@2316: RTL_W8 (Cfg9346, EE_ENB | dataval); ab@2316: eeprom_delay (); ab@2316: RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK); ab@2316: eeprom_delay (); ab@2316: } ab@2316: RTL_W8 (Cfg9346, EE_ENB); ab@2316: eeprom_delay (); ab@2316: ab@2316: for (i = 16; i > 0; i--) { ab@2316: RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK); ab@2316: eeprom_delay (); ab@2316: retval = ab@2316: (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 : ab@2316: 0); ab@2316: RTL_W8 (Cfg9346, EE_ENB); ab@2316: eeprom_delay (); ab@2316: } ab@2316: ab@2316: /* Terminate the EEPROM access. */ ab@2316: RTL_W8 (Cfg9346, ~EE_CS); ab@2316: eeprom_delay (); ab@2316: ab@2316: return retval; ab@2316: } ab@2316: ab@2316: /* MII serial management: mostly bogus for now. */ ab@2316: /* Read and write the MII management registers using software-generated ab@2316: serial MDIO protocol. ab@2316: The maximum data clock rate is 2.5 Mhz. The minimum timing is usually ab@2316: met by back-to-back PCI I/O cycles, but we insert a delay to avoid ab@2316: "overclocking" issues. */ ab@2316: #define MDIO_DIR 0x80 ab@2316: #define MDIO_DATA_OUT 0x04 ab@2316: #define MDIO_DATA_IN 0x02 ab@2316: #define MDIO_CLK 0x01 ab@2316: #define MDIO_WRITE0 (MDIO_DIR) ab@2316: #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) ab@2316: ab@2316: #define mdio_delay() RTL_R8(Config4) ab@2316: ab@2316: ab@2316: static const char mii_2_8139_map[8] = { ab@2316: BasicModeCtrl, ab@2316: BasicModeStatus, ab@2316: 0, ab@2316: 0, ab@2316: NWayAdvert, ab@2316: NWayLPAR, ab@2316: NWayExpansion, ab@2316: 0 ab@2316: }; ab@2316: ab@2316: ab@2316: #ifdef CONFIG_8139TOO_8129 ab@2316: /* Syncronize the MII management interface by shifting 32 one bits out. */ ab@2316: static void mdio_sync (void __iomem *ioaddr) ab@2316: { ab@2316: int i; ab@2316: ab@2316: for (i = 32; i >= 0; i--) { ab@2316: RTL_W8 (Config4, MDIO_WRITE1); ab@2316: mdio_delay (); ab@2316: RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK); ab@2316: mdio_delay (); ab@2316: } ab@2316: } ab@2316: #endif ab@2316: ab@2316: static int mdio_read (struct net_device *dev, int phy_id, int location) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: int retval = 0; ab@2316: #ifdef CONFIG_8139TOO_8129 ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; ab@2316: int i; ab@2316: #endif ab@2316: ab@2316: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: return location < 8 && mii_2_8139_map[location] ? ab@2316: RTL_R16 (mii_2_8139_map[location]) : 0; ab@2316: } ab@2316: ab@2316: #ifdef CONFIG_8139TOO_8129 ab@2316: mdio_sync (ioaddr); ab@2316: /* Shift the read command bits out. */ ab@2316: for (i = 15; i >= 0; i--) { ab@2316: int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; ab@2316: ab@2316: RTL_W8 (Config4, MDIO_DIR | dataval); ab@2316: mdio_delay (); ab@2316: RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK); ab@2316: mdio_delay (); ab@2316: } ab@2316: ab@2316: /* Read the two transition, 16 data, and wire-idle bits. */ ab@2316: for (i = 19; i > 0; i--) { ab@2316: RTL_W8 (Config4, 0); ab@2316: mdio_delay (); ab@2316: retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0); ab@2316: RTL_W8 (Config4, MDIO_CLK); ab@2316: mdio_delay (); ab@2316: } ab@2316: #endif ab@2316: ab@2316: return (retval >> 1) & 0xffff; ab@2316: } ab@2316: ab@2316: ab@2316: static void mdio_write (struct net_device *dev, int phy_id, int location, ab@2316: int value) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: #ifdef CONFIG_8139TOO_8129 ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; ab@2316: int i; ab@2316: #endif ab@2316: ab@2316: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: if (location == 0) { ab@2316: RTL_W8 (Cfg9346, Cfg9346_Unlock); ab@2316: RTL_W16 (BasicModeCtrl, value); ab@2316: RTL_W8 (Cfg9346, Cfg9346_Lock); ab@2316: } else if (location < 8 && mii_2_8139_map[location]) ab@2316: RTL_W16 (mii_2_8139_map[location], value); ab@2316: return; ab@2316: } ab@2316: ab@2316: #ifdef CONFIG_8139TOO_8129 ab@2316: mdio_sync (ioaddr); ab@2316: ab@2316: /* Shift the command bits out. */ ab@2316: for (i = 31; i >= 0; i--) { ab@2316: int dataval = ab@2316: (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; ab@2316: RTL_W8 (Config4, dataval); ab@2316: mdio_delay (); ab@2316: RTL_W8 (Config4, dataval | MDIO_CLK); ab@2316: mdio_delay (); ab@2316: } ab@2316: /* Clear out extra bits. */ ab@2316: for (i = 2; i > 0; i--) { ab@2316: RTL_W8 (Config4, 0); ab@2316: mdio_delay (); ab@2316: RTL_W8 (Config4, MDIO_CLK); ab@2316: mdio_delay (); ab@2316: } ab@2316: #endif ab@2316: } ab@2316: ab@2316: ab@2316: static int rtl8139_open (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: int retval; ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: ab@2316: if (!tp->ecdev) { ab@2316: retval = request_irq(dev->irq, rtl8139_interrupt, ab@2316: IRQF_SHARED, dev->name, dev); ab@2316: if (retval) ab@2316: return retval; ab@2316: } ab@2316: ab@2316: tp->tx_bufs = dma_alloc_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, ab@2316: &tp->tx_bufs_dma, GFP_KERNEL); ab@2316: tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, ab@2316: &tp->rx_ring_dma, GFP_KERNEL); ab@2316: if (tp->tx_bufs == NULL || tp->rx_ring == NULL) { ab@2316: if (!tp->ecdev) free_irq(dev->irq, dev); ab@2316: ab@2316: if (tp->tx_bufs) ab@2316: dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, ab@2316: tp->tx_bufs, tp->tx_bufs_dma); ab@2316: if (tp->rx_ring) ab@2316: dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, ab@2316: tp->rx_ring, tp->rx_ring_dma); ab@2316: ab@2316: return -ENOMEM; ab@2316: ab@2316: } ab@2316: ab@2316: napi_enable(&tp->napi); ab@2316: ab@2316: tp->mii.full_duplex = tp->mii.force_media; ab@2316: tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; ab@2316: ab@2316: rtl8139_init_ring (dev); ab@2316: rtl8139_hw_start (dev); ab@2316: netif_start_queue (dev); ab@2316: ab@2316: if (!tp->ecdev) { ab@2316: if (netif_msg_ifup(tp)) ab@2316: pr_debug("%s: rtl8139_open() ioaddr %#llx IRQ %d" ab@2316: " GP Pins %2.2x %s-duplex.\n", dev->name, ab@2316: (unsigned long long)pci_resource_start (tp->pci_dev, 1), ab@2316: dev->irq, RTL_R8 (MediaStatus), ab@2316: tp->mii.full_duplex ? "full" : "half"); ab@2316: ab@2316: rtl8139_start_thread(tp); ab@2316: } ab@2316: ab@2316: return 0; ab@2316: } ab@2316: ab@2316: ab@2316: static void rtl_check_media (struct net_device *dev, unsigned int init_media) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: ab@2316: if (tp->ecdev) { ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: u16 state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS; ab@2316: ecdev_set_link(tp->ecdev, state ? 1 : 0); ab@2316: } ab@2316: else { ab@2316: if (tp->phys[0] >= 0) { ab@2316: mii_check_media(&tp->mii, netif_msg_link(tp), init_media); ab@2316: } ab@2316: } ab@2316: } ab@2316: ab@2316: /* Start the hardware at open or resume. */ ab@2316: static void rtl8139_hw_start (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: u32 i; ab@2316: u8 tmp; ab@2316: ab@2316: /* Bring old chips out of low-power mode. */ ab@2316: if (rtl_chip_info[tp->chipset].flags & HasHltClk) ab@2316: RTL_W8 (HltClk, 'R'); ab@2316: ab@2316: rtl8139_chip_reset (ioaddr); ab@2316: ab@2316: /* unlock Config[01234] and BMCR register writes */ ab@2316: RTL_W8_F (Cfg9346, Cfg9346_Unlock); ab@2316: /* Restore our idea of the MAC address. */ ab@2316: RTL_W32_F (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0))); ab@2316: RTL_W32_F (MAC0 + 4, le16_to_cpu (*(__le16 *) (dev->dev_addr + 4))); ab@2316: ab@2316: tp->cur_rx = 0; ab@2316: ab@2316: /* init Rx ring buffer DMA address */ ab@2316: RTL_W32_F (RxBuf, tp->rx_ring_dma); ab@2316: ab@2316: /* Must enable Tx/Rx before setting transfer thresholds! */ ab@2316: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); ab@2316: ab@2316: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; ab@2316: RTL_W32 (RxConfig, tp->rx_config); ab@2316: RTL_W32 (TxConfig, rtl8139_tx_config); ab@2316: ab@2316: rtl_check_media (dev, 1); ab@2316: ab@2316: if (tp->chipset >= CH_8139B) { ab@2316: /* Disable magic packet scanning, which is enabled ab@2316: * when PM is enabled in Config1. It can be reenabled ab@2316: * via ETHTOOL_SWOL if desired. */ ab@2316: RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); ab@2316: } ab@2316: ab@2316: pr_debug("init buffer addresses\n"); ab@2316: ab@2316: /* Lock Config[01234] and BMCR register writes */ ab@2316: RTL_W8 (Cfg9346, Cfg9346_Lock); ab@2316: ab@2316: /* init Tx buffer DMA addresses */ ab@2316: for (i = 0; i < NUM_TX_DESC; i++) ab@2316: RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); ab@2316: ab@2316: RTL_W32 (RxMissed, 0); ab@2316: ab@2316: rtl8139_set_rx_mode (dev); ab@2316: ab@2316: /* no early-rx interrupts */ ab@2316: RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); ab@2316: ab@2316: /* make sure RxTx has started */ ab@2316: tmp = RTL_R8 (ChipCmd); ab@2316: if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) ab@2316: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); ab@2316: ab@2316: if (!tp->ecdev) ab@2316: /* Enable all known interrupts by setting the interrupt mask. */ ab@2316: RTL_W16 (IntrMask, rtl8139_intr_mask); ab@2316: } ab@2316: ab@2316: ab@2316: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ ab@2316: static void rtl8139_init_ring (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: int i; ab@2316: ab@2316: tp->cur_rx = 0; ab@2316: tp->cur_tx = 0; ab@2316: tp->dirty_tx = 0; ab@2316: ab@2316: for (i = 0; i < NUM_TX_DESC; i++) ab@2316: tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; ab@2316: } ab@2316: ab@2316: ab@2316: /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ ab@2316: static int next_tick = 3 * HZ; ab@2316: ab@2316: #ifndef CONFIG_8139TOO_TUNE_TWISTER ab@2316: static inline void rtl8139_tune_twister (struct net_device *dev, ab@2316: struct rtl8139_private *tp) {} ab@2316: #else ab@2316: enum TwisterParamVals { ab@2316: PARA78_default = 0x78fa8388, ab@2316: PARA7c_default = 0xcb38de43, /* param[0][3] */ ab@2316: PARA7c_xxx = 0xcb38de43, ab@2316: }; ab@2316: ab@2316: static const unsigned long param[4][4] = { ab@2316: {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43}, ab@2316: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, ab@2316: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, ab@2316: {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83} ab@2316: }; ab@2316: ab@2316: static void rtl8139_tune_twister (struct net_device *dev, ab@2316: struct rtl8139_private *tp) ab@2316: { ab@2316: int linkcase; ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: ab@2316: /* This is a complicated state machine to configure the "twister" for ab@2316: impedance/echos based on the cable length. ab@2316: All of this is magic and undocumented. ab@2316: */ ab@2316: switch (tp->twistie) { ab@2316: case 1: ab@2316: if (RTL_R16 (CSCR) & CSCR_LinkOKBit) { ab@2316: /* We have link beat, let us tune the twister. */ ab@2316: RTL_W16 (CSCR, CSCR_LinkDownOffCmd); ab@2316: tp->twistie = 2; /* Change to state 2. */ ab@2316: next_tick = HZ / 10; ab@2316: } else { ab@2316: /* Just put in some reasonable defaults for when beat returns. */ ab@2316: RTL_W16 (CSCR, CSCR_LinkDownCmd); ab@2316: RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ ab@2316: RTL_W32 (PARA78, PARA78_default); ab@2316: RTL_W32 (PARA7c, PARA7c_default); ab@2316: tp->twistie = 0; /* Bail from future actions. */ ab@2316: } ab@2316: break; ab@2316: case 2: ab@2316: /* Read how long it took to hear the echo. */ ab@2316: linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; ab@2316: if (linkcase == 0x7000) ab@2316: tp->twist_row = 3; ab@2316: else if (linkcase == 0x3000) ab@2316: tp->twist_row = 2; ab@2316: else if (linkcase == 0x1000) ab@2316: tp->twist_row = 1; ab@2316: else ab@2316: tp->twist_row = 0; ab@2316: tp->twist_col = 0; ab@2316: tp->twistie = 3; /* Change to state 2. */ ab@2316: next_tick = HZ / 10; ab@2316: break; ab@2316: case 3: ab@2316: /* Put out four tuning parameters, one per 100msec. */ ab@2316: if (tp->twist_col == 0) ab@2316: RTL_W16 (FIFOTMS, 0); ab@2316: RTL_W32 (PARA7c, param[(int) tp->twist_row] ab@2316: [(int) tp->twist_col]); ab@2316: next_tick = HZ / 10; ab@2316: if (++tp->twist_col >= 4) { ab@2316: /* For short cables we are done. ab@2316: For long cables (row == 3) check for mistune. */ ab@2316: tp->twistie = ab@2316: (tp->twist_row == 3) ? 4 : 0; ab@2316: } ab@2316: break; ab@2316: case 4: ab@2316: /* Special case for long cables: check for mistune. */ ab@2316: if ((RTL_R16 (CSCR) & ab@2316: CSCR_LinkStatusBits) == 0x7000) { ab@2316: tp->twistie = 0; ab@2316: break; ab@2316: } else { ab@2316: RTL_W32 (PARA7c, 0xfb38de03); ab@2316: tp->twistie = 5; ab@2316: next_tick = HZ / 10; ab@2316: } ab@2316: break; ab@2316: case 5: ab@2316: /* Retune for shorter cable (column 2). */ ab@2316: RTL_W32 (FIFOTMS, 0x20); ab@2316: RTL_W32 (PARA78, PARA78_default); ab@2316: RTL_W32 (PARA7c, PARA7c_default); ab@2316: RTL_W32 (FIFOTMS, 0x00); ab@2316: tp->twist_row = 2; ab@2316: tp->twist_col = 0; ab@2316: tp->twistie = 3; ab@2316: next_tick = HZ / 10; ab@2316: break; ab@2316: ab@2316: default: ab@2316: /* do nothing */ ab@2316: break; ab@2316: } ab@2316: } ab@2316: #endif /* CONFIG_8139TOO_TUNE_TWISTER */ ab@2316: ab@2316: static inline void rtl8139_thread_iter (struct net_device *dev, ab@2316: struct rtl8139_private *tp, ab@2316: void __iomem *ioaddr) ab@2316: { ab@2316: int mii_lpa; ab@2316: ab@2316: mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); ab@2316: ab@2316: if (!tp->mii.force_media && mii_lpa != 0xffff) { ab@2316: int duplex = ((mii_lpa & LPA_100FULL) || ab@2316: (mii_lpa & 0x01C0) == 0x0040); ab@2316: if (tp->mii.full_duplex != duplex) { ab@2316: tp->mii.full_duplex = duplex; ab@2316: ab@2316: if (mii_lpa) { ab@2316: pr_info("%s: Setting %s-duplex based on MII #%d link" ab@2316: " partner ability of %4.4x.\n", ab@2316: dev->name, ab@2316: tp->mii.full_duplex ? "full" : "half", ab@2316: tp->phys[0], mii_lpa); ab@2316: } else { ab@2316: pr_info("%s: media is unconnected, link down, or incompatible connection\n", ab@2316: dev->name); ab@2316: } ab@2316: #if 0 ab@2316: RTL_W8 (Cfg9346, Cfg9346_Unlock); ab@2316: RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); ab@2316: RTL_W8 (Cfg9346, Cfg9346_Lock); ab@2316: #endif ab@2316: } ab@2316: } ab@2316: ab@2316: next_tick = HZ * 60; ab@2316: ab@2316: rtl8139_tune_twister (dev, tp); ab@2316: ab@2316: pr_debug("%s: Media selection tick, Link partner %4.4x.\n", ab@2316: dev->name, RTL_R16 (NWayLPAR)); ab@2316: pr_debug("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n", ab@2316: dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); ab@2316: pr_debug("%s: Chip config %2.2x %2.2x.\n", ab@2316: dev->name, RTL_R8 (Config0), ab@2316: RTL_R8 (Config1)); ab@2316: } ab@2316: ab@2316: static void rtl8139_thread (struct work_struct *work) ab@2316: { ab@2316: struct rtl8139_private *tp = ab@2316: container_of(work, struct rtl8139_private, thread.work); ab@2316: struct net_device *dev = tp->mii.dev; ab@2316: unsigned long thr_delay = next_tick; ab@2316: ab@2316: rtnl_lock(); ab@2316: ab@2316: if (!netif_running(dev)) ab@2316: goto out_unlock; ab@2316: ab@2316: if (tp->watchdog_fired) { ab@2316: tp->watchdog_fired = 0; ab@2316: rtl8139_tx_timeout_task(work); ab@2316: } else ab@2316: rtl8139_thread_iter(dev, tp, tp->mmio_addr); ab@2316: ab@2316: if (tp->have_thread) ab@2316: schedule_delayed_work(&tp->thread, thr_delay); ab@2316: out_unlock: ab@2316: rtnl_unlock (); ab@2316: } ab@2316: ab@2316: static void rtl8139_start_thread(struct rtl8139_private *tp) ab@2316: { ab@2316: tp->twistie = 0; ab@2316: if (tp->chipset == CH_8139_K) ab@2316: tp->twistie = 1; ab@2316: else if (tp->drv_flags & HAS_LNK_CHNG) ab@2316: return; ab@2316: ab@2316: tp->have_thread = 1; ab@2316: tp->watchdog_fired = 0; ab@2316: ab@2316: schedule_delayed_work(&tp->thread, next_tick); ab@2316: } ab@2316: ab@2316: static inline void rtl8139_tx_clear (struct rtl8139_private *tp) ab@2316: { ab@2316: tp->cur_tx = 0; ab@2316: tp->dirty_tx = 0; ab@2316: ab@2316: /* XXX account for unsent Tx packets in tp->stats.tx_dropped */ ab@2316: } ab@2316: ab@2316: static void rtl8139_tx_timeout_task (struct work_struct *work) ab@2316: { ab@2316: struct rtl8139_private *tp = ab@2316: container_of(work, struct rtl8139_private, thread.work); ab@2316: struct net_device *dev = tp->mii.dev; ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: int i; ab@2316: u8 tmp8; ab@2316: ab@2316: pr_debug("%s: Transmit timeout, status %2.2x %4.4x %4.4x media %2.2x.\n", ab@2316: dev->name, RTL_R8 (ChipCmd), ab@2316: RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus)); ab@2316: /* Emit info to figure out what went wrong. */ ab@2316: pr_debug("%s: Tx queue start entry %ld dirty entry %ld.\n", ab@2316: dev->name, tp->cur_tx, tp->dirty_tx); ab@2316: for (i = 0; i < NUM_TX_DESC; i++) ab@2316: pr_debug("%s: Tx descriptor %d is %8.8lx.%s\n", ab@2316: dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), ab@2316: i == tp->dirty_tx % NUM_TX_DESC ? ab@2316: " (queue head)" : ""); ab@2316: ab@2316: tp->xstats.tx_timeouts++; ab@2316: ab@2316: /* disable Tx ASAP, if not already */ ab@2316: tmp8 = RTL_R8 (ChipCmd); ab@2316: if (tmp8 & CmdTxEnb) ab@2316: RTL_W8 (ChipCmd, CmdRxEnb); ab@2316: ab@2316: if (tp->ecdev) { ab@2316: rtl8139_tx_clear (tp); ab@2316: rtl8139_hw_start (dev); ab@2316: } ab@2316: else { ab@2316: spin_lock_bh(&tp->rx_lock); ab@2316: /* Disable interrupts by clearing the interrupt mask. */ ab@2316: RTL_W16 (IntrMask, 0x0000); ab@2316: ab@2316: /* Stop a shared interrupt from scavenging while we are. */ ab@2316: spin_lock_irq(&tp->lock); ab@2316: rtl8139_tx_clear (tp); ab@2316: spin_unlock_irq(&tp->lock); ab@2316: ab@2316: /* ...and finally, reset everything */ ab@2316: if (netif_running(dev)) { ab@2316: rtl8139_hw_start (dev); ab@2316: netif_wake_queue (dev); ab@2316: } ab@2316: spin_unlock_bh(&tp->rx_lock); ab@2316: } ab@2316: } ab@2316: ab@2316: static void rtl8139_tx_timeout (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: ab@2316: tp->watchdog_fired = 1; ab@2316: if (!tp->ecdev && !tp->have_thread) { ab@2316: INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); ab@2316: schedule_delayed_work(&tp->thread, next_tick); ab@2316: } ab@2316: } ab@2316: ab@2316: static netdev_tx_t rtl8139_start_xmit (struct sk_buff *skb, ab@2316: struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: unsigned int entry; ab@2316: unsigned int len = skb->len; ab@2316: unsigned long flags; ab@2316: ab@2316: /* Calculate the next Tx descriptor entry. */ ab@2316: entry = tp->cur_tx % NUM_TX_DESC; ab@2316: ab@2316: /* Note: the chip doesn't have auto-pad! */ ab@2316: if (likely(len < TX_BUF_SIZE)) { ab@2316: if (len < ETH_ZLEN) ab@2316: memset(tp->tx_buf[entry], 0, ETH_ZLEN); ab@2316: skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); ab@2316: if (!tp->ecdev) dev_kfree_skb(skb); ab@2316: } else { ab@2316: if (!tp->ecdev) dev_kfree_skb(skb); ab@2316: dev->stats.tx_dropped++; ab@2316: return NETDEV_TX_OK; ab@2316: } ab@2316: ab@2316: if (tp->ecdev) { ab@2316: wmb(); ab@2316: RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), ab@2316: tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); ab@2316: ab@2316: dev->trans_start = jiffies; ab@2316: ab@2316: tp->cur_tx++; ab@2316: } else { ab@2316: spin_lock_irqsave(&tp->lock, flags); ab@2316: /* ab@2316: * Writing to TxStatus triggers a DMA transfer of the data ab@2316: * copied to tp->tx_buf[entry] above. Use a memory barrier ab@2316: * to make sure that the device sees the updated data. ab@2316: */ ab@2316: wmb(); ab@2316: RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), ab@2316: tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); ab@2316: ab@2316: dev->trans_start = jiffies; ab@2316: ab@2316: tp->cur_tx++; ab@2316: ab@2316: if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) ab@2316: netif_stop_queue (dev); ab@2316: spin_unlock_irqrestore(&tp->lock, flags); ab@2316: ab@2316: if (netif_msg_tx_queued(tp)) ab@2316: pr_debug("%s: Queued Tx packet size %u to slot %d.\n", ab@2316: dev->name, len, entry); ab@2316: } ab@2316: ab@2316: return NETDEV_TX_OK; ab@2316: } ab@2316: ab@2316: ab@2316: static void rtl8139_tx_interrupt (struct net_device *dev, ab@2316: struct rtl8139_private *tp, ab@2316: void __iomem *ioaddr) ab@2316: { ab@2316: unsigned long dirty_tx, tx_left; ab@2316: ab@2316: assert (dev != NULL); ab@2316: assert (ioaddr != NULL); ab@2316: ab@2316: dirty_tx = tp->dirty_tx; ab@2316: tx_left = tp->cur_tx - dirty_tx; ab@2316: while (tx_left > 0) { ab@2316: int entry = dirty_tx % NUM_TX_DESC; ab@2316: int txstatus; ab@2316: ab@2316: txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); ab@2316: ab@2316: if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) ab@2316: break; /* It still hasn't been Txed */ ab@2316: ab@2316: /* Note: TxCarrierLost is always asserted at 100mbps. */ ab@2316: if (txstatus & (TxOutOfWindow | TxAborted)) { ab@2316: /* There was an major error, log it. */ ab@2316: if (netif_msg_tx_err(tp)) ab@2316: pr_debug("%s: Transmit error, Tx status %8.8x.\n", ab@2316: dev->name, txstatus); ab@2316: dev->stats.tx_errors++; ab@2316: if (txstatus & TxAborted) { ab@2316: dev->stats.tx_aborted_errors++; ab@2316: RTL_W32 (TxConfig, TxClearAbt); ab@2316: RTL_W16 (IntrStatus, TxErr); ab@2316: wmb(); ab@2316: } ab@2316: if (txstatus & TxCarrierLost) ab@2316: dev->stats.tx_carrier_errors++; ab@2316: if (txstatus & TxOutOfWindow) ab@2316: dev->stats.tx_window_errors++; ab@2316: } else { ab@2316: if (txstatus & TxUnderrun) { ab@2316: /* Add 64 to the Tx FIFO threshold. */ ab@2316: if (tp->tx_flag < 0x00300000) ab@2316: tp->tx_flag += 0x00020000; ab@2316: dev->stats.tx_fifo_errors++; ab@2316: } ab@2316: dev->stats.collisions += (txstatus >> 24) & 15; ab@2316: dev->stats.tx_bytes += txstatus & 0x7ff; ab@2316: dev->stats.tx_packets++; ab@2316: } ab@2316: ab@2316: dirty_tx++; ab@2316: tx_left--; ab@2316: } ab@2316: ab@2316: #ifndef RTL8139_NDEBUG ab@2316: if (!tp->ecdev && tp->cur_tx - dirty_tx > NUM_TX_DESC) { ab@2316: pr_err("%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", ab@2316: dev->name, dirty_tx, tp->cur_tx); ab@2316: dirty_tx += NUM_TX_DESC; ab@2316: } ab@2316: #endif /* RTL8139_NDEBUG */ ab@2316: ab@2316: /* only wake the queue if we did work, and the queue is stopped */ ab@2316: if (tp->dirty_tx != dirty_tx) { ab@2316: tp->dirty_tx = dirty_tx; ab@2316: mb(); ab@2316: if (!tp->ecdev) netif_wake_queue (dev); ab@2316: } ab@2316: } ab@2316: ab@2316: ab@2316: /* TODO: clean this up! Rx reset need not be this intensive */ ab@2316: static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, ab@2316: struct rtl8139_private *tp, void __iomem *ioaddr) ab@2316: { ab@2316: u8 tmp8; ab@2316: #ifdef CONFIG_8139_OLD_RX_RESET ab@2316: int tmp_work; ab@2316: #endif ab@2316: ab@2316: if (netif_msg_rx_err (tp)) ab@2316: pr_debug("%s: Ethernet frame had errors, status %8.8x.\n", ab@2316: dev->name, rx_status); ab@2316: dev->stats.rx_errors++; ab@2316: if (!(rx_status & RxStatusOK)) { ab@2316: if (rx_status & RxTooLong) { ab@2316: pr_debug("%s: Oversized Ethernet frame, status %4.4x!\n", ab@2316: dev->name, rx_status); ab@2316: /* A.C.: The chip hangs here. */ ab@2316: } ab@2316: if (rx_status & (RxBadSymbol | RxBadAlign)) ab@2316: dev->stats.rx_frame_errors++; ab@2316: if (rx_status & (RxRunt | RxTooLong)) ab@2316: dev->stats.rx_length_errors++; ab@2316: if (rx_status & RxCRCErr) ab@2316: dev->stats.rx_crc_errors++; ab@2316: } else { ab@2316: tp->xstats.rx_lost_in_ring++; ab@2316: } ab@2316: ab@2316: #ifndef CONFIG_8139_OLD_RX_RESET ab@2316: tmp8 = RTL_R8 (ChipCmd); ab@2316: RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); ab@2316: RTL_W8 (ChipCmd, tmp8); ab@2316: RTL_W32 (RxConfig, tp->rx_config); ab@2316: tp->cur_rx = 0; ab@2316: #else ab@2316: /* Reset the receiver, based on RealTek recommendation. (Bug?) */ ab@2316: ab@2316: /* disable receive */ ab@2316: RTL_W8_F (ChipCmd, CmdTxEnb); ab@2316: tmp_work = 200; ab@2316: while (--tmp_work > 0) { ab@2316: udelay(1); ab@2316: tmp8 = RTL_R8 (ChipCmd); ab@2316: if (!(tmp8 & CmdRxEnb)) ab@2316: break; ab@2316: } ab@2316: if (tmp_work <= 0) ab@2316: pr_warning(PFX "rx stop wait too long\n"); ab@2316: /* restart receive */ ab@2316: tmp_work = 200; ab@2316: while (--tmp_work > 0) { ab@2316: RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); ab@2316: udelay(1); ab@2316: tmp8 = RTL_R8 (ChipCmd); ab@2316: if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) ab@2316: break; ab@2316: } ab@2316: if (tmp_work <= 0) ab@2316: pr_warning(PFX "tx/rx enable wait too long\n"); ab@2316: ab@2316: /* and reinitialize all rx related registers */ ab@2316: RTL_W8_F (Cfg9346, Cfg9346_Unlock); ab@2316: /* Must enable Tx/Rx before setting transfer thresholds! */ ab@2316: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); ab@2316: ab@2316: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; ab@2316: RTL_W32 (RxConfig, tp->rx_config); ab@2316: tp->cur_rx = 0; ab@2316: ab@2316: pr_debug("init buffer addresses\n"); ab@2316: ab@2316: /* Lock Config[01234] and BMCR register writes */ ab@2316: RTL_W8 (Cfg9346, Cfg9346_Lock); ab@2316: ab@2316: /* init Rx ring buffer DMA address */ ab@2316: RTL_W32_F (RxBuf, tp->rx_ring_dma); ab@2316: ab@2316: /* A.C.: Reset the multicast list. */ ab@2316: __set_rx_mode (dev); ab@2316: #endif ab@2316: } ab@2316: ab@2316: #if RX_BUF_IDX == 3 ab@2316: static inline void wrap_copy(struct sk_buff *skb, const unsigned char *ring, ab@2316: u32 offset, unsigned int size) ab@2316: { ab@2316: u32 left = RX_BUF_LEN - offset; ab@2316: ab@2316: if (size > left) { ab@2316: skb_copy_to_linear_data(skb, ring + offset, left); ab@2316: skb_copy_to_linear_data_offset(skb, left, ring, size - left); ab@2316: } else ab@2316: skb_copy_to_linear_data(skb, ring + offset, size); ab@2316: } ab@2316: #endif ab@2316: ab@2316: static void rtl8139_isr_ack(struct rtl8139_private *tp) ab@2316: { ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: u16 status; ab@2316: ab@2316: status = RTL_R16 (IntrStatus) & RxAckBits; ab@2316: ab@2316: /* Clear out errors and receive interrupts */ ab@2316: if (likely(status != 0)) { ab@2316: if (unlikely(status & (RxFIFOOver | RxOverflow))) { ab@2316: tp->dev->stats.rx_errors++; ab@2316: if (status & RxFIFOOver) ab@2316: tp->dev->stats.rx_fifo_errors++; ab@2316: } ab@2316: RTL_W16_F (IntrStatus, RxAckBits); ab@2316: } ab@2316: } ab@2316: ab@2316: static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, ab@2316: int budget) ab@2316: { ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: int received = 0; ab@2316: unsigned char *rx_ring = tp->rx_ring; ab@2316: unsigned int cur_rx = tp->cur_rx; ab@2316: unsigned int rx_size = 0; ab@2316: ab@2316: pr_debug("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x," ab@2316: " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx, ab@2316: RTL_R16 (RxBufAddr), ab@2316: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); ab@2316: ab@2316: while ((tp->ecdev || netif_running(dev)) ab@2316: && received < budget ab@2316: && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { ab@2316: u32 ring_offset = cur_rx % RX_BUF_LEN; ab@2316: u32 rx_status; ab@2316: unsigned int pkt_size; ab@2316: struct sk_buff *skb; ab@2316: ab@2316: rmb(); ab@2316: ab@2316: /* read size+status of next frame from DMA ring buffer */ ab@2316: rx_status = le32_to_cpu (*(__le32 *) (rx_ring + ring_offset)); ab@2316: rx_size = rx_status >> 16; ab@2316: pkt_size = rx_size - 4; ab@2316: ab@2316: if (!tp->ecdev) { ab@2316: if (netif_msg_rx_status(tp)) ab@2316: pr_debug("%s: rtl8139_rx() status %4.4x, size %4.4x," ab@2316: " cur %4.4x.\n", dev->name, rx_status, ab@2316: rx_size, cur_rx); ab@2316: } ab@2316: #if RTL8139_DEBUG > 2 ab@2316: { ab@2316: int i; ab@2316: pr_debug("%s: Frame contents ", dev->name); ab@2316: for (i = 0; i < 70; i++) ab@2316: pr_cont(" %2.2x", ab@2316: rx_ring[ring_offset + i]); ab@2316: pr_cont(".\n"); ab@2316: } ab@2316: #endif ab@2316: ab@2316: /* Packet copy from FIFO still in progress. ab@2316: * Theoretically, this should never happen ab@2316: * since EarlyRx is disabled. ab@2316: */ ab@2316: if (unlikely(rx_size == 0xfff0)) { ab@2316: if (!tp->fifo_copy_timeout) ab@2316: tp->fifo_copy_timeout = jiffies + 2; ab@2316: else if (time_after(jiffies, tp->fifo_copy_timeout)) { ab@2316: pr_debug("%s: hung FIFO. Reset.", dev->name); ab@2316: rx_size = 0; ab@2316: goto no_early_rx; ab@2316: } ab@2316: if (netif_msg_intr(tp)) { ab@2316: pr_debug("%s: fifo copy in progress.", ab@2316: dev->name); ab@2316: } ab@2316: tp->xstats.early_rx++; ab@2316: break; ab@2316: } ab@2316: ab@2316: no_early_rx: ab@2316: tp->fifo_copy_timeout = 0; ab@2316: ab@2316: /* If Rx err or invalid rx_size/rx_status received ab@2316: * (which happens if we get lost in the ring), ab@2316: * Rx process gets reset, so we abort any further ab@2316: * Rx processing. ab@2316: */ ab@2316: if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) || ab@2316: (rx_size < 8) || ab@2316: (!(rx_status & RxStatusOK)))) { ab@2316: rtl8139_rx_err (rx_status, dev, tp, ioaddr); ab@2316: received = -1; ab@2316: goto out; ab@2316: } ab@2316: ab@2316: if (tp->ecdev) { ab@2316: ecdev_receive(tp->ecdev, ab@2316: &rx_ring[ring_offset + 4], pkt_size); ab@2316: dev->last_rx = jiffies; ab@2316: dev->stats.rx_bytes += pkt_size; ab@2316: dev->stats.rx_packets++; ab@2316: } else { ab@2316: /* Malloc up new buffer, compatible with net-2e. */ ab@2316: /* Omit the four octet CRC from the length. */ ab@2316: ab@2316: skb = netdev_alloc_skb_ip_align(dev, pkt_size); ab@2316: if (likely(skb)) { ab@2316: ab@2316: #if RX_BUF_IDX == 3 ab@2316: wrap_copy(skb, rx_ring, ring_offset+4, pkt_size); ab@2316: #else ab@2316: skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size); ab@2316: #endif ab@2316: skb_put (skb, pkt_size); ab@2316: ab@2316: skb->protocol = eth_type_trans (skb, dev); ab@2316: ab@2316: dev->stats.rx_bytes += pkt_size; ab@2316: dev->stats.rx_packets++; ab@2316: ab@2316: netif_receive_skb (skb); ab@2316: } else { ab@2316: if (net_ratelimit()) ab@2316: pr_warning("%s: Memory squeeze, dropping packet.\n", ab@2316: dev->name); ab@2316: dev->stats.rx_dropped++; ab@2316: } ab@2316: } ab@2316: received++; ab@2316: ab@2316: cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; ab@2316: RTL_W16 (RxBufPtr, (u16) (cur_rx - 16)); ab@2316: ab@2316: rtl8139_isr_ack(tp); ab@2316: } ab@2316: ab@2316: if (unlikely(!received || rx_size == 0xfff0)) ab@2316: rtl8139_isr_ack(tp); ab@2316: ab@2316: pr_debug("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x," ab@2316: " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, ab@2316: RTL_R16 (RxBufAddr), ab@2316: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); ab@2316: ab@2316: tp->cur_rx = cur_rx; ab@2316: ab@2316: /* ab@2316: * The receive buffer should be mostly empty. ab@2316: * Tell NAPI to reenable the Rx irq. ab@2316: */ ab@2316: if (tp->fifo_copy_timeout) ab@2316: received = budget; ab@2316: ab@2316: out: ab@2316: return received; ab@2316: } ab@2316: ab@2316: ab@2316: static void rtl8139_weird_interrupt (struct net_device *dev, ab@2316: struct rtl8139_private *tp, ab@2316: void __iomem *ioaddr, ab@2316: int status, int link_changed) ab@2316: { ab@2316: pr_debug("%s: Abnormal interrupt, status %8.8x.\n", ab@2316: dev->name, status); ab@2316: ab@2316: assert (dev != NULL); ab@2316: assert (tp != NULL); ab@2316: assert (ioaddr != NULL); ab@2316: ab@2316: /* Update the error count. */ ab@2316: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); ab@2316: RTL_W32 (RxMissed, 0); ab@2316: ab@2316: if ((status & RxUnderrun) && link_changed && ab@2316: (tp->drv_flags & HAS_LNK_CHNG)) { ab@2316: rtl_check_media(dev, 0); ab@2316: status &= ~RxUnderrun; ab@2316: } ab@2316: ab@2316: if (status & (RxUnderrun | RxErr)) ab@2316: dev->stats.rx_errors++; ab@2316: ab@2316: if (status & PCSTimeout) ab@2316: dev->stats.rx_length_errors++; ab@2316: if (status & RxUnderrun) ab@2316: dev->stats.rx_fifo_errors++; ab@2316: if (status & PCIErr) { ab@2316: u16 pci_cmd_status; ab@2316: pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); ab@2316: pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); ab@2316: ab@2316: pr_err("%s: PCI Bus error %4.4x.\n", ab@2316: dev->name, pci_cmd_status); ab@2316: } ab@2316: } ab@2316: ab@2316: static int rtl8139_poll(struct napi_struct *napi, int budget) ab@2316: { ab@2316: struct rtl8139_private *tp = container_of(napi, struct rtl8139_private, napi); ab@2316: struct net_device *dev = tp->dev; ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: int work_done; ab@2316: ab@2316: spin_lock(&tp->rx_lock); ab@2316: work_done = 0; ab@2316: if (likely(RTL_R16(IntrStatus) & RxAckBits)) ab@2316: work_done += rtl8139_rx(dev, tp, budget); ab@2316: ab@2316: if (work_done < budget) { ab@2316: unsigned long flags; ab@2316: /* ab@2316: * Order is important since data can get interrupted ab@2316: * again when we think we are done. ab@2316: */ ab@2316: spin_lock_irqsave(&tp->lock, flags); ab@2316: RTL_W16_F(IntrMask, rtl8139_intr_mask); ab@2316: __napi_complete(napi); ab@2316: spin_unlock_irqrestore(&tp->lock, flags); ab@2316: } ab@2316: spin_unlock(&tp->rx_lock); ab@2316: ab@2316: return work_done; ab@2316: } ab@2316: ab@2316: void ec_poll(struct net_device *dev) ab@2316: { ab@2316: rtl8139_interrupt(0, dev); ab@2316: } ab@2316: ab@2316: /* The interrupt handler does all of the Rx thread work and cleans up ab@2316: after the Tx thread. */ ab@2316: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance) ab@2316: { ab@2316: struct net_device *dev = (struct net_device *) dev_instance; ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: u16 status, ackstat; ab@2316: int link_changed = 0; /* avoid bogus "uninit" warning */ ab@2316: int handled = 0; ab@2316: ab@2316: if (tp->ecdev) { ab@2316: status = RTL_R16 (IntrStatus); ab@2316: } ab@2316: else { ab@2316: spin_lock (&tp->lock); ab@2316: status = RTL_R16 (IntrStatus); ab@2316: ab@2316: /* shared irq? */ ab@2316: if (unlikely((status & rtl8139_intr_mask) == 0)) ab@2316: goto out; ab@2316: } ab@2316: ab@2316: handled = 1; ab@2316: ab@2316: /* h/w no longer present (hotplug?) or major error, bail */ ab@2316: if (unlikely(status == 0xFFFF)) ab@2316: goto out; ab@2316: ab@2316: if (!tp->ecdev) { ab@2316: /* close possible race's with dev_close */ ab@2316: if (unlikely(!netif_running(dev))) { ab@2316: RTL_W16 (IntrMask, 0); ab@2316: goto out; ab@2316: } ab@2316: } ab@2316: ab@2316: /* Acknowledge all of the current interrupt sources ASAP, but ab@2316: an first get an additional status bit from CSCR. */ ab@2316: if (unlikely(status & RxUnderrun)) ab@2316: link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; ab@2316: ab@2316: ackstat = status & ~(RxAckBits | TxErr); ab@2316: if (ackstat) ab@2316: RTL_W16 (IntrStatus, ackstat); ab@2316: ab@2316: /* Receive packets are processed by poll routine. ab@2316: If not running start it now. */ ab@2316: if (status & RxAckBits){ ab@2316: if (tp->ecdev) { ab@2316: /* EtherCAT device: Just receive all frames */ ab@2316: rtl8139_rx(dev, tp, 100); // FIXME ab@2316: } else { ab@2316: /* Mark for polling */ ab@2316: if (napi_schedule_prep(&tp->napi)) { ab@2316: RTL_W16_F (IntrMask, rtl8139_norx_intr_mask); ab@2316: __napi_schedule(&tp->napi); ab@2316: } ab@2316: } ab@2316: } ab@2316: ab@2316: /* Check uncommon events with one test. */ ab@2316: if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr))) ab@2316: rtl8139_weird_interrupt (dev, tp, ioaddr, ab@2316: status, link_changed); ab@2316: ab@2316: if (status & (TxOK | TxErr)) { ab@2316: rtl8139_tx_interrupt (dev, tp, ioaddr); ab@2316: if (status & TxErr) ab@2316: RTL_W16 (IntrStatus, TxErr); ab@2316: } ab@2316: out: ab@2316: if (!tp->ecdev) spin_unlock (&tp->lock); ab@2316: ab@2316: pr_debug("%s: exiting interrupt, intr_status=%#4.4x.\n", ab@2316: dev->name, RTL_R16 (IntrStatus)); ab@2316: return IRQ_RETVAL(handled); ab@2316: } ab@2316: ab@2316: #ifdef CONFIG_NET_POLL_CONTROLLER ab@2316: /* ab@2316: * Polling receive - used by netconsole and other diagnostic tools ab@2316: * to allow network i/o with interrupts disabled. ab@2316: */ ab@2316: static void rtl8139_poll_controller(struct net_device *dev) ab@2316: { ab@2316: /* ab@2316: * use _nosync() variant - might be used by netconsole ab@2316: * from atomic contexts: ab@2316: */ ab@2316: disable_irq_nosync(dev->irq); ab@2316: rtl8139_interrupt(dev->irq, dev); ab@2316: enable_irq(dev->irq); ab@2316: } ab@2316: #endif ab@2316: ab@2316: static int rtl8139_set_mac_address(struct net_device *dev, void *p) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: struct sockaddr *addr = p; ab@2316: ab@2316: if (!is_valid_ether_addr(addr->sa_data)) ab@2316: return -EADDRNOTAVAIL; ab@2316: ab@2316: memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); ab@2316: ab@2316: spin_lock_irq(&tp->lock); ab@2316: ab@2316: RTL_W8_F(Cfg9346, Cfg9346_Unlock); ab@2316: RTL_W32_F(MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); ab@2316: RTL_W32_F(MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); ab@2316: RTL_W8_F(Cfg9346, Cfg9346_Lock); ab@2316: ab@2316: spin_unlock_irq(&tp->lock); ab@2316: ab@2316: return 0; ab@2316: } ab@2316: ab@2316: static int rtl8139_close (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: unsigned long flags; ab@2316: ab@2316: if (tp->ecdev) { ab@2316: /* Stop the chip's Tx and Rx DMA processes. */ ab@2316: RTL_W8 (ChipCmd, 0); ab@2316: ab@2316: /* Disable interrupts by clearing the interrupt mask. */ ab@2316: RTL_W16 (IntrMask, 0); ab@2316: ab@2316: /* Update the error counts. */ ab@2316: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); ab@2316: RTL_W32 (RxMissed, 0); ab@2316: } else { ab@2316: netif_stop_queue(dev); ab@2316: napi_disable(&tp->napi); ab@2316: ab@2316: if (netif_msg_ifdown(tp)) ab@2316: pr_debug("%s: Shutting down ethercard, status was 0x%4.4x.\n", ab@2316: dev->name, RTL_R16 (IntrStatus)); ab@2316: ab@2316: spin_lock_irqsave (&tp->lock, flags); ab@2316: ab@2316: /* Stop the chip's Tx and Rx DMA processes. */ ab@2316: RTL_W8 (ChipCmd, 0); ab@2316: ab@2316: /* Disable interrupts by clearing the interrupt mask. */ ab@2316: RTL_W16 (IntrMask, 0); ab@2316: ab@2316: /* Update the error counts. */ ab@2316: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); ab@2316: RTL_W32 (RxMissed, 0); ab@2316: ab@2316: spin_unlock_irqrestore (&tp->lock, flags); ab@2316: ab@2316: free_irq (dev->irq, dev); ab@2316: } ab@2316: ab@2316: rtl8139_tx_clear (tp); ab@2316: ab@2316: dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, ab@2316: tp->rx_ring, tp->rx_ring_dma); ab@2316: dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, ab@2316: tp->tx_bufs, tp->tx_bufs_dma); ab@2316: tp->rx_ring = NULL; ab@2316: tp->tx_bufs = NULL; ab@2316: ab@2316: /* Green! Put the chip in low-power mode. */ ab@2316: RTL_W8 (Cfg9346, Cfg9346_Unlock); ab@2316: ab@2316: if (rtl_chip_info[tp->chipset].flags & HasHltClk) ab@2316: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ ab@2316: ab@2316: return 0; ab@2316: } ab@2316: ab@2316: ab@2316: /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to ab@2316: kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and ab@2316: other threads or interrupts aren't messing with the 8139. */ ab@2316: static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: ab@2316: spin_lock_irq(&tp->lock); ab@2316: if (rtl_chip_info[tp->chipset].flags & HasLWake) { ab@2316: u8 cfg3 = RTL_R8 (Config3); ab@2316: u8 cfg5 = RTL_R8 (Config5); ab@2316: ab@2316: wol->supported = WAKE_PHY | WAKE_MAGIC ab@2316: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; ab@2316: ab@2316: wol->wolopts = 0; ab@2316: if (cfg3 & Cfg3_LinkUp) ab@2316: wol->wolopts |= WAKE_PHY; ab@2316: if (cfg3 & Cfg3_Magic) ab@2316: wol->wolopts |= WAKE_MAGIC; ab@2316: /* (KON)FIXME: See how netdev_set_wol() handles the ab@2316: following constants. */ ab@2316: if (cfg5 & Cfg5_UWF) ab@2316: wol->wolopts |= WAKE_UCAST; ab@2316: if (cfg5 & Cfg5_MWF) ab@2316: wol->wolopts |= WAKE_MCAST; ab@2316: if (cfg5 & Cfg5_BWF) ab@2316: wol->wolopts |= WAKE_BCAST; ab@2316: } ab@2316: spin_unlock_irq(&tp->lock); ab@2316: } ab@2316: ab@2316: ab@2316: /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes ab@2316: that wol points to kernel memory and other threads or interrupts ab@2316: aren't messing with the 8139. */ ab@2316: static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: u32 support; ab@2316: u8 cfg3, cfg5; ab@2316: ab@2316: support = ((rtl_chip_info[tp->chipset].flags & HasLWake) ab@2316: ? (WAKE_PHY | WAKE_MAGIC ab@2316: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) ab@2316: : 0); ab@2316: if (wol->wolopts & ~support) ab@2316: return -EINVAL; ab@2316: ab@2316: spin_lock_irq(&tp->lock); ab@2316: cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); ab@2316: if (wol->wolopts & WAKE_PHY) ab@2316: cfg3 |= Cfg3_LinkUp; ab@2316: if (wol->wolopts & WAKE_MAGIC) ab@2316: cfg3 |= Cfg3_Magic; ab@2316: RTL_W8 (Cfg9346, Cfg9346_Unlock); ab@2316: RTL_W8 (Config3, cfg3); ab@2316: RTL_W8 (Cfg9346, Cfg9346_Lock); ab@2316: ab@2316: cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); ab@2316: /* (KON)FIXME: These are untested. We may have to set the ab@2316: CRC0, Wakeup0 and LSBCRC0 registers too, but I have no ab@2316: documentation. */ ab@2316: if (wol->wolopts & WAKE_UCAST) ab@2316: cfg5 |= Cfg5_UWF; ab@2316: if (wol->wolopts & WAKE_MCAST) ab@2316: cfg5 |= Cfg5_MWF; ab@2316: if (wol->wolopts & WAKE_BCAST) ab@2316: cfg5 |= Cfg5_BWF; ab@2316: RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ ab@2316: spin_unlock_irq(&tp->lock); ab@2316: ab@2316: return 0; ab@2316: } ab@2316: ab@2316: static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: strcpy(info->driver, DRV_NAME); ab@2316: strcpy(info->version, DRV_VERSION); ab@2316: strcpy(info->bus_info, pci_name(tp->pci_dev)); ab@2316: info->regdump_len = tp->regs_len; ab@2316: } ab@2316: ab@2316: static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: spin_lock_irq(&tp->lock); ab@2316: mii_ethtool_gset(&tp->mii, cmd); ab@2316: spin_unlock_irq(&tp->lock); ab@2316: return 0; ab@2316: } ab@2316: ab@2316: static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: int rc; ab@2316: spin_lock_irq(&tp->lock); ab@2316: rc = mii_ethtool_sset(&tp->mii, cmd); ab@2316: spin_unlock_irq(&tp->lock); ab@2316: return rc; ab@2316: } ab@2316: ab@2316: static int rtl8139_nway_reset(struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: return mii_nway_restart(&tp->mii); ab@2316: } ab@2316: ab@2316: static u32 rtl8139_get_link(struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: return mii_link_ok(&tp->mii); ab@2316: } ab@2316: ab@2316: static u32 rtl8139_get_msglevel(struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: return tp->msg_enable; ab@2316: } ab@2316: ab@2316: static void rtl8139_set_msglevel(struct net_device *dev, u32 datum) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: tp->msg_enable = datum; ab@2316: } ab@2316: ab@2316: static int rtl8139_get_regs_len(struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp; ab@2316: /* TODO: we are too slack to do reg dumping for pio, for now */ ab@2316: if (use_io) ab@2316: return 0; ab@2316: tp = netdev_priv(dev); ab@2316: return tp->regs_len; ab@2316: } ab@2316: ab@2316: static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) ab@2316: { ab@2316: struct rtl8139_private *tp; ab@2316: ab@2316: /* TODO: we are too slack to do reg dumping for pio, for now */ ab@2316: if (use_io) ab@2316: return; ab@2316: tp = netdev_priv(dev); ab@2316: ab@2316: regs->version = RTL_REGS_VER; ab@2316: ab@2316: spin_lock_irq(&tp->lock); ab@2316: memcpy_fromio(regbuf, tp->mmio_addr, regs->len); ab@2316: spin_unlock_irq(&tp->lock); ab@2316: } ab@2316: ab@2316: static int rtl8139_get_sset_count(struct net_device *dev, int sset) ab@2316: { ab@2316: switch (sset) { ab@2316: case ETH_SS_STATS: ab@2316: return RTL_NUM_STATS; ab@2316: default: ab@2316: return -EOPNOTSUPP; ab@2316: } ab@2316: } ab@2316: ab@2316: static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: ab@2316: data[0] = tp->xstats.early_rx; ab@2316: data[1] = tp->xstats.tx_buf_mapped; ab@2316: data[2] = tp->xstats.tx_timeouts; ab@2316: data[3] = tp->xstats.rx_lost_in_ring; ab@2316: } ab@2316: ab@2316: static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data) ab@2316: { ab@2316: memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); ab@2316: } ab@2316: ab@2316: static const struct ethtool_ops rtl8139_ethtool_ops = { ab@2316: .get_drvinfo = rtl8139_get_drvinfo, ab@2316: .get_settings = rtl8139_get_settings, ab@2316: .set_settings = rtl8139_set_settings, ab@2316: .get_regs_len = rtl8139_get_regs_len, ab@2316: .get_regs = rtl8139_get_regs, ab@2316: .nway_reset = rtl8139_nway_reset, ab@2316: .get_link = rtl8139_get_link, ab@2316: .get_msglevel = rtl8139_get_msglevel, ab@2316: .set_msglevel = rtl8139_set_msglevel, ab@2316: .get_wol = rtl8139_get_wol, ab@2316: .set_wol = rtl8139_set_wol, ab@2316: .get_strings = rtl8139_get_strings, ab@2316: .get_sset_count = rtl8139_get_sset_count, ab@2316: .get_ethtool_stats = rtl8139_get_ethtool_stats, ab@2316: }; ab@2316: ab@2316: static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: int rc; ab@2316: ab@2316: if (tp->ecdev || !netif_running(dev)) ab@2316: return -EINVAL; ab@2316: ab@2316: spin_lock_irq(&tp->lock); ab@2316: rc = generic_mii_ioctl(&tp->mii, if_mii(rq), cmd, NULL); ab@2316: spin_unlock_irq(&tp->lock); ab@2316: ab@2316: return rc; ab@2316: } ab@2316: ab@2316: ab@2316: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: unsigned long flags; ab@2316: ab@2316: if (tp->ecdev || netif_running(dev)) { ab@2316: spin_lock_irqsave (&tp->lock, flags); ab@2316: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); ab@2316: RTL_W32 (RxMissed, 0); ab@2316: spin_unlock_irqrestore (&tp->lock, flags); ab@2316: } ab@2316: ab@2316: return &dev->stats; ab@2316: } ab@2316: ab@2316: /* Set or clear the multicast filter for this adaptor. ab@2316: This routine is not state sensitive and need not be SMP locked. */ ab@2316: ab@2316: static void __set_rx_mode (struct net_device *dev) ab@2316: { ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: u32 mc_filter[2]; /* Multicast hash filter */ ab@2316: int i, rx_mode; ab@2316: u32 tmp; ab@2316: ab@2316: pr_debug("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n", ab@2316: dev->name, dev->flags, RTL_R32 (RxConfig)); ab@2316: ab@2316: /* Note: do not reorder, GCC is clever about common statements. */ ab@2316: if (dev->flags & IFF_PROMISC) { ab@2316: rx_mode = ab@2316: AcceptBroadcast | AcceptMulticast | AcceptMyPhys | ab@2316: AcceptAllPhys; ab@2316: mc_filter[1] = mc_filter[0] = 0xffffffff; ab@2316: } else if ((dev->mc_count > multicast_filter_limit) || ab@2316: (dev->flags & IFF_ALLMULTI)) { ab@2316: /* Too many to filter perfectly -- accept all multicasts. */ ab@2316: rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; ab@2316: mc_filter[1] = mc_filter[0] = 0xffffffff; ab@2316: } else { ab@2316: struct dev_mc_list *mclist; ab@2316: rx_mode = AcceptBroadcast | AcceptMyPhys; ab@2316: mc_filter[1] = mc_filter[0] = 0; ab@2316: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; ab@2316: i++, mclist = mclist->next) { ab@2316: int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; ab@2316: ab@2316: mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); ab@2316: rx_mode |= AcceptMulticast; ab@2316: } ab@2316: } ab@2316: ab@2316: /* We can safely update without stopping the chip. */ ab@2316: tmp = rtl8139_rx_config | rx_mode; ab@2316: if (tp->rx_config != tmp) { ab@2316: RTL_W32_F (RxConfig, tmp); ab@2316: tp->rx_config = tmp; ab@2316: } ab@2316: RTL_W32_F (MAR0 + 0, mc_filter[0]); ab@2316: RTL_W32_F (MAR0 + 4, mc_filter[1]); ab@2316: } ab@2316: ab@2316: static void rtl8139_set_rx_mode (struct net_device *dev) ab@2316: { ab@2316: unsigned long flags; ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: ab@2316: spin_lock_irqsave (&tp->lock, flags); ab@2316: __set_rx_mode(dev); ab@2316: spin_unlock_irqrestore (&tp->lock, flags); ab@2316: } ab@2316: ab@2316: #ifdef CONFIG_PM ab@2316: ab@2316: static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state) ab@2316: { ab@2316: struct net_device *dev = pci_get_drvdata (pdev); ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: void __iomem *ioaddr = tp->mmio_addr; ab@2316: unsigned long flags; ab@2316: ab@2316: pci_save_state (pdev); ab@2316: ab@2316: if (tp->ecdev || !netif_running (dev)) ab@2316: return 0; ab@2316: ab@2316: netif_device_detach (dev); ab@2316: ab@2316: spin_lock_irqsave (&tp->lock, flags); ab@2316: ab@2316: /* Disable interrupts, stop Tx and Rx. */ ab@2316: RTL_W16 (IntrMask, 0); ab@2316: RTL_W8 (ChipCmd, 0); ab@2316: ab@2316: /* Update the error counts. */ ab@2316: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); ab@2316: RTL_W32 (RxMissed, 0); ab@2316: ab@2316: spin_unlock_irqrestore (&tp->lock, flags); ab@2316: ab@2316: pci_set_power_state (pdev, PCI_D3hot); ab@2316: ab@2316: return 0; ab@2316: } ab@2316: ab@2316: ab@2316: static int rtl8139_resume (struct pci_dev *pdev) ab@2316: { ab@2316: struct net_device *dev = pci_get_drvdata (pdev); ab@2316: struct rtl8139_private *tp = netdev_priv(dev); ab@2316: ab@2316: pci_restore_state (pdev); ab@2316: if (tp->ecdev || !netif_running (dev)) ab@2316: return 0; ab@2316: pci_set_power_state (pdev, PCI_D0); ab@2316: rtl8139_init_ring (dev); ab@2316: rtl8139_hw_start (dev); ab@2316: netif_device_attach (dev); ab@2316: return 0; ab@2316: } ab@2316: ab@2316: #endif /* CONFIG_PM */ ab@2316: ab@2316: ab@2316: static struct pci_driver rtl8139_pci_driver = { ab@2316: .name = DRV_NAME, ab@2316: .id_table = rtl8139_pci_tbl, ab@2316: .probe = rtl8139_init_one, ab@2316: .remove = __devexit_p(rtl8139_remove_one), ab@2316: #ifdef CONFIG_PM ab@2316: .suspend = rtl8139_suspend, ab@2316: .resume = rtl8139_resume, ab@2316: #endif /* CONFIG_PM */ ab@2316: }; ab@2316: ab@2316: ab@2316: static int __init rtl8139_init_module (void) ab@2316: { ab@2316: /* when we're a module, we always print a version message, ab@2316: * even if no 8139 board is found. ab@2316: */ ab@2316: #ifdef MODULE ab@2316: pr_info(RTL8139_DRIVER_NAME "\n"); ab@2316: #endif ab@2316: ab@2316: return pci_register_driver(&rtl8139_pci_driver); ab@2316: } ab@2316: ab@2316: ab@2316: static void __exit rtl8139_cleanup_module (void) ab@2316: { ab@2316: pci_unregister_driver (&rtl8139_pci_driver); ab@2316: } ab@2316: ab@2316: ab@2316: module_init(rtl8139_init_module); ab@2316: module_exit(rtl8139_cleanup_module);