fp@1744: /******************************************************************************* fp@1744: fp@1744: fp@1744: Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved. fp@1744: fp@1744: This program is free software; you can redistribute it and/or modify it fp@1744: under the terms of the GNU General Public License as published by the Free fp@1744: Software Foundation; either version 2 of the License, or (at your option) fp@1744: any later version. fp@1744: fp@1744: This program is distributed in the hope that it will be useful, but WITHOUT fp@1744: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or fp@1744: FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for fp@1744: more details. fp@1744: fp@1744: You should have received a copy of the GNU General Public License along with fp@1744: this program; if not, write to the Free Software Foundation, Inc., 59 fp@1744: Temple Place - Suite 330, Boston, MA 02111-1307, USA. fp@1744: fp@1744: The full GNU General Public License is included in this distribution in the fp@1744: file called LICENSE. fp@1744: fp@1744: Contact Information: fp@1744: Linux NICS fp@1744: e1000-devel Mailing List fp@1744: Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 fp@1744: fp@1744: *******************************************************************************/ fp@1744: fp@1744: fp@1744: /* glue for the OS independent part of e1000 fp@1744: * includes register access macros fp@1744: */ fp@1744: fp@1744: #ifndef _E1000_OSDEP_H_ fp@1744: #define _E1000_OSDEP_H_ fp@1744: fp@1744: #include fp@1744: #include fp@1744: #include fp@1744: #include fp@1744: #include fp@1744: #include fp@1744: fp@1744: #ifndef msec_delay fp@1744: #define msec_delay(x) do { if(in_interrupt()) { \ fp@1744: /* Don't mdelay in interrupt context! */ \ fp@1744: BUG(); \ fp@1744: } else { \ fp@1744: msleep(x); \ fp@1744: } } while (0) fp@1744: fp@1744: /* Some workarounds require millisecond delays and are run during interrupt fp@1744: * context. Most notably, when establishing link, the phy may need tweaking fp@1744: * but cannot process phy register reads/writes faster than millisecond fp@1744: * intervals...and we establish link due to a "link status change" interrupt. fp@1744: */ fp@1744: #define msec_delay_irq(x) mdelay(x) fp@1744: #endif fp@1744: fp@1744: #define PCI_COMMAND_REGISTER PCI_COMMAND fp@1744: #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE fp@1744: fp@1744: typedef enum { fp@1744: #undef FALSE fp@1744: FALSE = 0, fp@1744: #undef TRUE fp@1744: TRUE = 1 fp@1744: } boolean_t; fp@1744: fp@1744: #define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B) fp@1744: fp@1744: #ifdef DBG fp@1744: #define DEBUGOUT(S) printk(KERN_DEBUG S "\n") fp@1744: #define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A) fp@1744: #else fp@1744: #define DEBUGOUT(S) fp@1744: #define DEBUGOUT1(S, A...) fp@1744: #endif fp@1744: fp@1744: #define DEBUGFUNC(F) DEBUGOUT(F) fp@1744: #define DEBUGOUT2 DEBUGOUT1 fp@1744: #define DEBUGOUT3 DEBUGOUT2 fp@1744: #define DEBUGOUT7 DEBUGOUT3 fp@1744: fp@1744: fp@1744: #define E1000_WRITE_REG(a, reg, value) ( \ fp@1744: writel((value), ((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg)))) fp@1744: fp@1744: #define E1000_READ_REG(a, reg) ( \ fp@1744: readl((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg))) fp@1744: fp@1744: #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \ fp@1744: writel((value), ((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@1744: ((offset) << 2)))) fp@1744: fp@1744: #define E1000_READ_REG_ARRAY(a, reg, offset) ( \ fp@1744: readl((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@1744: ((offset) << 2))) fp@1744: fp@1744: #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY fp@1744: #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY fp@1744: fp@1744: #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \ fp@1744: writew((value), ((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@1744: ((offset) << 1)))) fp@1744: fp@1744: #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \ fp@1744: readw((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@1744: ((offset) << 1))) fp@1744: fp@1744: #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \ fp@1744: writeb((value), ((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@1744: (offset)))) fp@1744: fp@1744: #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \ fp@1744: readb((a)->hw_addr + \ fp@1744: (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ fp@1744: (offset))) fp@1744: fp@1744: #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS) fp@1744: fp@1744: #define E1000_WRITE_ICH8_REG(a, reg, value) ( \ fp@1744: writel((value), ((a)->flash_address + reg))) fp@1744: fp@1744: #define E1000_READ_ICH8_REG(a, reg) ( \ fp@1744: readl((a)->flash_address + reg)) fp@1744: fp@1744: #define E1000_WRITE_ICH8_REG16(a, reg, value) ( \ fp@1744: writew((value), ((a)->flash_address + reg))) fp@1744: fp@1744: #define E1000_READ_ICH8_REG16(a, reg) ( \ fp@1744: readw((a)->flash_address + reg)) fp@1744: fp@1744: fp@1744: #endif /* _E1000_OSDEP_H_ */