fp@2685: /* Intel(R) Gigabit Ethernet Linux driver
fp@2685: * Copyright(c) 2007-2014 Intel Corporation.
fp@2685: *
fp@2685: * This program is free software; you can redistribute it and/or modify it
fp@2685: * under the terms and conditions of the GNU General Public License,
fp@2685: *
fp@2685: * This program is distributed in the hope it will be useful, but WITHOUT
fp@2685: * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
fp@2685: * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
fp@2685: * more details.
fp@2685: *
fp@2685: * You should have received a copy of the GNU General Public License along with
fp@2685: * this program; if not, see .
fp@2685: *
fp@2685: * The full GNU General Public License is included in this distribution in
fp@2685: * the file called "COPYING".
fp@2685: *
fp@2685: * Contact Information:
fp@2685: * e1000-devel Mailing List
fp@2685: * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
fp@2685: */
fp@2685:
fp@2685: #ifndef _E1000_HW_H_
fp@2685: #define _E1000_HW_H_
fp@2685:
fp@2685: #include
fp@2685: #include
fp@2685: #include
fp@2685: #include
fp@2685:
fp@2685: #include "e1000_regs.h"
fp@2685: #include "e1000_defines.h"
fp@2685:
fp@2685: struct e1000_hw;
fp@2685:
fp@2685: #define E1000_DEV_ID_82576 0x10C9
fp@2685: #define E1000_DEV_ID_82576_FIBER 0x10E6
fp@2685: #define E1000_DEV_ID_82576_SERDES 0x10E7
fp@2685: #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
fp@2685: #define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
fp@2685: #define E1000_DEV_ID_82576_NS 0x150A
fp@2685: #define E1000_DEV_ID_82576_NS_SERDES 0x1518
fp@2685: #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
fp@2685: #define E1000_DEV_ID_82575EB_COPPER 0x10A7
fp@2685: #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
fp@2685: #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
fp@2685: #define E1000_DEV_ID_82580_COPPER 0x150E
fp@2685: #define E1000_DEV_ID_82580_FIBER 0x150F
fp@2685: #define E1000_DEV_ID_82580_SERDES 0x1510
fp@2685: #define E1000_DEV_ID_82580_SGMII 0x1511
fp@2685: #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
fp@2685: #define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
fp@2685: #define E1000_DEV_ID_DH89XXCC_SGMII 0x0438
fp@2685: #define E1000_DEV_ID_DH89XXCC_SERDES 0x043A
fp@2685: #define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
fp@2685: #define E1000_DEV_ID_DH89XXCC_SFP 0x0440
fp@2685: #define E1000_DEV_ID_I350_COPPER 0x1521
fp@2685: #define E1000_DEV_ID_I350_FIBER 0x1522
fp@2685: #define E1000_DEV_ID_I350_SERDES 0x1523
fp@2685: #define E1000_DEV_ID_I350_SGMII 0x1524
fp@2685: #define E1000_DEV_ID_I210_COPPER 0x1533
fp@2685: #define E1000_DEV_ID_I210_FIBER 0x1536
fp@2685: #define E1000_DEV_ID_I210_SERDES 0x1537
fp@2685: #define E1000_DEV_ID_I210_SGMII 0x1538
fp@2685: #define E1000_DEV_ID_I210_COPPER_FLASHLESS 0x157B
fp@2685: #define E1000_DEV_ID_I210_SERDES_FLASHLESS 0x157C
fp@2685: #define E1000_DEV_ID_I211_COPPER 0x1539
fp@2685: #define E1000_DEV_ID_I354_BACKPLANE_1GBPS 0x1F40
fp@2685: #define E1000_DEV_ID_I354_SGMII 0x1F41
fp@2685: #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS 0x1F45
fp@2685:
fp@2685: #define E1000_REVISION_2 2
fp@2685: #define E1000_REVISION_4 4
fp@2685:
fp@2685: #define E1000_FUNC_0 0
fp@2685: #define E1000_FUNC_1 1
fp@2685: #define E1000_FUNC_2 2
fp@2685: #define E1000_FUNC_3 3
fp@2685:
fp@2685: #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0
fp@2685: #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3
fp@2685: #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2 6
fp@2685: #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3 9
fp@2685:
fp@2685: enum e1000_mac_type {
fp@2685: e1000_undefined = 0,
fp@2685: e1000_82575,
fp@2685: e1000_82576,
fp@2685: e1000_82580,
fp@2685: e1000_i350,
fp@2685: e1000_i354,
fp@2685: e1000_i210,
fp@2685: e1000_i211,
fp@2685: e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
fp@2685: };
fp@2685:
fp@2685: enum e1000_media_type {
fp@2685: e1000_media_type_unknown = 0,
fp@2685: e1000_media_type_copper = 1,
fp@2685: e1000_media_type_fiber = 2,
fp@2685: e1000_media_type_internal_serdes = 3,
fp@2685: e1000_num_media_types
fp@2685: };
fp@2685:
fp@2685: enum e1000_nvm_type {
fp@2685: e1000_nvm_unknown = 0,
fp@2685: e1000_nvm_none,
fp@2685: e1000_nvm_eeprom_spi,
fp@2685: e1000_nvm_flash_hw,
fp@2685: e1000_nvm_invm,
fp@2685: e1000_nvm_flash_sw
fp@2685: };
fp@2685:
fp@2685: enum e1000_nvm_override {
fp@2685: e1000_nvm_override_none = 0,
fp@2685: e1000_nvm_override_spi_small,
fp@2685: e1000_nvm_override_spi_large,
fp@2685: };
fp@2685:
fp@2685: enum e1000_phy_type {
fp@2685: e1000_phy_unknown = 0,
fp@2685: e1000_phy_none,
fp@2685: e1000_phy_m88,
fp@2685: e1000_phy_igp,
fp@2685: e1000_phy_igp_2,
fp@2685: e1000_phy_gg82563,
fp@2685: e1000_phy_igp_3,
fp@2685: e1000_phy_ife,
fp@2685: e1000_phy_82580,
fp@2685: e1000_phy_i210,
fp@2685: };
fp@2685:
fp@2685: enum e1000_bus_type {
fp@2685: e1000_bus_type_unknown = 0,
fp@2685: e1000_bus_type_pci,
fp@2685: e1000_bus_type_pcix,
fp@2685: e1000_bus_type_pci_express,
fp@2685: e1000_bus_type_reserved
fp@2685: };
fp@2685:
fp@2685: enum e1000_bus_speed {
fp@2685: e1000_bus_speed_unknown = 0,
fp@2685: e1000_bus_speed_33,
fp@2685: e1000_bus_speed_66,
fp@2685: e1000_bus_speed_100,
fp@2685: e1000_bus_speed_120,
fp@2685: e1000_bus_speed_133,
fp@2685: e1000_bus_speed_2500,
fp@2685: e1000_bus_speed_5000,
fp@2685: e1000_bus_speed_reserved
fp@2685: };
fp@2685:
fp@2685: enum e1000_bus_width {
fp@2685: e1000_bus_width_unknown = 0,
fp@2685: e1000_bus_width_pcie_x1,
fp@2685: e1000_bus_width_pcie_x2,
fp@2685: e1000_bus_width_pcie_x4 = 4,
fp@2685: e1000_bus_width_pcie_x8 = 8,
fp@2685: e1000_bus_width_32,
fp@2685: e1000_bus_width_64,
fp@2685: e1000_bus_width_reserved
fp@2685: };
fp@2685:
fp@2685: enum e1000_1000t_rx_status {
fp@2685: e1000_1000t_rx_status_not_ok = 0,
fp@2685: e1000_1000t_rx_status_ok,
fp@2685: e1000_1000t_rx_status_undefined = 0xFF
fp@2685: };
fp@2685:
fp@2685: enum e1000_rev_polarity {
fp@2685: e1000_rev_polarity_normal = 0,
fp@2685: e1000_rev_polarity_reversed,
fp@2685: e1000_rev_polarity_undefined = 0xFF
fp@2685: };
fp@2685:
fp@2685: enum e1000_fc_mode {
fp@2685: e1000_fc_none = 0,
fp@2685: e1000_fc_rx_pause,
fp@2685: e1000_fc_tx_pause,
fp@2685: e1000_fc_full,
fp@2685: e1000_fc_default = 0xFF
fp@2685: };
fp@2685:
fp@2685: /* Statistics counters collected by the MAC */
fp@2685: struct e1000_hw_stats {
fp@2685: u64 crcerrs;
fp@2685: u64 algnerrc;
fp@2685: u64 symerrs;
fp@2685: u64 rxerrc;
fp@2685: u64 mpc;
fp@2685: u64 scc;
fp@2685: u64 ecol;
fp@2685: u64 mcc;
fp@2685: u64 latecol;
fp@2685: u64 colc;
fp@2685: u64 dc;
fp@2685: u64 tncrs;
fp@2685: u64 sec;
fp@2685: u64 cexterr;
fp@2685: u64 rlec;
fp@2685: u64 xonrxc;
fp@2685: u64 xontxc;
fp@2685: u64 xoffrxc;
fp@2685: u64 xofftxc;
fp@2685: u64 fcruc;
fp@2685: u64 prc64;
fp@2685: u64 prc127;
fp@2685: u64 prc255;
fp@2685: u64 prc511;
fp@2685: u64 prc1023;
fp@2685: u64 prc1522;
fp@2685: u64 gprc;
fp@2685: u64 bprc;
fp@2685: u64 mprc;
fp@2685: u64 gptc;
fp@2685: u64 gorc;
fp@2685: u64 gotc;
fp@2685: u64 rnbc;
fp@2685: u64 ruc;
fp@2685: u64 rfc;
fp@2685: u64 roc;
fp@2685: u64 rjc;
fp@2685: u64 mgprc;
fp@2685: u64 mgpdc;
fp@2685: u64 mgptc;
fp@2685: u64 tor;
fp@2685: u64 tot;
fp@2685: u64 tpr;
fp@2685: u64 tpt;
fp@2685: u64 ptc64;
fp@2685: u64 ptc127;
fp@2685: u64 ptc255;
fp@2685: u64 ptc511;
fp@2685: u64 ptc1023;
fp@2685: u64 ptc1522;
fp@2685: u64 mptc;
fp@2685: u64 bptc;
fp@2685: u64 tsctc;
fp@2685: u64 tsctfc;
fp@2685: u64 iac;
fp@2685: u64 icrxptc;
fp@2685: u64 icrxatc;
fp@2685: u64 ictxptc;
fp@2685: u64 ictxatc;
fp@2685: u64 ictxqec;
fp@2685: u64 ictxqmtc;
fp@2685: u64 icrxdmtc;
fp@2685: u64 icrxoc;
fp@2685: u64 cbtmpc;
fp@2685: u64 htdpmc;
fp@2685: u64 cbrdpc;
fp@2685: u64 cbrmpc;
fp@2685: u64 rpthc;
fp@2685: u64 hgptc;
fp@2685: u64 htcbdpc;
fp@2685: u64 hgorc;
fp@2685: u64 hgotc;
fp@2685: u64 lenerrs;
fp@2685: u64 scvpc;
fp@2685: u64 hrmpc;
fp@2685: u64 doosync;
fp@2685: u64 o2bgptc;
fp@2685: u64 o2bspc;
fp@2685: u64 b2ospc;
fp@2685: u64 b2ogprc;
fp@2685: };
fp@2685:
fp@2685: struct e1000_host_mng_dhcp_cookie {
fp@2685: u32 signature;
fp@2685: u8 status;
fp@2685: u8 reserved0;
fp@2685: u16 vlan_id;
fp@2685: u32 reserved1;
fp@2685: u16 reserved2;
fp@2685: u8 reserved3;
fp@2685: u8 checksum;
fp@2685: };
fp@2685:
fp@2685: /* Host Interface "Rev 1" */
fp@2685: struct e1000_host_command_header {
fp@2685: u8 command_id;
fp@2685: u8 command_length;
fp@2685: u8 command_options;
fp@2685: u8 checksum;
fp@2685: };
fp@2685:
fp@2685: #define E1000_HI_MAX_DATA_LENGTH 252
fp@2685: struct e1000_host_command_info {
fp@2685: struct e1000_host_command_header command_header;
fp@2685: u8 command_data[E1000_HI_MAX_DATA_LENGTH];
fp@2685: };
fp@2685:
fp@2685: /* Host Interface "Rev 2" */
fp@2685: struct e1000_host_mng_command_header {
fp@2685: u8 command_id;
fp@2685: u8 checksum;
fp@2685: u16 reserved1;
fp@2685: u16 reserved2;
fp@2685: u16 command_length;
fp@2685: };
fp@2685:
fp@2685: #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
fp@2685: struct e1000_host_mng_command_info {
fp@2685: struct e1000_host_mng_command_header command_header;
fp@2685: u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
fp@2685: };
fp@2685:
fp@2685: #include "e1000_mac.h"
fp@2685: #include "e1000_phy.h"
fp@2685: #include "e1000_nvm.h"
fp@2685: #include "e1000_mbx.h"
fp@2685:
fp@2685: struct e1000_mac_operations {
fp@2685: s32 (*check_for_link)(struct e1000_hw *);
fp@2685: s32 (*reset_hw)(struct e1000_hw *);
fp@2685: s32 (*init_hw)(struct e1000_hw *);
fp@2685: bool (*check_mng_mode)(struct e1000_hw *);
fp@2685: s32 (*setup_physical_interface)(struct e1000_hw *);
fp@2685: void (*rar_set)(struct e1000_hw *, u8 *, u32);
fp@2685: s32 (*read_mac_addr)(struct e1000_hw *);
fp@2685: s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
fp@2685: s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
fp@2685: void (*release_swfw_sync)(struct e1000_hw *, u16);
fp@2685: #ifdef CONFIG_IGB_HWMON
fp@2685: s32 (*get_thermal_sensor_data)(struct e1000_hw *);
fp@2685: s32 (*init_thermal_sensor_thresh)(struct e1000_hw *);
fp@2685: #endif
fp@2685:
fp@2685: };
fp@2685:
fp@2685: struct e1000_phy_operations {
fp@2685: s32 (*acquire)(struct e1000_hw *);
fp@2685: s32 (*check_polarity)(struct e1000_hw *);
fp@2685: s32 (*check_reset_block)(struct e1000_hw *);
fp@2685: s32 (*force_speed_duplex)(struct e1000_hw *);
fp@2685: s32 (*get_cfg_done)(struct e1000_hw *hw);
fp@2685: s32 (*get_cable_length)(struct e1000_hw *);
fp@2685: s32 (*get_phy_info)(struct e1000_hw *);
fp@2685: s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
fp@2685: void (*release)(struct e1000_hw *);
fp@2685: s32 (*reset)(struct e1000_hw *);
fp@2685: s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
fp@2685: s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
fp@2685: s32 (*write_reg)(struct e1000_hw *, u32, u16);
fp@2685: s32 (*read_i2c_byte)(struct e1000_hw *, u8, u8, u8 *);
fp@2685: s32 (*write_i2c_byte)(struct e1000_hw *, u8, u8, u8);
fp@2685: };
fp@2685:
fp@2685: struct e1000_nvm_operations {
fp@2685: s32 (*acquire)(struct e1000_hw *);
fp@2685: s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
fp@2685: void (*release)(struct e1000_hw *);
fp@2685: s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
fp@2685: s32 (*update)(struct e1000_hw *);
fp@2685: s32 (*validate)(struct e1000_hw *);
fp@2685: s32 (*valid_led_default)(struct e1000_hw *, u16 *);
fp@2685: };
fp@2685:
fp@2685: #define E1000_MAX_SENSORS 3
fp@2685:
fp@2685: struct e1000_thermal_diode_data {
fp@2685: u8 location;
fp@2685: u8 temp;
fp@2685: u8 caution_thresh;
fp@2685: u8 max_op_thresh;
fp@2685: };
fp@2685:
fp@2685: struct e1000_thermal_sensor_data {
fp@2685: struct e1000_thermal_diode_data sensor[E1000_MAX_SENSORS];
fp@2685: };
fp@2685:
fp@2685: struct e1000_info {
fp@2685: s32 (*get_invariants)(struct e1000_hw *);
fp@2685: struct e1000_mac_operations *mac_ops;
fp@2685: struct e1000_phy_operations *phy_ops;
fp@2685: struct e1000_nvm_operations *nvm_ops;
fp@2685: };
fp@2685:
fp@2685: extern const struct e1000_info e1000_82575_info;
fp@2685:
fp@2685: struct e1000_mac_info {
fp@2685: struct e1000_mac_operations ops;
fp@2685:
fp@2685: u8 addr[6];
fp@2685: u8 perm_addr[6];
fp@2685:
fp@2685: enum e1000_mac_type type;
fp@2685:
fp@2685: u32 ledctl_default;
fp@2685: u32 ledctl_mode1;
fp@2685: u32 ledctl_mode2;
fp@2685: u32 mc_filter_type;
fp@2685: u32 txcw;
fp@2685:
fp@2685: u16 mta_reg_count;
fp@2685: u16 uta_reg_count;
fp@2685:
fp@2685: /* Maximum size of the MTA register table in all supported adapters */
fp@2685: #define MAX_MTA_REG 128
fp@2685: u32 mta_shadow[MAX_MTA_REG];
fp@2685: u16 rar_entry_count;
fp@2685:
fp@2685: u8 forced_speed_duplex;
fp@2685:
fp@2685: bool adaptive_ifs;
fp@2685: bool arc_subsystem_valid;
fp@2685: bool asf_firmware_present;
fp@2685: bool autoneg;
fp@2685: bool autoneg_failed;
fp@2685: bool disable_hw_init_bits;
fp@2685: bool get_link_status;
fp@2685: bool ifs_params_forced;
fp@2685: bool in_ifs_mode;
fp@2685: bool report_tx_early;
fp@2685: bool serdes_has_link;
fp@2685: bool tx_pkt_filtering;
fp@2685: struct e1000_thermal_sensor_data thermal_sensor_data;
fp@2685: };
fp@2685:
fp@2685: struct e1000_phy_info {
fp@2685: struct e1000_phy_operations ops;
fp@2685:
fp@2685: enum e1000_phy_type type;
fp@2685:
fp@2685: enum e1000_1000t_rx_status local_rx;
fp@2685: enum e1000_1000t_rx_status remote_rx;
fp@2685: enum e1000_ms_type ms_type;
fp@2685: enum e1000_ms_type original_ms_type;
fp@2685: enum e1000_rev_polarity cable_polarity;
fp@2685: enum e1000_smart_speed smart_speed;
fp@2685:
fp@2685: u32 addr;
fp@2685: u32 id;
fp@2685: u32 reset_delay_us; /* in usec */
fp@2685: u32 revision;
fp@2685:
fp@2685: enum e1000_media_type media_type;
fp@2685:
fp@2685: u16 autoneg_advertised;
fp@2685: u16 autoneg_mask;
fp@2685: u16 cable_length;
fp@2685: u16 max_cable_length;
fp@2685: u16 min_cable_length;
fp@2685:
fp@2685: u8 mdix;
fp@2685:
fp@2685: bool disable_polarity_correction;
fp@2685: bool is_mdix;
fp@2685: bool polarity_correction;
fp@2685: bool reset_disable;
fp@2685: bool speed_downgraded;
fp@2685: bool autoneg_wait_to_complete;
fp@2685: };
fp@2685:
fp@2685: struct e1000_nvm_info {
fp@2685: struct e1000_nvm_operations ops;
fp@2685: enum e1000_nvm_type type;
fp@2685: enum e1000_nvm_override override;
fp@2685:
fp@2685: u32 flash_bank_size;
fp@2685: u32 flash_base_addr;
fp@2685:
fp@2685: u16 word_size;
fp@2685: u16 delay_usec;
fp@2685: u16 address_bits;
fp@2685: u16 opcode_bits;
fp@2685: u16 page_size;
fp@2685: };
fp@2685:
fp@2685: struct e1000_bus_info {
fp@2685: enum e1000_bus_type type;
fp@2685: enum e1000_bus_speed speed;
fp@2685: enum e1000_bus_width width;
fp@2685:
fp@2685: u32 snoop;
fp@2685:
fp@2685: u16 func;
fp@2685: u16 pci_cmd_word;
fp@2685: };
fp@2685:
fp@2685: struct e1000_fc_info {
fp@2685: u32 high_water; /* Flow control high-water mark */
fp@2685: u32 low_water; /* Flow control low-water mark */
fp@2685: u16 pause_time; /* Flow control pause timer */
fp@2685: bool send_xon; /* Flow control send XON */
fp@2685: bool strict_ieee; /* Strict IEEE mode */
fp@2685: enum e1000_fc_mode current_mode; /* Type of flow control */
fp@2685: enum e1000_fc_mode requested_mode;
fp@2685: };
fp@2685:
fp@2685: struct e1000_mbx_operations {
fp@2685: s32 (*init_params)(struct e1000_hw *hw);
fp@2685: s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
fp@2685: s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
fp@2685: s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
fp@2685: s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
fp@2685: s32 (*check_for_msg)(struct e1000_hw *, u16);
fp@2685: s32 (*check_for_ack)(struct e1000_hw *, u16);
fp@2685: s32 (*check_for_rst)(struct e1000_hw *, u16);
fp@2685: };
fp@2685:
fp@2685: struct e1000_mbx_stats {
fp@2685: u32 msgs_tx;
fp@2685: u32 msgs_rx;
fp@2685:
fp@2685: u32 acks;
fp@2685: u32 reqs;
fp@2685: u32 rsts;
fp@2685: };
fp@2685:
fp@2685: struct e1000_mbx_info {
fp@2685: struct e1000_mbx_operations ops;
fp@2685: struct e1000_mbx_stats stats;
fp@2685: u32 timeout;
fp@2685: u32 usec_delay;
fp@2685: u16 size;
fp@2685: };
fp@2685:
fp@2685: struct e1000_dev_spec_82575 {
fp@2685: bool sgmii_active;
fp@2685: bool global_device_reset;
fp@2685: bool eee_disable;
fp@2685: bool clear_semaphore_once;
fp@2685: struct e1000_sfp_flags eth_flags;
fp@2685: bool module_plugged;
fp@2685: u8 media_port;
fp@2685: bool media_changed;
fp@2685: bool mas_capable;
fp@2685: };
fp@2685:
fp@2685: struct e1000_hw {
fp@2685: void *back;
fp@2685:
fp@2685: u8 __iomem *hw_addr;
fp@2685: u8 __iomem *flash_address;
fp@2685: unsigned long io_base;
fp@2685:
fp@2685: struct e1000_mac_info mac;
fp@2685: struct e1000_fc_info fc;
fp@2685: struct e1000_phy_info phy;
fp@2685: struct e1000_nvm_info nvm;
fp@2685: struct e1000_bus_info bus;
fp@2685: struct e1000_mbx_info mbx;
fp@2685: struct e1000_host_mng_dhcp_cookie mng_cookie;
fp@2685:
fp@2685: union {
fp@2685: struct e1000_dev_spec_82575 _82575;
fp@2685: } dev_spec;
fp@2685:
fp@2685: u16 device_id;
fp@2685: u16 subsystem_vendor_id;
fp@2685: u16 subsystem_device_id;
fp@2685: u16 vendor_id;
fp@2685:
fp@2685: u8 revision_id;
fp@2685: };
fp@2685:
fp@2685: struct net_device *igb_get_hw_dev(struct e1000_hw *hw);
fp@2685: #define hw_dbg(format, arg...) \
fp@2685: netdev_dbg(igb_get_hw_dev(hw), format, ##arg)
fp@2685:
fp@2685: /* These functions must be implemented by drivers */
fp@2685: s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
fp@2685: s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
fp@2685:
fp@2685: void igb_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);
fp@2685: void igb_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);
fp@2685: #endif /* _E1000_HW_H_ */