fp@1619: /****************************************************************************** fp@1619: * fp@1619: * $Id$ fp@1619: * fp@1619: * Copyright (C) 2006 Florian Pose, Ingenieurgemeinschaft IgH fp@1619: * fp@1619: * This file is part of the IgH EtherCAT Master. fp@1619: * fp@1619: * The IgH EtherCAT Master is free software; you can redistribute it fp@1619: * and/or modify it under the terms of the GNU General Public License fp@1619: * as published by the Free Software Foundation; either version 2 of the fp@1619: * License, or (at your option) any later version. fp@1619: * fp@1619: * The IgH EtherCAT Master is distributed in the hope that it will be fp@1619: * useful, but WITHOUT ANY WARRANTY; without even the implied warranty of fp@1619: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the fp@1619: * GNU General Public License for more details. fp@1619: * fp@1619: * You should have received a copy of the GNU General Public License fp@1619: * along with the IgH EtherCAT Master; if not, write to the Free Software fp@1619: * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA fp@1619: * fp@1619: * The right to use EtherCAT Technology is granted and comes free of fp@1619: * charge under condition of compatibility of product made by fp@1619: * Licensee. People intending to distribute/sell products based on the fp@1619: * code, have to sign an agreement to guarantee that products using fp@1619: * software based on IgH EtherCAT master stay compatible with the actual fp@1619: * EtherCAT specification (which are released themselves as an open fp@1619: * standard) as the (only) precondition to have the right to use EtherCAT fp@1619: * Technology, IP and trade marks. fp@1619: * fp@1619: *****************************************************************************/ fp@1619: fp@1619: /** fp@1619: \file fp@1619: EtherCAT finite state machines. fp@1619: */ fp@1619: fp@1619: /*****************************************************************************/ fp@1619: fp@1619: #ifndef __EC_STATES__ fp@1619: #define __EC_STATES__ fp@1619: fp@1619: #include "../include/ecrt.h" fp@1624: #include "datagram.h" fp@1619: #include "slave.h" fp@1619: fp@1619: /*****************************************************************************/ fp@1619: fp@1623: typedef struct ec_fsm ec_fsm_t; /**< \see ec_fsm */ fp@1619: fp@1619: /** fp@1619: Finite state machine of an EtherCAT master. fp@1619: */ fp@1619: fp@1619: struct ec_fsm fp@1619: { fp@1619: ec_master_t *master; /**< master the FSM runs on */ fp@1619: ec_slave_t *slave; /**< slave the FSM runs on */ fp@1624: ec_datagram_t datagram; /**< datagram used in the state machine */ fp@1619: fp@1619: void (*master_state)(ec_fsm_t *); /**< master state function */ fp@1619: unsigned int master_slaves_responding; /**< number of responding slaves */ fp@1619: ec_slave_state_t master_slave_states; /**< states of responding slaves */ fp@1619: unsigned int master_validation; /**< non-zero, if validation to do */ fp@1619: fp@1619: void (*slave_state)(ec_fsm_t *); /**< slave state function */ fp@1619: fp@1619: void (*sii_state)(ec_fsm_t *); /**< SII state function */ fp@1619: uint16_t sii_offset; /**< input: offset in SII */ fp@1619: unsigned int sii_mode; /**< SII reading done by APRD (0) or NPRD (1) */ fp@1621: uint8_t sii_value[4]; /**< raw SII value (32bit) */ fp@1619: cycles_t sii_start; /**< sii start */ fp@1619: fp@1619: void (*change_state)(ec_fsm_t *); /**< slave state change state function */ fp@1619: uint8_t change_new; /**< input: new state */ fp@1619: cycles_t change_start; /**< change start */ fp@1619: }; fp@1619: fp@1619: /*****************************************************************************/ fp@1619: fp@1619: int ec_fsm_init(ec_fsm_t *, ec_master_t *); fp@1619: void ec_fsm_clear(ec_fsm_t *); fp@1619: void ec_fsm_reset(ec_fsm_t *); fp@1619: void ec_fsm_execute(ec_fsm_t *); fp@1619: fp@1619: /*****************************************************************************/ fp@1619: fp@1619: #endif