fp@792: /******************************************************************************
fp@792:  *
fp@792:  *  $Id$
fp@792:  *
fp@792:  *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH
fp@792:  *
fp@792:  *  This file is part of the IgH EtherCAT Master.
fp@792:  *
fp@792:  *  The IgH EtherCAT Master is free software; you can redistribute it
fp@792:  *  and/or modify it under the terms of the GNU General Public License
fp@792:  *  as published by the Free Software Foundation; either version 2 of the
fp@792:  *  License, or (at your option) any later version.
fp@792:  *
fp@792:  *  The IgH EtherCAT Master is distributed in the hope that it will be
fp@792:  *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
fp@792:  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
fp@792:  *  GNU General Public License for more details.
fp@792:  *
fp@792:  *  You should have received a copy of the GNU General Public License
fp@792:  *  along with the IgH EtherCAT Master; if not, write to the Free Software
fp@792:  *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
fp@792:  *
fp@792:  *  The right to use EtherCAT Technology is granted and comes free of
fp@792:  *  charge under condition of compatibility of product made by
fp@792:  *  Licensee. People intending to distribute/sell products based on the
fp@792:  *  code, have to sign an agreement to guarantee that products using
fp@792:  *  software based on IgH EtherCAT master stay compatible with the actual
fp@792:  *  EtherCAT specification (which are released themselves as an open
fp@792:  *  standard) as the (only) precondition to have the right to use EtherCAT
fp@792:  *  Technology, IP and trade marks.
fp@792:  *
fp@792:  *****************************************************************************/
fp@792: 
fp@792: /** \file
fp@792:  * EtherCAT FMMU configuration methods.
fp@792:  */
fp@792: 
fp@792: /*****************************************************************************/
fp@792: 
fp@792: #include "globals.h"
fp@792: #include "slave_config.h"
fp@792: #include "master.h"
fp@792: 
fp@792: #include "fmmu_config.h"
fp@792: 
fp@792: /*****************************************************************************/
fp@792: 
fp@792: /** FMMU configuration constructor.
fp@792:  *
fp@792:  * Inits an FMMU configuration, sets the logical start address and adds the
fp@792:  * process data size for the mapped PDOs of the given direction to the domain
fp@792:  * data size.
fp@792:  */
fp@792: void ec_fmmu_config_init(
fp@792:         ec_fmmu_config_t *fmmu, /**< EtherCAT FMMU configuration. */
fp@792:         ec_slave_config_t *sc, /**< EtherCAT slave configuration. */
fp@792:         ec_domain_t *domain, /**< EtherCAT domain. */
fp@792:         ec_direction_t dir /**< PDO direction. */
fp@792:         )
fp@792: {
fp@792:     fmmu->sc = sc;
fp@792:     fmmu->domain = domain;
fp@792:     fmmu->dir = dir;
fp@792: 
fp@792:     fmmu->logical_start_address = domain->data_size;
fp@792:     fmmu->data_size = ec_pdo_mapping_total_size(&sc->mapping[dir]);
fp@792:     domain->data_size += fmmu->data_size;
fp@792: }
fp@792: 
fp@792: /*****************************************************************************/
fp@792: 
fp@792: /** Initializes an FMMU configuration page.
fp@792:  *
fp@792:  * The referenced memory (\a data) must be at least EC_FMMU_PAGE_SIZE bytes.
fp@792:  */
fp@792: void ec_fmmu_config_page(
fp@792:         const ec_fmmu_config_t *fmmu, /**< EtherCAT FMMU configuration. */
fp@792:         const ec_sync_t *sync, /**< Sync manager. */
fp@792:         uint8_t *data /**> Configuration page memory. */
fp@792:         )
fp@792: {
fp@792:     if (fmmu->sc->master->debug_level) {
fp@792:         EC_DBG("FMMU: LogAddr 0x%08X, Size %3i, PhysAddr 0x%04X, Dir %s\n",
fp@792:                fmmu->logical_start_address, fmmu->data_size,
fp@792:                sync->physical_start_address,
fp@792:                (sync->control_register & 0x04) ? "out" : "in");
fp@792:     }
fp@792: 
fp@792:     EC_WRITE_U32(data,      fmmu->logical_start_address);
fp@792:     EC_WRITE_U16(data + 4,  fmmu->data_size); // size of fmmu
fp@792:     EC_WRITE_U8 (data + 6,  0x00); // logical start bit
fp@792:     EC_WRITE_U8 (data + 7,  0x07); // logical end bit
fp@792:     EC_WRITE_U16(data + 8,  sync->physical_start_address);
fp@792:     EC_WRITE_U8 (data + 10, 0x00); // physical start bit
fp@792:     EC_WRITE_U8 (data + 11, (sync->control_register & 0x04) ? 0x02 : 0x01);
fp@792:     EC_WRITE_U16(data + 12, 0x0001); // enable
fp@792:     EC_WRITE_U16(data + 14, 0x0000); // reserved
fp@792: }
fp@792: 
fp@792: /*****************************************************************************/