fp@2546: /******************************************************************************* fp@2546: fp@2546: Intel PRO/1000 Linux driver fp@2546: Copyright(c) 1999 - 2012 Intel Corporation. fp@2546: fp@2546: This program is free software; you can redistribute it and/or modify it fp@2546: under the terms and conditions of the GNU General Public License, fp@2546: version 2, as published by the Free Software Foundation. fp@2546: fp@2546: This program is distributed in the hope it will be useful, but WITHOUT fp@2546: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or fp@2546: FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for fp@2546: more details. fp@2546: fp@2546: You should have received a copy of the GNU General Public License along with fp@2546: this program; if not, write to the Free Software Foundation, Inc., fp@2546: 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. fp@2546: fp@2546: The full GNU General Public License is included in this distribution in fp@2546: the file called "COPYING". fp@2546: fp@2546: Contact Information: fp@2546: Linux NICS fp@2546: e1000-devel Mailing List fp@2546: Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 fp@2546: fp@2546: *******************************************************************************/ fp@2546: fp@2546: #include "e1000-3.6-ethercat.h" fp@2546: fp@2546: /** fp@2546: * e1000e_get_bus_info_pcie - Get PCIe bus information fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Determines and stores the system bus information for a particular fp@2546: * network interface. The following bus information is determined and stored: fp@2546: * bus speed, bus width, type (PCIe), and PCIe function. fp@2546: **/ fp@2546: s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: struct e1000_bus_info *bus = &hw->bus; fp@2546: struct e1000_adapter *adapter = hw->adapter; fp@2546: u16 pcie_link_status, cap_offset; fp@2546: fp@2546: cap_offset = adapter->pdev->pcie_cap; fp@2546: if (!cap_offset) { fp@2546: bus->width = e1000_bus_width_unknown; fp@2546: } else { fp@2546: pci_read_config_word(adapter->pdev, fp@2546: cap_offset + PCIE_LINK_STATUS, fp@2546: &pcie_link_status); fp@2546: bus->width = (enum e1000_bus_width)((pcie_link_status & fp@2546: PCIE_LINK_WIDTH_MASK) >> fp@2546: PCIE_LINK_WIDTH_SHIFT); fp@2546: } fp@2546: fp@2546: mac->ops.set_lan_id(hw); fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices fp@2546: * fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Determines the LAN function id by reading memory-mapped registers fp@2546: * and swaps the port value if requested. fp@2546: **/ fp@2546: void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_bus_info *bus = &hw->bus; fp@2546: u32 reg; fp@2546: fp@2546: /* fp@2546: * The status register reports the correct function number fp@2546: * for the device regardless of function swap state. fp@2546: */ fp@2546: reg = er32(STATUS); fp@2546: bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_set_lan_id_single_port - Set LAN id for a single port device fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Sets the LAN function id to zero for a single port device. fp@2546: **/ fp@2546: void e1000_set_lan_id_single_port(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_bus_info *bus = &hw->bus; fp@2546: fp@2546: bus->func = 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_clear_vfta_generic - Clear VLAN filter table fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Clears the register array which contains the VLAN filter table by fp@2546: * setting all the values to 0. fp@2546: **/ fp@2546: void e1000_clear_vfta_generic(struct e1000_hw *hw) fp@2546: { fp@2546: u32 offset; fp@2546: fp@2546: for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) { fp@2546: E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0); fp@2546: e1e_flush(); fp@2546: } fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_write_vfta_generic - Write value to VLAN filter table fp@2546: * @hw: pointer to the HW structure fp@2546: * @offset: register offset in VLAN filter table fp@2546: * @value: register value written to VLAN filter table fp@2546: * fp@2546: * Writes value at the given offset in the register array which stores fp@2546: * the VLAN filter table. fp@2546: **/ fp@2546: void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value) fp@2546: { fp@2546: E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value); fp@2546: e1e_flush(); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_init_rx_addrs - Initialize receive address's fp@2546: * @hw: pointer to the HW structure fp@2546: * @rar_count: receive address registers fp@2546: * fp@2546: * Setup the receive address registers by setting the base receive address fp@2546: * register to the devices MAC address and clearing all the other receive fp@2546: * address registers to 0. fp@2546: **/ fp@2546: void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count) fp@2546: { fp@2546: u32 i; fp@2546: u8 mac_addr[ETH_ALEN] = { 0 }; fp@2546: fp@2546: /* Setup the receive address */ fp@2546: e_dbg("Programming MAC Address into RAR[0]\n"); fp@2546: fp@2546: hw->mac.ops.rar_set(hw, hw->mac.addr, 0); fp@2546: fp@2546: /* Zero out the other (rar_entry_count - 1) receive addresses */ fp@2546: e_dbg("Clearing RAR[1-%u]\n", rar_count - 1); fp@2546: for (i = 1; i < rar_count; i++) fp@2546: hw->mac.ops.rar_set(hw, mac_addr, i); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_check_alt_mac_addr_generic - Check for alternate MAC addr fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Checks the nvm for an alternate MAC address. An alternate MAC address fp@2546: * can be setup by pre-boot software and must be treated like a permanent fp@2546: * address and must override the actual permanent MAC address. If an fp@2546: * alternate MAC address is found it is programmed into RAR0, replacing fp@2546: * the permanent address that was installed into RAR0 by the Si on reset. fp@2546: * This function will return SUCCESS unless it encounters an error while fp@2546: * reading the EEPROM. fp@2546: **/ fp@2546: s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) fp@2546: { fp@2546: u32 i; fp@2546: s32 ret_val = 0; fp@2546: u16 offset, nvm_alt_mac_addr_offset, nvm_data; fp@2546: u8 alt_mac_addr[ETH_ALEN]; fp@2546: fp@2546: ret_val = e1000_read_nvm(hw, NVM_COMPAT, 1, &nvm_data); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: fp@2546: /* not supported on 82573 */ fp@2546: if (hw->mac.type == e1000_82573) fp@2546: return 0; fp@2546: fp@2546: ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1, fp@2546: &nvm_alt_mac_addr_offset); fp@2546: if (ret_val) { fp@2546: e_dbg("NVM Read Error\n"); fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: if ((nvm_alt_mac_addr_offset == 0xFFFF) || fp@2546: (nvm_alt_mac_addr_offset == 0x0000)) fp@2546: /* There is no Alternate MAC Address */ fp@2546: return 0; fp@2546: fp@2546: if (hw->bus.func == E1000_FUNC_1) fp@2546: nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1; fp@2546: for (i = 0; i < ETH_ALEN; i += 2) { fp@2546: offset = nvm_alt_mac_addr_offset + (i >> 1); fp@2546: ret_val = e1000_read_nvm(hw, offset, 1, &nvm_data); fp@2546: if (ret_val) { fp@2546: e_dbg("NVM Read Error\n"); fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: alt_mac_addr[i] = (u8)(nvm_data & 0xFF); fp@2546: alt_mac_addr[i + 1] = (u8)(nvm_data >> 8); fp@2546: } fp@2546: fp@2546: /* if multicast bit is set, the alternate address will not be used */ fp@2546: if (is_multicast_ether_addr(alt_mac_addr)) { fp@2546: e_dbg("Ignoring Alternate Mac Address with MC bit set\n"); fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /* fp@2546: * We have a valid alternate MAC address, and we want to treat it the fp@2546: * same as the normal permanent MAC address stored by the HW into the fp@2546: * RAR. Do this by mapping this address into RAR0. fp@2546: */ fp@2546: hw->mac.ops.rar_set(hw, alt_mac_addr, 0); fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_rar_set_generic - Set receive address register fp@2546: * @hw: pointer to the HW structure fp@2546: * @addr: pointer to the receive address fp@2546: * @index: receive address array register fp@2546: * fp@2546: * Sets the receive address array register at index to the address passed fp@2546: * in by addr. fp@2546: **/ fp@2546: void e1000e_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index) fp@2546: { fp@2546: u32 rar_low, rar_high; fp@2546: fp@2546: /* fp@2546: * HW expects these in little endian so we reverse the byte order fp@2546: * from network order (big endian) to little endian fp@2546: */ fp@2546: rar_low = ((u32)addr[0] | ((u32)addr[1] << 8) | fp@2546: ((u32)addr[2] << 16) | ((u32)addr[3] << 24)); fp@2546: fp@2546: rar_high = ((u32)addr[4] | ((u32)addr[5] << 8)); fp@2546: fp@2546: /* If MAC address zero, no need to set the AV bit */ fp@2546: if (rar_low || rar_high) fp@2546: rar_high |= E1000_RAH_AV; fp@2546: fp@2546: /* fp@2546: * Some bridges will combine consecutive 32-bit writes into fp@2546: * a single burst write, which will malfunction on some parts. fp@2546: * The flushes avoid this. fp@2546: */ fp@2546: ew32(RAL(index), rar_low); fp@2546: e1e_flush(); fp@2546: ew32(RAH(index), rar_high); fp@2546: e1e_flush(); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_hash_mc_addr - Generate a multicast hash value fp@2546: * @hw: pointer to the HW structure fp@2546: * @mc_addr: pointer to a multicast address fp@2546: * fp@2546: * Generates a multicast address hash value which is used to determine fp@2546: * the multicast filter table array address and new table value. fp@2546: **/ fp@2546: static u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr) fp@2546: { fp@2546: u32 hash_value, hash_mask; fp@2546: u8 bit_shift = 0; fp@2546: fp@2546: /* Register count multiplied by bits per register */ fp@2546: hash_mask = (hw->mac.mta_reg_count * 32) - 1; fp@2546: fp@2546: /* fp@2546: * For a mc_filter_type of 0, bit_shift is the number of left-shifts fp@2546: * where 0xFF would still fall within the hash mask. fp@2546: */ fp@2546: while (hash_mask >> bit_shift != 0xFF) fp@2546: bit_shift++; fp@2546: fp@2546: /* fp@2546: * The portion of the address that is used for the hash table fp@2546: * is determined by the mc_filter_type setting. fp@2546: * The algorithm is such that there is a total of 8 bits of shifting. fp@2546: * The bit_shift for a mc_filter_type of 0 represents the number of fp@2546: * left-shifts where the MSB of mc_addr[5] would still fall within fp@2546: * the hash_mask. Case 0 does this exactly. Since there are a total fp@2546: * of 8 bits of shifting, then mc_addr[4] will shift right the fp@2546: * remaining number of bits. Thus 8 - bit_shift. The rest of the fp@2546: * cases are a variation of this algorithm...essentially raising the fp@2546: * number of bits to shift mc_addr[5] left, while still keeping the fp@2546: * 8-bit shifting total. fp@2546: * fp@2546: * For example, given the following Destination MAC Address and an fp@2546: * mta register count of 128 (thus a 4096-bit vector and 0xFFF mask), fp@2546: * we can see that the bit_shift for case 0 is 4. These are the hash fp@2546: * values resulting from each mc_filter_type... fp@2546: * [0] [1] [2] [3] [4] [5] fp@2546: * 01 AA 00 12 34 56 fp@2546: * LSB MSB fp@2546: * fp@2546: * case 0: hash_value = ((0x34 >> 4) | (0x56 << 4)) & 0xFFF = 0x563 fp@2546: * case 1: hash_value = ((0x34 >> 3) | (0x56 << 5)) & 0xFFF = 0xAC6 fp@2546: * case 2: hash_value = ((0x34 >> 2) | (0x56 << 6)) & 0xFFF = 0x163 fp@2546: * case 3: hash_value = ((0x34 >> 0) | (0x56 << 8)) & 0xFFF = 0x634 fp@2546: */ fp@2546: switch (hw->mac.mc_filter_type) { fp@2546: default: fp@2546: case 0: fp@2546: break; fp@2546: case 1: fp@2546: bit_shift += 1; fp@2546: break; fp@2546: case 2: fp@2546: bit_shift += 2; fp@2546: break; fp@2546: case 3: fp@2546: bit_shift += 4; fp@2546: break; fp@2546: } fp@2546: fp@2546: hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) | fp@2546: (((u16)mc_addr[5]) << bit_shift))); fp@2546: fp@2546: return hash_value; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_update_mc_addr_list_generic - Update Multicast addresses fp@2546: * @hw: pointer to the HW structure fp@2546: * @mc_addr_list: array of multicast addresses to program fp@2546: * @mc_addr_count: number of multicast addresses to program fp@2546: * fp@2546: * Updates entire Multicast Table Array. fp@2546: * The caller must have a packed mc_addr_list of multicast addresses. fp@2546: **/ fp@2546: void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw, fp@2546: u8 *mc_addr_list, u32 mc_addr_count) fp@2546: { fp@2546: u32 hash_value, hash_bit, hash_reg; fp@2546: int i; fp@2546: fp@2546: /* clear mta_shadow */ fp@2546: memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow)); fp@2546: fp@2546: /* update mta_shadow from mc_addr_list */ fp@2546: for (i = 0; (u32)i < mc_addr_count; i++) { fp@2546: hash_value = e1000_hash_mc_addr(hw, mc_addr_list); fp@2546: fp@2546: hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1); fp@2546: hash_bit = hash_value & 0x1F; fp@2546: fp@2546: hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit); fp@2546: mc_addr_list += (ETH_ALEN); fp@2546: } fp@2546: fp@2546: /* replace the entire MTA table */ fp@2546: for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) fp@2546: E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]); fp@2546: e1e_flush(); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_clear_hw_cntrs_base - Clear base hardware counters fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Clears the base hardware counters by reading the counter registers. fp@2546: **/ fp@2546: void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw) fp@2546: { fp@2546: er32(CRCERRS); fp@2546: er32(SYMERRS); fp@2546: er32(MPC); fp@2546: er32(SCC); fp@2546: er32(ECOL); fp@2546: er32(MCC); fp@2546: er32(LATECOL); fp@2546: er32(COLC); fp@2546: er32(DC); fp@2546: er32(SEC); fp@2546: er32(RLEC); fp@2546: er32(XONRXC); fp@2546: er32(XONTXC); fp@2546: er32(XOFFRXC); fp@2546: er32(XOFFTXC); fp@2546: er32(FCRUC); fp@2546: er32(GPRC); fp@2546: er32(BPRC); fp@2546: er32(MPRC); fp@2546: er32(GPTC); fp@2546: er32(GORCL); fp@2546: er32(GORCH); fp@2546: er32(GOTCL); fp@2546: er32(GOTCH); fp@2546: er32(RNBC); fp@2546: er32(RUC); fp@2546: er32(RFC); fp@2546: er32(ROC); fp@2546: er32(RJC); fp@2546: er32(TORL); fp@2546: er32(TORH); fp@2546: er32(TOTL); fp@2546: er32(TOTH); fp@2546: er32(TPR); fp@2546: er32(TPT); fp@2546: er32(MPTC); fp@2546: er32(BPTC); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_check_for_copper_link - Check for link (Copper) fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Checks to see of the link status of the hardware has changed. If a fp@2546: * change in link status has been detected, then we read the PHY registers fp@2546: * to get the current speed/duplex if link exists. fp@2546: **/ fp@2546: s32 e1000e_check_for_copper_link(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: s32 ret_val; fp@2546: bool link; fp@2546: fp@2546: /* fp@2546: * We only want to go out to the PHY registers to see if Auto-Neg fp@2546: * has completed and/or if our link status has changed. The fp@2546: * get_link_status flag is set upon receiving a Link Status fp@2546: * Change or Rx Sequence Error interrupt. fp@2546: */ fp@2546: if (!mac->get_link_status) fp@2546: return 0; fp@2546: fp@2546: /* fp@2546: * First we want to see if the MII Status Register reports fp@2546: * link. If so, then we want to get the current speed/duplex fp@2546: * of the PHY. fp@2546: */ fp@2546: ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: fp@2546: if (!link) fp@2546: return 0; /* No link detected */ fp@2546: fp@2546: mac->get_link_status = false; fp@2546: fp@2546: /* fp@2546: * Check if there was DownShift, must be checked fp@2546: * immediately after link-up fp@2546: */ fp@2546: e1000e_check_downshift(hw); fp@2546: fp@2546: /* fp@2546: * If we are forcing speed/duplex, then we simply return since fp@2546: * we have already determined whether we have link or not. fp@2546: */ fp@2546: if (!mac->autoneg) fp@2546: return -E1000_ERR_CONFIG; fp@2546: fp@2546: /* fp@2546: * Auto-Neg is enabled. Auto Speed Detection takes care fp@2546: * of MAC speed/duplex configuration. So we only need to fp@2546: * configure Collision Distance in the MAC. fp@2546: */ fp@2546: mac->ops.config_collision_dist(hw); fp@2546: fp@2546: /* fp@2546: * Configure Flow Control now that Auto-Neg has completed. fp@2546: * First, we need to restore the desired flow control fp@2546: * settings because we may have had to re-autoneg with a fp@2546: * different link partner. fp@2546: */ fp@2546: ret_val = e1000e_config_fc_after_link_up(hw); fp@2546: if (ret_val) fp@2546: e_dbg("Error configuring flow control\n"); fp@2546: fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_check_for_fiber_link - Check for link (Fiber) fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Checks for link up on the hardware. If link is not up and we have fp@2546: * a signal, then we need to force link up. fp@2546: **/ fp@2546: s32 e1000e_check_for_fiber_link(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: u32 rxcw; fp@2546: u32 ctrl; fp@2546: u32 status; fp@2546: s32 ret_val; fp@2546: fp@2546: ctrl = er32(CTRL); fp@2546: status = er32(STATUS); fp@2546: rxcw = er32(RXCW); fp@2546: fp@2546: /* fp@2546: * If we don't have link (auto-negotiation failed or link partner fp@2546: * cannot auto-negotiate), the cable is plugged in (we have signal), fp@2546: * and our link partner is not trying to auto-negotiate with us (we fp@2546: * are receiving idles or data), we need to force link up. We also fp@2546: * need to give auto-negotiation time to complete, in case the cable fp@2546: * was just plugged in. The autoneg_failed flag does this. fp@2546: */ fp@2546: /* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */ fp@2546: if ((ctrl & E1000_CTRL_SWDPIN1) && !(status & E1000_STATUS_LU) && fp@2546: !(rxcw & E1000_RXCW_C)) { fp@2546: if (!mac->autoneg_failed) { fp@2546: mac->autoneg_failed = true; fp@2546: return 0; fp@2546: } fp@2546: e_dbg("NOT Rx'ing /C/, disable AutoNeg and force link.\n"); fp@2546: fp@2546: /* Disable auto-negotiation in the TXCW register */ fp@2546: ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE)); fp@2546: fp@2546: /* Force link-up and also force full-duplex. */ fp@2546: ctrl = er32(CTRL); fp@2546: ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD); fp@2546: ew32(CTRL, ctrl); fp@2546: fp@2546: /* Configure Flow Control after forcing link up. */ fp@2546: ret_val = e1000e_config_fc_after_link_up(hw); fp@2546: if (ret_val) { fp@2546: e_dbg("Error configuring flow control\n"); fp@2546: return ret_val; fp@2546: } fp@2546: } else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { fp@2546: /* fp@2546: * If we are forcing link and we are receiving /C/ ordered fp@2546: * sets, re-enable auto-negotiation in the TXCW register fp@2546: * and disable forced link in the Device Control register fp@2546: * in an attempt to auto-negotiate with our link partner. fp@2546: */ fp@2546: e_dbg("Rx'ing /C/, enable AutoNeg and stop forcing link.\n"); fp@2546: ew32(TXCW, mac->txcw); fp@2546: ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); fp@2546: fp@2546: mac->serdes_has_link = true; fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_check_for_serdes_link - Check for link (Serdes) fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Checks for link up on the hardware. If link is not up and we have fp@2546: * a signal, then we need to force link up. fp@2546: **/ fp@2546: s32 e1000e_check_for_serdes_link(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: u32 rxcw; fp@2546: u32 ctrl; fp@2546: u32 status; fp@2546: s32 ret_val; fp@2546: fp@2546: ctrl = er32(CTRL); fp@2546: status = er32(STATUS); fp@2546: rxcw = er32(RXCW); fp@2546: fp@2546: /* fp@2546: * If we don't have link (auto-negotiation failed or link partner fp@2546: * cannot auto-negotiate), and our link partner is not trying to fp@2546: * auto-negotiate with us (we are receiving idles or data), fp@2546: * we need to force link up. We also need to give auto-negotiation fp@2546: * time to complete. fp@2546: */ fp@2546: /* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */ fp@2546: if (!(status & E1000_STATUS_LU) && !(rxcw & E1000_RXCW_C)) { fp@2546: if (!mac->autoneg_failed) { fp@2546: mac->autoneg_failed = true; fp@2546: return 0; fp@2546: } fp@2546: e_dbg("NOT Rx'ing /C/, disable AutoNeg and force link.\n"); fp@2546: fp@2546: /* Disable auto-negotiation in the TXCW register */ fp@2546: ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE)); fp@2546: fp@2546: /* Force link-up and also force full-duplex. */ fp@2546: ctrl = er32(CTRL); fp@2546: ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD); fp@2546: ew32(CTRL, ctrl); fp@2546: fp@2546: /* Configure Flow Control after forcing link up. */ fp@2546: ret_val = e1000e_config_fc_after_link_up(hw); fp@2546: if (ret_val) { fp@2546: e_dbg("Error configuring flow control\n"); fp@2546: return ret_val; fp@2546: } fp@2546: } else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { fp@2546: /* fp@2546: * If we are forcing link and we are receiving /C/ ordered fp@2546: * sets, re-enable auto-negotiation in the TXCW register fp@2546: * and disable forced link in the Device Control register fp@2546: * in an attempt to auto-negotiate with our link partner. fp@2546: */ fp@2546: e_dbg("Rx'ing /C/, enable AutoNeg and stop forcing link.\n"); fp@2546: ew32(TXCW, mac->txcw); fp@2546: ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); fp@2546: fp@2546: mac->serdes_has_link = true; fp@2546: } else if (!(E1000_TXCW_ANE & er32(TXCW))) { fp@2546: /* fp@2546: * If we force link for non-auto-negotiation switch, check fp@2546: * link status based on MAC synchronization for internal fp@2546: * serdes media type. fp@2546: */ fp@2546: /* SYNCH bit and IV bit are sticky. */ fp@2546: udelay(10); fp@2546: rxcw = er32(RXCW); fp@2546: if (rxcw & E1000_RXCW_SYNCH) { fp@2546: if (!(rxcw & E1000_RXCW_IV)) { fp@2546: mac->serdes_has_link = true; fp@2546: e_dbg("SERDES: Link up - forced.\n"); fp@2546: } fp@2546: } else { fp@2546: mac->serdes_has_link = false; fp@2546: e_dbg("SERDES: Link down - force failed.\n"); fp@2546: } fp@2546: } fp@2546: fp@2546: if (E1000_TXCW_ANE & er32(TXCW)) { fp@2546: status = er32(STATUS); fp@2546: if (status & E1000_STATUS_LU) { fp@2546: /* SYNCH bit and IV bit are sticky, so reread rxcw. */ fp@2546: udelay(10); fp@2546: rxcw = er32(RXCW); fp@2546: if (rxcw & E1000_RXCW_SYNCH) { fp@2546: if (!(rxcw & E1000_RXCW_IV)) { fp@2546: mac->serdes_has_link = true; fp@2546: e_dbg("SERDES: Link up - autoneg completed successfully.\n"); fp@2546: } else { fp@2546: mac->serdes_has_link = false; fp@2546: e_dbg("SERDES: Link down - invalid codewords detected in autoneg.\n"); fp@2546: } fp@2546: } else { fp@2546: mac->serdes_has_link = false; fp@2546: e_dbg("SERDES: Link down - no sync.\n"); fp@2546: } fp@2546: } else { fp@2546: mac->serdes_has_link = false; fp@2546: e_dbg("SERDES: Link down - autoneg failed\n"); fp@2546: } fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_set_default_fc_generic - Set flow control default values fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Read the EEPROM for the default values for flow control and store the fp@2546: * values. fp@2546: **/ fp@2546: static s32 e1000_set_default_fc_generic(struct e1000_hw *hw) fp@2546: { fp@2546: s32 ret_val; fp@2546: u16 nvm_data; fp@2546: fp@2546: /* fp@2546: * Read and store word 0x0F of the EEPROM. This word contains bits fp@2546: * that determine the hardware's default PAUSE (flow control) mode, fp@2546: * a bit that determines whether the HW defaults to enabling or fp@2546: * disabling auto-negotiation, and the direction of the fp@2546: * SW defined pins. If there is no SW over-ride of the flow fp@2546: * control setting, then the variable hw->fc will fp@2546: * be initialized based on a value in the EEPROM. fp@2546: */ fp@2546: ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data); fp@2546: fp@2546: if (ret_val) { fp@2546: e_dbg("NVM Read Error\n"); fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: if (!(nvm_data & NVM_WORD0F_PAUSE_MASK)) fp@2546: hw->fc.requested_mode = e1000_fc_none; fp@2546: else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == NVM_WORD0F_ASM_DIR) fp@2546: hw->fc.requested_mode = e1000_fc_tx_pause; fp@2546: else fp@2546: hw->fc.requested_mode = e1000_fc_full; fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_setup_link_generic - Setup flow control and link settings fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Determines which flow control settings to use, then configures flow fp@2546: * control. Calls the appropriate media-specific link configuration fp@2546: * function. Assuming the adapter has a valid link partner, a valid link fp@2546: * should be established. Assumes the hardware has previously been reset fp@2546: * and the transmitter and receiver are not enabled. fp@2546: **/ fp@2546: s32 e1000e_setup_link_generic(struct e1000_hw *hw) fp@2546: { fp@2546: s32 ret_val; fp@2546: fp@2546: /* fp@2546: * In the case of the phy reset being blocked, we already have a link. fp@2546: * We do not need to set it up again. fp@2546: */ fp@2546: if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw)) fp@2546: return 0; fp@2546: fp@2546: /* fp@2546: * If requested flow control is set to default, set flow control fp@2546: * based on the EEPROM flow control settings. fp@2546: */ fp@2546: if (hw->fc.requested_mode == e1000_fc_default) { fp@2546: ret_val = e1000_set_default_fc_generic(hw); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: /* fp@2546: * Save off the requested flow control mode for use later. Depending fp@2546: * on the link partner's capabilities, we may or may not use this mode. fp@2546: */ fp@2546: hw->fc.current_mode = hw->fc.requested_mode; fp@2546: fp@2546: e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode); fp@2546: fp@2546: /* Call the necessary media_type subroutine to configure the link. */ fp@2546: ret_val = hw->mac.ops.setup_physical_interface(hw); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: fp@2546: /* fp@2546: * Initialize the flow control address, type, and PAUSE timer fp@2546: * registers to their default values. This is done even if flow fp@2546: * control is disabled, because it does not hurt anything to fp@2546: * initialize these registers. fp@2546: */ fp@2546: e_dbg("Initializing the Flow Control address, type and timer regs\n"); fp@2546: ew32(FCT, FLOW_CONTROL_TYPE); fp@2546: ew32(FCAH, FLOW_CONTROL_ADDRESS_HIGH); fp@2546: ew32(FCAL, FLOW_CONTROL_ADDRESS_LOW); fp@2546: fp@2546: ew32(FCTTV, hw->fc.pause_time); fp@2546: fp@2546: return e1000e_set_fc_watermarks(hw); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_commit_fc_settings_generic - Configure flow control fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Write the flow control settings to the Transmit Config Word Register (TXCW) fp@2546: * base on the flow control settings in e1000_mac_info. fp@2546: **/ fp@2546: static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: u32 txcw; fp@2546: fp@2546: /* fp@2546: * Check for a software override of the flow control settings, and fp@2546: * setup the device accordingly. If auto-negotiation is enabled, then fp@2546: * software will have to set the "PAUSE" bits to the correct value in fp@2546: * the Transmit Config Word Register (TXCW) and re-start auto- fp@2546: * negotiation. However, if auto-negotiation is disabled, then fp@2546: * software will have to manually configure the two flow control enable fp@2546: * bits in the CTRL register. fp@2546: * fp@2546: * The possible values of the "fc" parameter are: fp@2546: * 0: Flow control is completely disabled fp@2546: * 1: Rx flow control is enabled (we can receive pause frames, fp@2546: * but not send pause frames). fp@2546: * 2: Tx flow control is enabled (we can send pause frames but we fp@2546: * do not support receiving pause frames). fp@2546: * 3: Both Rx and Tx flow control (symmetric) are enabled. fp@2546: */ fp@2546: switch (hw->fc.current_mode) { fp@2546: case e1000_fc_none: fp@2546: /* Flow control completely disabled by a software over-ride. */ fp@2546: txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); fp@2546: break; fp@2546: case e1000_fc_rx_pause: fp@2546: /* fp@2546: * Rx Flow control is enabled and Tx Flow control is disabled fp@2546: * by a software over-ride. Since there really isn't a way to fp@2546: * advertise that we are capable of Rx Pause ONLY, we will fp@2546: * advertise that we support both symmetric and asymmetric Rx fp@2546: * PAUSE. Later, we will disable the adapter's ability to send fp@2546: * PAUSE frames. fp@2546: */ fp@2546: txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); fp@2546: break; fp@2546: case e1000_fc_tx_pause: fp@2546: /* fp@2546: * Tx Flow control is enabled, and Rx Flow control is disabled, fp@2546: * by a software over-ride. fp@2546: */ fp@2546: txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR); fp@2546: break; fp@2546: case e1000_fc_full: fp@2546: /* fp@2546: * Flow control (both Rx and Tx) is enabled by a software fp@2546: * over-ride. fp@2546: */ fp@2546: txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); fp@2546: break; fp@2546: default: fp@2546: e_dbg("Flow control param set incorrectly\n"); fp@2546: return -E1000_ERR_CONFIG; fp@2546: break; fp@2546: } fp@2546: fp@2546: ew32(TXCW, txcw); fp@2546: mac->txcw = txcw; fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000_poll_fiber_serdes_link_generic - Poll for link up fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Polls for link up by reading the status register, if link fails to come fp@2546: * up with auto-negotiation, then the link is forced if a signal is detected. fp@2546: **/ fp@2546: static s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: u32 i, status; fp@2546: s32 ret_val; fp@2546: fp@2546: /* fp@2546: * If we have a signal (the cable is plugged in, or assumed true for fp@2546: * serdes media) then poll for a "Link-Up" indication in the Device fp@2546: * Status Register. Time-out if a link isn't seen in 500 milliseconds fp@2546: * seconds (Auto-negotiation should complete in less than 500 fp@2546: * milliseconds even if the other end is doing it in SW). fp@2546: */ fp@2546: for (i = 0; i < FIBER_LINK_UP_LIMIT; i++) { fp@2546: usleep_range(10000, 20000); fp@2546: status = er32(STATUS); fp@2546: if (status & E1000_STATUS_LU) fp@2546: break; fp@2546: } fp@2546: if (i == FIBER_LINK_UP_LIMIT) { fp@2546: e_dbg("Never got a valid link from auto-neg!!!\n"); fp@2546: mac->autoneg_failed = true; fp@2546: /* fp@2546: * AutoNeg failed to achieve a link, so we'll call fp@2546: * mac->check_for_link. This routine will force the fp@2546: * link up if we detect a signal. This will allow us to fp@2546: * communicate with non-autonegotiating link partners. fp@2546: */ fp@2546: ret_val = mac->ops.check_for_link(hw); fp@2546: if (ret_val) { fp@2546: e_dbg("Error while checking for link\n"); fp@2546: return ret_val; fp@2546: } fp@2546: mac->autoneg_failed = false; fp@2546: } else { fp@2546: mac->autoneg_failed = false; fp@2546: e_dbg("Valid Link Found\n"); fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_setup_fiber_serdes_link - Setup link for fiber/serdes fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Configures collision distance and flow control for fiber and serdes fp@2546: * links. Upon successful setup, poll for link. fp@2546: **/ fp@2546: s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw) fp@2546: { fp@2546: u32 ctrl; fp@2546: s32 ret_val; fp@2546: fp@2546: ctrl = er32(CTRL); fp@2546: fp@2546: /* Take the link out of reset */ fp@2546: ctrl &= ~E1000_CTRL_LRST; fp@2546: fp@2546: hw->mac.ops.config_collision_dist(hw); fp@2546: fp@2546: ret_val = e1000_commit_fc_settings_generic(hw); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: fp@2546: /* fp@2546: * Since auto-negotiation is enabled, take the link out of reset (the fp@2546: * link will be in reset, because we previously reset the chip). This fp@2546: * will restart auto-negotiation. If auto-negotiation is successful fp@2546: * then the link-up status bit will be set and the flow control enable fp@2546: * bits (RFCE and TFCE) will be set according to their negotiated value. fp@2546: */ fp@2546: e_dbg("Auto-negotiation enabled\n"); fp@2546: fp@2546: ew32(CTRL, ctrl); fp@2546: e1e_flush(); fp@2546: usleep_range(1000, 2000); fp@2546: fp@2546: /* fp@2546: * For these adapters, the SW definable pin 1 is set when the optics fp@2546: * detect a signal. If we have a signal, then poll for a "Link-Up" fp@2546: * indication. fp@2546: */ fp@2546: if (hw->phy.media_type == e1000_media_type_internal_serdes || fp@2546: (er32(CTRL) & E1000_CTRL_SWDPIN1)) { fp@2546: ret_val = e1000_poll_fiber_serdes_link_generic(hw); fp@2546: } else { fp@2546: e_dbg("No signal detected\n"); fp@2546: } fp@2546: fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_config_collision_dist_generic - Configure collision distance fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Configures the collision distance to the default value and is used fp@2546: * during link setup. fp@2546: **/ fp@2546: void e1000e_config_collision_dist_generic(struct e1000_hw *hw) fp@2546: { fp@2546: u32 tctl; fp@2546: fp@2546: tctl = er32(TCTL); fp@2546: fp@2546: tctl &= ~E1000_TCTL_COLD; fp@2546: tctl |= E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT; fp@2546: fp@2546: ew32(TCTL, tctl); fp@2546: e1e_flush(); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_set_fc_watermarks - Set flow control high/low watermarks fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Sets the flow control high/low threshold (watermark) registers. If fp@2546: * flow control XON frame transmission is enabled, then set XON frame fp@2546: * transmission as well. fp@2546: **/ fp@2546: s32 e1000e_set_fc_watermarks(struct e1000_hw *hw) fp@2546: { fp@2546: u32 fcrtl = 0, fcrth = 0; fp@2546: fp@2546: /* fp@2546: * Set the flow control receive threshold registers. Normally, fp@2546: * these registers will be set to a default threshold that may be fp@2546: * adjusted later by the driver's runtime code. However, if the fp@2546: * ability to transmit pause frames is not enabled, then these fp@2546: * registers will be set to 0. fp@2546: */ fp@2546: if (hw->fc.current_mode & e1000_fc_tx_pause) { fp@2546: /* fp@2546: * We need to set up the Receive Threshold high and low water fp@2546: * marks as well as (optionally) enabling the transmission of fp@2546: * XON frames. fp@2546: */ fp@2546: fcrtl = hw->fc.low_water; fp@2546: if (hw->fc.send_xon) fp@2546: fcrtl |= E1000_FCRTL_XONE; fp@2546: fp@2546: fcrth = hw->fc.high_water; fp@2546: } fp@2546: ew32(FCRTL, fcrtl); fp@2546: ew32(FCRTH, fcrth); fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_force_mac_fc - Force the MAC's flow control settings fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Force the MAC's flow control settings. Sets the TFCE and RFCE bits in the fp@2546: * device control register to reflect the adapter settings. TFCE and RFCE fp@2546: * need to be explicitly set by software when a copper PHY is used because fp@2546: * autonegotiation is managed by the PHY rather than the MAC. Software must fp@2546: * also configure these bits when link is forced on a fiber connection. fp@2546: **/ fp@2546: s32 e1000e_force_mac_fc(struct e1000_hw *hw) fp@2546: { fp@2546: u32 ctrl; fp@2546: fp@2546: ctrl = er32(CTRL); fp@2546: fp@2546: /* fp@2546: * Because we didn't get link via the internal auto-negotiation fp@2546: * mechanism (we either forced link or we got link via PHY fp@2546: * auto-neg), we have to manually enable/disable transmit an fp@2546: * receive flow control. fp@2546: * fp@2546: * The "Case" statement below enables/disable flow control fp@2546: * according to the "hw->fc.current_mode" parameter. fp@2546: * fp@2546: * The possible values of the "fc" parameter are: fp@2546: * 0: Flow control is completely disabled fp@2546: * 1: Rx flow control is enabled (we can receive pause fp@2546: * frames but not send pause frames). fp@2546: * 2: Tx flow control is enabled (we can send pause frames fp@2546: * frames but we do not receive pause frames). fp@2546: * 3: Both Rx and Tx flow control (symmetric) is enabled. fp@2546: * other: No other values should be possible at this point. fp@2546: */ fp@2546: e_dbg("hw->fc.current_mode = %u\n", hw->fc.current_mode); fp@2546: fp@2546: switch (hw->fc.current_mode) { fp@2546: case e1000_fc_none: fp@2546: ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); fp@2546: break; fp@2546: case e1000_fc_rx_pause: fp@2546: ctrl &= (~E1000_CTRL_TFCE); fp@2546: ctrl |= E1000_CTRL_RFCE; fp@2546: break; fp@2546: case e1000_fc_tx_pause: fp@2546: ctrl &= (~E1000_CTRL_RFCE); fp@2546: ctrl |= E1000_CTRL_TFCE; fp@2546: break; fp@2546: case e1000_fc_full: fp@2546: ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE); fp@2546: break; fp@2546: default: fp@2546: e_dbg("Flow control param set incorrectly\n"); fp@2546: return -E1000_ERR_CONFIG; fp@2546: } fp@2546: fp@2546: ew32(CTRL, ctrl); fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_config_fc_after_link_up - Configures flow control after link fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Checks the status of auto-negotiation after link up to ensure that the fp@2546: * speed and duplex were not forced. If the link needed to be forced, then fp@2546: * flow control needs to be forced also. If auto-negotiation is enabled fp@2546: * and did not fail, then we configure flow control based on our link fp@2546: * partner. fp@2546: **/ fp@2546: s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: s32 ret_val = 0; fp@2546: u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg; fp@2546: u16 speed, duplex; fp@2546: fp@2546: /* fp@2546: * Check for the case where we have fiber media and auto-neg failed fp@2546: * so we had to force link. In this case, we need to force the fp@2546: * configuration of the MAC to match the "fc" parameter. fp@2546: */ fp@2546: if (mac->autoneg_failed) { fp@2546: if (hw->phy.media_type == e1000_media_type_fiber || fp@2546: hw->phy.media_type == e1000_media_type_internal_serdes) fp@2546: ret_val = e1000e_force_mac_fc(hw); fp@2546: } else { fp@2546: if (hw->phy.media_type == e1000_media_type_copper) fp@2546: ret_val = e1000e_force_mac_fc(hw); fp@2546: } fp@2546: fp@2546: if (ret_val) { fp@2546: e_dbg("Error forcing flow control settings\n"); fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: /* fp@2546: * Check for the case where we have copper media and auto-neg is fp@2546: * enabled. In this case, we need to check and see if Auto-Neg fp@2546: * has completed, and if so, how the PHY and link partner has fp@2546: * flow control configured. fp@2546: */ fp@2546: if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) { fp@2546: /* fp@2546: * Read the MII Status Register and check to see if AutoNeg fp@2546: * has completed. We read this twice because this reg has fp@2546: * some "sticky" (latched) bits. fp@2546: */ fp@2546: ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: fp@2546: if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) { fp@2546: e_dbg("Copper PHY and Auto Neg has not completed.\n"); fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: /* fp@2546: * The AutoNeg process has completed, so we now need to fp@2546: * read both the Auto Negotiation Advertisement fp@2546: * Register (Address 4) and the Auto_Negotiation Base fp@2546: * Page Ability Register (Address 5) to determine how fp@2546: * flow control was negotiated. fp@2546: */ fp@2546: ret_val = e1e_rphy(hw, PHY_AUTONEG_ADV, &mii_nway_adv_reg); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: ret_val = fp@2546: e1e_rphy(hw, PHY_LP_ABILITY, &mii_nway_lp_ability_reg); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: fp@2546: /* fp@2546: * Two bits in the Auto Negotiation Advertisement Register fp@2546: * (Address 4) and two bits in the Auto Negotiation Base fp@2546: * Page Ability Register (Address 5) determine flow control fp@2546: * for both the PHY and the link partner. The following fp@2546: * table, taken out of the IEEE 802.3ab/D6.0 dated March 25, fp@2546: * 1999, describes these PAUSE resolution bits and how flow fp@2546: * control is determined based upon these settings. fp@2546: * NOTE: DC = Don't Care fp@2546: * fp@2546: * LOCAL DEVICE | LINK PARTNER fp@2546: * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution fp@2546: *-------|---------|-------|---------|-------------------- fp@2546: * 0 | 0 | DC | DC | e1000_fc_none fp@2546: * 0 | 1 | 0 | DC | e1000_fc_none fp@2546: * 0 | 1 | 1 | 0 | e1000_fc_none fp@2546: * 0 | 1 | 1 | 1 | e1000_fc_tx_pause fp@2546: * 1 | 0 | 0 | DC | e1000_fc_none fp@2546: * 1 | DC | 1 | DC | e1000_fc_full fp@2546: * 1 | 1 | 0 | 0 | e1000_fc_none fp@2546: * 1 | 1 | 0 | 1 | e1000_fc_rx_pause fp@2546: * fp@2546: * Are both PAUSE bits set to 1? If so, this implies fp@2546: * Symmetric Flow Control is enabled at both ends. The fp@2546: * ASM_DIR bits are irrelevant per the spec. fp@2546: * fp@2546: * For Symmetric Flow Control: fp@2546: * fp@2546: * LOCAL DEVICE | LINK PARTNER fp@2546: * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result fp@2546: *-------|---------|-------|---------|-------------------- fp@2546: * 1 | DC | 1 | DC | E1000_fc_full fp@2546: * fp@2546: */ fp@2546: if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && fp@2546: (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) { fp@2546: /* fp@2546: * Now we need to check if the user selected Rx ONLY fp@2546: * of pause frames. In this case, we had to advertise fp@2546: * FULL flow control because we could not advertise Rx fp@2546: * ONLY. Hence, we must now check to see if we need to fp@2546: * turn OFF the TRANSMISSION of PAUSE frames. fp@2546: */ fp@2546: if (hw->fc.requested_mode == e1000_fc_full) { fp@2546: hw->fc.current_mode = e1000_fc_full; fp@2546: e_dbg("Flow Control = FULL.\n"); fp@2546: } else { fp@2546: hw->fc.current_mode = e1000_fc_rx_pause; fp@2546: e_dbg("Flow Control = Rx PAUSE frames only.\n"); fp@2546: } fp@2546: } fp@2546: /* fp@2546: * For receiving PAUSE frames ONLY. fp@2546: * fp@2546: * LOCAL DEVICE | LINK PARTNER fp@2546: * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result fp@2546: *-------|---------|-------|---------|-------------------- fp@2546: * 0 | 1 | 1 | 1 | e1000_fc_tx_pause fp@2546: */ fp@2546: else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) && fp@2546: (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && fp@2546: (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && fp@2546: (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { fp@2546: hw->fc.current_mode = e1000_fc_tx_pause; fp@2546: e_dbg("Flow Control = Tx PAUSE frames only.\n"); fp@2546: } fp@2546: /* fp@2546: * For transmitting PAUSE frames ONLY. fp@2546: * fp@2546: * LOCAL DEVICE | LINK PARTNER fp@2546: * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result fp@2546: *-------|---------|-------|---------|-------------------- fp@2546: * 1 | 1 | 0 | 1 | e1000_fc_rx_pause fp@2546: */ fp@2546: else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && fp@2546: (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && fp@2546: !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && fp@2546: (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { fp@2546: hw->fc.current_mode = e1000_fc_rx_pause; fp@2546: e_dbg("Flow Control = Rx PAUSE frames only.\n"); fp@2546: } else { fp@2546: /* fp@2546: * Per the IEEE spec, at this point flow control fp@2546: * should be disabled. fp@2546: */ fp@2546: hw->fc.current_mode = e1000_fc_none; fp@2546: e_dbg("Flow Control = NONE.\n"); fp@2546: } fp@2546: fp@2546: /* fp@2546: * Now we need to do one last check... If we auto- fp@2546: * negotiated to HALF DUPLEX, flow control should not be fp@2546: * enabled per IEEE 802.3 spec. fp@2546: */ fp@2546: ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex); fp@2546: if (ret_val) { fp@2546: e_dbg("Error getting link speed and duplex\n"); fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: if (duplex == HALF_DUPLEX) fp@2546: hw->fc.current_mode = e1000_fc_none; fp@2546: fp@2546: /* fp@2546: * Now we call a subroutine to actually force the MAC fp@2546: * controller to use the correct flow control settings. fp@2546: */ fp@2546: ret_val = e1000e_force_mac_fc(hw); fp@2546: if (ret_val) { fp@2546: e_dbg("Error forcing flow control settings\n"); fp@2546: return ret_val; fp@2546: } fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_get_speed_and_duplex_copper - Retrieve current speed/duplex fp@2546: * @hw: pointer to the HW structure fp@2546: * @speed: stores the current speed fp@2546: * @duplex: stores the current duplex fp@2546: * fp@2546: * Read the status register for the current speed/duplex and store the current fp@2546: * speed and duplex for copper connections. fp@2546: **/ fp@2546: s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, fp@2546: u16 *duplex) fp@2546: { fp@2546: u32 status; fp@2546: fp@2546: status = er32(STATUS); fp@2546: if (status & E1000_STATUS_SPEED_1000) fp@2546: *speed = SPEED_1000; fp@2546: else if (status & E1000_STATUS_SPEED_100) fp@2546: *speed = SPEED_100; fp@2546: else fp@2546: *speed = SPEED_10; fp@2546: fp@2546: if (status & E1000_STATUS_FD) fp@2546: *duplex = FULL_DUPLEX; fp@2546: else fp@2546: *duplex = HALF_DUPLEX; fp@2546: fp@2546: e_dbg("%u Mbps, %s Duplex\n", fp@2546: *speed == SPEED_1000 ? 1000 : *speed == SPEED_100 ? 100 : 10, fp@2546: *duplex == FULL_DUPLEX ? "Full" : "Half"); fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_get_speed_and_duplex_fiber_serdes - Retrieve current speed/duplex fp@2546: * @hw: pointer to the HW structure fp@2546: * @speed: stores the current speed fp@2546: * @duplex: stores the current duplex fp@2546: * fp@2546: * Sets the speed and duplex to gigabit full duplex (the only possible option) fp@2546: * for fiber/serdes links. fp@2546: **/ fp@2546: s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, fp@2546: u16 *duplex) fp@2546: { fp@2546: *speed = SPEED_1000; fp@2546: *duplex = FULL_DUPLEX; fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_get_hw_semaphore - Acquire hardware semaphore fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Acquire the HW semaphore to access the PHY or NVM fp@2546: **/ fp@2546: s32 e1000e_get_hw_semaphore(struct e1000_hw *hw) fp@2546: { fp@2546: u32 swsm; fp@2546: s32 timeout = hw->nvm.word_size + 1; fp@2546: s32 i = 0; fp@2546: fp@2546: /* Get the SW semaphore */ fp@2546: while (i < timeout) { fp@2546: swsm = er32(SWSM); fp@2546: if (!(swsm & E1000_SWSM_SMBI)) fp@2546: break; fp@2546: fp@2546: udelay(50); fp@2546: i++; fp@2546: } fp@2546: fp@2546: if (i == timeout) { fp@2546: e_dbg("Driver can't access device - SMBI bit is set.\n"); fp@2546: return -E1000_ERR_NVM; fp@2546: } fp@2546: fp@2546: /* Get the FW semaphore. */ fp@2546: for (i = 0; i < timeout; i++) { fp@2546: swsm = er32(SWSM); fp@2546: ew32(SWSM, swsm | E1000_SWSM_SWESMBI); fp@2546: fp@2546: /* Semaphore acquired if bit latched */ fp@2546: if (er32(SWSM) & E1000_SWSM_SWESMBI) fp@2546: break; fp@2546: fp@2546: udelay(50); fp@2546: } fp@2546: fp@2546: if (i == timeout) { fp@2546: /* Release semaphores */ fp@2546: e1000e_put_hw_semaphore(hw); fp@2546: e_dbg("Driver can't access the NVM\n"); fp@2546: return -E1000_ERR_NVM; fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_put_hw_semaphore - Release hardware semaphore fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Release hardware semaphore used to access the PHY or NVM fp@2546: **/ fp@2546: void e1000e_put_hw_semaphore(struct e1000_hw *hw) fp@2546: { fp@2546: u32 swsm; fp@2546: fp@2546: swsm = er32(SWSM); fp@2546: swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI); fp@2546: ew32(SWSM, swsm); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_get_auto_rd_done - Check for auto read completion fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Check EEPROM for Auto Read done bit. fp@2546: **/ fp@2546: s32 e1000e_get_auto_rd_done(struct e1000_hw *hw) fp@2546: { fp@2546: s32 i = 0; fp@2546: fp@2546: while (i < AUTO_READ_DONE_TIMEOUT) { fp@2546: if (er32(EECD) & E1000_EECD_AUTO_RD) fp@2546: break; fp@2546: usleep_range(1000, 2000); fp@2546: i++; fp@2546: } fp@2546: fp@2546: if (i == AUTO_READ_DONE_TIMEOUT) { fp@2546: e_dbg("Auto read by HW from NVM has not completed.\n"); fp@2546: return -E1000_ERR_RESET; fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_valid_led_default - Verify a valid default LED config fp@2546: * @hw: pointer to the HW structure fp@2546: * @data: pointer to the NVM (EEPROM) fp@2546: * fp@2546: * Read the EEPROM for the current default LED configuration. If the fp@2546: * LED configuration is not valid, set to a valid LED configuration. fp@2546: **/ fp@2546: s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data) fp@2546: { fp@2546: s32 ret_val; fp@2546: fp@2546: ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data); fp@2546: if (ret_val) { fp@2546: e_dbg("NVM Read Error\n"); fp@2546: return ret_val; fp@2546: } fp@2546: fp@2546: if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) fp@2546: *data = ID_LED_DEFAULT; fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_id_led_init_generic - fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: **/ fp@2546: s32 e1000e_id_led_init_generic(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: s32 ret_val; fp@2546: const u32 ledctl_mask = 0x000000FF; fp@2546: const u32 ledctl_on = E1000_LEDCTL_MODE_LED_ON; fp@2546: const u32 ledctl_off = E1000_LEDCTL_MODE_LED_OFF; fp@2546: u16 data, i, temp; fp@2546: const u16 led_mask = 0x0F; fp@2546: fp@2546: ret_val = hw->nvm.ops.valid_led_default(hw, &data); fp@2546: if (ret_val) fp@2546: return ret_val; fp@2546: fp@2546: mac->ledctl_default = er32(LEDCTL); fp@2546: mac->ledctl_mode1 = mac->ledctl_default; fp@2546: mac->ledctl_mode2 = mac->ledctl_default; fp@2546: fp@2546: for (i = 0; i < 4; i++) { fp@2546: temp = (data >> (i << 2)) & led_mask; fp@2546: switch (temp) { fp@2546: case ID_LED_ON1_DEF2: fp@2546: case ID_LED_ON1_ON2: fp@2546: case ID_LED_ON1_OFF2: fp@2546: mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); fp@2546: mac->ledctl_mode1 |= ledctl_on << (i << 3); fp@2546: break; fp@2546: case ID_LED_OFF1_DEF2: fp@2546: case ID_LED_OFF1_ON2: fp@2546: case ID_LED_OFF1_OFF2: fp@2546: mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); fp@2546: mac->ledctl_mode1 |= ledctl_off << (i << 3); fp@2546: break; fp@2546: default: fp@2546: /* Do nothing */ fp@2546: break; fp@2546: } fp@2546: switch (temp) { fp@2546: case ID_LED_DEF1_ON2: fp@2546: case ID_LED_ON1_ON2: fp@2546: case ID_LED_OFF1_ON2: fp@2546: mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); fp@2546: mac->ledctl_mode2 |= ledctl_on << (i << 3); fp@2546: break; fp@2546: case ID_LED_DEF1_OFF2: fp@2546: case ID_LED_ON1_OFF2: fp@2546: case ID_LED_OFF1_OFF2: fp@2546: mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); fp@2546: mac->ledctl_mode2 |= ledctl_off << (i << 3); fp@2546: break; fp@2546: default: fp@2546: /* Do nothing */ fp@2546: break; fp@2546: } fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_setup_led_generic - Configures SW controllable LED fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * This prepares the SW controllable LED for use and saves the current state fp@2546: * of the LED so it can be later restored. fp@2546: **/ fp@2546: s32 e1000e_setup_led_generic(struct e1000_hw *hw) fp@2546: { fp@2546: u32 ledctl; fp@2546: fp@2546: if (hw->mac.ops.setup_led != e1000e_setup_led_generic) fp@2546: return -E1000_ERR_CONFIG; fp@2546: fp@2546: if (hw->phy.media_type == e1000_media_type_fiber) { fp@2546: ledctl = er32(LEDCTL); fp@2546: hw->mac.ledctl_default = ledctl; fp@2546: /* Turn off LED0 */ fp@2546: ledctl &= ~(E1000_LEDCTL_LED0_IVRT | E1000_LEDCTL_LED0_BLINK | fp@2546: E1000_LEDCTL_LED0_MODE_MASK); fp@2546: ledctl |= (E1000_LEDCTL_MODE_LED_OFF << fp@2546: E1000_LEDCTL_LED0_MODE_SHIFT); fp@2546: ew32(LEDCTL, ledctl); fp@2546: } else if (hw->phy.media_type == e1000_media_type_copper) { fp@2546: ew32(LEDCTL, hw->mac.ledctl_mode1); fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_cleanup_led_generic - Set LED config to default operation fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Remove the current LED configuration and set the LED configuration fp@2546: * to the default value, saved from the EEPROM. fp@2546: **/ fp@2546: s32 e1000e_cleanup_led_generic(struct e1000_hw *hw) fp@2546: { fp@2546: ew32(LEDCTL, hw->mac.ledctl_default); fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_blink_led_generic - Blink LED fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Blink the LEDs which are set to be on. fp@2546: **/ fp@2546: s32 e1000e_blink_led_generic(struct e1000_hw *hw) fp@2546: { fp@2546: u32 ledctl_blink = 0; fp@2546: u32 i; fp@2546: fp@2546: if (hw->phy.media_type == e1000_media_type_fiber) { fp@2546: /* always blink LED0 for PCI-E fiber */ fp@2546: ledctl_blink = E1000_LEDCTL_LED0_BLINK | fp@2546: (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT); fp@2546: } else { fp@2546: /* fp@2546: * set the blink bit for each LED that's "on" (0x0E) fp@2546: * in ledctl_mode2 fp@2546: */ fp@2546: ledctl_blink = hw->mac.ledctl_mode2; fp@2546: for (i = 0; i < 4; i++) fp@2546: if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) == fp@2546: E1000_LEDCTL_MODE_LED_ON) fp@2546: ledctl_blink |= (E1000_LEDCTL_LED0_BLINK << fp@2546: (i * 8)); fp@2546: } fp@2546: fp@2546: ew32(LEDCTL, ledctl_blink); fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_led_on_generic - Turn LED on fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Turn LED on. fp@2546: **/ fp@2546: s32 e1000e_led_on_generic(struct e1000_hw *hw) fp@2546: { fp@2546: u32 ctrl; fp@2546: fp@2546: switch (hw->phy.media_type) { fp@2546: case e1000_media_type_fiber: fp@2546: ctrl = er32(CTRL); fp@2546: ctrl &= ~E1000_CTRL_SWDPIN0; fp@2546: ctrl |= E1000_CTRL_SWDPIO0; fp@2546: ew32(CTRL, ctrl); fp@2546: break; fp@2546: case e1000_media_type_copper: fp@2546: ew32(LEDCTL, hw->mac.ledctl_mode2); fp@2546: break; fp@2546: default: fp@2546: break; fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_led_off_generic - Turn LED off fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Turn LED off. fp@2546: **/ fp@2546: s32 e1000e_led_off_generic(struct e1000_hw *hw) fp@2546: { fp@2546: u32 ctrl; fp@2546: fp@2546: switch (hw->phy.media_type) { fp@2546: case e1000_media_type_fiber: fp@2546: ctrl = er32(CTRL); fp@2546: ctrl |= E1000_CTRL_SWDPIN0; fp@2546: ctrl |= E1000_CTRL_SWDPIO0; fp@2546: ew32(CTRL, ctrl); fp@2546: break; fp@2546: case e1000_media_type_copper: fp@2546: ew32(LEDCTL, hw->mac.ledctl_mode1); fp@2546: break; fp@2546: default: fp@2546: break; fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_set_pcie_no_snoop - Set PCI-express capabilities fp@2546: * @hw: pointer to the HW structure fp@2546: * @no_snoop: bitmap of snoop events fp@2546: * fp@2546: * Set the PCI-express register to snoop for events enabled in 'no_snoop'. fp@2546: **/ fp@2546: void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop) fp@2546: { fp@2546: u32 gcr; fp@2546: fp@2546: if (no_snoop) { fp@2546: gcr = er32(GCR); fp@2546: gcr &= ~(PCIE_NO_SNOOP_ALL); fp@2546: gcr |= no_snoop; fp@2546: ew32(GCR, gcr); fp@2546: } fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_disable_pcie_master - Disables PCI-express master access fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Returns 0 if successful, else returns -10 fp@2546: * (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused fp@2546: * the master requests to be disabled. fp@2546: * fp@2546: * Disables PCI-Express master access and verifies there are no pending fp@2546: * requests. fp@2546: **/ fp@2546: s32 e1000e_disable_pcie_master(struct e1000_hw *hw) fp@2546: { fp@2546: u32 ctrl; fp@2546: s32 timeout = MASTER_DISABLE_TIMEOUT; fp@2546: fp@2546: ctrl = er32(CTRL); fp@2546: ctrl |= E1000_CTRL_GIO_MASTER_DISABLE; fp@2546: ew32(CTRL, ctrl); fp@2546: fp@2546: while (timeout) { fp@2546: if (!(er32(STATUS) & E1000_STATUS_GIO_MASTER_ENABLE)) fp@2546: break; fp@2546: udelay(100); fp@2546: timeout--; fp@2546: } fp@2546: fp@2546: if (!timeout) { fp@2546: e_dbg("Master requests are pending.\n"); fp@2546: return -E1000_ERR_MASTER_REQUESTS_PENDING; fp@2546: } fp@2546: fp@2546: return 0; fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_reset_adaptive - Reset Adaptive Interframe Spacing fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Reset the Adaptive Interframe Spacing throttle to default values. fp@2546: **/ fp@2546: void e1000e_reset_adaptive(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: fp@2546: if (!mac->adaptive_ifs) { fp@2546: e_dbg("Not in Adaptive IFS mode!\n"); fp@2546: return; fp@2546: } fp@2546: fp@2546: mac->current_ifs_val = 0; fp@2546: mac->ifs_min_val = IFS_MIN; fp@2546: mac->ifs_max_val = IFS_MAX; fp@2546: mac->ifs_step_size = IFS_STEP; fp@2546: mac->ifs_ratio = IFS_RATIO; fp@2546: fp@2546: mac->in_ifs_mode = false; fp@2546: ew32(AIT, 0); fp@2546: } fp@2546: fp@2546: /** fp@2546: * e1000e_update_adaptive - Update Adaptive Interframe Spacing fp@2546: * @hw: pointer to the HW structure fp@2546: * fp@2546: * Update the Adaptive Interframe Spacing Throttle value based on the fp@2546: * time between transmitted packets and time between collisions. fp@2546: **/ fp@2546: void e1000e_update_adaptive(struct e1000_hw *hw) fp@2546: { fp@2546: struct e1000_mac_info *mac = &hw->mac; fp@2546: fp@2546: if (!mac->adaptive_ifs) { fp@2546: e_dbg("Not in Adaptive IFS mode!\n"); fp@2546: return; fp@2546: } fp@2546: fp@2546: if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) { fp@2546: if (mac->tx_packet_delta > MIN_NUM_XMITS) { fp@2546: mac->in_ifs_mode = true; fp@2546: if (mac->current_ifs_val < mac->ifs_max_val) { fp@2546: if (!mac->current_ifs_val) fp@2546: mac->current_ifs_val = mac->ifs_min_val; fp@2546: else fp@2546: mac->current_ifs_val += fp@2546: mac->ifs_step_size; fp@2546: ew32(AIT, mac->current_ifs_val); fp@2546: } fp@2546: } fp@2546: } else { fp@2546: if (mac->in_ifs_mode && fp@2546: (mac->tx_packet_delta <= MIN_NUM_XMITS)) { fp@2546: mac->current_ifs_val = 0; fp@2546: mac->in_ifs_mode = false; fp@2546: ew32(AIT, 0); fp@2546: } fp@2546: } fp@2546: }