fp@673: /*******************************************************************************
fp@673: 
fp@673:   
fp@673:   Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
fp@673:   
fp@673:   This program is free software; you can redistribute it and/or modify it 
fp@673:   under the terms of the GNU General Public License as published by the Free 
fp@673:   Software Foundation; either version 2 of the License, or (at your option) 
fp@673:   any later version.
fp@673:   
fp@673:   This program is distributed in the hope that it will be useful, but WITHOUT 
fp@673:   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 
fp@673:   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for 
fp@673:   more details.
fp@673:   
fp@673:   You should have received a copy of the GNU General Public License along with
fp@673:   this program; if not, write to the Free Software Foundation, Inc., 59 
fp@673:   Temple Place - Suite 330, Boston, MA  02111-1307, USA.
fp@673:   
fp@673:   The full GNU General Public License is included in this distribution in the
fp@673:   file called LICENSE.
fp@673:   
fp@673:   Contact Information:
fp@673:   Linux NICS <linux.nics@intel.com>
fp@673:   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
fp@673: 
fp@673: *******************************************************************************/
fp@673: 
fp@673: 
fp@673: /* glue for the OS independent part of e1000
fp@673:  * includes register access macros
fp@673:  */
fp@673: 
fp@673: #ifndef _E1000_OSDEP_H_
fp@673: #define _E1000_OSDEP_H_
fp@673: 
fp@673: #include <linux/types.h>
fp@673: #include <linux/pci.h>
fp@673: #include <linux/delay.h>
fp@673: #include <asm/io.h>
fp@673: #include <linux/interrupt.h>
fp@673: #include <linux/sched.h>
fp@673: 
fp@673: #ifndef msec_delay
fp@673: #define msec_delay(x)	do { if(in_interrupt()) { \
fp@673: 				/* Don't mdelay in interrupt context! */ \
fp@673: 	                	BUG(); \
fp@673: 			} else { \
fp@673: 				msleep(x); \
fp@673: 			} } while(0)
fp@673: 
fp@673: /* Some workarounds require millisecond delays and are run during interrupt
fp@673:  * context.  Most notably, when establishing link, the phy may need tweaking
fp@673:  * but cannot process phy register reads/writes faster than millisecond
fp@673:  * intervals...and we establish link due to a "link status change" interrupt.
fp@673:  */
fp@673: #define msec_delay_irq(x) mdelay(x)
fp@673: #endif
fp@673: 
fp@673: #define PCI_COMMAND_REGISTER   PCI_COMMAND
fp@673: #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
fp@673: 
fp@673: typedef enum {
fp@673: #undef FALSE
fp@673:     FALSE = 0,
fp@673: #undef TRUE
fp@673:     TRUE = 1
fp@673: } boolean_t;
fp@673: 
fp@673: #define MSGOUT(S, A, B)	printk(KERN_DEBUG S "\n", A, B)
fp@673: 
fp@673: #ifdef DBG
fp@673: #define DEBUGOUT(S)		printk(KERN_DEBUG S "\n")
fp@673: #define DEBUGOUT1(S, A...)	printk(KERN_DEBUG S "\n", A)
fp@673: #else
fp@673: #define DEBUGOUT(S)
fp@673: #define DEBUGOUT1(S, A...)
fp@673: #endif
fp@673: 
fp@673: #define DEBUGFUNC(F) DEBUGOUT(F)
fp@673: #define DEBUGOUT2 DEBUGOUT1
fp@673: #define DEBUGOUT3 DEBUGOUT2
fp@673: #define DEBUGOUT7 DEBUGOUT3
fp@673: 
fp@673: 
fp@673: #define E1000_WRITE_REG(a, reg, value) ( \
fp@673:     writel((value), ((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg))))
fp@673: 
fp@673: #define E1000_READ_REG(a, reg) ( \
fp@673:     readl((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg)))
fp@673: 
fp@673: #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
fp@673:     writel((value), ((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
fp@673:         ((offset) << 2))))
fp@673: 
fp@673: #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
fp@673:     readl((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
fp@673:         ((offset) << 2)))
fp@673: 
fp@673: #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
fp@673: #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
fp@673: 
fp@673: #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
fp@673:     writew((value), ((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
fp@673:         ((offset) << 1))))
fp@673: 
fp@673: #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
fp@673:     readw((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
fp@673:         ((offset) << 1)))
fp@673: 
fp@673: #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
fp@673:     writeb((value), ((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
fp@673:         (offset))))
fp@673: 
fp@673: #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
fp@673:     readb((a)->hw_addr + \
fp@673:         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
fp@673:         (offset)))
fp@673: 
fp@673: #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS)
fp@673: 
fp@673: #endif /* _E1000_OSDEP_H_ */