martin@1579: /* martin@1579: martin@1579: 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. martin@1579: martin@1579: Maintained by Jeff Garzik martin@1579: Copyright 2000-2002 Jeff Garzik martin@1579: martin@1579: Much code comes from Donald Becker's rtl8139.c driver, martin@1579: versions 1.13 and older. This driver was originally based martin@1579: on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: martin@1579: martin@1579: ---------- martin@1579: martin@1579: Written 1997-2001 by Donald Becker. martin@1579: This software may be used and distributed according to the martin@1579: terms of the GNU General Public License (GPL), incorporated martin@1579: herein by reference. Drivers based on or derived from this martin@1579: code fall under the GPL and must retain the authorship, martin@1579: copyright and license notice. This file is not a complete martin@1579: program and may only be used when the entire operating martin@1579: system is licensed under the GPL. martin@1579: martin@1579: This driver is for boards based on the RTL8129 and RTL8139 martin@1579: PCI ethernet chips. martin@1579: martin@1579: The author may be reached as becker@scyld.com, or C/O Scyld martin@1579: Computing Corporation 410 Severn Ave., Suite 210 Annapolis martin@1579: MD 21403 martin@1579: martin@1579: Support and updates available at martin@1579: http://www.scyld.com/network/rtl8139.html martin@1579: martin@1579: Twister-tuning table provided by Kinston martin@1579: . martin@1579: martin@1579: ---------- martin@1579: martin@1579: This software may be used and distributed according to the terms martin@1579: of the GNU General Public License, incorporated herein by reference. martin@1579: martin@1579: Contributors: martin@1579: martin@1579: Donald Becker - he wrote the original driver, kudos to him! martin@1579: (but please don't e-mail him for support, this isn't his driver) martin@1579: martin@1579: Tigran Aivazian - bug fixes, skbuff free cleanup martin@1579: martin@1579: Martin Mares - suggestions for PCI cleanup martin@1579: martin@1579: David S. Miller - PCI DMA and softnet updates martin@1579: martin@1579: Ernst Gill - fixes ported from BSD driver martin@1579: martin@1579: Daniel Kobras - identified specific locations of martin@1579: posted MMIO write bugginess martin@1579: martin@1579: Gerard Sharp - bug fix, testing and feedback martin@1579: martin@1579: David Ford - Rx ring wrap fix martin@1579: martin@1579: Dan DeMaggio - swapped RTL8139 cards with me, and allowed me martin@1579: to find and fix a crucial bug on older chipsets. martin@1579: martin@1579: Donald Becker/Chris Butterworth/Marcus Westergren - martin@1579: Noticed various Rx packet size-related buglets. martin@1579: martin@1579: Santiago Garcia Mantinan - testing and feedback martin@1579: martin@1579: Jens David - 2.2.x kernel backports martin@1579: martin@1579: Martin Dennett - incredibly helpful insight on undocumented martin@1579: features of the 8139 chips martin@1579: martin@1579: Jean-Jacques Michel - bug fix martin@1579: martin@1579: Tobias Ringström - Rx interrupt status checking suggestion martin@1579: martin@1579: Andrew Morton - Clear blocked signals, avoid martin@1579: buffer overrun setting current->comm. martin@1579: martin@1579: Kalle Olavi Niemitalo - Wake-on-LAN ioctls martin@1579: martin@1579: Robert Kuebel - Save kernel thread from dying on any signal. martin@1579: martin@1579: Submitting bug reports: martin@1579: martin@1579: "rtl8139-diag -mmmaaavvveefN" output martin@1579: enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log martin@1579: martin@1579: */ martin@1579: martin@1579: #define DRV_NAME "8139too" martin@1579: #define DRV_VERSION "0.9.28" martin@1579: martin@1579: martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: #include martin@1579: martin@1579: #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION martin@1579: #define PFX DRV_NAME ": " martin@1579: martin@1579: /* Default Message level */ martin@1579: #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \ martin@1579: NETIF_MSG_PROBE | \ martin@1579: NETIF_MSG_LINK) martin@1579: martin@1579: martin@1579: /* define to 1, 2 or 3 to enable copious debugging info */ martin@1579: #define RTL8139_DEBUG 0 martin@1579: martin@1579: /* define to 1 to disable lightweight runtime debugging checks */ martin@1579: #undef RTL8139_NDEBUG martin@1579: martin@1579: martin@1579: #ifdef RTL8139_NDEBUG martin@1579: # define assert(expr) do {} while (0) martin@1579: #else martin@1579: # define assert(expr) \ martin@1579: if(unlikely(!(expr))) { \ martin@1579: pr_err("Assertion failed! %s,%s,%s,line=%d\n", \ martin@1579: #expr, __FILE__, __func__, __LINE__); \ martin@1579: } martin@1579: #endif martin@1579: martin@1579: martin@1579: /* A few user-configurable values. */ martin@1579: /* media options */ martin@1579: #define MAX_UNITS 8 martin@1579: static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; martin@1579: static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; martin@1579: martin@1579: /* Whether to use MMIO or PIO. Default to MMIO. */ martin@1579: #ifdef CONFIG_8139TOO_PIO martin@1579: static int use_io = 1; martin@1579: #else martin@1579: static int use_io = 0; martin@1579: #endif martin@1579: martin@1579: /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). martin@1579: The RTL chips use a 64 element hash table based on the Ethernet CRC. */ martin@1579: static int multicast_filter_limit = 32; martin@1579: martin@1579: /* bitmapped message enable number */ martin@1579: static int debug = -1; martin@1579: martin@1579: /* martin@1579: * Receive ring size martin@1579: * Warning: 64K ring has hardware issues and may lock up. martin@1579: */ martin@1579: #if defined(CONFIG_SH_DREAMCAST) martin@1579: #define RX_BUF_IDX 0 /* 8K ring */ martin@1579: #else martin@1579: #define RX_BUF_IDX 2 /* 32K ring */ martin@1579: #endif martin@1579: #define RX_BUF_LEN (8192 << RX_BUF_IDX) martin@1579: #define RX_BUF_PAD 16 martin@1579: #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ martin@1579: martin@1579: #if RX_BUF_LEN == 65536 martin@1579: #define RX_BUF_TOT_LEN RX_BUF_LEN martin@1579: #else martin@1579: #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) martin@1579: #endif martin@1579: martin@1579: /* Number of Tx descriptor registers. */ martin@1579: #define NUM_TX_DESC 4 martin@1579: martin@1579: /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ martin@1579: #define MAX_ETH_FRAME_SIZE 1536 martin@1579: martin@1579: /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ martin@1579: #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE martin@1579: #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) martin@1579: martin@1579: /* PCI Tuning Parameters martin@1579: Threshold is bytes transferred to chip before transmission starts. */ martin@1579: #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ martin@1579: martin@1579: /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ martin@1579: #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ martin@1579: #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ martin@1579: #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ martin@1579: #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ martin@1579: martin@1579: /* Operational parameters that usually are not changed. */ martin@1579: /* Time in jiffies before concluding the transmitter is hung. */ martin@1579: #define TX_TIMEOUT (6*HZ) martin@1579: martin@1579: martin@1579: enum { martin@1579: HAS_MII_XCVR = 0x010000, martin@1579: HAS_CHIP_XCVR = 0x020000, martin@1579: HAS_LNK_CHNG = 0x040000, martin@1579: }; martin@1579: martin@1579: #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ martin@1579: #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ martin@1579: #define RTL_MIN_IO_SIZE 0x80 martin@1579: #define RTL8139B_IO_SIZE 256 martin@1579: martin@1579: #define RTL8129_CAPS HAS_MII_XCVR martin@1579: #define RTL8139_CAPS (HAS_CHIP_XCVR|HAS_LNK_CHNG) martin@1579: martin@1579: typedef enum { martin@1579: RTL8139 = 0, martin@1579: RTL8129, martin@1579: } board_t; martin@1579: martin@1579: martin@1579: /* indexed by board_t, above */ martin@1579: static const struct { martin@1579: const char *name; martin@1579: u32 hw_flags; martin@1579: } board_info[] __devinitdata = { martin@1579: { "RealTek RTL8139", RTL8139_CAPS }, martin@1579: { "RealTek RTL8129", RTL8129_CAPS }, martin@1579: }; martin@1579: martin@1579: martin@1579: static struct pci_device_id rtl8139_pci_tbl[] = { martin@1579: {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: martin@1579: #ifdef CONFIG_SH_SECUREEDGE5410 martin@1579: /* Bogus 8139 silicon reports 8129 without external PROM :-( */ martin@1579: {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, martin@1579: #endif martin@1579: #ifdef CONFIG_8139TOO_8129 martin@1579: {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 }, martin@1579: #endif martin@1579: martin@1579: /* some crazy cards report invalid vendor ids like martin@1579: * 0x0001 here. The other ids are valid and constant, martin@1579: * so we simply don't match on the main vendor id. martin@1579: */ martin@1579: {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 }, martin@1579: {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 }, martin@1579: {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 }, martin@1579: martin@1579: {0,} martin@1579: }; martin@1579: MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); martin@1579: martin@1579: static struct { martin@1579: const char str[ETH_GSTRING_LEN]; martin@1579: } ethtool_stats_keys[] = { martin@1579: { "early_rx" }, martin@1579: { "tx_buf_mapped" }, martin@1579: { "tx_timeouts" }, martin@1579: { "rx_lost_in_ring" }, martin@1579: }; martin@1579: martin@1579: /* The rest of these values should never change. */ martin@1579: martin@1579: /* Symbolic offsets to registers. */ martin@1579: enum RTL8139_registers { martin@1579: MAC0 = 0, /* Ethernet hardware address. */ martin@1579: MAR0 = 8, /* Multicast filter. */ martin@1579: TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ martin@1579: TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ martin@1579: RxBuf = 0x30, martin@1579: ChipCmd = 0x37, martin@1579: RxBufPtr = 0x38, martin@1579: RxBufAddr = 0x3A, martin@1579: IntrMask = 0x3C, martin@1579: IntrStatus = 0x3E, martin@1579: TxConfig = 0x40, martin@1579: RxConfig = 0x44, martin@1579: Timer = 0x48, /* A general-purpose counter. */ martin@1579: RxMissed = 0x4C, /* 24 bits valid, write clears. */ martin@1579: Cfg9346 = 0x50, martin@1579: Config0 = 0x51, martin@1579: Config1 = 0x52, martin@1579: TimerInt = 0x54, martin@1579: MediaStatus = 0x58, martin@1579: Config3 = 0x59, martin@1579: Config4 = 0x5A, /* absent on RTL-8139A */ martin@1579: HltClk = 0x5B, martin@1579: MultiIntr = 0x5C, martin@1579: TxSummary = 0x60, martin@1579: BasicModeCtrl = 0x62, martin@1579: BasicModeStatus = 0x64, martin@1579: NWayAdvert = 0x66, martin@1579: NWayLPAR = 0x68, martin@1579: NWayExpansion = 0x6A, martin@1579: /* Undocumented registers, but required for proper operation. */ martin@1579: FIFOTMS = 0x70, /* FIFO Control and test. */ martin@1579: CSCR = 0x74, /* Chip Status and Configuration Register. */ martin@1579: PARA78 = 0x78, martin@1579: FlashReg = 0xD4, /* Communication with Flash ROM, four bytes. */ martin@1579: PARA7c = 0x7c, /* Magic transceiver parameter register. */ martin@1579: Config5 = 0xD8, /* absent on RTL-8139A */ martin@1579: }; martin@1579: martin@1579: enum ClearBitMasks { martin@1579: MultiIntrClear = 0xF000, martin@1579: ChipCmdClear = 0xE2, martin@1579: Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), martin@1579: }; martin@1579: martin@1579: enum ChipCmdBits { martin@1579: CmdReset = 0x10, martin@1579: CmdRxEnb = 0x08, martin@1579: CmdTxEnb = 0x04, martin@1579: RxBufEmpty = 0x01, martin@1579: }; martin@1579: martin@1579: /* Interrupt register bits, using my own meaningful names. */ martin@1579: enum IntrStatusBits { martin@1579: PCIErr = 0x8000, martin@1579: PCSTimeout = 0x4000, martin@1579: RxFIFOOver = 0x40, martin@1579: RxUnderrun = 0x20, martin@1579: RxOverflow = 0x10, martin@1579: TxErr = 0x08, martin@1579: TxOK = 0x04, martin@1579: RxErr = 0x02, martin@1579: RxOK = 0x01, martin@1579: martin@1579: RxAckBits = RxFIFOOver | RxOverflow | RxOK, martin@1579: }; martin@1579: martin@1579: enum TxStatusBits { martin@1579: TxHostOwns = 0x2000, martin@1579: TxUnderrun = 0x4000, martin@1579: TxStatOK = 0x8000, martin@1579: TxOutOfWindow = 0x20000000, martin@1579: TxAborted = 0x40000000, martin@1579: TxCarrierLost = 0x80000000, martin@1579: }; martin@1579: enum RxStatusBits { martin@1579: RxMulticast = 0x8000, martin@1579: RxPhysical = 0x4000, martin@1579: RxBroadcast = 0x2000, martin@1579: RxBadSymbol = 0x0020, martin@1579: RxRunt = 0x0010, martin@1579: RxTooLong = 0x0008, martin@1579: RxCRCErr = 0x0004, martin@1579: RxBadAlign = 0x0002, martin@1579: RxStatusOK = 0x0001, martin@1579: }; martin@1579: martin@1579: /* Bits in RxConfig. */ martin@1579: enum rx_mode_bits { martin@1579: AcceptErr = 0x20, martin@1579: AcceptRunt = 0x10, martin@1579: AcceptBroadcast = 0x08, martin@1579: AcceptMulticast = 0x04, martin@1579: AcceptMyPhys = 0x02, martin@1579: AcceptAllPhys = 0x01, martin@1579: }; martin@1579: martin@1579: /* Bits in TxConfig. */ martin@1579: enum tx_config_bits { martin@1579: /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */ martin@1579: TxIFGShift = 24, martin@1579: TxIFG84 = (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */ martin@1579: TxIFG88 = (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */ martin@1579: TxIFG92 = (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */ martin@1579: TxIFG96 = (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */ martin@1579: martin@1579: TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ martin@1579: TxCRC = (1 << 16), /* DISABLE Tx pkt CRC append */ martin@1579: TxClearAbt = (1 << 0), /* Clear abort (WO) */ martin@1579: TxDMAShift = 8, /* DMA burst value (0-7) is shifted X many bits */ martin@1579: TxRetryShift = 4, /* TXRR value (0-15) is shifted X many bits */ martin@1579: martin@1579: TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ martin@1579: }; martin@1579: martin@1579: /* Bits in Config1 */ martin@1579: enum Config1Bits { martin@1579: Cfg1_PM_Enable = 0x01, martin@1579: Cfg1_VPD_Enable = 0x02, martin@1579: Cfg1_PIO = 0x04, martin@1579: Cfg1_MMIO = 0x08, martin@1579: LWAKE = 0x10, /* not on 8139, 8139A */ martin@1579: Cfg1_Driver_Load = 0x20, martin@1579: Cfg1_LED0 = 0x40, martin@1579: Cfg1_LED1 = 0x80, martin@1579: SLEEP = (1 << 1), /* only on 8139, 8139A */ martin@1579: PWRDN = (1 << 0), /* only on 8139, 8139A */ martin@1579: }; martin@1579: martin@1579: /* Bits in Config3 */ martin@1579: enum Config3Bits { martin@1579: Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ martin@1579: Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ martin@1579: Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ martin@1579: Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ martin@1579: Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ martin@1579: Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ martin@1579: Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ martin@1579: Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ martin@1579: }; martin@1579: martin@1579: /* Bits in Config4 */ martin@1579: enum Config4Bits { martin@1579: LWPTN = (1 << 2), /* not on 8139, 8139A */ martin@1579: }; martin@1579: martin@1579: /* Bits in Config5 */ martin@1579: enum Config5Bits { martin@1579: Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ martin@1579: Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ martin@1579: Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ martin@1579: Cfg5_FIFOAddrPtr= (1 << 3), /* Realtek internal SRAM testing */ martin@1579: Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ martin@1579: Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ martin@1579: Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ martin@1579: }; martin@1579: martin@1579: enum RxConfigBits { martin@1579: /* rx fifo threshold */ martin@1579: RxCfgFIFOShift = 13, martin@1579: RxCfgFIFONone = (7 << RxCfgFIFOShift), martin@1579: martin@1579: /* Max DMA burst */ martin@1579: RxCfgDMAShift = 8, martin@1579: RxCfgDMAUnlimited = (7 << RxCfgDMAShift), martin@1579: martin@1579: /* rx ring buffer length */ martin@1579: RxCfgRcv8K = 0, martin@1579: RxCfgRcv16K = (1 << 11), martin@1579: RxCfgRcv32K = (1 << 12), martin@1579: RxCfgRcv64K = (1 << 11) | (1 << 12), martin@1579: martin@1579: /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */ martin@1579: RxNoWrap = (1 << 7), martin@1579: }; martin@1579: martin@1579: /* Twister tuning parameters from RealTek. martin@1579: Completely undocumented, but required to tune bad links on some boards. */ martin@1579: enum CSCRBits { martin@1579: CSCR_LinkOKBit = 0x0400, martin@1579: CSCR_LinkChangeBit = 0x0800, martin@1579: CSCR_LinkStatusBits = 0x0f000, martin@1579: CSCR_LinkDownOffCmd = 0x003c0, martin@1579: CSCR_LinkDownCmd = 0x0f3c0, martin@1579: }; martin@1579: martin@1579: enum Cfg9346Bits { martin@1579: Cfg9346_Lock = 0x00, martin@1579: Cfg9346_Unlock = 0xC0, martin@1579: }; martin@1579: martin@1579: typedef enum { martin@1579: CH_8139 = 0, martin@1579: CH_8139_K, martin@1579: CH_8139A, martin@1579: CH_8139A_G, martin@1579: CH_8139B, martin@1579: CH_8130, martin@1579: CH_8139C, martin@1579: CH_8100, martin@1579: CH_8100B_8139D, martin@1579: CH_8101, martin@1579: } chip_t; martin@1579: martin@1579: enum chip_flags { martin@1579: HasHltClk = (1 << 0), martin@1579: HasLWake = (1 << 1), martin@1579: }; martin@1579: martin@1579: #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \ martin@1579: (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22) martin@1579: #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1) martin@1579: martin@1579: /* directly indexed by chip_t, above */ martin@1579: static const struct { martin@1579: const char *name; martin@1579: u32 version; /* from RTL8139C/RTL8139D docs */ martin@1579: u32 flags; martin@1579: } rtl_chip_info[] = { martin@1579: { "RTL-8139", martin@1579: HW_REVID(1, 0, 0, 0, 0, 0, 0), martin@1579: HasHltClk, martin@1579: }, martin@1579: martin@1579: { "RTL-8139 rev K", martin@1579: HW_REVID(1, 1, 0, 0, 0, 0, 0), martin@1579: HasHltClk, martin@1579: }, martin@1579: martin@1579: { "RTL-8139A", martin@1579: HW_REVID(1, 1, 1, 0, 0, 0, 0), martin@1579: HasHltClk, /* XXX undocumented? */ martin@1579: }, martin@1579: martin@1579: { "RTL-8139A rev G", martin@1579: HW_REVID(1, 1, 1, 0, 0, 1, 0), martin@1579: HasHltClk, /* XXX undocumented? */ martin@1579: }, martin@1579: martin@1579: { "RTL-8139B", martin@1579: HW_REVID(1, 1, 1, 1, 0, 0, 0), martin@1579: HasLWake, martin@1579: }, martin@1579: martin@1579: { "RTL-8130", martin@1579: HW_REVID(1, 1, 1, 1, 1, 0, 0), martin@1579: HasLWake, martin@1579: }, martin@1579: martin@1579: { "RTL-8139C", martin@1579: HW_REVID(1, 1, 1, 0, 1, 0, 0), martin@1579: HasLWake, martin@1579: }, martin@1579: martin@1579: { "RTL-8100", martin@1579: HW_REVID(1, 1, 1, 1, 0, 1, 0), martin@1579: HasLWake, martin@1579: }, martin@1579: martin@1579: { "RTL-8100B/8139D", martin@1579: HW_REVID(1, 1, 1, 0, 1, 0, 1), martin@1579: HasHltClk /* XXX undocumented? */ martin@1579: | HasLWake, martin@1579: }, martin@1579: martin@1579: { "RTL-8101", martin@1579: HW_REVID(1, 1, 1, 0, 1, 1, 1), martin@1579: HasLWake, martin@1579: }, martin@1579: }; martin@1579: martin@1579: struct rtl_extra_stats { martin@1579: unsigned long early_rx; martin@1579: unsigned long tx_buf_mapped; martin@1579: unsigned long tx_timeouts; martin@1579: unsigned long rx_lost_in_ring; martin@1579: }; martin@1579: martin@1579: struct rtl8139_private { martin@1579: void __iomem *mmio_addr; martin@1579: int drv_flags; martin@1579: struct pci_dev *pci_dev; martin@1579: u32 msg_enable; martin@1579: struct napi_struct napi; martin@1579: struct net_device *dev; martin@1579: martin@1579: unsigned char *rx_ring; martin@1579: unsigned int cur_rx; /* RX buf index of next pkt */ martin@1579: dma_addr_t rx_ring_dma; martin@1579: martin@1579: unsigned int tx_flag; martin@1579: unsigned long cur_tx; martin@1579: unsigned long dirty_tx; martin@1579: unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ martin@1579: unsigned char *tx_bufs; /* Tx bounce buffer region. */ martin@1579: dma_addr_t tx_bufs_dma; martin@1579: martin@1579: signed char phys[4]; /* MII device addresses. */ martin@1579: martin@1579: /* Twister tune state. */ martin@1579: char twistie, twist_row, twist_col; martin@1579: martin@1579: unsigned int watchdog_fired : 1; martin@1579: unsigned int default_port : 4; /* Last dev->if_port value. */ martin@1579: unsigned int have_thread : 1; martin@1579: martin@1579: spinlock_t lock; martin@1579: spinlock_t rx_lock; martin@1579: martin@1579: chip_t chipset; martin@1579: u32 rx_config; martin@1579: struct rtl_extra_stats xstats; martin@1579: martin@1579: struct delayed_work thread; martin@1579: martin@1579: struct mii_if_info mii; martin@1579: unsigned int regs_len; martin@1579: unsigned long fifo_copy_timeout; martin@1579: }; martin@1579: martin@1579: MODULE_AUTHOR ("Jeff Garzik "); martin@1579: MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver"); martin@1579: MODULE_LICENSE("GPL"); martin@1579: MODULE_VERSION(DRV_VERSION); martin@1579: martin@1579: module_param(use_io, int, 0); martin@1579: MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO"); martin@1579: module_param(multicast_filter_limit, int, 0); martin@1579: module_param_array(media, int, NULL, 0); martin@1579: module_param_array(full_duplex, int, NULL, 0); martin@1579: module_param(debug, int, 0); martin@1579: MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); martin@1579: MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); martin@1579: MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); martin@1579: MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); martin@1579: martin@1579: static int read_eeprom (void __iomem *ioaddr, int location, int addr_len); martin@1579: static int rtl8139_open (struct net_device *dev); martin@1579: static int mdio_read (struct net_device *dev, int phy_id, int location); martin@1579: static void mdio_write (struct net_device *dev, int phy_id, int location, martin@1579: int val); martin@1579: static void rtl8139_start_thread(struct rtl8139_private *tp); martin@1579: static void rtl8139_tx_timeout (struct net_device *dev); martin@1579: static void rtl8139_init_ring (struct net_device *dev); martin@1579: static int rtl8139_start_xmit (struct sk_buff *skb, martin@1579: struct net_device *dev); martin@1579: #ifdef CONFIG_NET_POLL_CONTROLLER martin@1579: static void rtl8139_poll_controller(struct net_device *dev); martin@1579: #endif martin@1579: static int rtl8139_set_mac_address(struct net_device *dev, void *p); martin@1579: static int rtl8139_poll(struct napi_struct *napi, int budget); martin@1579: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance); martin@1579: static int rtl8139_close (struct net_device *dev); martin@1579: static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); martin@1579: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); martin@1579: static void rtl8139_set_rx_mode (struct net_device *dev); martin@1579: static void __set_rx_mode (struct net_device *dev); martin@1579: static void rtl8139_hw_start (struct net_device *dev); martin@1579: static void rtl8139_thread (struct work_struct *work); martin@1579: static void rtl8139_tx_timeout_task(struct work_struct *work); martin@1579: static const struct ethtool_ops rtl8139_ethtool_ops; martin@1579: martin@1579: /* write MMIO register, with flush */ martin@1579: /* Flush avoids rtl8139 bug w/ posted MMIO writes */ martin@1579: #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0) martin@1579: #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0) martin@1579: #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0) martin@1579: martin@1579: /* write MMIO register */ martin@1579: #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg)) martin@1579: #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg)) martin@1579: #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg)) martin@1579: martin@1579: /* read MMIO register */ martin@1579: #define RTL_R8(reg) ioread8 (ioaddr + (reg)) martin@1579: #define RTL_R16(reg) ioread16 (ioaddr + (reg)) martin@1579: #define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) martin@1579: martin@1579: martin@1579: static const u16 rtl8139_intr_mask = martin@1579: PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | martin@1579: TxErr | TxOK | RxErr | RxOK; martin@1579: martin@1579: static const u16 rtl8139_norx_intr_mask = martin@1579: PCIErr | PCSTimeout | RxUnderrun | martin@1579: TxErr | TxOK | RxErr ; martin@1579: martin@1579: #if RX_BUF_IDX == 0 martin@1579: static const unsigned int rtl8139_rx_config = martin@1579: RxCfgRcv8K | RxNoWrap | martin@1579: (RX_FIFO_THRESH << RxCfgFIFOShift) | martin@1579: (RX_DMA_BURST << RxCfgDMAShift); martin@1579: #elif RX_BUF_IDX == 1 martin@1579: static const unsigned int rtl8139_rx_config = martin@1579: RxCfgRcv16K | RxNoWrap | martin@1579: (RX_FIFO_THRESH << RxCfgFIFOShift) | martin@1579: (RX_DMA_BURST << RxCfgDMAShift); martin@1579: #elif RX_BUF_IDX == 2 martin@1579: static const unsigned int rtl8139_rx_config = martin@1579: RxCfgRcv32K | RxNoWrap | martin@1579: (RX_FIFO_THRESH << RxCfgFIFOShift) | martin@1579: (RX_DMA_BURST << RxCfgDMAShift); martin@1579: #elif RX_BUF_IDX == 3 martin@1579: static const unsigned int rtl8139_rx_config = martin@1579: RxCfgRcv64K | martin@1579: (RX_FIFO_THRESH << RxCfgFIFOShift) | martin@1579: (RX_DMA_BURST << RxCfgDMAShift); martin@1579: #else martin@1579: #error "Invalid configuration for 8139_RXBUF_IDX" martin@1579: #endif martin@1579: martin@1579: static const unsigned int rtl8139_tx_config = martin@1579: TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); martin@1579: martin@1579: static void __rtl8139_cleanup_dev (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: struct pci_dev *pdev; martin@1579: martin@1579: assert (dev != NULL); martin@1579: assert (tp->pci_dev != NULL); martin@1579: pdev = tp->pci_dev; martin@1579: martin@1579: if (tp->mmio_addr) martin@1579: pci_iounmap (pdev, tp->mmio_addr); martin@1579: martin@1579: /* it's ok to call this even if we have no regions to free */ martin@1579: pci_release_regions (pdev); martin@1579: martin@1579: free_netdev(dev); martin@1579: pci_set_drvdata (pdev, NULL); martin@1579: } martin@1579: martin@1579: martin@1579: static void rtl8139_chip_reset (void __iomem *ioaddr) martin@1579: { martin@1579: int i; martin@1579: martin@1579: /* Soft reset the chip. */ martin@1579: RTL_W8 (ChipCmd, CmdReset); martin@1579: martin@1579: /* Check that the chip has finished the reset. */ martin@1579: for (i = 1000; i > 0; i--) { martin@1579: barrier(); martin@1579: if ((RTL_R8 (ChipCmd) & CmdReset) == 0) martin@1579: break; martin@1579: udelay (10); martin@1579: } martin@1579: } martin@1579: martin@1579: martin@1579: static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev) martin@1579: { martin@1579: void __iomem *ioaddr; martin@1579: struct net_device *dev; martin@1579: struct rtl8139_private *tp; martin@1579: u8 tmp8; martin@1579: int rc, disable_dev_on_err = 0; martin@1579: unsigned int i; martin@1579: unsigned long pio_start, pio_end, pio_flags, pio_len; martin@1579: unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; martin@1579: u32 version; martin@1579: martin@1579: assert (pdev != NULL); martin@1579: martin@1579: /* dev and priv zeroed in alloc_etherdev */ martin@1579: dev = alloc_etherdev (sizeof (*tp)); martin@1579: if (dev == NULL) { martin@1579: dev_err(&pdev->dev, "Unable to alloc new net device\n"); martin@1579: return ERR_PTR(-ENOMEM); martin@1579: } martin@1579: SET_NETDEV_DEV(dev, &pdev->dev); martin@1579: martin@1579: tp = netdev_priv(dev); martin@1579: tp->pci_dev = pdev; martin@1579: martin@1579: /* enable device (incl. PCI PM wakeup and hotplug setup) */ martin@1579: rc = pci_enable_device (pdev); martin@1579: if (rc) martin@1579: goto err_out; martin@1579: martin@1579: pio_start = pci_resource_start (pdev, 0); martin@1579: pio_end = pci_resource_end (pdev, 0); martin@1579: pio_flags = pci_resource_flags (pdev, 0); martin@1579: pio_len = pci_resource_len (pdev, 0); martin@1579: martin@1579: mmio_start = pci_resource_start (pdev, 1); martin@1579: mmio_end = pci_resource_end (pdev, 1); martin@1579: mmio_flags = pci_resource_flags (pdev, 1); martin@1579: mmio_len = pci_resource_len (pdev, 1); martin@1579: martin@1579: /* set this immediately, we need to know before martin@1579: * we talk to the chip directly */ martin@1579: pr_debug("PIO region size == 0x%02lX\n", pio_len); martin@1579: pr_debug("MMIO region size == 0x%02lX\n", mmio_len); martin@1579: martin@1579: retry: martin@1579: if (use_io) { martin@1579: /* make sure PCI base addr 0 is PIO */ martin@1579: if (!(pio_flags & IORESOURCE_IO)) { martin@1579: dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n"); martin@1579: rc = -ENODEV; martin@1579: goto err_out; martin@1579: } martin@1579: /* check for weird/broken PCI region reporting */ martin@1579: if (pio_len < RTL_MIN_IO_SIZE) { martin@1579: dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n"); martin@1579: rc = -ENODEV; martin@1579: goto err_out; martin@1579: } martin@1579: } else { martin@1579: /* make sure PCI base addr 1 is MMIO */ martin@1579: if (!(mmio_flags & IORESOURCE_MEM)) { martin@1579: dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); martin@1579: rc = -ENODEV; martin@1579: goto err_out; martin@1579: } martin@1579: if (mmio_len < RTL_MIN_IO_SIZE) { martin@1579: dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n"); martin@1579: rc = -ENODEV; martin@1579: goto err_out; martin@1579: } martin@1579: } martin@1579: martin@1579: rc = pci_request_regions (pdev, DRV_NAME); martin@1579: if (rc) martin@1579: goto err_out; martin@1579: disable_dev_on_err = 1; martin@1579: martin@1579: /* enable PCI bus-mastering */ martin@1579: pci_set_master (pdev); martin@1579: martin@1579: if (use_io) { martin@1579: ioaddr = pci_iomap(pdev, 0, 0); martin@1579: if (!ioaddr) { martin@1579: dev_err(&pdev->dev, "cannot map PIO, aborting\n"); martin@1579: rc = -EIO; martin@1579: goto err_out; martin@1579: } martin@1579: dev->base_addr = pio_start; martin@1579: tp->regs_len = pio_len; martin@1579: } else { martin@1579: /* ioremap MMIO region */ martin@1579: ioaddr = pci_iomap(pdev, 1, 0); martin@1579: if (ioaddr == NULL) { martin@1579: dev_err(&pdev->dev, "cannot remap MMIO, trying PIO\n"); martin@1579: pci_release_regions(pdev); martin@1579: use_io = 1; martin@1579: goto retry; martin@1579: } martin@1579: dev->base_addr = (long) ioaddr; martin@1579: tp->regs_len = mmio_len; martin@1579: } martin@1579: tp->mmio_addr = ioaddr; martin@1579: martin@1579: /* Bring old chips out of low-power mode. */ martin@1579: RTL_W8 (HltClk, 'R'); martin@1579: martin@1579: /* check for missing/broken hardware */ martin@1579: if (RTL_R32 (TxConfig) == 0xFFFFFFFF) { martin@1579: dev_err(&pdev->dev, "Chip not responding, ignoring board\n"); martin@1579: rc = -EIO; martin@1579: goto err_out; martin@1579: } martin@1579: martin@1579: /* identify chip attached to board */ martin@1579: version = RTL_R32 (TxConfig) & HW_REVID_MASK; martin@1579: for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) martin@1579: if (version == rtl_chip_info[i].version) { martin@1579: tp->chipset = i; martin@1579: goto match; martin@1579: } martin@1579: martin@1579: /* if unknown chip, assume array element #0, original RTL-8139 in this case */ martin@1579: dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n"); martin@1579: dev_dbg(&pdev->dev, "TxConfig = 0x%lx\n", RTL_R32 (TxConfig)); martin@1579: tp->chipset = 0; martin@1579: martin@1579: match: martin@1579: pr_debug("chipset id (%d) == index %d, '%s'\n", martin@1579: version, i, rtl_chip_info[i].name); martin@1579: martin@1579: if (tp->chipset >= CH_8139B) { martin@1579: u8 new_tmp8 = tmp8 = RTL_R8 (Config1); martin@1579: pr_debug("PCI PM wakeup\n"); martin@1579: if ((rtl_chip_info[tp->chipset].flags & HasLWake) && martin@1579: (tmp8 & LWAKE)) martin@1579: new_tmp8 &= ~LWAKE; martin@1579: new_tmp8 |= Cfg1_PM_Enable; martin@1579: if (new_tmp8 != tmp8) { martin@1579: RTL_W8 (Cfg9346, Cfg9346_Unlock); martin@1579: RTL_W8 (Config1, tmp8); martin@1579: RTL_W8 (Cfg9346, Cfg9346_Lock); martin@1579: } martin@1579: if (rtl_chip_info[tp->chipset].flags & HasLWake) { martin@1579: tmp8 = RTL_R8 (Config4); martin@1579: if (tmp8 & LWPTN) { martin@1579: RTL_W8 (Cfg9346, Cfg9346_Unlock); martin@1579: RTL_W8 (Config4, tmp8 & ~LWPTN); martin@1579: RTL_W8 (Cfg9346, Cfg9346_Lock); martin@1579: } martin@1579: } martin@1579: } else { martin@1579: pr_debug("Old chip wakeup\n"); martin@1579: tmp8 = RTL_R8 (Config1); martin@1579: tmp8 &= ~(SLEEP | PWRDN); martin@1579: RTL_W8 (Config1, tmp8); martin@1579: } martin@1579: martin@1579: rtl8139_chip_reset (ioaddr); martin@1579: martin@1579: return dev; martin@1579: martin@1579: err_out: martin@1579: __rtl8139_cleanup_dev (dev); martin@1579: if (disable_dev_on_err) martin@1579: pci_disable_device (pdev); martin@1579: return ERR_PTR(rc); martin@1579: } martin@1579: martin@1579: static const struct net_device_ops rtl8139_netdev_ops = { martin@1579: .ndo_open = rtl8139_open, martin@1579: .ndo_stop = rtl8139_close, martin@1579: .ndo_get_stats = rtl8139_get_stats, martin@1579: .ndo_change_mtu = eth_change_mtu, martin@1579: .ndo_validate_addr = eth_validate_addr, martin@1579: .ndo_set_mac_address = rtl8139_set_mac_address, martin@1579: .ndo_start_xmit = rtl8139_start_xmit, martin@1579: .ndo_set_multicast_list = rtl8139_set_rx_mode, martin@1579: .ndo_do_ioctl = netdev_ioctl, martin@1579: .ndo_tx_timeout = rtl8139_tx_timeout, martin@1579: #ifdef CONFIG_NET_POLL_CONTROLLER martin@1579: .ndo_poll_controller = rtl8139_poll_controller, martin@1579: #endif martin@1579: }; martin@1579: martin@1579: static int __devinit rtl8139_init_one (struct pci_dev *pdev, martin@1579: const struct pci_device_id *ent) martin@1579: { martin@1579: struct net_device *dev = NULL; martin@1579: struct rtl8139_private *tp; martin@1579: int i, addr_len, option; martin@1579: void __iomem *ioaddr; martin@1579: static int board_idx = -1; martin@1579: martin@1579: assert (pdev != NULL); martin@1579: assert (ent != NULL); martin@1579: martin@1579: board_idx++; martin@1579: martin@1579: /* when we're built into the kernel, the driver version message martin@1579: * is only printed if at least one 8139 board has been found martin@1579: */ martin@1579: #ifndef MODULE martin@1579: { martin@1579: static int printed_version; martin@1579: if (!printed_version++) martin@1579: pr_info(RTL8139_DRIVER_NAME "\n"); martin@1579: } martin@1579: #endif martin@1579: martin@1579: if (pdev->vendor == PCI_VENDOR_ID_REALTEK && martin@1579: pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) { martin@1579: dev_info(&pdev->dev, martin@1579: "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip, use 8139cp\n", martin@1579: pdev->vendor, pdev->device, pdev->revision); martin@1579: return -ENODEV; martin@1579: } martin@1579: martin@1579: if (pdev->vendor == PCI_VENDOR_ID_REALTEK && martin@1579: pdev->device == PCI_DEVICE_ID_REALTEK_8139 && martin@1579: pdev->subsystem_vendor == PCI_VENDOR_ID_ATHEROS && martin@1579: pdev->subsystem_device == PCI_DEVICE_ID_REALTEK_8139) { martin@1579: pr_info("8139too: OQO Model 2 detected. Forcing PIO\n"); martin@1579: use_io = 1; martin@1579: } martin@1579: martin@1579: dev = rtl8139_init_board (pdev); martin@1579: if (IS_ERR(dev)) martin@1579: return PTR_ERR(dev); martin@1579: martin@1579: assert (dev != NULL); martin@1579: tp = netdev_priv(dev); martin@1579: tp->dev = dev; martin@1579: martin@1579: ioaddr = tp->mmio_addr; martin@1579: assert (ioaddr != NULL); martin@1579: martin@1579: addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; martin@1579: for (i = 0; i < 3; i++) martin@1579: ((__le16 *) (dev->dev_addr))[i] = martin@1579: cpu_to_le16(read_eeprom (ioaddr, i + 7, addr_len)); martin@1579: memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); martin@1579: martin@1579: /* The Rtl8139-specific entries in the device structure. */ martin@1579: dev->netdev_ops = &rtl8139_netdev_ops; martin@1579: dev->ethtool_ops = &rtl8139_ethtool_ops; martin@1579: dev->watchdog_timeo = TX_TIMEOUT; martin@1579: netif_napi_add(dev, &tp->napi, rtl8139_poll, 64); martin@1579: martin@1579: /* note: the hardware is not capable of sg/csum/highdma, however martin@1579: * through the use of skb_copy_and_csum_dev we enable these martin@1579: * features martin@1579: */ martin@1579: dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA; martin@1579: martin@1579: dev->irq = pdev->irq; martin@1579: martin@1579: /* tp zeroed and aligned in alloc_etherdev */ martin@1579: tp = netdev_priv(dev); martin@1579: martin@1579: /* note: tp->chipset set in rtl8139_init_board */ martin@1579: tp->drv_flags = board_info[ent->driver_data].hw_flags; martin@1579: tp->mmio_addr = ioaddr; martin@1579: tp->msg_enable = martin@1579: (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1)); martin@1579: spin_lock_init (&tp->lock); martin@1579: spin_lock_init (&tp->rx_lock); martin@1579: INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); martin@1579: tp->mii.dev = dev; martin@1579: tp->mii.mdio_read = mdio_read; martin@1579: tp->mii.mdio_write = mdio_write; martin@1579: tp->mii.phy_id_mask = 0x3f; martin@1579: tp->mii.reg_num_mask = 0x1f; martin@1579: martin@1579: /* dev is fully set up and ready to use now */ martin@1579: pr_debug("about to register device named %s (%p)...\n", dev->name, dev); martin@1579: i = register_netdev (dev); martin@1579: if (i) goto err_out; martin@1579: martin@1579: pci_set_drvdata (pdev, dev); martin@1579: martin@1579: pr_info("%s: %s at 0x%lx, %pM, IRQ %d\n", martin@1579: dev->name, martin@1579: board_info[ent->driver_data].name, martin@1579: dev->base_addr, martin@1579: dev->dev_addr, martin@1579: dev->irq); martin@1579: martin@1579: pr_debug("%s: Identified 8139 chip type '%s'\n", martin@1579: dev->name, rtl_chip_info[tp->chipset].name); martin@1579: martin@1579: /* Find the connected MII xcvrs. martin@1579: Doing this in open() would allow detecting external xcvrs later, but martin@1579: takes too much time. */ martin@1579: #ifdef CONFIG_8139TOO_8129 martin@1579: if (tp->drv_flags & HAS_MII_XCVR) { martin@1579: int phy, phy_idx = 0; martin@1579: for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) { martin@1579: int mii_status = mdio_read(dev, phy, 1); martin@1579: if (mii_status != 0xffff && mii_status != 0x0000) { martin@1579: u16 advertising = mdio_read(dev, phy, 4); martin@1579: tp->phys[phy_idx++] = phy; martin@1579: pr_info("%s: MII transceiver %d status 0x%4.4x advertising %4.4x.\n", martin@1579: dev->name, phy, mii_status, advertising); martin@1579: } martin@1579: } martin@1579: if (phy_idx == 0) { martin@1579: pr_info("%s: No MII transceivers found! Assuming SYM transceiver.\n", martin@1579: dev->name); martin@1579: tp->phys[0] = 32; martin@1579: } martin@1579: } else martin@1579: #endif martin@1579: tp->phys[0] = 32; martin@1579: tp->mii.phy_id = tp->phys[0]; martin@1579: martin@1579: /* The lower four bits are the media type. */ martin@1579: option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; martin@1579: if (option > 0) { martin@1579: tp->mii.full_duplex = (option & 0x210) ? 1 : 0; martin@1579: tp->default_port = option & 0xFF; martin@1579: if (tp->default_port) martin@1579: tp->mii.force_media = 1; martin@1579: } martin@1579: if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) martin@1579: tp->mii.full_duplex = full_duplex[board_idx]; martin@1579: if (tp->mii.full_duplex) { martin@1579: pr_info("%s: Media type forced to Full Duplex.\n", dev->name); martin@1579: /* Changing the MII-advertised media because might prevent martin@1579: re-connection. */ martin@1579: tp->mii.force_media = 1; martin@1579: } martin@1579: if (tp->default_port) { martin@1579: pr_info(" Forcing %dMbps %s-duplex operation.\n", martin@1579: (option & 0x20 ? 100 : 10), martin@1579: (option & 0x10 ? "full" : "half")); martin@1579: mdio_write(dev, tp->phys[0], 0, martin@1579: ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ martin@1579: ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ martin@1579: } martin@1579: martin@1579: /* Put the chip into low-power mode. */ martin@1579: if (rtl_chip_info[tp->chipset].flags & HasHltClk) martin@1579: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ martin@1579: martin@1579: return 0; martin@1579: martin@1579: err_out: martin@1579: __rtl8139_cleanup_dev (dev); martin@1579: pci_disable_device (pdev); martin@1579: return i; martin@1579: } martin@1579: martin@1579: martin@1579: static void __devexit rtl8139_remove_one (struct pci_dev *pdev) martin@1579: { martin@1579: struct net_device *dev = pci_get_drvdata (pdev); martin@1579: martin@1579: assert (dev != NULL); martin@1579: martin@1579: flush_scheduled_work(); martin@1579: martin@1579: unregister_netdev (dev); martin@1579: martin@1579: __rtl8139_cleanup_dev (dev); martin@1579: pci_disable_device (pdev); martin@1579: } martin@1579: martin@1579: martin@1579: /* Serial EEPROM section. */ martin@1579: martin@1579: /* EEPROM_Ctrl bits. */ martin@1579: #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ martin@1579: #define EE_CS 0x08 /* EEPROM chip select. */ martin@1579: #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ martin@1579: #define EE_WRITE_0 0x00 martin@1579: #define EE_WRITE_1 0x02 martin@1579: #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ martin@1579: #define EE_ENB (0x80 | EE_CS) martin@1579: martin@1579: /* Delay between EEPROM clock transitions. martin@1579: No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. martin@1579: */ martin@1579: martin@1579: #define eeprom_delay() (void)RTL_R32(Cfg9346) martin@1579: martin@1579: /* The EEPROM commands include the alway-set leading bit. */ martin@1579: #define EE_WRITE_CMD (5) martin@1579: #define EE_READ_CMD (6) martin@1579: #define EE_ERASE_CMD (7) martin@1579: martin@1579: static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len) martin@1579: { martin@1579: int i; martin@1579: unsigned retval = 0; martin@1579: int read_cmd = location | (EE_READ_CMD << addr_len); martin@1579: martin@1579: RTL_W8 (Cfg9346, EE_ENB & ~EE_CS); martin@1579: RTL_W8 (Cfg9346, EE_ENB); martin@1579: eeprom_delay (); martin@1579: martin@1579: /* Shift the read command bits out. */ martin@1579: for (i = 4 + addr_len; i >= 0; i--) { martin@1579: int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; martin@1579: RTL_W8 (Cfg9346, EE_ENB | dataval); martin@1579: eeprom_delay (); martin@1579: RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK); martin@1579: eeprom_delay (); martin@1579: } martin@1579: RTL_W8 (Cfg9346, EE_ENB); martin@1579: eeprom_delay (); martin@1579: martin@1579: for (i = 16; i > 0; i--) { martin@1579: RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK); martin@1579: eeprom_delay (); martin@1579: retval = martin@1579: (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 : martin@1579: 0); martin@1579: RTL_W8 (Cfg9346, EE_ENB); martin@1579: eeprom_delay (); martin@1579: } martin@1579: martin@1579: /* Terminate the EEPROM access. */ martin@1579: RTL_W8 (Cfg9346, ~EE_CS); martin@1579: eeprom_delay (); martin@1579: martin@1579: return retval; martin@1579: } martin@1579: martin@1579: /* MII serial management: mostly bogus for now. */ martin@1579: /* Read and write the MII management registers using software-generated martin@1579: serial MDIO protocol. martin@1579: The maximum data clock rate is 2.5 Mhz. The minimum timing is usually martin@1579: met by back-to-back PCI I/O cycles, but we insert a delay to avoid martin@1579: "overclocking" issues. */ martin@1579: #define MDIO_DIR 0x80 martin@1579: #define MDIO_DATA_OUT 0x04 martin@1579: #define MDIO_DATA_IN 0x02 martin@1579: #define MDIO_CLK 0x01 martin@1579: #define MDIO_WRITE0 (MDIO_DIR) martin@1579: #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) martin@1579: martin@1579: #define mdio_delay() RTL_R8(Config4) martin@1579: martin@1579: martin@1579: static const char mii_2_8139_map[8] = { martin@1579: BasicModeCtrl, martin@1579: BasicModeStatus, martin@1579: 0, martin@1579: 0, martin@1579: NWayAdvert, martin@1579: NWayLPAR, martin@1579: NWayExpansion, martin@1579: 0 martin@1579: }; martin@1579: martin@1579: martin@1579: #ifdef CONFIG_8139TOO_8129 martin@1579: /* Syncronize the MII management interface by shifting 32 one bits out. */ martin@1579: static void mdio_sync (void __iomem *ioaddr) martin@1579: { martin@1579: int i; martin@1579: martin@1579: for (i = 32; i >= 0; i--) { martin@1579: RTL_W8 (Config4, MDIO_WRITE1); martin@1579: mdio_delay (); martin@1579: RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK); martin@1579: mdio_delay (); martin@1579: } martin@1579: } martin@1579: #endif martin@1579: martin@1579: static int mdio_read (struct net_device *dev, int phy_id, int location) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: int retval = 0; martin@1579: #ifdef CONFIG_8139TOO_8129 martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; martin@1579: int i; martin@1579: #endif martin@1579: martin@1579: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: return location < 8 && mii_2_8139_map[location] ? martin@1579: RTL_R16 (mii_2_8139_map[location]) : 0; martin@1579: } martin@1579: martin@1579: #ifdef CONFIG_8139TOO_8129 martin@1579: mdio_sync (ioaddr); martin@1579: /* Shift the read command bits out. */ martin@1579: for (i = 15; i >= 0; i--) { martin@1579: int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; martin@1579: martin@1579: RTL_W8 (Config4, MDIO_DIR | dataval); martin@1579: mdio_delay (); martin@1579: RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK); martin@1579: mdio_delay (); martin@1579: } martin@1579: martin@1579: /* Read the two transition, 16 data, and wire-idle bits. */ martin@1579: for (i = 19; i > 0; i--) { martin@1579: RTL_W8 (Config4, 0); martin@1579: mdio_delay (); martin@1579: retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0); martin@1579: RTL_W8 (Config4, MDIO_CLK); martin@1579: mdio_delay (); martin@1579: } martin@1579: #endif martin@1579: martin@1579: return (retval >> 1) & 0xffff; martin@1579: } martin@1579: martin@1579: martin@1579: static void mdio_write (struct net_device *dev, int phy_id, int location, martin@1579: int value) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: #ifdef CONFIG_8139TOO_8129 martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; martin@1579: int i; martin@1579: #endif martin@1579: martin@1579: if (phy_id > 31) { /* Really a 8139. Use internal registers. */ martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: if (location == 0) { martin@1579: RTL_W8 (Cfg9346, Cfg9346_Unlock); martin@1579: RTL_W16 (BasicModeCtrl, value); martin@1579: RTL_W8 (Cfg9346, Cfg9346_Lock); martin@1579: } else if (location < 8 && mii_2_8139_map[location]) martin@1579: RTL_W16 (mii_2_8139_map[location], value); martin@1579: return; martin@1579: } martin@1579: martin@1579: #ifdef CONFIG_8139TOO_8129 martin@1579: mdio_sync (ioaddr); martin@1579: martin@1579: /* Shift the command bits out. */ martin@1579: for (i = 31; i >= 0; i--) { martin@1579: int dataval = martin@1579: (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; martin@1579: RTL_W8 (Config4, dataval); martin@1579: mdio_delay (); martin@1579: RTL_W8 (Config4, dataval | MDIO_CLK); martin@1579: mdio_delay (); martin@1579: } martin@1579: /* Clear out extra bits. */ martin@1579: for (i = 2; i > 0; i--) { martin@1579: RTL_W8 (Config4, 0); martin@1579: mdio_delay (); martin@1579: RTL_W8 (Config4, MDIO_CLK); martin@1579: mdio_delay (); martin@1579: } martin@1579: #endif martin@1579: } martin@1579: martin@1579: martin@1579: static int rtl8139_open (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: int retval; martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: martin@1579: retval = request_irq (dev->irq, rtl8139_interrupt, IRQF_SHARED, dev->name, dev); martin@1579: if (retval) martin@1579: return retval; martin@1579: martin@1579: tp->tx_bufs = dma_alloc_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, martin@1579: &tp->tx_bufs_dma, GFP_KERNEL); martin@1579: tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, martin@1579: &tp->rx_ring_dma, GFP_KERNEL); martin@1579: if (tp->tx_bufs == NULL || tp->rx_ring == NULL) { martin@1579: free_irq(dev->irq, dev); martin@1579: martin@1579: if (tp->tx_bufs) martin@1579: dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, martin@1579: tp->tx_bufs, tp->tx_bufs_dma); martin@1579: if (tp->rx_ring) martin@1579: dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, martin@1579: tp->rx_ring, tp->rx_ring_dma); martin@1579: martin@1579: return -ENOMEM; martin@1579: martin@1579: } martin@1579: martin@1579: napi_enable(&tp->napi); martin@1579: martin@1579: tp->mii.full_duplex = tp->mii.force_media; martin@1579: tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; martin@1579: martin@1579: rtl8139_init_ring (dev); martin@1579: rtl8139_hw_start (dev); martin@1579: netif_start_queue (dev); martin@1579: martin@1579: if (netif_msg_ifup(tp)) martin@1579: pr_debug("%s: rtl8139_open() ioaddr %#llx IRQ %d" martin@1579: " GP Pins %2.2x %s-duplex.\n", dev->name, martin@1579: (unsigned long long)pci_resource_start (tp->pci_dev, 1), martin@1579: dev->irq, RTL_R8 (MediaStatus), martin@1579: tp->mii.full_duplex ? "full" : "half"); martin@1579: martin@1579: rtl8139_start_thread(tp); martin@1579: martin@1579: return 0; martin@1579: } martin@1579: martin@1579: martin@1579: static void rtl_check_media (struct net_device *dev, unsigned int init_media) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: martin@1579: if (tp->phys[0] >= 0) { martin@1579: mii_check_media(&tp->mii, netif_msg_link(tp), init_media); martin@1579: } martin@1579: } martin@1579: martin@1579: /* Start the hardware at open or resume. */ martin@1579: static void rtl8139_hw_start (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: u32 i; martin@1579: u8 tmp; martin@1579: martin@1579: /* Bring old chips out of low-power mode. */ martin@1579: if (rtl_chip_info[tp->chipset].flags & HasHltClk) martin@1579: RTL_W8 (HltClk, 'R'); martin@1579: martin@1579: rtl8139_chip_reset (ioaddr); martin@1579: martin@1579: /* unlock Config[01234] and BMCR register writes */ martin@1579: RTL_W8_F (Cfg9346, Cfg9346_Unlock); martin@1579: /* Restore our idea of the MAC address. */ martin@1579: RTL_W32_F (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0))); martin@1579: RTL_W32_F (MAC0 + 4, le16_to_cpu (*(__le16 *) (dev->dev_addr + 4))); martin@1579: martin@1579: tp->cur_rx = 0; martin@1579: martin@1579: /* init Rx ring buffer DMA address */ martin@1579: RTL_W32_F (RxBuf, tp->rx_ring_dma); martin@1579: martin@1579: /* Must enable Tx/Rx before setting transfer thresholds! */ martin@1579: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); martin@1579: martin@1579: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; martin@1579: RTL_W32 (RxConfig, tp->rx_config); martin@1579: RTL_W32 (TxConfig, rtl8139_tx_config); martin@1579: martin@1579: rtl_check_media (dev, 1); martin@1579: martin@1579: if (tp->chipset >= CH_8139B) { martin@1579: /* Disable magic packet scanning, which is enabled martin@1579: * when PM is enabled in Config1. It can be reenabled martin@1579: * via ETHTOOL_SWOL if desired. */ martin@1579: RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); martin@1579: } martin@1579: martin@1579: pr_debug("init buffer addresses\n"); martin@1579: martin@1579: /* Lock Config[01234] and BMCR register writes */ martin@1579: RTL_W8 (Cfg9346, Cfg9346_Lock); martin@1579: martin@1579: /* init Tx buffer DMA addresses */ martin@1579: for (i = 0; i < NUM_TX_DESC; i++) martin@1579: RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); martin@1579: martin@1579: RTL_W32 (RxMissed, 0); martin@1579: martin@1579: rtl8139_set_rx_mode (dev); martin@1579: martin@1579: /* no early-rx interrupts */ martin@1579: RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); martin@1579: martin@1579: /* make sure RxTx has started */ martin@1579: tmp = RTL_R8 (ChipCmd); martin@1579: if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) martin@1579: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); martin@1579: martin@1579: /* Enable all known interrupts by setting the interrupt mask. */ martin@1579: RTL_W16 (IntrMask, rtl8139_intr_mask); martin@1579: } martin@1579: martin@1579: martin@1579: /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ martin@1579: static void rtl8139_init_ring (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: int i; martin@1579: martin@1579: tp->cur_rx = 0; martin@1579: tp->cur_tx = 0; martin@1579: tp->dirty_tx = 0; martin@1579: martin@1579: for (i = 0; i < NUM_TX_DESC; i++) martin@1579: tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; martin@1579: } martin@1579: martin@1579: martin@1579: /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ martin@1579: static int next_tick = 3 * HZ; martin@1579: martin@1579: #ifndef CONFIG_8139TOO_TUNE_TWISTER martin@1579: static inline void rtl8139_tune_twister (struct net_device *dev, martin@1579: struct rtl8139_private *tp) {} martin@1579: #else martin@1579: enum TwisterParamVals { martin@1579: PARA78_default = 0x78fa8388, martin@1579: PARA7c_default = 0xcb38de43, /* param[0][3] */ martin@1579: PARA7c_xxx = 0xcb38de43, martin@1579: }; martin@1579: martin@1579: static const unsigned long param[4][4] = { martin@1579: {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43}, martin@1579: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, martin@1579: {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, martin@1579: {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83} martin@1579: }; martin@1579: martin@1579: static void rtl8139_tune_twister (struct net_device *dev, martin@1579: struct rtl8139_private *tp) martin@1579: { martin@1579: int linkcase; martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: martin@1579: /* This is a complicated state machine to configure the "twister" for martin@1579: impedance/echos based on the cable length. martin@1579: All of this is magic and undocumented. martin@1579: */ martin@1579: switch (tp->twistie) { martin@1579: case 1: martin@1579: if (RTL_R16 (CSCR) & CSCR_LinkOKBit) { martin@1579: /* We have link beat, let us tune the twister. */ martin@1579: RTL_W16 (CSCR, CSCR_LinkDownOffCmd); martin@1579: tp->twistie = 2; /* Change to state 2. */ martin@1579: next_tick = HZ / 10; martin@1579: } else { martin@1579: /* Just put in some reasonable defaults for when beat returns. */ martin@1579: RTL_W16 (CSCR, CSCR_LinkDownCmd); martin@1579: RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ martin@1579: RTL_W32 (PARA78, PARA78_default); martin@1579: RTL_W32 (PARA7c, PARA7c_default); martin@1579: tp->twistie = 0; /* Bail from future actions. */ martin@1579: } martin@1579: break; martin@1579: case 2: martin@1579: /* Read how long it took to hear the echo. */ martin@1579: linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; martin@1579: if (linkcase == 0x7000) martin@1579: tp->twist_row = 3; martin@1579: else if (linkcase == 0x3000) martin@1579: tp->twist_row = 2; martin@1579: else if (linkcase == 0x1000) martin@1579: tp->twist_row = 1; martin@1579: else martin@1579: tp->twist_row = 0; martin@1579: tp->twist_col = 0; martin@1579: tp->twistie = 3; /* Change to state 2. */ martin@1579: next_tick = HZ / 10; martin@1579: break; martin@1579: case 3: martin@1579: /* Put out four tuning parameters, one per 100msec. */ martin@1579: if (tp->twist_col == 0) martin@1579: RTL_W16 (FIFOTMS, 0); martin@1579: RTL_W32 (PARA7c, param[(int) tp->twist_row] martin@1579: [(int) tp->twist_col]); martin@1579: next_tick = HZ / 10; martin@1579: if (++tp->twist_col >= 4) { martin@1579: /* For short cables we are done. martin@1579: For long cables (row == 3) check for mistune. */ martin@1579: tp->twistie = martin@1579: (tp->twist_row == 3) ? 4 : 0; martin@1579: } martin@1579: break; martin@1579: case 4: martin@1579: /* Special case for long cables: check for mistune. */ martin@1579: if ((RTL_R16 (CSCR) & martin@1579: CSCR_LinkStatusBits) == 0x7000) { martin@1579: tp->twistie = 0; martin@1579: break; martin@1579: } else { martin@1579: RTL_W32 (PARA7c, 0xfb38de03); martin@1579: tp->twistie = 5; martin@1579: next_tick = HZ / 10; martin@1579: } martin@1579: break; martin@1579: case 5: martin@1579: /* Retune for shorter cable (column 2). */ martin@1579: RTL_W32 (FIFOTMS, 0x20); martin@1579: RTL_W32 (PARA78, PARA78_default); martin@1579: RTL_W32 (PARA7c, PARA7c_default); martin@1579: RTL_W32 (FIFOTMS, 0x00); martin@1579: tp->twist_row = 2; martin@1579: tp->twist_col = 0; martin@1579: tp->twistie = 3; martin@1579: next_tick = HZ / 10; martin@1579: break; martin@1579: martin@1579: default: martin@1579: /* do nothing */ martin@1579: break; martin@1579: } martin@1579: } martin@1579: #endif /* CONFIG_8139TOO_TUNE_TWISTER */ martin@1579: martin@1579: static inline void rtl8139_thread_iter (struct net_device *dev, martin@1579: struct rtl8139_private *tp, martin@1579: void __iomem *ioaddr) martin@1579: { martin@1579: int mii_lpa; martin@1579: martin@1579: mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); martin@1579: martin@1579: if (!tp->mii.force_media && mii_lpa != 0xffff) { martin@1579: int duplex = (mii_lpa & LPA_100FULL) martin@1579: || (mii_lpa & 0x01C0) == 0x0040; martin@1579: if (tp->mii.full_duplex != duplex) { martin@1579: tp->mii.full_duplex = duplex; martin@1579: martin@1579: if (mii_lpa) { martin@1579: pr_info("%s: Setting %s-duplex based on MII #%d link" martin@1579: " partner ability of %4.4x.\n", martin@1579: dev->name, martin@1579: tp->mii.full_duplex ? "full" : "half", martin@1579: tp->phys[0], mii_lpa); martin@1579: } else { martin@1579: pr_info("%s: media is unconnected, link down, or incompatible connection\n", martin@1579: dev->name); martin@1579: } martin@1579: #if 0 martin@1579: RTL_W8 (Cfg9346, Cfg9346_Unlock); martin@1579: RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); martin@1579: RTL_W8 (Cfg9346, Cfg9346_Lock); martin@1579: #endif martin@1579: } martin@1579: } martin@1579: martin@1579: next_tick = HZ * 60; martin@1579: martin@1579: rtl8139_tune_twister (dev, tp); martin@1579: martin@1579: pr_debug("%s: Media selection tick, Link partner %4.4x.\n", martin@1579: dev->name, RTL_R16 (NWayLPAR)); martin@1579: pr_debug("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n", martin@1579: dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); martin@1579: pr_debug("%s: Chip config %2.2x %2.2x.\n", martin@1579: dev->name, RTL_R8 (Config0), martin@1579: RTL_R8 (Config1)); martin@1579: } martin@1579: martin@1579: static void rtl8139_thread (struct work_struct *work) martin@1579: { martin@1579: struct rtl8139_private *tp = martin@1579: container_of(work, struct rtl8139_private, thread.work); martin@1579: struct net_device *dev = tp->mii.dev; martin@1579: unsigned long thr_delay = next_tick; martin@1579: martin@1579: rtnl_lock(); martin@1579: martin@1579: if (!netif_running(dev)) martin@1579: goto out_unlock; martin@1579: martin@1579: if (tp->watchdog_fired) { martin@1579: tp->watchdog_fired = 0; martin@1579: rtl8139_tx_timeout_task(work); martin@1579: } else martin@1579: rtl8139_thread_iter(dev, tp, tp->mmio_addr); martin@1579: martin@1579: if (tp->have_thread) martin@1579: schedule_delayed_work(&tp->thread, thr_delay); martin@1579: out_unlock: martin@1579: rtnl_unlock (); martin@1579: } martin@1579: martin@1579: static void rtl8139_start_thread(struct rtl8139_private *tp) martin@1579: { martin@1579: tp->twistie = 0; martin@1579: if (tp->chipset == CH_8139_K) martin@1579: tp->twistie = 1; martin@1579: else if (tp->drv_flags & HAS_LNK_CHNG) martin@1579: return; martin@1579: martin@1579: tp->have_thread = 1; martin@1579: tp->watchdog_fired = 0; martin@1579: martin@1579: schedule_delayed_work(&tp->thread, next_tick); martin@1579: } martin@1579: martin@1579: static inline void rtl8139_tx_clear (struct rtl8139_private *tp) martin@1579: { martin@1579: tp->cur_tx = 0; martin@1579: tp->dirty_tx = 0; martin@1579: martin@1579: /* XXX account for unsent Tx packets in tp->stats.tx_dropped */ martin@1579: } martin@1579: martin@1579: static void rtl8139_tx_timeout_task (struct work_struct *work) martin@1579: { martin@1579: struct rtl8139_private *tp = martin@1579: container_of(work, struct rtl8139_private, thread.work); martin@1579: struct net_device *dev = tp->mii.dev; martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: int i; martin@1579: u8 tmp8; martin@1579: martin@1579: pr_debug("%s: Transmit timeout, status %2.2x %4.4x %4.4x media %2.2x.\n", martin@1579: dev->name, RTL_R8 (ChipCmd), martin@1579: RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus)); martin@1579: /* Emit info to figure out what went wrong. */ martin@1579: pr_debug("%s: Tx queue start entry %ld dirty entry %ld.\n", martin@1579: dev->name, tp->cur_tx, tp->dirty_tx); martin@1579: for (i = 0; i < NUM_TX_DESC; i++) martin@1579: pr_debug("%s: Tx descriptor %d is %8.8lx.%s\n", martin@1579: dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), martin@1579: i == tp->dirty_tx % NUM_TX_DESC ? martin@1579: " (queue head)" : ""); martin@1579: martin@1579: tp->xstats.tx_timeouts++; martin@1579: martin@1579: /* disable Tx ASAP, if not already */ martin@1579: tmp8 = RTL_R8 (ChipCmd); martin@1579: if (tmp8 & CmdTxEnb) martin@1579: RTL_W8 (ChipCmd, CmdRxEnb); martin@1579: martin@1579: spin_lock_bh(&tp->rx_lock); martin@1579: /* Disable interrupts by clearing the interrupt mask. */ martin@1579: RTL_W16 (IntrMask, 0x0000); martin@1579: martin@1579: /* Stop a shared interrupt from scavenging while we are. */ martin@1579: spin_lock_irq(&tp->lock); martin@1579: rtl8139_tx_clear (tp); martin@1579: spin_unlock_irq(&tp->lock); martin@1579: martin@1579: /* ...and finally, reset everything */ martin@1579: if (netif_running(dev)) { martin@1579: rtl8139_hw_start (dev); martin@1579: netif_wake_queue (dev); martin@1579: } martin@1579: spin_unlock_bh(&tp->rx_lock); martin@1579: } martin@1579: martin@1579: static void rtl8139_tx_timeout (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: martin@1579: tp->watchdog_fired = 1; martin@1579: if (!tp->have_thread) { martin@1579: INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); martin@1579: schedule_delayed_work(&tp->thread, next_tick); martin@1579: } martin@1579: } martin@1579: martin@1579: static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: unsigned int entry; martin@1579: unsigned int len = skb->len; martin@1579: unsigned long flags; martin@1579: martin@1579: /* Calculate the next Tx descriptor entry. */ martin@1579: entry = tp->cur_tx % NUM_TX_DESC; martin@1579: martin@1579: /* Note: the chip doesn't have auto-pad! */ martin@1579: if (likely(len < TX_BUF_SIZE)) { martin@1579: if (len < ETH_ZLEN) martin@1579: memset(tp->tx_buf[entry], 0, ETH_ZLEN); martin@1579: skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); martin@1579: dev_kfree_skb(skb); martin@1579: } else { martin@1579: dev_kfree_skb(skb); martin@1579: dev->stats.tx_dropped++; martin@1579: return 0; martin@1579: } martin@1579: martin@1579: spin_lock_irqsave(&tp->lock, flags); martin@1579: /* martin@1579: * Writing to TxStatus triggers a DMA transfer of the data martin@1579: * copied to tp->tx_buf[entry] above. Use a memory barrier martin@1579: * to make sure that the device sees the updated data. martin@1579: */ martin@1579: wmb(); martin@1579: RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), martin@1579: tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); martin@1579: martin@1579: dev->trans_start = jiffies; martin@1579: martin@1579: tp->cur_tx++; martin@1579: martin@1579: if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) martin@1579: netif_stop_queue (dev); martin@1579: spin_unlock_irqrestore(&tp->lock, flags); martin@1579: martin@1579: if (netif_msg_tx_queued(tp)) martin@1579: pr_debug("%s: Queued Tx packet size %u to slot %d.\n", martin@1579: dev->name, len, entry); martin@1579: martin@1579: return 0; martin@1579: } martin@1579: martin@1579: martin@1579: static void rtl8139_tx_interrupt (struct net_device *dev, martin@1579: struct rtl8139_private *tp, martin@1579: void __iomem *ioaddr) martin@1579: { martin@1579: unsigned long dirty_tx, tx_left; martin@1579: martin@1579: assert (dev != NULL); martin@1579: assert (ioaddr != NULL); martin@1579: martin@1579: dirty_tx = tp->dirty_tx; martin@1579: tx_left = tp->cur_tx - dirty_tx; martin@1579: while (tx_left > 0) { martin@1579: int entry = dirty_tx % NUM_TX_DESC; martin@1579: int txstatus; martin@1579: martin@1579: txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); martin@1579: martin@1579: if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) martin@1579: break; /* It still hasn't been Txed */ martin@1579: martin@1579: /* Note: TxCarrierLost is always asserted at 100mbps. */ martin@1579: if (txstatus & (TxOutOfWindow | TxAborted)) { martin@1579: /* There was an major error, log it. */ martin@1579: if (netif_msg_tx_err(tp)) martin@1579: pr_debug("%s: Transmit error, Tx status %8.8x.\n", martin@1579: dev->name, txstatus); martin@1579: dev->stats.tx_errors++; martin@1579: if (txstatus & TxAborted) { martin@1579: dev->stats.tx_aborted_errors++; martin@1579: RTL_W32 (TxConfig, TxClearAbt); martin@1579: RTL_W16 (IntrStatus, TxErr); martin@1579: wmb(); martin@1579: } martin@1579: if (txstatus & TxCarrierLost) martin@1579: dev->stats.tx_carrier_errors++; martin@1579: if (txstatus & TxOutOfWindow) martin@1579: dev->stats.tx_window_errors++; martin@1579: } else { martin@1579: if (txstatus & TxUnderrun) { martin@1579: /* Add 64 to the Tx FIFO threshold. */ martin@1579: if (tp->tx_flag < 0x00300000) martin@1579: tp->tx_flag += 0x00020000; martin@1579: dev->stats.tx_fifo_errors++; martin@1579: } martin@1579: dev->stats.collisions += (txstatus >> 24) & 15; martin@1579: dev->stats.tx_bytes += txstatus & 0x7ff; martin@1579: dev->stats.tx_packets++; martin@1579: } martin@1579: martin@1579: dirty_tx++; martin@1579: tx_left--; martin@1579: } martin@1579: martin@1579: #ifndef RTL8139_NDEBUG martin@1579: if (tp->cur_tx - dirty_tx > NUM_TX_DESC) { martin@1579: pr_err("%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", martin@1579: dev->name, dirty_tx, tp->cur_tx); martin@1579: dirty_tx += NUM_TX_DESC; martin@1579: } martin@1579: #endif /* RTL8139_NDEBUG */ martin@1579: martin@1579: /* only wake the queue if we did work, and the queue is stopped */ martin@1579: if (tp->dirty_tx != dirty_tx) { martin@1579: tp->dirty_tx = dirty_tx; martin@1579: mb(); martin@1579: netif_wake_queue (dev); martin@1579: } martin@1579: } martin@1579: martin@1579: martin@1579: /* TODO: clean this up! Rx reset need not be this intensive */ martin@1579: static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, martin@1579: struct rtl8139_private *tp, void __iomem *ioaddr) martin@1579: { martin@1579: u8 tmp8; martin@1579: #ifdef CONFIG_8139_OLD_RX_RESET martin@1579: int tmp_work; martin@1579: #endif martin@1579: martin@1579: if (netif_msg_rx_err (tp)) martin@1579: pr_debug("%s: Ethernet frame had errors, status %8.8x.\n", martin@1579: dev->name, rx_status); martin@1579: dev->stats.rx_errors++; martin@1579: if (!(rx_status & RxStatusOK)) { martin@1579: if (rx_status & RxTooLong) { martin@1579: pr_debug("%s: Oversized Ethernet frame, status %4.4x!\n", martin@1579: dev->name, rx_status); martin@1579: /* A.C.: The chip hangs here. */ martin@1579: } martin@1579: if (rx_status & (RxBadSymbol | RxBadAlign)) martin@1579: dev->stats.rx_frame_errors++; martin@1579: if (rx_status & (RxRunt | RxTooLong)) martin@1579: dev->stats.rx_length_errors++; martin@1579: if (rx_status & RxCRCErr) martin@1579: dev->stats.rx_crc_errors++; martin@1579: } else { martin@1579: tp->xstats.rx_lost_in_ring++; martin@1579: } martin@1579: martin@1579: #ifndef CONFIG_8139_OLD_RX_RESET martin@1579: tmp8 = RTL_R8 (ChipCmd); martin@1579: RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); martin@1579: RTL_W8 (ChipCmd, tmp8); martin@1579: RTL_W32 (RxConfig, tp->rx_config); martin@1579: tp->cur_rx = 0; martin@1579: #else martin@1579: /* Reset the receiver, based on RealTek recommendation. (Bug?) */ martin@1579: martin@1579: /* disable receive */ martin@1579: RTL_W8_F (ChipCmd, CmdTxEnb); martin@1579: tmp_work = 200; martin@1579: while (--tmp_work > 0) { martin@1579: udelay(1); martin@1579: tmp8 = RTL_R8 (ChipCmd); martin@1579: if (!(tmp8 & CmdRxEnb)) martin@1579: break; martin@1579: } martin@1579: if (tmp_work <= 0) martin@1579: pr_warning(PFX "rx stop wait too long\n"); martin@1579: /* restart receive */ martin@1579: tmp_work = 200; martin@1579: while (--tmp_work > 0) { martin@1579: RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); martin@1579: udelay(1); martin@1579: tmp8 = RTL_R8 (ChipCmd); martin@1579: if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) martin@1579: break; martin@1579: } martin@1579: if (tmp_work <= 0) martin@1579: pr_warning(PFX "tx/rx enable wait too long\n"); martin@1579: martin@1579: /* and reinitialize all rx related registers */ martin@1579: RTL_W8_F (Cfg9346, Cfg9346_Unlock); martin@1579: /* Must enable Tx/Rx before setting transfer thresholds! */ martin@1579: RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); martin@1579: martin@1579: tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; martin@1579: RTL_W32 (RxConfig, tp->rx_config); martin@1579: tp->cur_rx = 0; martin@1579: martin@1579: pr_debug("init buffer addresses\n"); martin@1579: martin@1579: /* Lock Config[01234] and BMCR register writes */ martin@1579: RTL_W8 (Cfg9346, Cfg9346_Lock); martin@1579: martin@1579: /* init Rx ring buffer DMA address */ martin@1579: RTL_W32_F (RxBuf, tp->rx_ring_dma); martin@1579: martin@1579: /* A.C.: Reset the multicast list. */ martin@1579: __set_rx_mode (dev); martin@1579: #endif martin@1579: } martin@1579: martin@1579: #if RX_BUF_IDX == 3 martin@1579: static inline void wrap_copy(struct sk_buff *skb, const unsigned char *ring, martin@1579: u32 offset, unsigned int size) martin@1579: { martin@1579: u32 left = RX_BUF_LEN - offset; martin@1579: martin@1579: if (size > left) { martin@1579: skb_copy_to_linear_data(skb, ring + offset, left); martin@1579: skb_copy_to_linear_data_offset(skb, left, ring, size - left); martin@1579: } else martin@1579: skb_copy_to_linear_data(skb, ring + offset, size); martin@1579: } martin@1579: #endif martin@1579: martin@1579: static void rtl8139_isr_ack(struct rtl8139_private *tp) martin@1579: { martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: u16 status; martin@1579: martin@1579: status = RTL_R16 (IntrStatus) & RxAckBits; martin@1579: martin@1579: /* Clear out errors and receive interrupts */ martin@1579: if (likely(status != 0)) { martin@1579: if (unlikely(status & (RxFIFOOver | RxOverflow))) { martin@1579: tp->dev->stats.rx_errors++; martin@1579: if (status & RxFIFOOver) martin@1579: tp->dev->stats.rx_fifo_errors++; martin@1579: } martin@1579: RTL_W16_F (IntrStatus, RxAckBits); martin@1579: } martin@1579: } martin@1579: martin@1579: static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, martin@1579: int budget) martin@1579: { martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: int received = 0; martin@1579: unsigned char *rx_ring = tp->rx_ring; martin@1579: unsigned int cur_rx = tp->cur_rx; martin@1579: unsigned int rx_size = 0; martin@1579: martin@1579: pr_debug("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x," martin@1579: " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx, martin@1579: RTL_R16 (RxBufAddr), martin@1579: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); martin@1579: martin@1579: while (netif_running(dev) && received < budget martin@1579: && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { martin@1579: u32 ring_offset = cur_rx % RX_BUF_LEN; martin@1579: u32 rx_status; martin@1579: unsigned int pkt_size; martin@1579: struct sk_buff *skb; martin@1579: martin@1579: rmb(); martin@1579: martin@1579: /* read size+status of next frame from DMA ring buffer */ martin@1579: rx_status = le32_to_cpu (*(__le32 *) (rx_ring + ring_offset)); martin@1579: rx_size = rx_status >> 16; martin@1579: pkt_size = rx_size - 4; martin@1579: martin@1579: if (netif_msg_rx_status(tp)) martin@1579: pr_debug("%s: rtl8139_rx() status %4.4x, size %4.4x," martin@1579: " cur %4.4x.\n", dev->name, rx_status, martin@1579: rx_size, cur_rx); martin@1579: #if RTL8139_DEBUG > 2 martin@1579: { martin@1579: int i; martin@1579: pr_debug("%s: Frame contents ", dev->name); martin@1579: for (i = 0; i < 70; i++) martin@1579: pr_cont(" %2.2x", martin@1579: rx_ring[ring_offset + i]); martin@1579: pr_cont(".\n"); martin@1579: } martin@1579: #endif martin@1579: martin@1579: /* Packet copy from FIFO still in progress. martin@1579: * Theoretically, this should never happen martin@1579: * since EarlyRx is disabled. martin@1579: */ martin@1579: if (unlikely(rx_size == 0xfff0)) { martin@1579: if (!tp->fifo_copy_timeout) martin@1579: tp->fifo_copy_timeout = jiffies + 2; martin@1579: else if (time_after(jiffies, tp->fifo_copy_timeout)) { martin@1579: pr_debug("%s: hung FIFO. Reset.", dev->name); martin@1579: rx_size = 0; martin@1579: goto no_early_rx; martin@1579: } martin@1579: if (netif_msg_intr(tp)) { martin@1579: pr_debug("%s: fifo copy in progress.", martin@1579: dev->name); martin@1579: } martin@1579: tp->xstats.early_rx++; martin@1579: break; martin@1579: } martin@1579: martin@1579: no_early_rx: martin@1579: tp->fifo_copy_timeout = 0; martin@1579: martin@1579: /* If Rx err or invalid rx_size/rx_status received martin@1579: * (which happens if we get lost in the ring), martin@1579: * Rx process gets reset, so we abort any further martin@1579: * Rx processing. martin@1579: */ martin@1579: if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) || martin@1579: (rx_size < 8) || martin@1579: (!(rx_status & RxStatusOK)))) { martin@1579: rtl8139_rx_err (rx_status, dev, tp, ioaddr); martin@1579: received = -1; martin@1579: goto out; martin@1579: } martin@1579: martin@1579: /* Malloc up new buffer, compatible with net-2e. */ martin@1579: /* Omit the four octet CRC from the length. */ martin@1579: martin@1579: skb = netdev_alloc_skb(dev, pkt_size + NET_IP_ALIGN); martin@1579: if (likely(skb)) { martin@1579: skb_reserve (skb, NET_IP_ALIGN); /* 16 byte align the IP fields. */ martin@1579: #if RX_BUF_IDX == 3 martin@1579: wrap_copy(skb, rx_ring, ring_offset+4, pkt_size); martin@1579: #else martin@1579: skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size); martin@1579: #endif martin@1579: skb_put (skb, pkt_size); martin@1579: martin@1579: skb->protocol = eth_type_trans (skb, dev); martin@1579: martin@1579: dev->stats.rx_bytes += pkt_size; martin@1579: dev->stats.rx_packets++; martin@1579: martin@1579: netif_receive_skb (skb); martin@1579: } else { martin@1579: if (net_ratelimit()) martin@1579: pr_warning("%s: Memory squeeze, dropping packet.\n", martin@1579: dev->name); martin@1579: dev->stats.rx_dropped++; martin@1579: } martin@1579: received++; martin@1579: martin@1579: cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; martin@1579: RTL_W16 (RxBufPtr, (u16) (cur_rx - 16)); martin@1579: martin@1579: rtl8139_isr_ack(tp); martin@1579: } martin@1579: martin@1579: if (unlikely(!received || rx_size == 0xfff0)) martin@1579: rtl8139_isr_ack(tp); martin@1579: martin@1579: pr_debug("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x," martin@1579: " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, martin@1579: RTL_R16 (RxBufAddr), martin@1579: RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); martin@1579: martin@1579: tp->cur_rx = cur_rx; martin@1579: martin@1579: /* martin@1579: * The receive buffer should be mostly empty. martin@1579: * Tell NAPI to reenable the Rx irq. martin@1579: */ martin@1579: if (tp->fifo_copy_timeout) martin@1579: received = budget; martin@1579: martin@1579: out: martin@1579: return received; martin@1579: } martin@1579: martin@1579: martin@1579: static void rtl8139_weird_interrupt (struct net_device *dev, martin@1579: struct rtl8139_private *tp, martin@1579: void __iomem *ioaddr, martin@1579: int status, int link_changed) martin@1579: { martin@1579: pr_debug("%s: Abnormal interrupt, status %8.8x.\n", martin@1579: dev->name, status); martin@1579: martin@1579: assert (dev != NULL); martin@1579: assert (tp != NULL); martin@1579: assert (ioaddr != NULL); martin@1579: martin@1579: /* Update the error count. */ martin@1579: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); martin@1579: RTL_W32 (RxMissed, 0); martin@1579: martin@1579: if ((status & RxUnderrun) && link_changed && martin@1579: (tp->drv_flags & HAS_LNK_CHNG)) { martin@1579: rtl_check_media(dev, 0); martin@1579: status &= ~RxUnderrun; martin@1579: } martin@1579: martin@1579: if (status & (RxUnderrun | RxErr)) martin@1579: dev->stats.rx_errors++; martin@1579: martin@1579: if (status & PCSTimeout) martin@1579: dev->stats.rx_length_errors++; martin@1579: if (status & RxUnderrun) martin@1579: dev->stats.rx_fifo_errors++; martin@1579: if (status & PCIErr) { martin@1579: u16 pci_cmd_status; martin@1579: pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); martin@1579: pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); martin@1579: martin@1579: pr_err("%s: PCI Bus error %4.4x.\n", martin@1579: dev->name, pci_cmd_status); martin@1579: } martin@1579: } martin@1579: martin@1579: static int rtl8139_poll(struct napi_struct *napi, int budget) martin@1579: { martin@1579: struct rtl8139_private *tp = container_of(napi, struct rtl8139_private, napi); martin@1579: struct net_device *dev = tp->dev; martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: int work_done; martin@1579: martin@1579: spin_lock(&tp->rx_lock); martin@1579: work_done = 0; martin@1579: if (likely(RTL_R16(IntrStatus) & RxAckBits)) martin@1579: work_done += rtl8139_rx(dev, tp, budget); martin@1579: martin@1579: if (work_done < budget) { martin@1579: unsigned long flags; martin@1579: /* martin@1579: * Order is important since data can get interrupted martin@1579: * again when we think we are done. martin@1579: */ martin@1579: spin_lock_irqsave(&tp->lock, flags); martin@1579: RTL_W16_F(IntrMask, rtl8139_intr_mask); martin@1579: __napi_complete(napi); martin@1579: spin_unlock_irqrestore(&tp->lock, flags); martin@1579: } martin@1579: spin_unlock(&tp->rx_lock); martin@1579: martin@1579: return work_done; martin@1579: } martin@1579: martin@1579: /* The interrupt handler does all of the Rx thread work and cleans up martin@1579: after the Tx thread. */ martin@1579: static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance) martin@1579: { martin@1579: struct net_device *dev = (struct net_device *) dev_instance; martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: u16 status, ackstat; martin@1579: int link_changed = 0; /* avoid bogus "uninit" warning */ martin@1579: int handled = 0; martin@1579: martin@1579: spin_lock (&tp->lock); martin@1579: status = RTL_R16 (IntrStatus); martin@1579: martin@1579: /* shared irq? */ martin@1579: if (unlikely((status & rtl8139_intr_mask) == 0)) martin@1579: goto out; martin@1579: martin@1579: handled = 1; martin@1579: martin@1579: /* h/w no longer present (hotplug?) or major error, bail */ martin@1579: if (unlikely(status == 0xFFFF)) martin@1579: goto out; martin@1579: martin@1579: /* close possible race's with dev_close */ martin@1579: if (unlikely(!netif_running(dev))) { martin@1579: RTL_W16 (IntrMask, 0); martin@1579: goto out; martin@1579: } martin@1579: martin@1579: /* Acknowledge all of the current interrupt sources ASAP, but martin@1579: an first get an additional status bit from CSCR. */ martin@1579: if (unlikely(status & RxUnderrun)) martin@1579: link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; martin@1579: martin@1579: ackstat = status & ~(RxAckBits | TxErr); martin@1579: if (ackstat) martin@1579: RTL_W16 (IntrStatus, ackstat); martin@1579: martin@1579: /* Receive packets are processed by poll routine. martin@1579: If not running start it now. */ martin@1579: if (status & RxAckBits){ martin@1579: if (napi_schedule_prep(&tp->napi)) { martin@1579: RTL_W16_F (IntrMask, rtl8139_norx_intr_mask); martin@1579: __napi_schedule(&tp->napi); martin@1579: } martin@1579: } martin@1579: martin@1579: /* Check uncommon events with one test. */ martin@1579: if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr))) martin@1579: rtl8139_weird_interrupt (dev, tp, ioaddr, martin@1579: status, link_changed); martin@1579: martin@1579: if (status & (TxOK | TxErr)) { martin@1579: rtl8139_tx_interrupt (dev, tp, ioaddr); martin@1579: if (status & TxErr) martin@1579: RTL_W16 (IntrStatus, TxErr); martin@1579: } martin@1579: out: martin@1579: spin_unlock (&tp->lock); martin@1579: martin@1579: pr_debug("%s: exiting interrupt, intr_status=%#4.4x.\n", martin@1579: dev->name, RTL_R16 (IntrStatus)); martin@1579: return IRQ_RETVAL(handled); martin@1579: } martin@1579: martin@1579: #ifdef CONFIG_NET_POLL_CONTROLLER martin@1579: /* martin@1579: * Polling receive - used by netconsole and other diagnostic tools martin@1579: * to allow network i/o with interrupts disabled. martin@1579: */ martin@1579: static void rtl8139_poll_controller(struct net_device *dev) martin@1579: { martin@1579: disable_irq(dev->irq); martin@1579: rtl8139_interrupt(dev->irq, dev); martin@1579: enable_irq(dev->irq); martin@1579: } martin@1579: #endif martin@1579: martin@1579: static int rtl8139_set_mac_address(struct net_device *dev, void *p) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: struct sockaddr *addr = p; martin@1579: martin@1579: if (!is_valid_ether_addr(addr->sa_data)) martin@1579: return -EADDRNOTAVAIL; martin@1579: martin@1579: memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); martin@1579: martin@1579: spin_lock_irq(&tp->lock); martin@1579: martin@1579: RTL_W8_F(Cfg9346, Cfg9346_Unlock); martin@1579: RTL_W32_F(MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); martin@1579: RTL_W32_F(MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); martin@1579: RTL_W8_F(Cfg9346, Cfg9346_Lock); martin@1579: martin@1579: spin_unlock_irq(&tp->lock); martin@1579: martin@1579: return 0; martin@1579: } martin@1579: martin@1579: static int rtl8139_close (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: unsigned long flags; martin@1579: martin@1579: netif_stop_queue(dev); martin@1579: napi_disable(&tp->napi); martin@1579: martin@1579: if (netif_msg_ifdown(tp)) martin@1579: pr_debug("%s: Shutting down ethercard, status was 0x%4.4x.\n", martin@1579: dev->name, RTL_R16 (IntrStatus)); martin@1579: martin@1579: spin_lock_irqsave (&tp->lock, flags); martin@1579: martin@1579: /* Stop the chip's Tx and Rx DMA processes. */ martin@1579: RTL_W8 (ChipCmd, 0); martin@1579: martin@1579: /* Disable interrupts by clearing the interrupt mask. */ martin@1579: RTL_W16 (IntrMask, 0); martin@1579: martin@1579: /* Update the error counts. */ martin@1579: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); martin@1579: RTL_W32 (RxMissed, 0); martin@1579: martin@1579: spin_unlock_irqrestore (&tp->lock, flags); martin@1579: martin@1579: free_irq (dev->irq, dev); martin@1579: martin@1579: rtl8139_tx_clear (tp); martin@1579: martin@1579: dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, martin@1579: tp->rx_ring, tp->rx_ring_dma); martin@1579: dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, martin@1579: tp->tx_bufs, tp->tx_bufs_dma); martin@1579: tp->rx_ring = NULL; martin@1579: tp->tx_bufs = NULL; martin@1579: martin@1579: /* Green! Put the chip in low-power mode. */ martin@1579: RTL_W8 (Cfg9346, Cfg9346_Unlock); martin@1579: martin@1579: if (rtl_chip_info[tp->chipset].flags & HasHltClk) martin@1579: RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ martin@1579: martin@1579: return 0; martin@1579: } martin@1579: martin@1579: martin@1579: /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to martin@1579: kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and martin@1579: other threads or interrupts aren't messing with the 8139. */ martin@1579: static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: martin@1579: spin_lock_irq(&tp->lock); martin@1579: if (rtl_chip_info[tp->chipset].flags & HasLWake) { martin@1579: u8 cfg3 = RTL_R8 (Config3); martin@1579: u8 cfg5 = RTL_R8 (Config5); martin@1579: martin@1579: wol->supported = WAKE_PHY | WAKE_MAGIC martin@1579: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; martin@1579: martin@1579: wol->wolopts = 0; martin@1579: if (cfg3 & Cfg3_LinkUp) martin@1579: wol->wolopts |= WAKE_PHY; martin@1579: if (cfg3 & Cfg3_Magic) martin@1579: wol->wolopts |= WAKE_MAGIC; martin@1579: /* (KON)FIXME: See how netdev_set_wol() handles the martin@1579: following constants. */ martin@1579: if (cfg5 & Cfg5_UWF) martin@1579: wol->wolopts |= WAKE_UCAST; martin@1579: if (cfg5 & Cfg5_MWF) martin@1579: wol->wolopts |= WAKE_MCAST; martin@1579: if (cfg5 & Cfg5_BWF) martin@1579: wol->wolopts |= WAKE_BCAST; martin@1579: } martin@1579: spin_unlock_irq(&tp->lock); martin@1579: } martin@1579: martin@1579: martin@1579: /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes martin@1579: that wol points to kernel memory and other threads or interrupts martin@1579: aren't messing with the 8139. */ martin@1579: static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: u32 support; martin@1579: u8 cfg3, cfg5; martin@1579: martin@1579: support = ((rtl_chip_info[tp->chipset].flags & HasLWake) martin@1579: ? (WAKE_PHY | WAKE_MAGIC martin@1579: | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) martin@1579: : 0); martin@1579: if (wol->wolopts & ~support) martin@1579: return -EINVAL; martin@1579: martin@1579: spin_lock_irq(&tp->lock); martin@1579: cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); martin@1579: if (wol->wolopts & WAKE_PHY) martin@1579: cfg3 |= Cfg3_LinkUp; martin@1579: if (wol->wolopts & WAKE_MAGIC) martin@1579: cfg3 |= Cfg3_Magic; martin@1579: RTL_W8 (Cfg9346, Cfg9346_Unlock); martin@1579: RTL_W8 (Config3, cfg3); martin@1579: RTL_W8 (Cfg9346, Cfg9346_Lock); martin@1579: martin@1579: cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); martin@1579: /* (KON)FIXME: These are untested. We may have to set the martin@1579: CRC0, Wakeup0 and LSBCRC0 registers too, but I have no martin@1579: documentation. */ martin@1579: if (wol->wolopts & WAKE_UCAST) martin@1579: cfg5 |= Cfg5_UWF; martin@1579: if (wol->wolopts & WAKE_MCAST) martin@1579: cfg5 |= Cfg5_MWF; martin@1579: if (wol->wolopts & WAKE_BCAST) martin@1579: cfg5 |= Cfg5_BWF; martin@1579: RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ martin@1579: spin_unlock_irq(&tp->lock); martin@1579: martin@1579: return 0; martin@1579: } martin@1579: martin@1579: static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: strcpy(info->driver, DRV_NAME); martin@1579: strcpy(info->version, DRV_VERSION); martin@1579: strcpy(info->bus_info, pci_name(tp->pci_dev)); martin@1579: info->regdump_len = tp->regs_len; martin@1579: } martin@1579: martin@1579: static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: spin_lock_irq(&tp->lock); martin@1579: mii_ethtool_gset(&tp->mii, cmd); martin@1579: spin_unlock_irq(&tp->lock); martin@1579: return 0; martin@1579: } martin@1579: martin@1579: static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: int rc; martin@1579: spin_lock_irq(&tp->lock); martin@1579: rc = mii_ethtool_sset(&tp->mii, cmd); martin@1579: spin_unlock_irq(&tp->lock); martin@1579: return rc; martin@1579: } martin@1579: martin@1579: static int rtl8139_nway_reset(struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: return mii_nway_restart(&tp->mii); martin@1579: } martin@1579: martin@1579: static u32 rtl8139_get_link(struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: return mii_link_ok(&tp->mii); martin@1579: } martin@1579: martin@1579: static u32 rtl8139_get_msglevel(struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: return tp->msg_enable; martin@1579: } martin@1579: martin@1579: static void rtl8139_set_msglevel(struct net_device *dev, u32 datum) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: tp->msg_enable = datum; martin@1579: } martin@1579: martin@1579: static int rtl8139_get_regs_len(struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp; martin@1579: /* TODO: we are too slack to do reg dumping for pio, for now */ martin@1579: if (use_io) martin@1579: return 0; martin@1579: tp = netdev_priv(dev); martin@1579: return tp->regs_len; martin@1579: } martin@1579: martin@1579: static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) martin@1579: { martin@1579: struct rtl8139_private *tp; martin@1579: martin@1579: /* TODO: we are too slack to do reg dumping for pio, for now */ martin@1579: if (use_io) martin@1579: return; martin@1579: tp = netdev_priv(dev); martin@1579: martin@1579: regs->version = RTL_REGS_VER; martin@1579: martin@1579: spin_lock_irq(&tp->lock); martin@1579: memcpy_fromio(regbuf, tp->mmio_addr, regs->len); martin@1579: spin_unlock_irq(&tp->lock); martin@1579: } martin@1579: martin@1579: static int rtl8139_get_sset_count(struct net_device *dev, int sset) martin@1579: { martin@1579: switch (sset) { martin@1579: case ETH_SS_STATS: martin@1579: return RTL_NUM_STATS; martin@1579: default: martin@1579: return -EOPNOTSUPP; martin@1579: } martin@1579: } martin@1579: martin@1579: static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: martin@1579: data[0] = tp->xstats.early_rx; martin@1579: data[1] = tp->xstats.tx_buf_mapped; martin@1579: data[2] = tp->xstats.tx_timeouts; martin@1579: data[3] = tp->xstats.rx_lost_in_ring; martin@1579: } martin@1579: martin@1579: static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data) martin@1579: { martin@1579: memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); martin@1579: } martin@1579: martin@1579: static const struct ethtool_ops rtl8139_ethtool_ops = { martin@1579: .get_drvinfo = rtl8139_get_drvinfo, martin@1579: .get_settings = rtl8139_get_settings, martin@1579: .set_settings = rtl8139_set_settings, martin@1579: .get_regs_len = rtl8139_get_regs_len, martin@1579: .get_regs = rtl8139_get_regs, martin@1579: .nway_reset = rtl8139_nway_reset, martin@1579: .get_link = rtl8139_get_link, martin@1579: .get_msglevel = rtl8139_get_msglevel, martin@1579: .set_msglevel = rtl8139_set_msglevel, martin@1579: .get_wol = rtl8139_get_wol, martin@1579: .set_wol = rtl8139_set_wol, martin@1579: .get_strings = rtl8139_get_strings, martin@1579: .get_sset_count = rtl8139_get_sset_count, martin@1579: .get_ethtool_stats = rtl8139_get_ethtool_stats, martin@1579: }; martin@1579: martin@1579: static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: int rc; martin@1579: martin@1579: if (!netif_running(dev)) martin@1579: return -EINVAL; martin@1579: martin@1579: spin_lock_irq(&tp->lock); martin@1579: rc = generic_mii_ioctl(&tp->mii, if_mii(rq), cmd, NULL); martin@1579: spin_unlock_irq(&tp->lock); martin@1579: martin@1579: return rc; martin@1579: } martin@1579: martin@1579: martin@1579: static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: unsigned long flags; martin@1579: martin@1579: if (netif_running(dev)) { martin@1579: spin_lock_irqsave (&tp->lock, flags); martin@1579: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); martin@1579: RTL_W32 (RxMissed, 0); martin@1579: spin_unlock_irqrestore (&tp->lock, flags); martin@1579: } martin@1579: martin@1579: return &dev->stats; martin@1579: } martin@1579: martin@1579: /* Set or clear the multicast filter for this adaptor. martin@1579: This routine is not state sensitive and need not be SMP locked. */ martin@1579: martin@1579: static void __set_rx_mode (struct net_device *dev) martin@1579: { martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: u32 mc_filter[2]; /* Multicast hash filter */ martin@1579: int i, rx_mode; martin@1579: u32 tmp; martin@1579: martin@1579: pr_debug("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n", martin@1579: dev->name, dev->flags, RTL_R32 (RxConfig)); martin@1579: martin@1579: /* Note: do not reorder, GCC is clever about common statements. */ martin@1579: if (dev->flags & IFF_PROMISC) { martin@1579: rx_mode = martin@1579: AcceptBroadcast | AcceptMulticast | AcceptMyPhys | martin@1579: AcceptAllPhys; martin@1579: mc_filter[1] = mc_filter[0] = 0xffffffff; martin@1579: } else if ((dev->mc_count > multicast_filter_limit) martin@1579: || (dev->flags & IFF_ALLMULTI)) { martin@1579: /* Too many to filter perfectly -- accept all multicasts. */ martin@1579: rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; martin@1579: mc_filter[1] = mc_filter[0] = 0xffffffff; martin@1579: } else { martin@1579: struct dev_mc_list *mclist; martin@1579: rx_mode = AcceptBroadcast | AcceptMyPhys; martin@1579: mc_filter[1] = mc_filter[0] = 0; martin@1579: for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; martin@1579: i++, mclist = mclist->next) { martin@1579: int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; martin@1579: martin@1579: mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); martin@1579: rx_mode |= AcceptMulticast; martin@1579: } martin@1579: } martin@1579: martin@1579: /* We can safely update without stopping the chip. */ martin@1579: tmp = rtl8139_rx_config | rx_mode; martin@1579: if (tp->rx_config != tmp) { martin@1579: RTL_W32_F (RxConfig, tmp); martin@1579: tp->rx_config = tmp; martin@1579: } martin@1579: RTL_W32_F (MAR0 + 0, mc_filter[0]); martin@1579: RTL_W32_F (MAR0 + 4, mc_filter[1]); martin@1579: } martin@1579: martin@1579: static void rtl8139_set_rx_mode (struct net_device *dev) martin@1579: { martin@1579: unsigned long flags; martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: martin@1579: spin_lock_irqsave (&tp->lock, flags); martin@1579: __set_rx_mode(dev); martin@1579: spin_unlock_irqrestore (&tp->lock, flags); martin@1579: } martin@1579: martin@1579: #ifdef CONFIG_PM martin@1579: martin@1579: static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state) martin@1579: { martin@1579: struct net_device *dev = pci_get_drvdata (pdev); martin@1579: struct rtl8139_private *tp = netdev_priv(dev); martin@1579: void __iomem *ioaddr = tp->mmio_addr; martin@1579: unsigned long flags; martin@1579: martin@1579: pci_save_state (pdev); martin@1579: martin@1579: if (!netif_running (dev)) martin@1579: return 0; martin@1579: martin@1579: netif_device_detach (dev); martin@1579: martin@1579: spin_lock_irqsave (&tp->lock, flags); martin@1579: martin@1579: /* Disable interrupts, stop Tx and Rx. */ martin@1579: RTL_W16 (IntrMask, 0); martin@1579: RTL_W8 (ChipCmd, 0); martin@1579: martin@1579: /* Update the error counts. */ martin@1579: dev->stats.rx_missed_errors += RTL_R32 (RxMissed); martin@1579: RTL_W32 (RxMissed, 0); martin@1579: martin@1579: spin_unlock_irqrestore (&tp->lock, flags); martin@1579: martin@1579: pci_set_power_state (pdev, PCI_D3hot); martin@1579: martin@1579: return 0; martin@1579: } martin@1579: martin@1579: martin@1579: static int rtl8139_resume (struct pci_dev *pdev) martin@1579: { martin@1579: struct net_device *dev = pci_get_drvdata (pdev); martin@1579: martin@1579: pci_restore_state (pdev); martin@1579: if (!netif_running (dev)) martin@1579: return 0; martin@1579: pci_set_power_state (pdev, PCI_D0); martin@1579: rtl8139_init_ring (dev); martin@1579: rtl8139_hw_start (dev); martin@1579: netif_device_attach (dev); martin@1579: return 0; martin@1579: } martin@1579: martin@1579: #endif /* CONFIG_PM */ martin@1579: martin@1579: martin@1579: static struct pci_driver rtl8139_pci_driver = { martin@1579: .name = DRV_NAME, martin@1579: .id_table = rtl8139_pci_tbl, martin@1579: .probe = rtl8139_init_one, martin@1579: .remove = __devexit_p(rtl8139_remove_one), martin@1579: #ifdef CONFIG_PM martin@1579: .suspend = rtl8139_suspend, martin@1579: .resume = rtl8139_resume, martin@1579: #endif /* CONFIG_PM */ martin@1579: }; martin@1579: martin@1579: martin@1579: static int __init rtl8139_init_module (void) martin@1579: { martin@1579: /* when we're a module, we always print a version message, martin@1579: * even if no 8139 board is found. martin@1579: */ martin@1579: #ifdef MODULE martin@1579: pr_info(RTL8139_DRIVER_NAME "\n"); martin@1579: #endif martin@1579: martin@1579: return pci_register_driver(&rtl8139_pci_driver); martin@1579: } martin@1579: martin@1579: martin@1579: static void __exit rtl8139_cleanup_module (void) martin@1579: { martin@1579: pci_unregister_driver (&rtl8139_pci_driver); martin@1579: } martin@1579: martin@1579: martin@1579: module_init(rtl8139_init_module); martin@1579: module_exit(rtl8139_cleanup_module);