Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 14:37:30 +0000] rev 1409
Updated graph for slave configuration FSM.
Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 14:33:47 +0000] rev 1408
Find DC reference clock.
Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 13:43:57 +0000] rev 1407
Improved DC configuration.
Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 11:53:17 +0000] rev 1406
Clear DC assignment after going to INIT.
Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 10:28:09 +0000] rev 1405
Updated graph of slave configuration FSM.
Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 10:27:36 +0000] rev 1404
Minor changes.
Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 10:27:12 +0000] rev 1403
TODO.
Florian Pose <fp@igh-essen.com> [Mon, 20 Apr 2009 09:17:39 +0000] rev 1402
Tested clearing slave list after link down; minor changes.
Florian Pose <fp@igh-essen.com> [Fri, 17 Apr 2009 12:55:55 +0000] rev 1401
Output link state in 'ethercat master'.
Florian Pose <fp@igh-essen.com> [Fri, 17 Apr 2009 12:41:57 +0000] rev 1400
Clear slave list on link down.
Florian Pose <fp@igh-essen.com> [Fri, 17 Apr 2009 12:03:12 +0000] rev 1399
Added debug_level module parameter. debug_level is now unsigned int.
Florian Pose <fp@igh-essen.com> [Fri, 17 Apr 2009 11:07:27 +0000] rev 1398
Removed unused variable.
Florian Pose <fp@igh-essen.com> [Fri, 17 Apr 2009 10:39:19 +0000] rev 1397
Introduced DEBUG_IOCTL.
Florian Pose <fp@igh-essen.com> [Thu, 09 Apr 2009 18:21:18 +0000] rev 1396
DC sync reference clock to application time. TBC...
Florian Pose <fp@igh-essen.com> [Thu, 09 Apr 2009 14:56:23 +0000] rev 1395
Added 64-bit types to reg_write.