Florian Pose <fp@igh-essen.com> [Mon, 20 Dec 2010 17:52:37 +0100] rev 2011
merge.
Florian Pose <fp@igh-essen.com> [Tue, 14 Dec 2010 21:58:53 +0100] rev 2010
Implemented ranges for slaves, configs and domains.
Florian Pose <fp@igh-essen.com> [Tue, 30 Nov 2010 15:24:21 +0100] rev 2009
Added ecrt_master_reset() method.
Martin Troxler <ch1010277@ch10pc446> [Mon, 06 Dec 2010 11:42:48 +0100] rev 2008
Inplace I/O bug: correct domain tx-size when tx-size of input and output fmmu is different.
Martin Troxler <ch1010277@ch10pc446> [Tue, 30 Nov 2010 07:37:09 +0100] rev 2007
fixed compiling without EC_HAVE_CYCLES (dc_jiffies_app_start_time)
Martin Troxler <ch1010277@ch10pc446> [Mon, 29 Nov 2010 08:18:11 +0100] rev 2006
Minor 64bit improvements (use %zu when formatting size_t values in printk)
Martin Troxler <ch1010277@ch10pc446> [Mon, 29 Nov 2010 08:15:57 +0100] rev 2005
fixed ioctl codes, increased ioctl version magic
Martin Troxler <ch1010277@ch10lt194> [Sat, 27 Nov 2010 17:02:54 +0100] rev 2004
Merged
Martin Troxler <ch1010277@ch10lt194> [Fri, 26 Nov 2010 11:23:19 +0100] rev 2003
Re-enabled waiting for clock synchronity before setting dc offsets. (changeset b0dcdfbd4238)
Martin Troxler <ch1010277@ch10lt194> [Fri, 26 Nov 2010 10:33:55 +0100] rev 2002
fixed race when calculating DC offsets and start times due to ec_slave_config_attach: removed obsolete request to change slave state to OP.
The request to change to OP is done by ec_master_request_op after activating the master.
Martin Troxler <ch1010277@ch10pc446> [Mon, 22 Nov 2010 09:53:43 +0100] rev 2001
renamed dc_cycles_app_time -> dc_cycles_app_start_time & dc_jiffies_app_time -> dc_jiffies_app_start_time
Martin Troxler <ch1010277@ch10pc446> [Mon, 22 Nov 2010 09:09:23 +0100] rev 2000
Idle thread considers fsm step prepared by Op-thread (Otherwise some state changes may get lost)
Martin Troxler <ch1010277@ch10pc446> [Mon, 22 Nov 2010 08:50:34 +0100] rev 1999
use app_start_time for initial DC offset calculation because app_time might be overwritten while calculating the offsets.
Martin Troxler <ch1010277@ch10pc446> [Tue, 16 Nov 2010 15:32:27 +0100] rev 1998
Use ESC port order (0-3-1-2) for bus topology and DC delay calculation
Martin Troxler <ch1010277@ch10pc446> [Tue, 09 Nov 2010 11:12:35 +0100] rev 1997
hg ignored debuild.log