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1 /* Intel PRO/1000 Linux driver |
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2 * Copyright(c) 1999 - 2014 Intel Corporation. |
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3 * |
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4 * This program is free software; you can redistribute it and/or modify it |
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5 * under the terms and conditions of the GNU General Public License, |
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6 * version 2, as published by the Free Software Foundation. |
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7 * |
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8 * This program is distributed in the hope it will be useful, but WITHOUT |
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9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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11 * more details. |
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12 * |
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13 * The full GNU General Public License is included in this distribution in |
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14 * the file called "COPYING". |
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15 * |
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16 * Contact Information: |
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17 * Linux NICS <linux.nics@intel.com> |
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18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
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19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
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20 */ |
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21 |
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22 #include "e1000.h" |
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23 |
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24 /** |
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25 * e1000_raise_eec_clk - Raise EEPROM clock |
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26 * @hw: pointer to the HW structure |
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27 * @eecd: pointer to the EEPROM |
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28 * |
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29 * Enable/Raise the EEPROM clock bit. |
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30 **/ |
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31 static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd) |
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32 { |
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33 *eecd = *eecd | E1000_EECD_SK; |
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34 ew32(EECD, *eecd); |
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35 e1e_flush(); |
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36 udelay(hw->nvm.delay_usec); |
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37 } |
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38 |
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39 /** |
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40 * e1000_lower_eec_clk - Lower EEPROM clock |
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41 * @hw: pointer to the HW structure |
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42 * @eecd: pointer to the EEPROM |
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43 * |
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44 * Clear/Lower the EEPROM clock bit. |
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45 **/ |
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46 static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd) |
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47 { |
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48 *eecd = *eecd & ~E1000_EECD_SK; |
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49 ew32(EECD, *eecd); |
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50 e1e_flush(); |
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51 udelay(hw->nvm.delay_usec); |
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52 } |
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53 |
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54 /** |
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55 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM |
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56 * @hw: pointer to the HW structure |
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57 * @data: data to send to the EEPROM |
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58 * @count: number of bits to shift out |
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59 * |
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60 * We need to shift 'count' bits out to the EEPROM. So, the value in the |
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61 * "data" parameter will be shifted out to the EEPROM one bit at a time. |
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62 * In order to do this, "data" must be broken down into bits. |
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63 **/ |
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64 static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count) |
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65 { |
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66 struct e1000_nvm_info *nvm = &hw->nvm; |
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67 u32 eecd = er32(EECD); |
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68 u32 mask; |
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69 |
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70 mask = 0x01 << (count - 1); |
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71 if (nvm->type == e1000_nvm_eeprom_spi) |
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72 eecd |= E1000_EECD_DO; |
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73 |
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74 do { |
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75 eecd &= ~E1000_EECD_DI; |
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76 |
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77 if (data & mask) |
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78 eecd |= E1000_EECD_DI; |
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79 |
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80 ew32(EECD, eecd); |
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81 e1e_flush(); |
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82 |
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83 udelay(nvm->delay_usec); |
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84 |
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85 e1000_raise_eec_clk(hw, &eecd); |
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86 e1000_lower_eec_clk(hw, &eecd); |
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87 |
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88 mask >>= 1; |
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89 } while (mask); |
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90 |
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91 eecd &= ~E1000_EECD_DI; |
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92 ew32(EECD, eecd); |
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93 } |
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94 |
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95 /** |
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96 * e1000_shift_in_eec_bits - Shift data bits in from the EEPROM |
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97 * @hw: pointer to the HW structure |
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98 * @count: number of bits to shift in |
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99 * |
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100 * In order to read a register from the EEPROM, we need to shift 'count' bits |
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101 * in from the EEPROM. Bits are "shifted in" by raising the clock input to |
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102 * the EEPROM (setting the SK bit), and then reading the value of the data out |
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103 * "DO" bit. During this "shifting in" process the data in "DI" bit should |
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104 * always be clear. |
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105 **/ |
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106 static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count) |
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107 { |
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108 u32 eecd; |
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109 u32 i; |
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110 u16 data; |
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111 |
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112 eecd = er32(EECD); |
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113 eecd &= ~(E1000_EECD_DO | E1000_EECD_DI); |
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114 data = 0; |
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115 |
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116 for (i = 0; i < count; i++) { |
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117 data <<= 1; |
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118 e1000_raise_eec_clk(hw, &eecd); |
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119 |
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120 eecd = er32(EECD); |
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121 |
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122 eecd &= ~E1000_EECD_DI; |
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123 if (eecd & E1000_EECD_DO) |
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124 data |= 1; |
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125 |
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126 e1000_lower_eec_clk(hw, &eecd); |
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127 } |
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128 |
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129 return data; |
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130 } |
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131 |
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132 /** |
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133 * e1000e_poll_eerd_eewr_done - Poll for EEPROM read/write completion |
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134 * @hw: pointer to the HW structure |
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135 * @ee_reg: EEPROM flag for polling |
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136 * |
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137 * Polls the EEPROM status bit for either read or write completion based |
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138 * upon the value of 'ee_reg'. |
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139 **/ |
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140 s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg) |
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141 { |
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142 u32 attempts = 100000; |
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143 u32 i, reg = 0; |
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144 |
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145 for (i = 0; i < attempts; i++) { |
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146 if (ee_reg == E1000_NVM_POLL_READ) |
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147 reg = er32(EERD); |
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148 else |
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149 reg = er32(EEWR); |
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150 |
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151 if (reg & E1000_NVM_RW_REG_DONE) |
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152 return 0; |
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153 |
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154 udelay(5); |
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155 } |
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156 |
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157 return -E1000_ERR_NVM; |
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158 } |
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159 |
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160 /** |
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161 * e1000e_acquire_nvm - Generic request for access to EEPROM |
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162 * @hw: pointer to the HW structure |
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163 * |
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164 * Set the EEPROM access request bit and wait for EEPROM access grant bit. |
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165 * Return successful if access grant bit set, else clear the request for |
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166 * EEPROM access and return -E1000_ERR_NVM (-1). |
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167 **/ |
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168 s32 e1000e_acquire_nvm(struct e1000_hw *hw) |
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169 { |
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170 u32 eecd = er32(EECD); |
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171 s32 timeout = E1000_NVM_GRANT_ATTEMPTS; |
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172 |
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173 ew32(EECD, eecd | E1000_EECD_REQ); |
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174 eecd = er32(EECD); |
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175 |
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176 while (timeout) { |
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177 if (eecd & E1000_EECD_GNT) |
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178 break; |
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179 udelay(5); |
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180 eecd = er32(EECD); |
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181 timeout--; |
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182 } |
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183 |
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184 if (!timeout) { |
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185 eecd &= ~E1000_EECD_REQ; |
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186 ew32(EECD, eecd); |
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187 e_dbg("Could not acquire NVM grant\n"); |
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188 return -E1000_ERR_NVM; |
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189 } |
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190 |
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191 return 0; |
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192 } |
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193 |
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194 /** |
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195 * e1000_standby_nvm - Return EEPROM to standby state |
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196 * @hw: pointer to the HW structure |
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197 * |
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198 * Return the EEPROM to a standby state. |
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199 **/ |
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200 static void e1000_standby_nvm(struct e1000_hw *hw) |
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201 { |
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202 struct e1000_nvm_info *nvm = &hw->nvm; |
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203 u32 eecd = er32(EECD); |
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204 |
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205 if (nvm->type == e1000_nvm_eeprom_spi) { |
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206 /* Toggle CS to flush commands */ |
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207 eecd |= E1000_EECD_CS; |
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208 ew32(EECD, eecd); |
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209 e1e_flush(); |
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210 udelay(nvm->delay_usec); |
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211 eecd &= ~E1000_EECD_CS; |
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212 ew32(EECD, eecd); |
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213 e1e_flush(); |
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214 udelay(nvm->delay_usec); |
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215 } |
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216 } |
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217 |
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218 /** |
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219 * e1000_stop_nvm - Terminate EEPROM command |
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220 * @hw: pointer to the HW structure |
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221 * |
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222 * Terminates the current command by inverting the EEPROM's chip select pin. |
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223 **/ |
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224 static void e1000_stop_nvm(struct e1000_hw *hw) |
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225 { |
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226 u32 eecd; |
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227 |
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228 eecd = er32(EECD); |
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229 if (hw->nvm.type == e1000_nvm_eeprom_spi) { |
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230 /* Pull CS high */ |
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231 eecd |= E1000_EECD_CS; |
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232 e1000_lower_eec_clk(hw, &eecd); |
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233 } |
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234 } |
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235 |
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236 /** |
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237 * e1000e_release_nvm - Release exclusive access to EEPROM |
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238 * @hw: pointer to the HW structure |
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239 * |
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240 * Stop any current commands to the EEPROM and clear the EEPROM request bit. |
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241 **/ |
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242 void e1000e_release_nvm(struct e1000_hw *hw) |
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243 { |
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244 u32 eecd; |
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245 |
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246 e1000_stop_nvm(hw); |
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247 |
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248 eecd = er32(EECD); |
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249 eecd &= ~E1000_EECD_REQ; |
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250 ew32(EECD, eecd); |
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251 } |
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252 |
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253 /** |
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254 * e1000_ready_nvm_eeprom - Prepares EEPROM for read/write |
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255 * @hw: pointer to the HW structure |
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256 * |
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257 * Setups the EEPROM for reading and writing. |
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258 **/ |
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259 static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw) |
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260 { |
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261 struct e1000_nvm_info *nvm = &hw->nvm; |
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262 u32 eecd = er32(EECD); |
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263 u8 spi_stat_reg; |
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264 |
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265 if (nvm->type == e1000_nvm_eeprom_spi) { |
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266 u16 timeout = NVM_MAX_RETRY_SPI; |
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267 |
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268 /* Clear SK and CS */ |
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269 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); |
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270 ew32(EECD, eecd); |
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271 e1e_flush(); |
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272 udelay(1); |
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273 |
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274 /* Read "Status Register" repeatedly until the LSB is cleared. |
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275 * The EEPROM will signal that the command has been completed |
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276 * by clearing bit 0 of the internal status register. If it's |
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277 * not cleared within 'timeout', then error out. |
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278 */ |
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279 while (timeout) { |
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280 e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI, |
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281 hw->nvm.opcode_bits); |
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282 spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8); |
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283 if (!(spi_stat_reg & NVM_STATUS_RDY_SPI)) |
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284 break; |
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285 |
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286 udelay(5); |
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287 e1000_standby_nvm(hw); |
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288 timeout--; |
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289 } |
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290 |
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291 if (!timeout) { |
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292 e_dbg("SPI NVM Status error\n"); |
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293 return -E1000_ERR_NVM; |
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294 } |
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295 } |
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296 |
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297 return 0; |
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298 } |
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299 |
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300 /** |
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301 * e1000e_read_nvm_eerd - Reads EEPROM using EERD register |
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302 * @hw: pointer to the HW structure |
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303 * @offset: offset of word in the EEPROM to read |
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304 * @words: number of words to read |
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305 * @data: word read from the EEPROM |
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306 * |
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307 * Reads a 16 bit word from the EEPROM using the EERD register. |
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308 **/ |
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309 s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) |
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310 { |
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311 struct e1000_nvm_info *nvm = &hw->nvm; |
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312 u32 i, eerd = 0; |
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313 s32 ret_val = 0; |
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314 |
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315 /* A check for invalid values: offset too large, too many words, |
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316 * too many words for the offset, and not enough words. |
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317 */ |
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318 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || |
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319 (words == 0)) { |
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320 e_dbg("nvm parameter(s) out of bounds\n"); |
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321 return -E1000_ERR_NVM; |
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322 } |
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323 |
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324 for (i = 0; i < words; i++) { |
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325 eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) + |
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326 E1000_NVM_RW_REG_START; |
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327 |
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328 ew32(EERD, eerd); |
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329 ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ); |
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330 if (ret_val) |
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331 break; |
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332 |
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333 data[i] = (er32(EERD) >> E1000_NVM_RW_REG_DATA); |
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334 } |
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335 |
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336 return ret_val; |
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337 } |
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338 |
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339 /** |
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340 * e1000e_write_nvm_spi - Write to EEPROM using SPI |
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341 * @hw: pointer to the HW structure |
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342 * @offset: offset within the EEPROM to be written to |
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343 * @words: number of words to write |
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344 * @data: 16 bit word(s) to be written to the EEPROM |
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345 * |
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346 * Writes data to EEPROM at offset using SPI interface. |
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347 * |
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348 * If e1000e_update_nvm_checksum is not called after this function , the |
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349 * EEPROM will most likely contain an invalid checksum. |
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350 **/ |
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351 s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) |
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352 { |
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353 struct e1000_nvm_info *nvm = &hw->nvm; |
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354 s32 ret_val = -E1000_ERR_NVM; |
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355 u16 widx = 0; |
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356 |
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357 /* A check for invalid values: offset too large, too many words, |
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358 * and not enough words. |
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359 */ |
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360 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || |
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361 (words == 0)) { |
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362 e_dbg("nvm parameter(s) out of bounds\n"); |
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363 return -E1000_ERR_NVM; |
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364 } |
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365 |
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366 while (widx < words) { |
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367 u8 write_opcode = NVM_WRITE_OPCODE_SPI; |
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368 |
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369 ret_val = nvm->ops.acquire(hw); |
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370 if (ret_val) |
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371 return ret_val; |
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372 |
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373 ret_val = e1000_ready_nvm_eeprom(hw); |
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374 if (ret_val) { |
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375 nvm->ops.release(hw); |
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376 return ret_val; |
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377 } |
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378 |
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379 e1000_standby_nvm(hw); |
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380 |
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381 /* Send the WRITE ENABLE command (8 bit opcode) */ |
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382 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI, |
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383 nvm->opcode_bits); |
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384 |
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385 e1000_standby_nvm(hw); |
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386 |
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387 /* Some SPI eeproms use the 8th address bit embedded in the |
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388 * opcode |
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389 */ |
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390 if ((nvm->address_bits == 8) && (offset >= 128)) |
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391 write_opcode |= NVM_A8_OPCODE_SPI; |
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392 |
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393 /* Send the Write command (8-bit opcode + addr) */ |
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394 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits); |
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395 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2), |
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396 nvm->address_bits); |
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397 |
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398 /* Loop to allow for up to whole page write of eeprom */ |
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399 while (widx < words) { |
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400 u16 word_out = data[widx]; |
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401 |
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402 word_out = (word_out >> 8) | (word_out << 8); |
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403 e1000_shift_out_eec_bits(hw, word_out, 16); |
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404 widx++; |
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405 |
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406 if ((((offset + widx) * 2) % nvm->page_size) == 0) { |
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407 e1000_standby_nvm(hw); |
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408 break; |
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409 } |
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410 } |
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411 usleep_range(10000, 20000); |
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412 nvm->ops.release(hw); |
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413 } |
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414 |
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415 return ret_val; |
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416 } |
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417 |
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418 /** |
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419 * e1000_read_pba_string_generic - Read device part number |
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420 * @hw: pointer to the HW structure |
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421 * @pba_num: pointer to device part number |
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422 * @pba_num_size: size of part number buffer |
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423 * |
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424 * Reads the product board assembly (PBA) number from the EEPROM and stores |
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425 * the value in pba_num. |
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426 **/ |
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427 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, |
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428 u32 pba_num_size) |
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429 { |
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430 s32 ret_val; |
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431 u16 nvm_data; |
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432 u16 pba_ptr; |
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433 u16 offset; |
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434 u16 length; |
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435 |
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436 if (pba_num == NULL) { |
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437 e_dbg("PBA string buffer was null\n"); |
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438 return -E1000_ERR_INVALID_ARGUMENT; |
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439 } |
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440 |
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441 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data); |
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442 if (ret_val) { |
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443 e_dbg("NVM Read Error\n"); |
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444 return ret_val; |
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445 } |
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446 |
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447 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr); |
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448 if (ret_val) { |
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449 e_dbg("NVM Read Error\n"); |
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450 return ret_val; |
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451 } |
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452 |
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453 /* if nvm_data is not ptr guard the PBA must be in legacy format which |
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454 * means pba_ptr is actually our second data word for the PBA number |
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455 * and we can decode it into an ascii string |
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456 */ |
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457 if (nvm_data != NVM_PBA_PTR_GUARD) { |
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458 e_dbg("NVM PBA number is not stored as string\n"); |
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459 |
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460 /* make sure callers buffer is big enough to store the PBA */ |
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461 if (pba_num_size < E1000_PBANUM_LENGTH) { |
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462 e_dbg("PBA string buffer too small\n"); |
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463 return E1000_ERR_NO_SPACE; |
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464 } |
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465 |
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466 /* extract hex string from data and pba_ptr */ |
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467 pba_num[0] = (nvm_data >> 12) & 0xF; |
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468 pba_num[1] = (nvm_data >> 8) & 0xF; |
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469 pba_num[2] = (nvm_data >> 4) & 0xF; |
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470 pba_num[3] = nvm_data & 0xF; |
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471 pba_num[4] = (pba_ptr >> 12) & 0xF; |
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472 pba_num[5] = (pba_ptr >> 8) & 0xF; |
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473 pba_num[6] = '-'; |
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474 pba_num[7] = 0; |
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475 pba_num[8] = (pba_ptr >> 4) & 0xF; |
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476 pba_num[9] = pba_ptr & 0xF; |
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477 |
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478 /* put a null character on the end of our string */ |
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479 pba_num[10] = '\0'; |
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480 |
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481 /* switch all the data but the '-' to hex char */ |
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482 for (offset = 0; offset < 10; offset++) { |
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483 if (pba_num[offset] < 0xA) |
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484 pba_num[offset] += '0'; |
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485 else if (pba_num[offset] < 0x10) |
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486 pba_num[offset] += 'A' - 0xA; |
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487 } |
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488 |
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489 return 0; |
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490 } |
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491 |
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492 ret_val = e1000_read_nvm(hw, pba_ptr, 1, &length); |
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493 if (ret_val) { |
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494 e_dbg("NVM Read Error\n"); |
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495 return ret_val; |
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496 } |
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497 |
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498 if (length == 0xFFFF || length == 0) { |
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499 e_dbg("NVM PBA number section invalid length\n"); |
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500 return -E1000_ERR_NVM_PBA_SECTION; |
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501 } |
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502 /* check if pba_num buffer is big enough */ |
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503 if (pba_num_size < (((u32)length * 2) - 1)) { |
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504 e_dbg("PBA string buffer too small\n"); |
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505 return -E1000_ERR_NO_SPACE; |
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506 } |
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507 |
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508 /* trim pba length from start of string */ |
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509 pba_ptr++; |
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510 length--; |
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511 |
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512 for (offset = 0; offset < length; offset++) { |
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513 ret_val = e1000_read_nvm(hw, pba_ptr + offset, 1, &nvm_data); |
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514 if (ret_val) { |
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515 e_dbg("NVM Read Error\n"); |
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516 return ret_val; |
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517 } |
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518 pba_num[offset * 2] = (u8)(nvm_data >> 8); |
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519 pba_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF); |
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520 } |
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521 pba_num[offset * 2] = '\0'; |
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522 |
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523 return 0; |
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524 } |
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525 |
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526 /** |
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527 * e1000_read_mac_addr_generic - Read device MAC address |
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528 * @hw: pointer to the HW structure |
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529 * |
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530 * Reads the device MAC address from the EEPROM and stores the value. |
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531 * Since devices with two ports use the same EEPROM, we increment the |
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532 * last bit in the MAC address for the second port. |
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533 **/ |
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534 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw) |
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535 { |
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536 u32 rar_high; |
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537 u32 rar_low; |
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538 u16 i; |
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539 |
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540 rar_high = er32(RAH(0)); |
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541 rar_low = er32(RAL(0)); |
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542 |
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543 for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++) |
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544 hw->mac.perm_addr[i] = (u8)(rar_low >> (i * 8)); |
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545 |
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546 for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++) |
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547 hw->mac.perm_addr[i + 4] = (u8)(rar_high >> (i * 8)); |
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548 |
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549 for (i = 0; i < ETH_ALEN; i++) |
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550 hw->mac.addr[i] = hw->mac.perm_addr[i]; |
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551 |
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552 return 0; |
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553 } |
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554 |
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555 /** |
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556 * e1000e_validate_nvm_checksum_generic - Validate EEPROM checksum |
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557 * @hw: pointer to the HW structure |
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558 * |
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559 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM |
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560 * and then verifies that the sum of the EEPROM is equal to 0xBABA. |
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561 **/ |
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562 s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw) |
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563 { |
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564 s32 ret_val; |
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565 u16 checksum = 0; |
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566 u16 i, nvm_data; |
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567 |
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568 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) { |
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569 ret_val = e1000_read_nvm(hw, i, 1, &nvm_data); |
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570 if (ret_val) { |
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571 e_dbg("NVM Read Error\n"); |
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572 return ret_val; |
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573 } |
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574 checksum += nvm_data; |
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575 } |
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576 |
|
577 if (checksum != (u16)NVM_SUM) { |
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578 e_dbg("NVM Checksum Invalid\n"); |
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579 return -E1000_ERR_NVM; |
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580 } |
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581 |
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582 return 0; |
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583 } |
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584 |
|
585 /** |
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586 * e1000e_update_nvm_checksum_generic - Update EEPROM checksum |
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587 * @hw: pointer to the HW structure |
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588 * |
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589 * Updates the EEPROM checksum by reading/adding each word of the EEPROM |
|
590 * up to the checksum. Then calculates the EEPROM checksum and writes the |
|
591 * value to the EEPROM. |
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592 **/ |
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593 s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw) |
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594 { |
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595 s32 ret_val; |
|
596 u16 checksum = 0; |
|
597 u16 i, nvm_data; |
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598 |
|
599 for (i = 0; i < NVM_CHECKSUM_REG; i++) { |
|
600 ret_val = e1000_read_nvm(hw, i, 1, &nvm_data); |
|
601 if (ret_val) { |
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602 e_dbg("NVM Read Error while updating checksum.\n"); |
|
603 return ret_val; |
|
604 } |
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605 checksum += nvm_data; |
|
606 } |
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607 checksum = (u16)NVM_SUM - checksum; |
|
608 ret_val = e1000_write_nvm(hw, NVM_CHECKSUM_REG, 1, &checksum); |
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609 if (ret_val) |
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610 e_dbg("NVM Write Error while updating checksum.\n"); |
|
611 |
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612 return ret_val; |
|
613 } |
|
614 |
|
615 /** |
|
616 * e1000e_reload_nvm_generic - Reloads EEPROM |
|
617 * @hw: pointer to the HW structure |
|
618 * |
|
619 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the |
|
620 * extended control register. |
|
621 **/ |
|
622 void e1000e_reload_nvm_generic(struct e1000_hw *hw) |
|
623 { |
|
624 u32 ctrl_ext; |
|
625 |
|
626 usleep_range(10, 20); |
|
627 ctrl_ext = er32(CTRL_EXT); |
|
628 ctrl_ext |= E1000_CTRL_EXT_EE_RST; |
|
629 ew32(CTRL_EXT, ctrl_ext); |
|
630 e1e_flush(); |
|
631 } |