devices/e1000/e1000_hw-2.6.29-orig.h
author Philipp Weyer <pw@igh-essen.com>
Fri, 18 Aug 2017 12:30:16 +0200
changeset 2679 33b922ec1871
parent 2072 4adb56c4198d
permissions -rw-r--r--
Fixed lib include paths
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/*******************************************************************************
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  Intel PRO/1000 Linux driver
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  Copyright(c) 1999 - 2006 Intel Corporation.
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  This program is free software; you can redistribute it and/or modify it
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  under the terms and conditions of the GNU General Public License,
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  version 2, as published by the Free Software Foundation.
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  This program is distributed in the hope it will be useful, but WITHOUT
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  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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  more details.
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  You should have received a copy of the GNU General Public License along with
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  this program; if not, write to the Free Software Foundation, Inc.,
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  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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  The full GNU General Public License is included in this distribution in
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  the file called "COPYING".
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  Contact Information:
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  Linux NICS <linux.nics@intel.com>
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  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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/* e1000_hw.h
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 * Structures, enums, and macros for the MAC
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 */
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#ifndef _E1000_HW_H_
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#define _E1000_HW_H_
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#include "e1000_osdep.h"
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/* Forward declarations of structures used by the shared code */
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struct e1000_hw;
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struct e1000_hw_stats;
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/* Enumerated types specific to the e1000 hardware */
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/* Media Access Controlers */
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typedef enum {
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    e1000_undefined = 0,
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    e1000_82542_rev2_0,
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    e1000_82542_rev2_1,
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    e1000_82543,
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    e1000_82544,
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    e1000_82540,
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    e1000_82545,
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    e1000_82545_rev_3,
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    e1000_82546,
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    e1000_82546_rev_3,
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    e1000_82541,
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    e1000_82541_rev_2,
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    e1000_82547,
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    e1000_82547_rev_2,
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    e1000_82571,
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    e1000_82572,
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    e1000_82573,
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    e1000_80003es2lan,
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    e1000_ich8lan,
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    e1000_num_macs
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} e1000_mac_type;
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typedef enum {
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    e1000_eeprom_uninitialized = 0,
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    e1000_eeprom_spi,
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    e1000_eeprom_microwire,
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    e1000_eeprom_flash,
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    e1000_eeprom_ich8,
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    e1000_eeprom_none, /* No NVM support */
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    e1000_num_eeprom_types
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} e1000_eeprom_type;
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/* Media Types */
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typedef enum {
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    e1000_media_type_copper = 0,
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    e1000_media_type_fiber = 1,
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    e1000_media_type_internal_serdes = 2,
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    e1000_num_media_types
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} e1000_media_type;
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typedef enum {
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    e1000_10_half = 0,
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    e1000_10_full = 1,
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    e1000_100_half = 2,
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    e1000_100_full = 3
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} e1000_speed_duplex_type;
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/* Flow Control Settings */
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typedef enum {
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    E1000_FC_NONE = 0,
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    E1000_FC_RX_PAUSE = 1,
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    E1000_FC_TX_PAUSE = 2,
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    E1000_FC_FULL = 3,
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    E1000_FC_DEFAULT = 0xFF
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} e1000_fc_type;
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struct e1000_shadow_ram {
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    u16 eeprom_word;
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    bool modified;
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};
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/* PCI bus types */
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typedef enum {
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    e1000_bus_type_unknown = 0,
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    e1000_bus_type_pci,
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    e1000_bus_type_pcix,
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    e1000_bus_type_pci_express,
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    e1000_bus_type_reserved
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} e1000_bus_type;
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/* PCI bus speeds */
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typedef enum {
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    e1000_bus_speed_unknown = 0,
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    e1000_bus_speed_33,
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    e1000_bus_speed_66,
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    e1000_bus_speed_100,
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    e1000_bus_speed_120,
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    e1000_bus_speed_133,
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    e1000_bus_speed_2500,
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    e1000_bus_speed_reserved
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} e1000_bus_speed;
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/* PCI bus widths */
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typedef enum {
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    e1000_bus_width_unknown = 0,
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    /* These PCIe values should literally match the possible return values
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     * from config space */
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    e1000_bus_width_pciex_1 = 1,
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    e1000_bus_width_pciex_2 = 2,
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    e1000_bus_width_pciex_4 = 4,
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    e1000_bus_width_32,
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    e1000_bus_width_64,
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    e1000_bus_width_reserved
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} e1000_bus_width;
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/* PHY status info structure and supporting enums */
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typedef enum {
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    e1000_cable_length_50 = 0,
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    e1000_cable_length_50_80,
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    e1000_cable_length_80_110,
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    e1000_cable_length_110_140,
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    e1000_cable_length_140,
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    e1000_cable_length_undefined = 0xFF
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} e1000_cable_length;
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typedef enum {
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    e1000_gg_cable_length_60 = 0,
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    e1000_gg_cable_length_60_115 = 1,
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    e1000_gg_cable_length_115_150 = 2,
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    e1000_gg_cable_length_150 = 4
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} e1000_gg_cable_length;
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typedef enum {
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    e1000_igp_cable_length_10  = 10,
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    e1000_igp_cable_length_20  = 20,
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    e1000_igp_cable_length_30  = 30,
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    e1000_igp_cable_length_40  = 40,
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    e1000_igp_cable_length_50  = 50,
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    e1000_igp_cable_length_60  = 60,
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    e1000_igp_cable_length_70  = 70,
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    e1000_igp_cable_length_80  = 80,
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    e1000_igp_cable_length_90  = 90,
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    e1000_igp_cable_length_100 = 100,
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    e1000_igp_cable_length_110 = 110,
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    e1000_igp_cable_length_115 = 115,
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    e1000_igp_cable_length_120 = 120,
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    e1000_igp_cable_length_130 = 130,
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    e1000_igp_cable_length_140 = 140,
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    e1000_igp_cable_length_150 = 150,
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    e1000_igp_cable_length_160 = 160,
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    e1000_igp_cable_length_170 = 170,
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    e1000_igp_cable_length_180 = 180
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} e1000_igp_cable_length;
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typedef enum {
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    e1000_10bt_ext_dist_enable_normal = 0,
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    e1000_10bt_ext_dist_enable_lower,
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    e1000_10bt_ext_dist_enable_undefined = 0xFF
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} e1000_10bt_ext_dist_enable;
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typedef enum {
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    e1000_rev_polarity_normal = 0,
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    e1000_rev_polarity_reversed,
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    e1000_rev_polarity_undefined = 0xFF
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} e1000_rev_polarity;
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typedef enum {
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    e1000_downshift_normal = 0,
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    e1000_downshift_activated,
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    e1000_downshift_undefined = 0xFF
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} e1000_downshift;
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typedef enum {
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    e1000_smart_speed_default = 0,
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    e1000_smart_speed_on,
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    e1000_smart_speed_off
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} e1000_smart_speed;
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typedef enum {
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    e1000_polarity_reversal_enabled = 0,
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    e1000_polarity_reversal_disabled,
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    e1000_polarity_reversal_undefined = 0xFF
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} e1000_polarity_reversal;
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typedef enum {
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    e1000_auto_x_mode_manual_mdi = 0,
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    e1000_auto_x_mode_manual_mdix,
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    e1000_auto_x_mode_auto1,
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    e1000_auto_x_mode_auto2,
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    e1000_auto_x_mode_undefined = 0xFF
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} e1000_auto_x_mode;
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typedef enum {
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    e1000_1000t_rx_status_not_ok = 0,
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    e1000_1000t_rx_status_ok,
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    e1000_1000t_rx_status_undefined = 0xFF
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} e1000_1000t_rx_status;
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typedef enum {
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    e1000_phy_m88 = 0,
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    e1000_phy_igp,
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    e1000_phy_igp_2,
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    e1000_phy_gg82563,
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    e1000_phy_igp_3,
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    e1000_phy_ife,
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    e1000_phy_undefined = 0xFF
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} e1000_phy_type;
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typedef enum {
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    e1000_ms_hw_default = 0,
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   236
    e1000_ms_force_master,
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    e1000_ms_force_slave,
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    e1000_ms_auto
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} e1000_ms_type;
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   240
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typedef enum {
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    e1000_ffe_config_enabled = 0,
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    e1000_ffe_config_active,
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    e1000_ffe_config_blocked
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} e1000_ffe_config;
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typedef enum {
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    e1000_dsp_config_disabled = 0,
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    e1000_dsp_config_enabled,
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    e1000_dsp_config_activated,
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    e1000_dsp_config_undefined = 0xFF
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} e1000_dsp_config;
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   253
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struct e1000_phy_info {
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    e1000_cable_length cable_length;
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    e1000_10bt_ext_dist_enable extended_10bt_distance;
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    e1000_rev_polarity cable_polarity;
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    e1000_downshift downshift;
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    e1000_polarity_reversal polarity_correction;
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    e1000_auto_x_mode mdix_mode;
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    e1000_1000t_rx_status local_rx;
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    e1000_1000t_rx_status remote_rx;
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};
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struct e1000_phy_stats {
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    u32 idle_errors;
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    u32 receive_errors;
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};
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struct e1000_eeprom_info {
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    e1000_eeprom_type type;
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    u16 word_size;
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    u16 opcode_bits;
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    u16 address_bits;
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    u16 delay_usec;
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    u16 page_size;
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    bool use_eerd;
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    bool use_eewr;
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};
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/* Flex ASF Information */
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#define E1000_HOST_IF_MAX_SIZE  2048
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typedef enum {
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    e1000_byte_align = 0,
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    e1000_word_align = 1,
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    e1000_dword_align = 2
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} e1000_align_type;
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/* Error Codes */
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#define E1000_SUCCESS      0
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#define E1000_ERR_EEPROM   1
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#define E1000_ERR_PHY      2
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#define E1000_ERR_CONFIG   3
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#define E1000_ERR_PARAM    4
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#define E1000_ERR_MAC_TYPE 5
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#define E1000_ERR_PHY_TYPE 6
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#define E1000_ERR_RESET   9
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#define E1000_ERR_MASTER_REQUESTS_PENDING 10
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#define E1000_ERR_HOST_INTERFACE_COMMAND 11
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#define E1000_BLK_PHY_RESET   12
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#define E1000_ERR_SWFW_SYNC 13
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#define E1000_BYTE_SWAP_WORD(_value) ((((_value) & 0x00ff) << 8) | \
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                                     (((_value) & 0xff00) >> 8))
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/* Function prototypes */
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/* Initialization */
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s32 e1000_reset_hw(struct e1000_hw *hw);
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s32 e1000_init_hw(struct e1000_hw *hw);
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s32 e1000_set_mac_type(struct e1000_hw *hw);
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void e1000_set_media_type(struct e1000_hw *hw);
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/* Link Configuration */
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s32 e1000_setup_link(struct e1000_hw *hw);
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s32 e1000_phy_setup_autoneg(struct e1000_hw *hw);
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void e1000_config_collision_dist(struct e1000_hw *hw);
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s32 e1000_check_for_link(struct e1000_hw *hw);
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s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex);
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s32 e1000_force_mac_fc(struct e1000_hw *hw);
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/* PHY */
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s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data);
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s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 data);
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s32 e1000_phy_hw_reset(struct e1000_hw *hw);
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s32 e1000_phy_reset(struct e1000_hw *hw);
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s32 e1000_phy_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);
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s32 e1000_validate_mdi_setting(struct e1000_hw *hw);
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   331
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void e1000_phy_powerdown_workaround(struct e1000_hw *hw);
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   333
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/* EEPROM Functions */
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s32 e1000_init_eeprom_params(struct e1000_hw *hw);
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   336
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/* MNG HOST IF functions */
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u32 e1000_enable_mng_pass_thru(struct e1000_hw *hw);
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   339
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#define E1000_MNG_DHCP_TX_PAYLOAD_CMD   64
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#define E1000_HI_MAX_MNG_DATA_LENGTH    0x6F8   /* Host Interface data length */
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   342
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#define E1000_MNG_DHCP_COMMAND_TIMEOUT  10      /* Time in ms to process MNG command */
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#define E1000_MNG_DHCP_COOKIE_OFFSET    0x6F0   /* Cookie offset */
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#define E1000_MNG_DHCP_COOKIE_LENGTH    0x10    /* Cookie length */
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#define E1000_MNG_IAMT_MODE             0x3
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#define E1000_MNG_ICH_IAMT_MODE         0x2
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#define E1000_IAMT_SIGNATURE            0x544D4149 /* Intel(R) Active Management Technology signature */
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   349
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#define E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT 0x1 /* DHCP parsing enabled */
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#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT    0x2 /* DHCP parsing enabled */
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#define E1000_VFTA_ENTRY_SHIFT                       0x5
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#define E1000_VFTA_ENTRY_MASK                        0x7F
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#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK              0x1F
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   355
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struct e1000_host_mng_command_header {
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    u8 command_id;
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    u8 checksum;
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   359
    u16 reserved1;
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    u16 reserved2;
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   361
    u16 command_length;
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   362
};
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   363
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   364
struct e1000_host_mng_command_info {
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    struct e1000_host_mng_command_header command_header;  /* Command Head/Command Result Head has 4 bytes */
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    u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];   /* Command data can length 0..0x658*/
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};
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   368
#ifdef __BIG_ENDIAN
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struct e1000_host_mng_dhcp_cookie{
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    u32 signature;
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    u16 vlan_id;
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    u8 reserved0;
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    u8 status;
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    u32 reserved1;
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    u8 checksum;
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    u8 reserved3;
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    u16 reserved2;
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};
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#else
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struct e1000_host_mng_dhcp_cookie{
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    u32 signature;
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   382
    u8 status;
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   383
    u8 reserved0;
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   384
    u16 vlan_id;
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    u32 reserved1;
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Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   386
    u16 reserved2;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   387
    u8 reserved3;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   388
    u8 checksum;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   389
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   390
#endif
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   391
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   392
s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   393
                                  u16 length);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   394
bool e1000_check_mng_mode(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   395
bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   396
s32 e1000_read_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 *data);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   397
s32 e1000_validate_eeprom_checksum(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   398
s32 e1000_update_eeprom_checksum(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   399
s32 e1000_write_eeprom(struct e1000_hw *hw, u16 reg, u16 words, u16 *data);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   400
s32 e1000_read_mac_addr(struct e1000_hw * hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   401
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   402
/* Filters (multicast, vlan, receive) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   403
u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 * mc_addr);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   404
void e1000_mta_set(struct e1000_hw *hw, u32 hash_value);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   405
void e1000_rar_set(struct e1000_hw *hw, u8 * mc_addr, u32 rar_index);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   406
void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   407
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   408
/* LED functions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   409
s32 e1000_setup_led(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   410
s32 e1000_cleanup_led(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   411
s32 e1000_led_on(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   412
s32 e1000_led_off(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   413
s32 e1000_blink_led_start(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   414
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   415
/* Adaptive IFS Functions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   416
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   417
/* Everything else */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   418
void e1000_reset_adaptive(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   419
void e1000_update_adaptive(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   420
void e1000_tbi_adjust_stats(struct e1000_hw *hw, struct e1000_hw_stats *stats, u32 frame_len, u8 * mac_addr);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   421
void e1000_get_bus_info(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   422
void e1000_pci_set_mwi(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   423
void e1000_pci_clear_mwi(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   424
s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   425
void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   426
int e1000_pcix_get_mmrbc(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   427
/* Port I/O is only supported on 82544 and newer */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   428
void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   429
s32 e1000_disable_pciex_master(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   430
s32 e1000_check_phy_reset_block(struct e1000_hw *hw);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   431
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   432
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   433
#define E1000_READ_REG_IO(a, reg) \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   434
    e1000_read_reg_io((a), E1000_##reg)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   435
#define E1000_WRITE_REG_IO(a, reg, val) \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   436
    e1000_write_reg_io((a), E1000_##reg, val)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   437
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   438
/* PCI Device IDs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   439
#define E1000_DEV_ID_82542               0x1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   440
#define E1000_DEV_ID_82543GC_FIBER       0x1001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   441
#define E1000_DEV_ID_82543GC_COPPER      0x1004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   442
#define E1000_DEV_ID_82544EI_COPPER      0x1008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   443
#define E1000_DEV_ID_82544EI_FIBER       0x1009
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   444
#define E1000_DEV_ID_82544GC_COPPER      0x100C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   445
#define E1000_DEV_ID_82544GC_LOM         0x100D
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   446
#define E1000_DEV_ID_82540EM             0x100E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   447
#define E1000_DEV_ID_82540EM_LOM         0x1015
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   448
#define E1000_DEV_ID_82540EP_LOM         0x1016
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   449
#define E1000_DEV_ID_82540EP             0x1017
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   450
#define E1000_DEV_ID_82540EP_LP          0x101E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   451
#define E1000_DEV_ID_82545EM_COPPER      0x100F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   452
#define E1000_DEV_ID_82545EM_FIBER       0x1011
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   453
#define E1000_DEV_ID_82545GM_COPPER      0x1026
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   454
#define E1000_DEV_ID_82545GM_FIBER       0x1027
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   455
#define E1000_DEV_ID_82545GM_SERDES      0x1028
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   456
#define E1000_DEV_ID_82546EB_COPPER      0x1010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   457
#define E1000_DEV_ID_82546EB_FIBER       0x1012
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   458
#define E1000_DEV_ID_82546EB_QUAD_COPPER 0x101D
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   459
#define E1000_DEV_ID_82541EI             0x1013
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   460
#define E1000_DEV_ID_82541EI_MOBILE      0x1018
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   461
#define E1000_DEV_ID_82541ER_LOM         0x1014
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   462
#define E1000_DEV_ID_82541ER             0x1078
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   463
#define E1000_DEV_ID_82547GI             0x1075
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   464
#define E1000_DEV_ID_82541GI             0x1076
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   465
#define E1000_DEV_ID_82541GI_MOBILE      0x1077
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   466
#define E1000_DEV_ID_82541GI_LF          0x107C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   467
#define E1000_DEV_ID_82546GB_COPPER      0x1079
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   468
#define E1000_DEV_ID_82546GB_FIBER       0x107A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   469
#define E1000_DEV_ID_82546GB_SERDES      0x107B
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   470
#define E1000_DEV_ID_82546GB_PCIE        0x108A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   471
#define E1000_DEV_ID_82546GB_QUAD_COPPER 0x1099
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   472
#define E1000_DEV_ID_82547EI             0x1019
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   473
#define E1000_DEV_ID_82547EI_MOBILE      0x101A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   474
#define E1000_DEV_ID_82571EB_COPPER      0x105E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   475
#define E1000_DEV_ID_82571EB_FIBER       0x105F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   476
#define E1000_DEV_ID_82571EB_SERDES      0x1060
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   477
#define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   478
#define E1000_DEV_ID_82571PT_QUAD_COPPER 0x10D5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   479
#define E1000_DEV_ID_82571EB_QUAD_FIBER  0x10A5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   480
#define E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE  0x10BC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   481
#define E1000_DEV_ID_82571EB_SERDES_DUAL 0x10D9
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   482
#define E1000_DEV_ID_82571EB_SERDES_QUAD 0x10DA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   483
#define E1000_DEV_ID_82572EI_COPPER      0x107D
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   484
#define E1000_DEV_ID_82572EI_FIBER       0x107E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   485
#define E1000_DEV_ID_82572EI_SERDES      0x107F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   486
#define E1000_DEV_ID_82572EI             0x10B9
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   487
#define E1000_DEV_ID_82573E              0x108B
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   488
#define E1000_DEV_ID_82573E_IAMT         0x108C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   489
#define E1000_DEV_ID_82573L              0x109A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   490
#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   491
#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT     0x1096
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   492
#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT     0x1098
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   493
#define E1000_DEV_ID_80003ES2LAN_COPPER_SPT     0x10BA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   494
#define E1000_DEV_ID_80003ES2LAN_SERDES_SPT     0x10BB
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   495
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   496
#define E1000_DEV_ID_ICH8_IGP_M_AMT      0x1049
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   497
#define E1000_DEV_ID_ICH8_IGP_AMT        0x104A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   498
#define E1000_DEV_ID_ICH8_IGP_C          0x104B
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   499
#define E1000_DEV_ID_ICH8_IFE            0x104C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   500
#define E1000_DEV_ID_ICH8_IFE_GT         0x10C4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   501
#define E1000_DEV_ID_ICH8_IFE_G          0x10C5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   502
#define E1000_DEV_ID_ICH8_IGP_M          0x104D
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   503
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   504
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   505
#define NODE_ADDRESS_SIZE 6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   506
#define ETH_LENGTH_OF_ADDRESS 6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   507
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   508
/* MAC decode size is 128K - This is the size of BAR0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   509
#define MAC_DECODE_SIZE (128 * 1024)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   510
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   511
#define E1000_82542_2_0_REV_ID 2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   512
#define E1000_82542_2_1_REV_ID 3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   513
#define E1000_REVISION_0       0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   514
#define E1000_REVISION_1       1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   515
#define E1000_REVISION_2       2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   516
#define E1000_REVISION_3       3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   517
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   518
#define SPEED_10    10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   519
#define SPEED_100   100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   520
#define SPEED_1000  1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   521
#define HALF_DUPLEX 1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   522
#define FULL_DUPLEX 2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   523
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   524
/* The sizes (in bytes) of a ethernet packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   525
#define ENET_HEADER_SIZE             14
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   526
#define MAXIMUM_ETHERNET_FRAME_SIZE  1518 /* With FCS */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   527
#define MINIMUM_ETHERNET_FRAME_SIZE  64   /* With FCS */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   528
#define ETHERNET_FCS_SIZE            4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   529
#define MAXIMUM_ETHERNET_PACKET_SIZE \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   530
    (MAXIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   531
#define MINIMUM_ETHERNET_PACKET_SIZE \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   532
    (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   533
#define CRC_LENGTH                   ETHERNET_FCS_SIZE
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   534
#define MAX_JUMBO_FRAME_SIZE         0x3F00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   535
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   536
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   537
/* 802.1q VLAN Packet Sizes */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   538
#define VLAN_TAG_SIZE  4     /* 802.3ac tag (not DMAed) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   539
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   540
/* Ethertype field values */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   541
#define ETHERNET_IEEE_VLAN_TYPE 0x8100  /* 802.3ac packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   542
#define ETHERNET_IP_TYPE        0x0800  /* IP packets */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   543
#define ETHERNET_ARP_TYPE       0x0806  /* Address Resolution Protocol (ARP) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   544
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   545
/* Packet Header defines */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   546
#define IP_PROTOCOL_TCP    6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   547
#define IP_PROTOCOL_UDP    0x11
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   548
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   549
/* This defines the bits that are set in the Interrupt Mask
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   550
 * Set/Read Register.  Each bit is documented below:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   551
 *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   552
 *   o RXSEQ  = Receive Sequence Error
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   553
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   554
#define POLL_IMS_ENABLE_MASK ( \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   555
    E1000_IMS_RXDMT0 |         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   556
    E1000_IMS_RXSEQ)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   557
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   558
/* This defines the bits that are set in the Interrupt Mask
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   559
 * Set/Read Register.  Each bit is documented below:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   560
 *   o RXT0   = Receiver Timer Interrupt (ring 0)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   561
 *   o TXDW   = Transmit Descriptor Written Back
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   562
 *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   563
 *   o RXSEQ  = Receive Sequence Error
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   564
 *   o LSC    = Link Status Change
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   565
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   566
#define IMS_ENABLE_MASK ( \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   567
    E1000_IMS_RXT0   |    \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   568
    E1000_IMS_TXDW   |    \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   569
    E1000_IMS_RXDMT0 |    \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   570
    E1000_IMS_RXSEQ  |    \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   571
    E1000_IMS_LSC)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   572
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   573
/* Additional interrupts need to be handled for e1000_ich8lan:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   574
    DSW = The FW changed the status of the DISSW bit in FWSM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   575
    PHYINT = The LAN connected device generates an interrupt
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   576
    EPRST = Manageability reset event */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   577
#define IMS_ICH8LAN_ENABLE_MASK (\
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   578
    E1000_IMS_DSW   | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   579
    E1000_IMS_PHYINT | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   580
    E1000_IMS_EPRST)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   581
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   582
/* Number of high/low register pairs in the RAR. The RAR (Receive Address
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   583
 * Registers) holds the directed and multicast addresses that we monitor. We
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   584
 * reserve one of these spots for our directed address, allowing us room for
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   585
 * E1000_RAR_ENTRIES - 1 multicast addresses.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   586
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   587
#define E1000_RAR_ENTRIES 15
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   588
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   589
#define E1000_RAR_ENTRIES_ICH8LAN  6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   590
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   591
#define MIN_NUMBER_OF_DESCRIPTORS  8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   592
#define MAX_NUMBER_OF_DESCRIPTORS  0xFFF8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   593
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   594
/* Receive Descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   595
struct e1000_rx_desc {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   596
    __le64 buffer_addr; /* Address of the descriptor's data buffer */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   597
    __le16 length;     /* Length of data DMAed into data buffer */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   598
    __le16 csum;       /* Packet checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   599
    u8 status;      /* Descriptor status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   600
    u8 errors;      /* Descriptor Errors */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   601
    __le16 special;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   602
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   603
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   604
/* Receive Descriptor - Extended */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   605
union e1000_rx_desc_extended {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   606
    struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   607
        __le64 buffer_addr;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   608
        __le64 reserved;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   609
    } read;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   610
    struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   611
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   612
            __le32 mrq;              /* Multiple Rx Queues */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   613
            union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   614
                __le32 rss;          /* RSS Hash */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   615
                struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   616
                    __le16 ip_id;    /* IP id */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   617
                    __le16 csum;     /* Packet Checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   618
                } csum_ip;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   619
            } hi_dword;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   620
        } lower;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   621
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   622
            __le32 status_error;     /* ext status/error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   623
            __le16 length;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   624
            __le16 vlan;             /* VLAN tag */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   625
        } upper;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   626
    } wb;  /* writeback */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   627
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   628
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   629
#define MAX_PS_BUFFERS 4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   630
/* Receive Descriptor - Packet Split */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   631
union e1000_rx_desc_packet_split {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   632
    struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   633
        /* one buffer for protocol header(s), three data buffers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   634
        __le64 buffer_addr[MAX_PS_BUFFERS];
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   635
    } read;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   636
    struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   637
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   638
            __le32 mrq;              /* Multiple Rx Queues */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   639
            union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   640
                __le32 rss;          /* RSS Hash */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   641
                struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   642
                    __le16 ip_id;    /* IP id */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   643
                    __le16 csum;     /* Packet Checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   644
                } csum_ip;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   645
            } hi_dword;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   646
        } lower;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   647
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   648
            __le32 status_error;     /* ext status/error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   649
            __le16 length0;          /* length of buffer 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   650
            __le16 vlan;             /* VLAN tag */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   651
        } middle;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   652
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   653
            __le16 header_status;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   654
            __le16 length[3];        /* length of buffers 1-3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   655
        } upper;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   656
        __le64 reserved;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   657
    } wb; /* writeback */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   658
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   659
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   660
/* Receive Decriptor bit definitions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   661
#define E1000_RXD_STAT_DD       0x01    /* Descriptor Done */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   662
#define E1000_RXD_STAT_EOP      0x02    /* End of Packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   663
#define E1000_RXD_STAT_IXSM     0x04    /* Ignore checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   664
#define E1000_RXD_STAT_VP       0x08    /* IEEE VLAN Packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   665
#define E1000_RXD_STAT_UDPCS    0x10    /* UDP xsum caculated */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   666
#define E1000_RXD_STAT_TCPCS    0x20    /* TCP xsum calculated */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   667
#define E1000_RXD_STAT_IPCS     0x40    /* IP xsum calculated */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   668
#define E1000_RXD_STAT_PIF      0x80    /* passed in-exact filter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   669
#define E1000_RXD_STAT_IPIDV    0x200   /* IP identification valid */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   670
#define E1000_RXD_STAT_UDPV     0x400   /* Valid UDP checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   671
#define E1000_RXD_STAT_ACK      0x8000  /* ACK Packet indication */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   672
#define E1000_RXD_ERR_CE        0x01    /* CRC Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   673
#define E1000_RXD_ERR_SE        0x02    /* Symbol Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   674
#define E1000_RXD_ERR_SEQ       0x04    /* Sequence Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   675
#define E1000_RXD_ERR_CXE       0x10    /* Carrier Extension Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   676
#define E1000_RXD_ERR_TCPE      0x20    /* TCP/UDP Checksum Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   677
#define E1000_RXD_ERR_IPE       0x40    /* IP Checksum Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   678
#define E1000_RXD_ERR_RXE       0x80    /* Rx Data Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   679
#define E1000_RXD_SPC_VLAN_MASK 0x0FFF  /* VLAN ID is in lower 12 bits */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   680
#define E1000_RXD_SPC_PRI_MASK  0xE000  /* Priority is in upper 3 bits */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   681
#define E1000_RXD_SPC_PRI_SHIFT 13
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   682
#define E1000_RXD_SPC_CFI_MASK  0x1000  /* CFI is bit 12 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   683
#define E1000_RXD_SPC_CFI_SHIFT 12
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   684
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   685
#define E1000_RXDEXT_STATERR_CE    0x01000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   686
#define E1000_RXDEXT_STATERR_SE    0x02000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   687
#define E1000_RXDEXT_STATERR_SEQ   0x04000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   688
#define E1000_RXDEXT_STATERR_CXE   0x10000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   689
#define E1000_RXDEXT_STATERR_TCPE  0x20000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   690
#define E1000_RXDEXT_STATERR_IPE   0x40000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   691
#define E1000_RXDEXT_STATERR_RXE   0x80000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   692
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   693
#define E1000_RXDPS_HDRSTAT_HDRSP        0x00008000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   694
#define E1000_RXDPS_HDRSTAT_HDRLEN_MASK  0x000003FF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   695
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   696
/* mask to determine if packets should be dropped due to frame errors */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   697
#define E1000_RXD_ERR_FRAME_ERR_MASK ( \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   698
    E1000_RXD_ERR_CE  |                \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   699
    E1000_RXD_ERR_SE  |                \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   700
    E1000_RXD_ERR_SEQ |                \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   701
    E1000_RXD_ERR_CXE |                \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   702
    E1000_RXD_ERR_RXE)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   703
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   704
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   705
/* Same mask, but for extended and packet split descriptors */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   706
#define E1000_RXDEXT_ERR_FRAME_ERR_MASK ( \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   707
    E1000_RXDEXT_STATERR_CE  |            \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   708
    E1000_RXDEXT_STATERR_SE  |            \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   709
    E1000_RXDEXT_STATERR_SEQ |            \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   710
    E1000_RXDEXT_STATERR_CXE |            \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   711
    E1000_RXDEXT_STATERR_RXE)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   712
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   713
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   714
/* Transmit Descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   715
struct e1000_tx_desc {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   716
    __le64 buffer_addr;       /* Address of the descriptor's data buffer */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   717
    union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   718
        __le32 data;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   719
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   720
            __le16 length;    /* Data buffer length */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   721
            u8 cso;        /* Checksum offset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   722
            u8 cmd;        /* Descriptor control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   723
        } flags;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   724
    } lower;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   725
    union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   726
        __le32 data;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   727
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   728
            u8 status;     /* Descriptor status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   729
            u8 css;        /* Checksum start */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   730
            __le16 special;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   731
        } fields;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   732
    } upper;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   733
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   734
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   735
/* Transmit Descriptor bit definitions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   736
#define E1000_TXD_DTYP_D     0x00100000 /* Data Descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   737
#define E1000_TXD_DTYP_C     0x00000000 /* Context Descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   738
#define E1000_TXD_POPTS_IXSM 0x01       /* Insert IP checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   739
#define E1000_TXD_POPTS_TXSM 0x02       /* Insert TCP/UDP checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   740
#define E1000_TXD_CMD_EOP    0x01000000 /* End of Packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   741
#define E1000_TXD_CMD_IFCS   0x02000000 /* Insert FCS (Ethernet CRC) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   742
#define E1000_TXD_CMD_IC     0x04000000 /* Insert Checksum */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   743
#define E1000_TXD_CMD_RS     0x08000000 /* Report Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   744
#define E1000_TXD_CMD_RPS    0x10000000 /* Report Packet Sent */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   745
#define E1000_TXD_CMD_DEXT   0x20000000 /* Descriptor extension (0 = legacy) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   746
#define E1000_TXD_CMD_VLE    0x40000000 /* Add VLAN tag */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   747
#define E1000_TXD_CMD_IDE    0x80000000 /* Enable Tidv register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   748
#define E1000_TXD_STAT_DD    0x00000001 /* Descriptor Done */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   749
#define E1000_TXD_STAT_EC    0x00000002 /* Excess Collisions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   750
#define E1000_TXD_STAT_LC    0x00000004 /* Late Collisions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   751
#define E1000_TXD_STAT_TU    0x00000008 /* Transmit underrun */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   752
#define E1000_TXD_CMD_TCP    0x01000000 /* TCP packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   753
#define E1000_TXD_CMD_IP     0x02000000 /* IP packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   754
#define E1000_TXD_CMD_TSE    0x04000000 /* TCP Seg enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   755
#define E1000_TXD_STAT_TC    0x00000004 /* Tx Underrun */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   756
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   757
/* Offload Context Descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   758
struct e1000_context_desc {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   759
    union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   760
        __le32 ip_config;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   761
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   762
            u8 ipcss;      /* IP checksum start */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   763
            u8 ipcso;      /* IP checksum offset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   764
            __le16 ipcse;     /* IP checksum end */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   765
        } ip_fields;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   766
    } lower_setup;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   767
    union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   768
        __le32 tcp_config;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   769
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   770
            u8 tucss;      /* TCP checksum start */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   771
            u8 tucso;      /* TCP checksum offset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   772
            __le16 tucse;     /* TCP checksum end */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   773
        } tcp_fields;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   774
    } upper_setup;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   775
    __le32 cmd_and_length;    /* */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   776
    union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   777
        __le32 data;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   778
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   779
            u8 status;     /* Descriptor status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   780
            u8 hdr_len;    /* Header length */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   781
            __le16 mss;       /* Maximum segment size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   782
        } fields;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   783
    } tcp_seg_setup;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   784
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   785
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   786
/* Offload data descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   787
struct e1000_data_desc {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   788
    __le64 buffer_addr;       /* Address of the descriptor's buffer address */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   789
    union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   790
        __le32 data;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   791
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   792
            __le16 length;    /* Data buffer length */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   793
            u8 typ_len_ext;        /* */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   794
            u8 cmd;        /* */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   795
        } flags;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   796
    } lower;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   797
    union {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   798
        __le32 data;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   799
        struct {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   800
            u8 status;     /* Descriptor status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   801
            u8 popts;      /* Packet Options */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   802
            __le16 special;   /* */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   803
        } fields;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   804
    } upper;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   805
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   806
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   807
/* Filters */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   808
#define E1000_NUM_UNICAST          16   /* Unicast filter entries */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   809
#define E1000_MC_TBL_SIZE          128  /* Multicast Filter Table (4096 bits) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   810
#define E1000_VLAN_FILTER_TBL_SIZE 128  /* VLAN Filter Table (4096 bits) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   811
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   812
#define E1000_NUM_UNICAST_ICH8LAN  7
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   813
#define E1000_MC_TBL_SIZE_ICH8LAN  32
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   814
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   815
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   816
/* Receive Address Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   817
struct e1000_rar {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   818
    volatile __le32 low;      /* receive address low */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   819
    volatile __le32 high;     /* receive address high */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   820
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   821
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   822
/* Number of entries in the Multicast Table Array (MTA). */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   823
#define E1000_NUM_MTA_REGISTERS 128
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   824
#define E1000_NUM_MTA_REGISTERS_ICH8LAN 32
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   825
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   826
/* IPv4 Address Table Entry */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   827
struct e1000_ipv4_at_entry {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   828
    volatile u32 ipv4_addr;        /* IP Address (RW) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   829
    volatile u32 reserved;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   830
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   831
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   832
/* Four wakeup IP addresses are supported */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   833
#define E1000_WAKEUP_IP_ADDRESS_COUNT_MAX 4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   834
#define E1000_IP4AT_SIZE                  E1000_WAKEUP_IP_ADDRESS_COUNT_MAX
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   835
#define E1000_IP4AT_SIZE_ICH8LAN          3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   836
#define E1000_IP6AT_SIZE                  1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   837
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   838
/* IPv6 Address Table Entry */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   839
struct e1000_ipv6_at_entry {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   840
    volatile u8 ipv6_addr[16];
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   841
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   842
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   843
/* Flexible Filter Length Table Entry */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   844
struct e1000_fflt_entry {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   845
    volatile u32 length;   /* Flexible Filter Length (RW) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   846
    volatile u32 reserved;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   847
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   848
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   849
/* Flexible Filter Mask Table Entry */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   850
struct e1000_ffmt_entry {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   851
    volatile u32 mask;     /* Flexible Filter Mask (RW) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   852
    volatile u32 reserved;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   853
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   854
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   855
/* Flexible Filter Value Table Entry */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   856
struct e1000_ffvt_entry {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   857
    volatile u32 value;    /* Flexible Filter Value (RW) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   858
    volatile u32 reserved;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   859
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   860
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   861
/* Four Flexible Filters are supported */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   862
#define E1000_FLEXIBLE_FILTER_COUNT_MAX 4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   863
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   864
/* Each Flexible Filter is at most 128 (0x80) bytes in length */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   865
#define E1000_FLEXIBLE_FILTER_SIZE_MAX  128
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   866
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   867
#define E1000_FFLT_SIZE E1000_FLEXIBLE_FILTER_COUNT_MAX
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   868
#define E1000_FFMT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   869
#define E1000_FFVT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   870
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   871
#define E1000_DISABLE_SERDES_LOOPBACK   0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   872
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   873
/* Register Set. (82543, 82544)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   874
 *
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   875
 * Registers are defined to be 32 bits and  should be accessed as 32 bit values.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   876
 * These registers are physically located on the NIC, but are mapped into the
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   877
 * host memory address space.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   878
 *
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   879
 * RW - register is both readable and writable
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   880
 * RO - register is read only
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   881
 * WO - register is write only
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   882
 * R/clr - register is read only and is cleared when read
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   883
 * A - register array
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   884
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   885
#define E1000_CTRL     0x00000  /* Device Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   886
#define E1000_CTRL_DUP 0x00004  /* Device Control Duplicate (Shadow) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   887
#define E1000_STATUS   0x00008  /* Device Status - RO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   888
#define E1000_EECD     0x00010  /* EEPROM/Flash Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   889
#define E1000_EERD     0x00014  /* EEPROM Read - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   890
#define E1000_CTRL_EXT 0x00018  /* Extended Device Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   891
#define E1000_FLA      0x0001C  /* Flash Access - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   892
#define E1000_MDIC     0x00020  /* MDI Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   893
#define E1000_SCTL     0x00024  /* SerDes Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   894
#define E1000_FEXTNVM  0x00028  /* Future Extended NVM register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   895
#define E1000_FCAL     0x00028  /* Flow Control Address Low - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   896
#define E1000_FCAH     0x0002C  /* Flow Control Address High -RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   897
#define E1000_FCT      0x00030  /* Flow Control Type - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   898
#define E1000_VET      0x00038  /* VLAN Ether Type - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   899
#define E1000_ICR      0x000C0  /* Interrupt Cause Read - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   900
#define E1000_ITR      0x000C4  /* Interrupt Throttling Rate - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   901
#define E1000_ICS      0x000C8  /* Interrupt Cause Set - WO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   902
#define E1000_IMS      0x000D0  /* Interrupt Mask Set - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   903
#define E1000_IMC      0x000D8  /* Interrupt Mask Clear - WO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   904
#define E1000_IAM      0x000E0  /* Interrupt Acknowledge Auto Mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   905
#define E1000_RCTL     0x00100  /* RX Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   906
#define E1000_RDTR1    0x02820  /* RX Delay Timer (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   907
#define E1000_RDBAL1   0x02900  /* RX Descriptor Base Address Low (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   908
#define E1000_RDBAH1   0x02904  /* RX Descriptor Base Address High (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   909
#define E1000_RDLEN1   0x02908  /* RX Descriptor Length (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   910
#define E1000_RDH1     0x02910  /* RX Descriptor Head (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   911
#define E1000_RDT1     0x02918  /* RX Descriptor Tail (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   912
#define E1000_FCTTV    0x00170  /* Flow Control Transmit Timer Value - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   913
#define E1000_TXCW     0x00178  /* TX Configuration Word - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   914
#define E1000_RXCW     0x00180  /* RX Configuration Word - RO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   915
#define E1000_TCTL     0x00400  /* TX Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   916
#define E1000_TCTL_EXT 0x00404  /* Extended TX Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   917
#define E1000_TIPG     0x00410  /* TX Inter-packet gap -RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   918
#define E1000_TBT      0x00448  /* TX Burst Timer - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   919
#define E1000_AIT      0x00458  /* Adaptive Interframe Spacing Throttle - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   920
#define E1000_LEDCTL   0x00E00  /* LED Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   921
#define E1000_EXTCNF_CTRL  0x00F00  /* Extended Configuration Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   922
#define E1000_EXTCNF_SIZE  0x00F08  /* Extended Configuration Size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   923
#define E1000_PHY_CTRL     0x00F10  /* PHY Control Register in CSR */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   924
#define FEXTNVM_SW_CONFIG  0x0001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   925
#define E1000_PBA      0x01000  /* Packet Buffer Allocation - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   926
#define E1000_PBS      0x01008  /* Packet Buffer Size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   927
#define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   928
#define E1000_FLASH_UPDATES 1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   929
#define E1000_EEARBC   0x01024  /* EEPROM Auto Read Bus Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   930
#define E1000_FLASHT   0x01028  /* FLASH Timer Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   931
#define E1000_EEWR     0x0102C  /* EEPROM Write Register - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   932
#define E1000_FLSWCTL  0x01030  /* FLASH control register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   933
#define E1000_FLSWDATA 0x01034  /* FLASH data register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   934
#define E1000_FLSWCNT  0x01038  /* FLASH Access Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   935
#define E1000_FLOP     0x0103C  /* FLASH Opcode Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   936
#define E1000_ERT      0x02008  /* Early Rx Threshold - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   937
#define E1000_FCRTL    0x02160  /* Flow Control Receive Threshold Low - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   938
#define E1000_FCRTH    0x02168  /* Flow Control Receive Threshold High - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   939
#define E1000_PSRCTL   0x02170  /* Packet Split Receive Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   940
#define E1000_RDBAL    0x02800  /* RX Descriptor Base Address Low - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   941
#define E1000_RDBAH    0x02804  /* RX Descriptor Base Address High - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   942
#define E1000_RDLEN    0x02808  /* RX Descriptor Length - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   943
#define E1000_RDH      0x02810  /* RX Descriptor Head - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   944
#define E1000_RDT      0x02818  /* RX Descriptor Tail - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   945
#define E1000_RDTR     0x02820  /* RX Delay Timer - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   946
#define E1000_RDBAL0   E1000_RDBAL /* RX Desc Base Address Low (0) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   947
#define E1000_RDBAH0   E1000_RDBAH /* RX Desc Base Address High (0) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   948
#define E1000_RDLEN0   E1000_RDLEN /* RX Desc Length (0) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   949
#define E1000_RDH0     E1000_RDH   /* RX Desc Head (0) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   950
#define E1000_RDT0     E1000_RDT   /* RX Desc Tail (0) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   951
#define E1000_RDTR0    E1000_RDTR  /* RX Delay Timer (0) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   952
#define E1000_RXDCTL   0x02828  /* RX Descriptor Control queue 0 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   953
#define E1000_RXDCTL1  0x02928  /* RX Descriptor Control queue 1 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   954
#define E1000_RADV     0x0282C  /* RX Interrupt Absolute Delay Timer - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   955
#define E1000_RSRPD    0x02C00  /* RX Small Packet Detect - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   956
#define E1000_RAID     0x02C08  /* Receive Ack Interrupt Delay - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   957
#define E1000_TXDMAC   0x03000  /* TX DMA Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   958
#define E1000_KABGTXD  0x03004  /* AFE Band Gap Transmit Ref Data */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   959
#define E1000_TDFH     0x03410  /* TX Data FIFO Head - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   960
#define E1000_TDFT     0x03418  /* TX Data FIFO Tail - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   961
#define E1000_TDFHS    0x03420  /* TX Data FIFO Head Saved - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   962
#define E1000_TDFTS    0x03428  /* TX Data FIFO Tail Saved - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   963
#define E1000_TDFPC    0x03430  /* TX Data FIFO Packet Count - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   964
#define E1000_TDBAL    0x03800  /* TX Descriptor Base Address Low - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   965
#define E1000_TDBAH    0x03804  /* TX Descriptor Base Address High - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   966
#define E1000_TDLEN    0x03808  /* TX Descriptor Length - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   967
#define E1000_TDH      0x03810  /* TX Descriptor Head - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   968
#define E1000_TDT      0x03818  /* TX Descripotr Tail - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   969
#define E1000_TIDV     0x03820  /* TX Interrupt Delay Value - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   970
#define E1000_TXDCTL   0x03828  /* TX Descriptor Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   971
#define E1000_TADV     0x0382C  /* TX Interrupt Absolute Delay Val - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   972
#define E1000_TSPMT    0x03830  /* TCP Segmentation PAD & Min Threshold - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   973
#define E1000_TARC0    0x03840  /* TX Arbitration Count (0) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   974
#define E1000_TDBAL1   0x03900  /* TX Desc Base Address Low (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   975
#define E1000_TDBAH1   0x03904  /* TX Desc Base Address High (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   976
#define E1000_TDLEN1   0x03908  /* TX Desc Length (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   977
#define E1000_TDH1     0x03910  /* TX Desc Head (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   978
#define E1000_TDT1     0x03918  /* TX Desc Tail (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   979
#define E1000_TXDCTL1  0x03928  /* TX Descriptor Control (1) - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   980
#define E1000_TARC1    0x03940  /* TX Arbitration Count (1) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   981
#define E1000_CRCERRS  0x04000  /* CRC Error Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   982
#define E1000_ALGNERRC 0x04004  /* Alignment Error Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   983
#define E1000_SYMERRS  0x04008  /* Symbol Error Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   984
#define E1000_RXERRC   0x0400C  /* Receive Error Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   985
#define E1000_MPC      0x04010  /* Missed Packet Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   986
#define E1000_SCC      0x04014  /* Single Collision Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   987
#define E1000_ECOL     0x04018  /* Excessive Collision Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   988
#define E1000_MCC      0x0401C  /* Multiple Collision Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   989
#define E1000_LATECOL  0x04020  /* Late Collision Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   990
#define E1000_COLC     0x04028  /* Collision Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   991
#define E1000_DC       0x04030  /* Defer Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   992
#define E1000_TNCRS    0x04034  /* TX-No CRS - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   993
#define E1000_SEC      0x04038  /* Sequence Error Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   994
#define E1000_CEXTERR  0x0403C  /* Carrier Extension Error Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   995
#define E1000_RLEC     0x04040  /* Receive Length Error Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   996
#define E1000_XONRXC   0x04048  /* XON RX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   997
#define E1000_XONTXC   0x0404C  /* XON TX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   998
#define E1000_XOFFRXC  0x04050  /* XOFF RX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
   999
#define E1000_XOFFTXC  0x04054  /* XOFF TX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1000
#define E1000_FCRUC    0x04058  /* Flow Control RX Unsupported Count- R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1001
#define E1000_PRC64    0x0405C  /* Packets RX (64 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1002
#define E1000_PRC127   0x04060  /* Packets RX (65-127 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1003
#define E1000_PRC255   0x04064  /* Packets RX (128-255 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1004
#define E1000_PRC511   0x04068  /* Packets RX (255-511 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1005
#define E1000_PRC1023  0x0406C  /* Packets RX (512-1023 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1006
#define E1000_PRC1522  0x04070  /* Packets RX (1024-1522 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1007
#define E1000_GPRC     0x04074  /* Good Packets RX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1008
#define E1000_BPRC     0x04078  /* Broadcast Packets RX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1009
#define E1000_MPRC     0x0407C  /* Multicast Packets RX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1010
#define E1000_GPTC     0x04080  /* Good Packets TX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1011
#define E1000_GORCL    0x04088  /* Good Octets RX Count Low - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1012
#define E1000_GORCH    0x0408C  /* Good Octets RX Count High - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1013
#define E1000_GOTCL    0x04090  /* Good Octets TX Count Low - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1014
#define E1000_GOTCH    0x04094  /* Good Octets TX Count High - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1015
#define E1000_RNBC     0x040A0  /* RX No Buffers Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1016
#define E1000_RUC      0x040A4  /* RX Undersize Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1017
#define E1000_RFC      0x040A8  /* RX Fragment Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1018
#define E1000_ROC      0x040AC  /* RX Oversize Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1019
#define E1000_RJC      0x040B0  /* RX Jabber Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1020
#define E1000_MGTPRC   0x040B4  /* Management Packets RX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1021
#define E1000_MGTPDC   0x040B8  /* Management Packets Dropped Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1022
#define E1000_MGTPTC   0x040BC  /* Management Packets TX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1023
#define E1000_TORL     0x040C0  /* Total Octets RX Low - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1024
#define E1000_TORH     0x040C4  /* Total Octets RX High - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1025
#define E1000_TOTL     0x040C8  /* Total Octets TX Low - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1026
#define E1000_TOTH     0x040CC  /* Total Octets TX High - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1027
#define E1000_TPR      0x040D0  /* Total Packets RX - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1028
#define E1000_TPT      0x040D4  /* Total Packets TX - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1029
#define E1000_PTC64    0x040D8  /* Packets TX (64 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1030
#define E1000_PTC127   0x040DC  /* Packets TX (65-127 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1031
#define E1000_PTC255   0x040E0  /* Packets TX (128-255 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1032
#define E1000_PTC511   0x040E4  /* Packets TX (256-511 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1033
#define E1000_PTC1023  0x040E8  /* Packets TX (512-1023 bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1034
#define E1000_PTC1522  0x040EC  /* Packets TX (1024-1522 Bytes) - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1035
#define E1000_MPTC     0x040F0  /* Multicast Packets TX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1036
#define E1000_BPTC     0x040F4  /* Broadcast Packets TX Count - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1037
#define E1000_TSCTC    0x040F8  /* TCP Segmentation Context TX - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1038
#define E1000_TSCTFC   0x040FC  /* TCP Segmentation Context TX Fail - R/clr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1039
#define E1000_IAC      0x04100  /* Interrupt Assertion Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1040
#define E1000_ICRXPTC  0x04104  /* Interrupt Cause Rx Packet Timer Expire Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1041
#define E1000_ICRXATC  0x04108  /* Interrupt Cause Rx Absolute Timer Expire Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1042
#define E1000_ICTXPTC  0x0410C  /* Interrupt Cause Tx Packet Timer Expire Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1043
#define E1000_ICTXATC  0x04110  /* Interrupt Cause Tx Absolute Timer Expire Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1044
#define E1000_ICTXQEC  0x04118  /* Interrupt Cause Tx Queue Empty Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1045
#define E1000_ICTXQMTC 0x0411C  /* Interrupt Cause Tx Queue Minimum Threshold Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1046
#define E1000_ICRXDMTC 0x04120  /* Interrupt Cause Rx Descriptor Minimum Threshold Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1047
#define E1000_ICRXOC   0x04124  /* Interrupt Cause Receiver Overrun Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1048
#define E1000_RXCSUM   0x05000  /* RX Checksum Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1049
#define E1000_RFCTL    0x05008  /* Receive Filter Control*/
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1050
#define E1000_MTA      0x05200  /* Multicast Table Array - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1051
#define E1000_RA       0x05400  /* Receive Address - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1052
#define E1000_VFTA     0x05600  /* VLAN Filter Table Array - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1053
#define E1000_WUC      0x05800  /* Wakeup Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1054
#define E1000_WUFC     0x05808  /* Wakeup Filter Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1055
#define E1000_WUS      0x05810  /* Wakeup Status - RO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1056
#define E1000_MANC     0x05820  /* Management Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1057
#define E1000_IPAV     0x05838  /* IP Address Valid - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1058
#define E1000_IP4AT    0x05840  /* IPv4 Address Table - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1059
#define E1000_IP6AT    0x05880  /* IPv6 Address Table - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1060
#define E1000_WUPL     0x05900  /* Wakeup Packet Length - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1061
#define E1000_WUPM     0x05A00  /* Wakeup Packet Memory - RO A */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1062
#define E1000_FFLT     0x05F00  /* Flexible Filter Length Table - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1063
#define E1000_HOST_IF  0x08800  /* Host Interface */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1064
#define E1000_FFMT     0x09000  /* Flexible Filter Mask Table - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1065
#define E1000_FFVT     0x09800  /* Flexible Filter Value Table - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1066
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1067
#define E1000_KUMCTRLSTA 0x00034 /* MAC-PHY interface - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1068
#define E1000_MDPHYA     0x0003C  /* PHY address - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1069
#define E1000_MANC2H     0x05860  /* Managment Control To Host - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1070
#define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1071
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1072
#define E1000_GCR       0x05B00 /* PCI-Ex Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1073
#define E1000_GSCL_1    0x05B10 /* PCI-Ex Statistic Control #1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1074
#define E1000_GSCL_2    0x05B14 /* PCI-Ex Statistic Control #2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1075
#define E1000_GSCL_3    0x05B18 /* PCI-Ex Statistic Control #3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1076
#define E1000_GSCL_4    0x05B1C /* PCI-Ex Statistic Control #4 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1077
#define E1000_FACTPS    0x05B30 /* Function Active and Power State to MNG */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1078
#define E1000_SWSM      0x05B50 /* SW Semaphore */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1079
#define E1000_FWSM      0x05B54 /* FW Semaphore */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1080
#define E1000_FFLT_DBG  0x05F04 /* Debug Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1081
#define E1000_HICR      0x08F00 /* Host Inteface Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1082
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1083
/* RSS registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1084
#define E1000_CPUVEC    0x02C10 /* CPU Vector Register - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1085
#define E1000_MRQC      0x05818 /* Multiple Receive Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1086
#define E1000_RETA      0x05C00 /* Redirection Table - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1087
#define E1000_RSSRK     0x05C80 /* RSS Random Key - RW Array */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1088
#define E1000_RSSIM     0x05864 /* RSS Interrupt Mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1089
#define E1000_RSSIR     0x05868 /* RSS Interrupt Request */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1090
/* Register Set (82542)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1091
 *
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1092
 * Some of the 82542 registers are located at different offsets than they are
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1093
 * in more current versions of the 8254x. Despite the difference in location,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1094
 * the registers function in the same manner.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1095
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1096
#define E1000_82542_CTRL     E1000_CTRL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1097
#define E1000_82542_CTRL_DUP E1000_CTRL_DUP
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1098
#define E1000_82542_STATUS   E1000_STATUS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1099
#define E1000_82542_EECD     E1000_EECD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1100
#define E1000_82542_EERD     E1000_EERD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1101
#define E1000_82542_CTRL_EXT E1000_CTRL_EXT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1102
#define E1000_82542_FLA      E1000_FLA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1103
#define E1000_82542_MDIC     E1000_MDIC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1104
#define E1000_82542_SCTL     E1000_SCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1105
#define E1000_82542_FEXTNVM  E1000_FEXTNVM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1106
#define E1000_82542_FCAL     E1000_FCAL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1107
#define E1000_82542_FCAH     E1000_FCAH
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1108
#define E1000_82542_FCT      E1000_FCT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1109
#define E1000_82542_VET      E1000_VET
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1110
#define E1000_82542_RA       0x00040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1111
#define E1000_82542_ICR      E1000_ICR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1112
#define E1000_82542_ITR      E1000_ITR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1113
#define E1000_82542_ICS      E1000_ICS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1114
#define E1000_82542_IMS      E1000_IMS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1115
#define E1000_82542_IMC      E1000_IMC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1116
#define E1000_82542_RCTL     E1000_RCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1117
#define E1000_82542_RDTR     0x00108
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1118
#define E1000_82542_RDBAL    0x00110
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1119
#define E1000_82542_RDBAH    0x00114
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1120
#define E1000_82542_RDLEN    0x00118
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1121
#define E1000_82542_RDH      0x00120
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1122
#define E1000_82542_RDT      0x00128
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1123
#define E1000_82542_RDTR0    E1000_82542_RDTR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1124
#define E1000_82542_RDBAL0   E1000_82542_RDBAL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1125
#define E1000_82542_RDBAH0   E1000_82542_RDBAH
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1126
#define E1000_82542_RDLEN0   E1000_82542_RDLEN
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1127
#define E1000_82542_RDH0     E1000_82542_RDH
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1128
#define E1000_82542_RDT0     E1000_82542_RDT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1129
#define E1000_82542_SRRCTL(_n) (0x280C + ((_n) << 8)) /* Split and Replication
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1130
                                                       * RX Control - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1131
#define E1000_82542_DCA_RXCTRL(_n) (0x02814 + ((_n) << 8))
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1132
#define E1000_82542_RDBAH3   0x02B04 /* RX Desc Base High Queue 3 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1133
#define E1000_82542_RDBAL3   0x02B00 /* RX Desc Low Queue 3 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1134
#define E1000_82542_RDLEN3   0x02B08 /* RX Desc Length Queue 3 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1135
#define E1000_82542_RDH3     0x02B10 /* RX Desc Head Queue 3 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1136
#define E1000_82542_RDT3     0x02B18 /* RX Desc Tail Queue 3 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1137
#define E1000_82542_RDBAL2   0x02A00 /* RX Desc Base Low Queue 2 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1138
#define E1000_82542_RDBAH2   0x02A04 /* RX Desc Base High Queue 2 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1139
#define E1000_82542_RDLEN2   0x02A08 /* RX Desc Length Queue 2 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1140
#define E1000_82542_RDH2     0x02A10 /* RX Desc Head Queue 2 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1141
#define E1000_82542_RDT2     0x02A18 /* RX Desc Tail Queue 2 - RW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1142
#define E1000_82542_RDTR1    0x00130
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1143
#define E1000_82542_RDBAL1   0x00138
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1144
#define E1000_82542_RDBAH1   0x0013C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1145
#define E1000_82542_RDLEN1   0x00140
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1146
#define E1000_82542_RDH1     0x00148
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1147
#define E1000_82542_RDT1     0x00150
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1148
#define E1000_82542_FCRTH    0x00160
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1149
#define E1000_82542_FCRTL    0x00168
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1150
#define E1000_82542_FCTTV    E1000_FCTTV
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1151
#define E1000_82542_TXCW     E1000_TXCW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1152
#define E1000_82542_RXCW     E1000_RXCW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1153
#define E1000_82542_MTA      0x00200
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1154
#define E1000_82542_TCTL     E1000_TCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1155
#define E1000_82542_TCTL_EXT E1000_TCTL_EXT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1156
#define E1000_82542_TIPG     E1000_TIPG
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1157
#define E1000_82542_TDBAL    0x00420
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1158
#define E1000_82542_TDBAH    0x00424
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1159
#define E1000_82542_TDLEN    0x00428
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1160
#define E1000_82542_TDH      0x00430
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1161
#define E1000_82542_TDT      0x00438
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1162
#define E1000_82542_TIDV     0x00440
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1163
#define E1000_82542_TBT      E1000_TBT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1164
#define E1000_82542_AIT      E1000_AIT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1165
#define E1000_82542_VFTA     0x00600
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1166
#define E1000_82542_LEDCTL   E1000_LEDCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1167
#define E1000_82542_PBA      E1000_PBA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1168
#define E1000_82542_PBS      E1000_PBS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1169
#define E1000_82542_EEMNGCTL E1000_EEMNGCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1170
#define E1000_82542_EEARBC   E1000_EEARBC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1171
#define E1000_82542_FLASHT   E1000_FLASHT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1172
#define E1000_82542_EEWR     E1000_EEWR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1173
#define E1000_82542_FLSWCTL  E1000_FLSWCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1174
#define E1000_82542_FLSWDATA E1000_FLSWDATA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1175
#define E1000_82542_FLSWCNT  E1000_FLSWCNT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1176
#define E1000_82542_FLOP     E1000_FLOP
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1177
#define E1000_82542_EXTCNF_CTRL  E1000_EXTCNF_CTRL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1178
#define E1000_82542_EXTCNF_SIZE  E1000_EXTCNF_SIZE
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1179
#define E1000_82542_PHY_CTRL E1000_PHY_CTRL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1180
#define E1000_82542_ERT      E1000_ERT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1181
#define E1000_82542_RXDCTL   E1000_RXDCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1182
#define E1000_82542_RXDCTL1  E1000_RXDCTL1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1183
#define E1000_82542_RADV     E1000_RADV
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1184
#define E1000_82542_RSRPD    E1000_RSRPD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1185
#define E1000_82542_TXDMAC   E1000_TXDMAC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1186
#define E1000_82542_KABGTXD  E1000_KABGTXD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1187
#define E1000_82542_TDFHS    E1000_TDFHS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1188
#define E1000_82542_TDFTS    E1000_TDFTS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1189
#define E1000_82542_TDFPC    E1000_TDFPC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1190
#define E1000_82542_TXDCTL   E1000_TXDCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1191
#define E1000_82542_TADV     E1000_TADV
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1192
#define E1000_82542_TSPMT    E1000_TSPMT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1193
#define E1000_82542_CRCERRS  E1000_CRCERRS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1194
#define E1000_82542_ALGNERRC E1000_ALGNERRC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1195
#define E1000_82542_SYMERRS  E1000_SYMERRS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1196
#define E1000_82542_RXERRC   E1000_RXERRC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1197
#define E1000_82542_MPC      E1000_MPC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1198
#define E1000_82542_SCC      E1000_SCC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1199
#define E1000_82542_ECOL     E1000_ECOL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1200
#define E1000_82542_MCC      E1000_MCC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1201
#define E1000_82542_LATECOL  E1000_LATECOL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1202
#define E1000_82542_COLC     E1000_COLC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1203
#define E1000_82542_DC       E1000_DC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1204
#define E1000_82542_TNCRS    E1000_TNCRS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1205
#define E1000_82542_SEC      E1000_SEC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1206
#define E1000_82542_CEXTERR  E1000_CEXTERR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1207
#define E1000_82542_RLEC     E1000_RLEC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1208
#define E1000_82542_XONRXC   E1000_XONRXC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1209
#define E1000_82542_XONTXC   E1000_XONTXC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1210
#define E1000_82542_XOFFRXC  E1000_XOFFRXC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1211
#define E1000_82542_XOFFTXC  E1000_XOFFTXC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1212
#define E1000_82542_FCRUC    E1000_FCRUC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1213
#define E1000_82542_PRC64    E1000_PRC64
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1214
#define E1000_82542_PRC127   E1000_PRC127
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1215
#define E1000_82542_PRC255   E1000_PRC255
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1216
#define E1000_82542_PRC511   E1000_PRC511
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1217
#define E1000_82542_PRC1023  E1000_PRC1023
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1218
#define E1000_82542_PRC1522  E1000_PRC1522
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1219
#define E1000_82542_GPRC     E1000_GPRC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1220
#define E1000_82542_BPRC     E1000_BPRC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1221
#define E1000_82542_MPRC     E1000_MPRC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1222
#define E1000_82542_GPTC     E1000_GPTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1223
#define E1000_82542_GORCL    E1000_GORCL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1224
#define E1000_82542_GORCH    E1000_GORCH
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1225
#define E1000_82542_GOTCL    E1000_GOTCL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1226
#define E1000_82542_GOTCH    E1000_GOTCH
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1227
#define E1000_82542_RNBC     E1000_RNBC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1228
#define E1000_82542_RUC      E1000_RUC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1229
#define E1000_82542_RFC      E1000_RFC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1230
#define E1000_82542_ROC      E1000_ROC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1231
#define E1000_82542_RJC      E1000_RJC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1232
#define E1000_82542_MGTPRC   E1000_MGTPRC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1233
#define E1000_82542_MGTPDC   E1000_MGTPDC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1234
#define E1000_82542_MGTPTC   E1000_MGTPTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1235
#define E1000_82542_TORL     E1000_TORL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1236
#define E1000_82542_TORH     E1000_TORH
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1237
#define E1000_82542_TOTL     E1000_TOTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1238
#define E1000_82542_TOTH     E1000_TOTH
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1239
#define E1000_82542_TPR      E1000_TPR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1240
#define E1000_82542_TPT      E1000_TPT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1241
#define E1000_82542_PTC64    E1000_PTC64
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1242
#define E1000_82542_PTC127   E1000_PTC127
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1243
#define E1000_82542_PTC255   E1000_PTC255
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1244
#define E1000_82542_PTC511   E1000_PTC511
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1245
#define E1000_82542_PTC1023  E1000_PTC1023
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1246
#define E1000_82542_PTC1522  E1000_PTC1522
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1247
#define E1000_82542_MPTC     E1000_MPTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1248
#define E1000_82542_BPTC     E1000_BPTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1249
#define E1000_82542_TSCTC    E1000_TSCTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1250
#define E1000_82542_TSCTFC   E1000_TSCTFC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1251
#define E1000_82542_RXCSUM   E1000_RXCSUM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1252
#define E1000_82542_WUC      E1000_WUC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1253
#define E1000_82542_WUFC     E1000_WUFC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1254
#define E1000_82542_WUS      E1000_WUS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1255
#define E1000_82542_MANC     E1000_MANC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1256
#define E1000_82542_IPAV     E1000_IPAV
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1257
#define E1000_82542_IP4AT    E1000_IP4AT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1258
#define E1000_82542_IP6AT    E1000_IP6AT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1259
#define E1000_82542_WUPL     E1000_WUPL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1260
#define E1000_82542_WUPM     E1000_WUPM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1261
#define E1000_82542_FFLT     E1000_FFLT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1262
#define E1000_82542_TDFH     0x08010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1263
#define E1000_82542_TDFT     0x08018
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1264
#define E1000_82542_FFMT     E1000_FFMT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1265
#define E1000_82542_FFVT     E1000_FFVT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1266
#define E1000_82542_HOST_IF  E1000_HOST_IF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1267
#define E1000_82542_IAM         E1000_IAM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1268
#define E1000_82542_EEMNGCTL    E1000_EEMNGCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1269
#define E1000_82542_PSRCTL      E1000_PSRCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1270
#define E1000_82542_RAID        E1000_RAID
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1271
#define E1000_82542_TARC0       E1000_TARC0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1272
#define E1000_82542_TDBAL1      E1000_TDBAL1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1273
#define E1000_82542_TDBAH1      E1000_TDBAH1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1274
#define E1000_82542_TDLEN1      E1000_TDLEN1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1275
#define E1000_82542_TDH1        E1000_TDH1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1276
#define E1000_82542_TDT1        E1000_TDT1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1277
#define E1000_82542_TXDCTL1     E1000_TXDCTL1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1278
#define E1000_82542_TARC1       E1000_TARC1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1279
#define E1000_82542_RFCTL       E1000_RFCTL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1280
#define E1000_82542_GCR         E1000_GCR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1281
#define E1000_82542_GSCL_1      E1000_GSCL_1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1282
#define E1000_82542_GSCL_2      E1000_GSCL_2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1283
#define E1000_82542_GSCL_3      E1000_GSCL_3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1284
#define E1000_82542_GSCL_4      E1000_GSCL_4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1285
#define E1000_82542_FACTPS      E1000_FACTPS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1286
#define E1000_82542_SWSM        E1000_SWSM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1287
#define E1000_82542_FWSM        E1000_FWSM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1288
#define E1000_82542_FFLT_DBG    E1000_FFLT_DBG
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1289
#define E1000_82542_IAC         E1000_IAC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1290
#define E1000_82542_ICRXPTC     E1000_ICRXPTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1291
#define E1000_82542_ICRXATC     E1000_ICRXATC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1292
#define E1000_82542_ICTXPTC     E1000_ICTXPTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1293
#define E1000_82542_ICTXATC     E1000_ICTXATC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1294
#define E1000_82542_ICTXQEC     E1000_ICTXQEC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1295
#define E1000_82542_ICTXQMTC    E1000_ICTXQMTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1296
#define E1000_82542_ICRXDMTC    E1000_ICRXDMTC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1297
#define E1000_82542_ICRXOC      E1000_ICRXOC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1298
#define E1000_82542_HICR        E1000_HICR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1299
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1300
#define E1000_82542_CPUVEC      E1000_CPUVEC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1301
#define E1000_82542_MRQC        E1000_MRQC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1302
#define E1000_82542_RETA        E1000_RETA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1303
#define E1000_82542_RSSRK       E1000_RSSRK
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1304
#define E1000_82542_RSSIM       E1000_RSSIM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1305
#define E1000_82542_RSSIR       E1000_RSSIR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1306
#define E1000_82542_KUMCTRLSTA E1000_KUMCTRLSTA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1307
#define E1000_82542_SW_FW_SYNC E1000_SW_FW_SYNC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1308
#define E1000_82542_MANC2H      E1000_MANC2H
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1309
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1310
/* Statistics counters collected by the MAC */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1311
struct e1000_hw_stats {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1312
	u64		crcerrs;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1313
	u64		algnerrc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1314
	u64		symerrs;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1315
	u64		rxerrc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1316
	u64		txerrc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1317
	u64		mpc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1318
	u64		scc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1319
	u64		ecol;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1320
	u64		mcc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1321
	u64		latecol;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1322
	u64		colc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1323
	u64		dc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1324
	u64		tncrs;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1325
	u64		sec;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1326
	u64		cexterr;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1327
	u64		rlec;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1328
	u64		xonrxc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1329
	u64		xontxc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1330
	u64		xoffrxc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1331
	u64		xofftxc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1332
	u64		fcruc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1333
	u64		prc64;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1334
	u64		prc127;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1335
	u64		prc255;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1336
	u64		prc511;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1337
	u64		prc1023;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1338
	u64		prc1522;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1339
	u64		gprc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1340
	u64		bprc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1341
	u64		mprc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1342
	u64		gptc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1343
	u64		gorcl;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1344
	u64		gorch;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1345
	u64		gotcl;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1346
	u64		gotch;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1347
	u64		rnbc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1348
	u64		ruc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1349
	u64		rfc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1350
	u64		roc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1351
	u64		rlerrc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1352
	u64		rjc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1353
	u64		mgprc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1354
	u64		mgpdc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1355
	u64		mgptc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1356
	u64		torl;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1357
	u64		torh;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1358
	u64		totl;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1359
	u64		toth;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1360
	u64		tpr;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1361
	u64		tpt;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1362
	u64		ptc64;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1363
	u64		ptc127;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1364
	u64		ptc255;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1365
	u64		ptc511;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1366
	u64		ptc1023;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1367
	u64		ptc1522;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1368
	u64		mptc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1369
	u64		bptc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1370
	u64		tsctc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1371
	u64		tsctfc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1372
	u64		iac;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1373
	u64		icrxptc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1374
	u64		icrxatc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1375
	u64		ictxptc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1376
	u64		ictxatc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1377
	u64		ictxqec;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1378
	u64		ictxqmtc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1379
	u64		icrxdmtc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1380
	u64		icrxoc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1381
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1382
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1383
/* Structure containing variables used by the shared code (e1000_hw.c) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1384
struct e1000_hw {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1385
	u8 __iomem		*hw_addr;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1386
	u8 __iomem		*flash_address;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1387
	e1000_mac_type		mac_type;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1388
	e1000_phy_type		phy_type;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1389
	u32		phy_init_script;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1390
	e1000_media_type	media_type;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1391
	void			*back;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1392
	struct e1000_shadow_ram	*eeprom_shadow_ram;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1393
	u32		flash_bank_size;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1394
	u32		flash_base_addr;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1395
	e1000_fc_type		fc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1396
	e1000_bus_speed		bus_speed;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1397
	e1000_bus_width		bus_width;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1398
	e1000_bus_type		bus_type;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1399
	struct e1000_eeprom_info eeprom;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1400
	e1000_ms_type		master_slave;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1401
	e1000_ms_type		original_master_slave;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1402
	e1000_ffe_config	ffe_config_state;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1403
	u32		asf_firmware_present;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1404
	u32		eeprom_semaphore_present;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1405
	u32		swfw_sync_present;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1406
	u32		swfwhw_semaphore_present;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1407
	unsigned long		io_base;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1408
	u32		phy_id;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1409
	u32		phy_revision;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1410
	u32		phy_addr;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1411
	u32		original_fc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1412
	u32		txcw;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1413
	u32		autoneg_failed;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1414
	u32		max_frame_size;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1415
	u32		min_frame_size;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1416
	u32		mc_filter_type;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1417
	u32		num_mc_addrs;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1418
	u32		collision_delta;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1419
	u32		tx_packet_delta;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1420
	u32		ledctl_default;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1421
	u32		ledctl_mode1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1422
	u32		ledctl_mode2;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1423
	bool			tx_pkt_filtering;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1424
	struct e1000_host_mng_dhcp_cookie mng_cookie;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1425
	u16		phy_spd_default;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1426
	u16		autoneg_advertised;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1427
	u16		pci_cmd_word;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1428
	u16		fc_high_water;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1429
	u16		fc_low_water;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1430
	u16		fc_pause_time;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1431
	u16		current_ifs_val;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1432
	u16		ifs_min_val;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1433
	u16		ifs_max_val;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1434
	u16		ifs_step_size;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1435
	u16		ifs_ratio;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1436
	u16		device_id;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1437
	u16		vendor_id;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1438
	u16		subsystem_id;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1439
	u16		subsystem_vendor_id;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1440
	u8			revision_id;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1441
	u8			autoneg;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1442
	u8			mdix;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1443
	u8			forced_speed_duplex;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1444
	u8			wait_autoneg_complete;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1445
	u8			dma_fairness;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1446
	u8			mac_addr[NODE_ADDRESS_SIZE];
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1447
	u8			perm_mac_addr[NODE_ADDRESS_SIZE];
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1448
	bool			disable_polarity_correction;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1449
	bool			speed_downgraded;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1450
	e1000_smart_speed	smart_speed;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1451
	e1000_dsp_config	dsp_config_state;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1452
	bool			get_link_status;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1453
	bool			serdes_link_down;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1454
	bool			tbi_compatibility_en;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1455
	bool			tbi_compatibility_on;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1456
	bool			laa_is_present;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1457
	bool			phy_reset_disable;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1458
	bool			initialize_hw_bits_disable;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1459
	bool			fc_send_xon;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1460
	bool			fc_strict_ieee;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1461
	bool			report_tx_early;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1462
	bool			adaptive_ifs;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1463
	bool			ifs_params_forced;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1464
	bool			in_ifs_mode;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1465
	bool			mng_reg_access_disabled;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1466
	bool			leave_av_bit_off;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1467
	bool			kmrn_lock_loss_workaround_disabled;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1468
	bool			bad_tx_carr_stats_fd;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1469
	bool			has_manc2h;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1470
	bool			rx_needs_kicking;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1471
	bool			has_smbus;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1472
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1473
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1474
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1475
#define E1000_EEPROM_SWDPIN0   0x0001   /* SWDPIN 0 EEPROM Value */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1476
#define E1000_EEPROM_LED_LOGIC 0x0020   /* Led Logic Word */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1477
#define E1000_EEPROM_RW_REG_DATA   16   /* Offset to data in EEPROM read/write registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1478
#define E1000_EEPROM_RW_REG_DONE   2    /* Offset to READ/WRITE done bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1479
#define E1000_EEPROM_RW_REG_START  1    /* First bit for telling part to start operation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1480
#define E1000_EEPROM_RW_ADDR_SHIFT 2    /* Shift to the address bits */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1481
#define E1000_EEPROM_POLL_WRITE    1    /* Flag for polling for write complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1482
#define E1000_EEPROM_POLL_READ     0    /* Flag for polling for read complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1483
/* Register Bit Masks */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1484
/* Device Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1485
#define E1000_CTRL_FD       0x00000001  /* Full duplex.0=half; 1=full */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1486
#define E1000_CTRL_BEM      0x00000002  /* Endian Mode.0=little,1=big */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1487
#define E1000_CTRL_PRIOR    0x00000004  /* Priority on PCI. 0=rx,1=fair */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1488
#define E1000_CTRL_GIO_MASTER_DISABLE 0x00000004 /*Blocks new Master requests */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1489
#define E1000_CTRL_LRST     0x00000008  /* Link reset. 0=normal,1=reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1490
#define E1000_CTRL_TME      0x00000010  /* Test mode. 0=normal,1=test */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1491
#define E1000_CTRL_SLE      0x00000020  /* Serial Link on 0=dis,1=en */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1492
#define E1000_CTRL_ASDE     0x00000020  /* Auto-speed detect enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1493
#define E1000_CTRL_SLU      0x00000040  /* Set link up (Force Link) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1494
#define E1000_CTRL_ILOS     0x00000080  /* Invert Loss-Of Signal */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1495
#define E1000_CTRL_SPD_SEL  0x00000300  /* Speed Select Mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1496
#define E1000_CTRL_SPD_10   0x00000000  /* Force 10Mb */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1497
#define E1000_CTRL_SPD_100  0x00000100  /* Force 100Mb */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1498
#define E1000_CTRL_SPD_1000 0x00000200  /* Force 1Gb */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1499
#define E1000_CTRL_BEM32    0x00000400  /* Big Endian 32 mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1500
#define E1000_CTRL_FRCSPD   0x00000800  /* Force Speed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1501
#define E1000_CTRL_FRCDPX   0x00001000  /* Force Duplex */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1502
#define E1000_CTRL_D_UD_EN  0x00002000  /* Dock/Undock enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1503
#define E1000_CTRL_D_UD_POLARITY 0x00004000 /* Defined polarity of Dock/Undock indication in SDP[0] */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1504
#define E1000_CTRL_FORCE_PHY_RESET 0x00008000 /* Reset both PHY ports, through PHYRST_N pin */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1505
#define E1000_CTRL_EXT_LINK_EN 0x00010000 /* enable link status from external LINK_0 and LINK_1 pins */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1506
#define E1000_CTRL_SWDPIN0  0x00040000  /* SWDPIN 0 value */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1507
#define E1000_CTRL_SWDPIN1  0x00080000  /* SWDPIN 1 value */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1508
#define E1000_CTRL_SWDPIN2  0x00100000  /* SWDPIN 2 value */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1509
#define E1000_CTRL_SWDPIN3  0x00200000  /* SWDPIN 3 value */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1510
#define E1000_CTRL_SWDPIO0  0x00400000  /* SWDPIN 0 Input or output */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1511
#define E1000_CTRL_SWDPIO1  0x00800000  /* SWDPIN 1 input or output */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1512
#define E1000_CTRL_SWDPIO2  0x01000000  /* SWDPIN 2 input or output */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1513
#define E1000_CTRL_SWDPIO3  0x02000000  /* SWDPIN 3 input or output */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1514
#define E1000_CTRL_RST      0x04000000  /* Global reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1515
#define E1000_CTRL_RFCE     0x08000000  /* Receive Flow Control enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1516
#define E1000_CTRL_TFCE     0x10000000  /* Transmit flow control enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1517
#define E1000_CTRL_RTE      0x20000000  /* Routing tag enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1518
#define E1000_CTRL_VME      0x40000000  /* IEEE VLAN mode enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1519
#define E1000_CTRL_PHY_RST  0x80000000  /* PHY Reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1520
#define E1000_CTRL_SW2FW_INT 0x02000000  /* Initiate an interrupt to manageability engine */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1521
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1522
/* Device Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1523
#define E1000_STATUS_FD         0x00000001      /* Full duplex.0=half,1=full */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1524
#define E1000_STATUS_LU         0x00000002      /* Link up.0=no,1=link */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1525
#define E1000_STATUS_FUNC_MASK  0x0000000C      /* PCI Function Mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1526
#define E1000_STATUS_FUNC_SHIFT 2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1527
#define E1000_STATUS_FUNC_0     0x00000000      /* Function 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1528
#define E1000_STATUS_FUNC_1     0x00000004      /* Function 1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1529
#define E1000_STATUS_TXOFF      0x00000010      /* transmission paused */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1530
#define E1000_STATUS_TBIMODE    0x00000020      /* TBI mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1531
#define E1000_STATUS_SPEED_MASK 0x000000C0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1532
#define E1000_STATUS_SPEED_10   0x00000000      /* Speed 10Mb/s */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1533
#define E1000_STATUS_SPEED_100  0x00000040      /* Speed 100Mb/s */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1534
#define E1000_STATUS_SPEED_1000 0x00000080      /* Speed 1000Mb/s */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1535
#define E1000_STATUS_LAN_INIT_DONE 0x00000200   /* Lan Init Completion
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1536
                                                   by EEPROM/Flash */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1537
#define E1000_STATUS_ASDV       0x00000300      /* Auto speed detect value */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1538
#define E1000_STATUS_DOCK_CI    0x00000800      /* Change in Dock/Undock state. Clear on write '0'. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1539
#define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Status of Master requests. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1540
#define E1000_STATUS_MTXCKOK    0x00000400      /* MTX clock running OK */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1541
#define E1000_STATUS_PCI66      0x00000800      /* In 66Mhz slot */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1542
#define E1000_STATUS_BUS64      0x00001000      /* In 64 bit slot */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1543
#define E1000_STATUS_PCIX_MODE  0x00002000      /* PCI-X mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1544
#define E1000_STATUS_PCIX_SPEED 0x0000C000      /* PCI-X bus speed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1545
#define E1000_STATUS_BMC_SKU_0  0x00100000 /* BMC USB redirect disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1546
#define E1000_STATUS_BMC_SKU_1  0x00200000 /* BMC SRAM disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1547
#define E1000_STATUS_BMC_SKU_2  0x00400000 /* BMC SDRAM disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1548
#define E1000_STATUS_BMC_CRYPTO 0x00800000 /* BMC crypto disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1549
#define E1000_STATUS_BMC_LITE   0x01000000 /* BMC external code execution disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1550
#define E1000_STATUS_RGMII_ENABLE 0x02000000 /* RGMII disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1551
#define E1000_STATUS_FUSE_8       0x04000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1552
#define E1000_STATUS_FUSE_9       0x08000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1553
#define E1000_STATUS_SERDES0_DIS  0x10000000 /* SERDES disabled on port 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1554
#define E1000_STATUS_SERDES1_DIS  0x20000000 /* SERDES disabled on port 1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1555
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1556
/* Constants used to intrepret the masked PCI-X bus speed. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1557
#define E1000_STATUS_PCIX_SPEED_66  0x00000000 /* PCI-X bus speed  50-66 MHz */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1558
#define E1000_STATUS_PCIX_SPEED_100 0x00004000 /* PCI-X bus speed  66-100 MHz */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1559
#define E1000_STATUS_PCIX_SPEED_133 0x00008000 /* PCI-X bus speed 100-133 MHz */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1560
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1561
/* EEPROM/Flash Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1562
#define E1000_EECD_SK        0x00000001 /* EEPROM Clock */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1563
#define E1000_EECD_CS        0x00000002 /* EEPROM Chip Select */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1564
#define E1000_EECD_DI        0x00000004 /* EEPROM Data In */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1565
#define E1000_EECD_DO        0x00000008 /* EEPROM Data Out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1566
#define E1000_EECD_FWE_MASK  0x00000030
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1567
#define E1000_EECD_FWE_DIS   0x00000010 /* Disable FLASH writes */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1568
#define E1000_EECD_FWE_EN    0x00000020 /* Enable FLASH writes */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1569
#define E1000_EECD_FWE_SHIFT 4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1570
#define E1000_EECD_REQ       0x00000040 /* EEPROM Access Request */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1571
#define E1000_EECD_GNT       0x00000080 /* EEPROM Access Grant */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1572
#define E1000_EECD_PRES      0x00000100 /* EEPROM Present */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1573
#define E1000_EECD_SIZE      0x00000200 /* EEPROM Size (0=64 word 1=256 word) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1574
#define E1000_EECD_ADDR_BITS 0x00000400 /* EEPROM Addressing bits based on type
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1575
                                         * (0-small, 1-large) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1576
#define E1000_EECD_TYPE      0x00002000 /* EEPROM Type (1-SPI, 0-Microwire) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1577
#ifndef E1000_EEPROM_GRANT_ATTEMPTS
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1578
#define E1000_EEPROM_GRANT_ATTEMPTS 1000 /* EEPROM # attempts to gain grant */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1579
#endif
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1580
#define E1000_EECD_AUTO_RD          0x00000200  /* EEPROM Auto Read done */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1581
#define E1000_EECD_SIZE_EX_MASK     0x00007800  /* EEprom Size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1582
#define E1000_EECD_SIZE_EX_SHIFT    11
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1583
#define E1000_EECD_NVADDS    0x00018000 /* NVM Address Size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1584
#define E1000_EECD_SELSHAD   0x00020000 /* Select Shadow RAM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1585
#define E1000_EECD_INITSRAM  0x00040000 /* Initialize Shadow RAM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1586
#define E1000_EECD_FLUPD     0x00080000 /* Update FLASH */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1587
#define E1000_EECD_AUPDEN    0x00100000 /* Enable Autonomous FLASH update */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1588
#define E1000_EECD_SHADV     0x00200000 /* Shadow RAM Data Valid */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1589
#define E1000_EECD_SEC1VAL   0x00400000 /* Sector One Valid */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1590
#define E1000_EECD_SECVAL_SHIFT      22
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1591
#define E1000_STM_OPCODE     0xDB00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1592
#define E1000_HICR_FW_RESET  0xC0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1593
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1594
#define E1000_SHADOW_RAM_WORDS     2048
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1595
#define E1000_ICH_NVM_SIG_WORD     0x13
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1596
#define E1000_ICH_NVM_SIG_MASK     0xC0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1597
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1598
/* EEPROM Read */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1599
#define E1000_EERD_START      0x00000001 /* Start Read */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1600
#define E1000_EERD_DONE       0x00000010 /* Read Done */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1601
#define E1000_EERD_ADDR_SHIFT 8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1602
#define E1000_EERD_ADDR_MASK  0x0000FF00 /* Read Address */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1603
#define E1000_EERD_DATA_SHIFT 16
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1604
#define E1000_EERD_DATA_MASK  0xFFFF0000 /* Read Data */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1605
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1606
/* SPI EEPROM Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1607
#define EEPROM_STATUS_RDY_SPI  0x01
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1608
#define EEPROM_STATUS_WEN_SPI  0x02
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1609
#define EEPROM_STATUS_BP0_SPI  0x04
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1610
#define EEPROM_STATUS_BP1_SPI  0x08
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1611
#define EEPROM_STATUS_WPEN_SPI 0x80
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1612
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1613
/* Extended Device Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1614
#define E1000_CTRL_EXT_GPI0_EN   0x00000001 /* Maps SDP4 to GPI0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1615
#define E1000_CTRL_EXT_GPI1_EN   0x00000002 /* Maps SDP5 to GPI1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1616
#define E1000_CTRL_EXT_PHYINT_EN E1000_CTRL_EXT_GPI1_EN
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1617
#define E1000_CTRL_EXT_GPI2_EN   0x00000004 /* Maps SDP6 to GPI2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1618
#define E1000_CTRL_EXT_GPI3_EN   0x00000008 /* Maps SDP7 to GPI3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1619
#define E1000_CTRL_EXT_SDP4_DATA 0x00000010 /* Value of SW Defineable Pin 4 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1620
#define E1000_CTRL_EXT_SDP5_DATA 0x00000020 /* Value of SW Defineable Pin 5 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1621
#define E1000_CTRL_EXT_PHY_INT   E1000_CTRL_EXT_SDP5_DATA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1622
#define E1000_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Defineable Pin 6 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1623
#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1624
#define E1000_CTRL_EXT_SDP4_DIR  0x00000100 /* Direction of SDP4 0=in 1=out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1625
#define E1000_CTRL_EXT_SDP5_DIR  0x00000200 /* Direction of SDP5 0=in 1=out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1626
#define E1000_CTRL_EXT_SDP6_DIR  0x00000400 /* Direction of SDP6 0=in 1=out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1627
#define E1000_CTRL_EXT_SDP7_DIR  0x00000800 /* Direction of SDP7 0=in 1=out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1628
#define E1000_CTRL_EXT_ASDCHK    0x00001000 /* Initiate an ASD sequence */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1629
#define E1000_CTRL_EXT_EE_RST    0x00002000 /* Reinitialize from EEPROM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1630
#define E1000_CTRL_EXT_IPS       0x00004000 /* Invert Power State */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1631
#define E1000_CTRL_EXT_SPD_BYPS  0x00008000 /* Speed Select Bypass */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1632
#define E1000_CTRL_EXT_RO_DIS    0x00020000 /* Relaxed Ordering disable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1633
#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1634
#define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1635
#define E1000_CTRL_EXT_LINK_MODE_TBI  0x00C00000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1636
#define E1000_CTRL_EXT_LINK_MODE_KMRN 0x00000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1637
#define E1000_CTRL_EXT_LINK_MODE_SERDES  0x00C00000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1638
#define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1639
#define E1000_CTRL_EXT_WR_WMARK_MASK  0x03000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1640
#define E1000_CTRL_EXT_WR_WMARK_256   0x00000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1641
#define E1000_CTRL_EXT_WR_WMARK_320   0x01000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1642
#define E1000_CTRL_EXT_WR_WMARK_384   0x02000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1643
#define E1000_CTRL_EXT_WR_WMARK_448   0x03000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1644
#define E1000_CTRL_EXT_DRV_LOAD       0x10000000 /* Driver loaded bit for FW */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1645
#define E1000_CTRL_EXT_IAME           0x08000000 /* Interrupt acknowledge Auto-mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1646
#define E1000_CTRL_EXT_INT_TIMER_CLR  0x20000000 /* Clear Interrupt timers after IMS clear */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1647
#define E1000_CRTL_EXT_PB_PAREN       0x01000000 /* packet buffer parity error detection enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1648
#define E1000_CTRL_EXT_DF_PAREN       0x02000000 /* descriptor FIFO parity error detection enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1649
#define E1000_CTRL_EXT_GHOST_PAREN    0x40000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1650
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1651
/* MDI Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1652
#define E1000_MDIC_DATA_MASK 0x0000FFFF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1653
#define E1000_MDIC_REG_MASK  0x001F0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1654
#define E1000_MDIC_REG_SHIFT 16
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1655
#define E1000_MDIC_PHY_MASK  0x03E00000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1656
#define E1000_MDIC_PHY_SHIFT 21
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1657
#define E1000_MDIC_OP_WRITE  0x04000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1658
#define E1000_MDIC_OP_READ   0x08000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1659
#define E1000_MDIC_READY     0x10000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1660
#define E1000_MDIC_INT_EN    0x20000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1661
#define E1000_MDIC_ERROR     0x40000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1662
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1663
#define E1000_KUMCTRLSTA_MASK           0x0000FFFF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1664
#define E1000_KUMCTRLSTA_OFFSET         0x001F0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1665
#define E1000_KUMCTRLSTA_OFFSET_SHIFT   16
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1666
#define E1000_KUMCTRLSTA_REN            0x00200000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1667
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1668
#define E1000_KUMCTRLSTA_OFFSET_FIFO_CTRL      0x00000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1669
#define E1000_KUMCTRLSTA_OFFSET_CTRL           0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1670
#define E1000_KUMCTRLSTA_OFFSET_INB_CTRL       0x00000002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1671
#define E1000_KUMCTRLSTA_OFFSET_DIAG           0x00000003
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1672
#define E1000_KUMCTRLSTA_OFFSET_TIMEOUTS       0x00000004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1673
#define E1000_KUMCTRLSTA_OFFSET_INB_PARAM      0x00000009
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1674
#define E1000_KUMCTRLSTA_OFFSET_HD_CTRL        0x00000010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1675
#define E1000_KUMCTRLSTA_OFFSET_M2P_SERDES     0x0000001E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1676
#define E1000_KUMCTRLSTA_OFFSET_M2P_MODES      0x0000001F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1677
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1678
/* FIFO Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1679
#define E1000_KUMCTRLSTA_FIFO_CTRL_RX_BYPASS   0x00000008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1680
#define E1000_KUMCTRLSTA_FIFO_CTRL_TX_BYPASS   0x00000800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1681
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1682
/* In-Band Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1683
#define E1000_KUMCTRLSTA_INB_CTRL_LINK_STATUS_TX_TIMEOUT_DEFAULT    0x00000500
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1684
#define E1000_KUMCTRLSTA_INB_CTRL_DIS_PADDING  0x00000010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1685
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1686
/* Half-Duplex Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1687
#define E1000_KUMCTRLSTA_HD_CTRL_10_100_DEFAULT 0x00000004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1688
#define E1000_KUMCTRLSTA_HD_CTRL_1000_DEFAULT  0x00000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1689
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1690
#define E1000_KUMCTRLSTA_OFFSET_K0S_CTRL       0x0000001E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1691
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1692
#define E1000_KUMCTRLSTA_DIAG_FELPBK           0x2000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1693
#define E1000_KUMCTRLSTA_DIAG_NELPBK           0x1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1694
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1695
#define E1000_KUMCTRLSTA_K0S_100_EN            0x2000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1696
#define E1000_KUMCTRLSTA_K0S_GBE_EN            0x1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1697
#define E1000_KUMCTRLSTA_K0S_ENTRY_LATENCY_MASK   0x0003
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1698
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1699
#define E1000_KABGTXD_BGSQLBIAS                0x00050000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1700
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1701
#define E1000_PHY_CTRL_SPD_EN                  0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1702
#define E1000_PHY_CTRL_D0A_LPLU                0x00000002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1703
#define E1000_PHY_CTRL_NOND0A_LPLU             0x00000004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1704
#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE      0x00000008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1705
#define E1000_PHY_CTRL_GBE_DISABLE             0x00000040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1706
#define E1000_PHY_CTRL_B2B_EN                  0x00000080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1707
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1708
/* LED Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1709
#define E1000_LEDCTL_LED0_MODE_MASK       0x0000000F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1710
#define E1000_LEDCTL_LED0_MODE_SHIFT      0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1711
#define E1000_LEDCTL_LED0_BLINK_RATE      0x0000020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1712
#define E1000_LEDCTL_LED0_IVRT            0x00000040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1713
#define E1000_LEDCTL_LED0_BLINK           0x00000080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1714
#define E1000_LEDCTL_LED1_MODE_MASK       0x00000F00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1715
#define E1000_LEDCTL_LED1_MODE_SHIFT      8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1716
#define E1000_LEDCTL_LED1_BLINK_RATE      0x0002000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1717
#define E1000_LEDCTL_LED1_IVRT            0x00004000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1718
#define E1000_LEDCTL_LED1_BLINK           0x00008000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1719
#define E1000_LEDCTL_LED2_MODE_MASK       0x000F0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1720
#define E1000_LEDCTL_LED2_MODE_SHIFT      16
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1721
#define E1000_LEDCTL_LED2_BLINK_RATE      0x00200000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1722
#define E1000_LEDCTL_LED2_IVRT            0x00400000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1723
#define E1000_LEDCTL_LED2_BLINK           0x00800000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1724
#define E1000_LEDCTL_LED3_MODE_MASK       0x0F000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1725
#define E1000_LEDCTL_LED3_MODE_SHIFT      24
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1726
#define E1000_LEDCTL_LED3_BLINK_RATE      0x20000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1727
#define E1000_LEDCTL_LED3_IVRT            0x40000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1728
#define E1000_LEDCTL_LED3_BLINK           0x80000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1729
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1730
#define E1000_LEDCTL_MODE_LINK_10_1000  0x0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1731
#define E1000_LEDCTL_MODE_LINK_100_1000 0x1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1732
#define E1000_LEDCTL_MODE_LINK_UP       0x2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1733
#define E1000_LEDCTL_MODE_ACTIVITY      0x3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1734
#define E1000_LEDCTL_MODE_LINK_ACTIVITY 0x4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1735
#define E1000_LEDCTL_MODE_LINK_10       0x5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1736
#define E1000_LEDCTL_MODE_LINK_100      0x6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1737
#define E1000_LEDCTL_MODE_LINK_1000     0x7
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1738
#define E1000_LEDCTL_MODE_PCIX_MODE     0x8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1739
#define E1000_LEDCTL_MODE_FULL_DUPLEX   0x9
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1740
#define E1000_LEDCTL_MODE_COLLISION     0xA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1741
#define E1000_LEDCTL_MODE_BUS_SPEED     0xB
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1742
#define E1000_LEDCTL_MODE_BUS_SIZE      0xC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1743
#define E1000_LEDCTL_MODE_PAUSED        0xD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1744
#define E1000_LEDCTL_MODE_LED_ON        0xE
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1745
#define E1000_LEDCTL_MODE_LED_OFF       0xF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1746
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1747
/* Receive Address */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1748
#define E1000_RAH_AV  0x80000000        /* Receive descriptor valid */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1749
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1750
/* Interrupt Cause Read */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1751
#define E1000_ICR_TXDW          0x00000001 /* Transmit desc written back */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1752
#define E1000_ICR_TXQE          0x00000002 /* Transmit Queue empty */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1753
#define E1000_ICR_LSC           0x00000004 /* Link Status Change */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1754
#define E1000_ICR_RXSEQ         0x00000008 /* rx sequence error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1755
#define E1000_ICR_RXDMT0        0x00000010 /* rx desc min. threshold (0) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1756
#define E1000_ICR_RXO           0x00000040 /* rx overrun */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1757
#define E1000_ICR_RXT0          0x00000080 /* rx timer intr (ring 0) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1758
#define E1000_ICR_MDAC          0x00000200 /* MDIO access complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1759
#define E1000_ICR_RXCFG         0x00000400 /* RX /c/ ordered set */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1760
#define E1000_ICR_GPI_EN0       0x00000800 /* GP Int 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1761
#define E1000_ICR_GPI_EN1       0x00001000 /* GP Int 1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1762
#define E1000_ICR_GPI_EN2       0x00002000 /* GP Int 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1763
#define E1000_ICR_GPI_EN3       0x00004000 /* GP Int 3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1764
#define E1000_ICR_TXD_LOW       0x00008000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1765
#define E1000_ICR_SRPD          0x00010000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1766
#define E1000_ICR_ACK           0x00020000 /* Receive Ack frame */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1767
#define E1000_ICR_MNG           0x00040000 /* Manageability event */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1768
#define E1000_ICR_DOCK          0x00080000 /* Dock/Undock */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1769
#define E1000_ICR_INT_ASSERTED  0x80000000 /* If this bit asserted, the driver should claim the interrupt */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1770
#define E1000_ICR_RXD_FIFO_PAR0 0x00100000 /* queue 0 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1771
#define E1000_ICR_TXD_FIFO_PAR0 0x00200000 /* queue 0 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1772
#define E1000_ICR_HOST_ARB_PAR  0x00400000 /* host arb read buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1773
#define E1000_ICR_PB_PAR        0x00800000 /* packet buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1774
#define E1000_ICR_RXD_FIFO_PAR1 0x01000000 /* queue 1 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1775
#define E1000_ICR_TXD_FIFO_PAR1 0x02000000 /* queue 1 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1776
#define E1000_ICR_ALL_PARITY    0x03F00000 /* all parity error bits */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1777
#define E1000_ICR_DSW           0x00000020 /* FW changed the status of DISSW bit in the FWSM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1778
#define E1000_ICR_PHYINT        0x00001000 /* LAN connected device generates an interrupt */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1779
#define E1000_ICR_EPRST         0x00100000 /* ME handware reset occurs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1780
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1781
/* Interrupt Cause Set */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1782
#define E1000_ICS_TXDW      E1000_ICR_TXDW      /* Transmit desc written back */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1783
#define E1000_ICS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1784
#define E1000_ICS_LSC       E1000_ICR_LSC       /* Link Status Change */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1785
#define E1000_ICS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1786
#define E1000_ICS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1787
#define E1000_ICS_RXO       E1000_ICR_RXO       /* rx overrun */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1788
#define E1000_ICS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1789
#define E1000_ICS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1790
#define E1000_ICS_RXCFG     E1000_ICR_RXCFG     /* RX /c/ ordered set */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1791
#define E1000_ICS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1792
#define E1000_ICS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1793
#define E1000_ICS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1794
#define E1000_ICS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1795
#define E1000_ICS_TXD_LOW   E1000_ICR_TXD_LOW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1796
#define E1000_ICS_SRPD      E1000_ICR_SRPD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1797
#define E1000_ICS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1798
#define E1000_ICS_MNG       E1000_ICR_MNG       /* Manageability event */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1799
#define E1000_ICS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1800
#define E1000_ICS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* queue 0 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1801
#define E1000_ICS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* queue 0 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1802
#define E1000_ICS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1803
#define E1000_ICS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1804
#define E1000_ICS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* queue 1 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1805
#define E1000_ICS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* queue 1 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1806
#define E1000_ICS_DSW       E1000_ICR_DSW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1807
#define E1000_ICS_PHYINT    E1000_ICR_PHYINT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1808
#define E1000_ICS_EPRST     E1000_ICR_EPRST
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1809
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1810
/* Interrupt Mask Set */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1811
#define E1000_IMS_TXDW      E1000_ICR_TXDW      /* Transmit desc written back */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1812
#define E1000_IMS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1813
#define E1000_IMS_LSC       E1000_ICR_LSC       /* Link Status Change */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1814
#define E1000_IMS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1815
#define E1000_IMS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1816
#define E1000_IMS_RXO       E1000_ICR_RXO       /* rx overrun */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1817
#define E1000_IMS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1818
#define E1000_IMS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1819
#define E1000_IMS_RXCFG     E1000_ICR_RXCFG     /* RX /c/ ordered set */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1820
#define E1000_IMS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1821
#define E1000_IMS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1822
#define E1000_IMS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1823
#define E1000_IMS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1824
#define E1000_IMS_TXD_LOW   E1000_ICR_TXD_LOW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1825
#define E1000_IMS_SRPD      E1000_ICR_SRPD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1826
#define E1000_IMS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1827
#define E1000_IMS_MNG       E1000_ICR_MNG       /* Manageability event */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1828
#define E1000_IMS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1829
#define E1000_IMS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* queue 0 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1830
#define E1000_IMS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* queue 0 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1831
#define E1000_IMS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1832
#define E1000_IMS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1833
#define E1000_IMS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* queue 1 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1834
#define E1000_IMS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* queue 1 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1835
#define E1000_IMS_DSW       E1000_ICR_DSW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1836
#define E1000_IMS_PHYINT    E1000_ICR_PHYINT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1837
#define E1000_IMS_EPRST     E1000_ICR_EPRST
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1838
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1839
/* Interrupt Mask Clear */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1840
#define E1000_IMC_TXDW      E1000_ICR_TXDW      /* Transmit desc written back */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1841
#define E1000_IMC_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1842
#define E1000_IMC_LSC       E1000_ICR_LSC       /* Link Status Change */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1843
#define E1000_IMC_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1844
#define E1000_IMC_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1845
#define E1000_IMC_RXO       E1000_ICR_RXO       /* rx overrun */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1846
#define E1000_IMC_RXT0      E1000_ICR_RXT0      /* rx timer intr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1847
#define E1000_IMC_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1848
#define E1000_IMC_RXCFG     E1000_ICR_RXCFG     /* RX /c/ ordered set */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1849
#define E1000_IMC_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1850
#define E1000_IMC_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1851
#define E1000_IMC_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1852
#define E1000_IMC_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1853
#define E1000_IMC_TXD_LOW   E1000_ICR_TXD_LOW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1854
#define E1000_IMC_SRPD      E1000_ICR_SRPD
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1855
#define E1000_IMC_ACK       E1000_ICR_ACK       /* Receive Ack frame */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1856
#define E1000_IMC_MNG       E1000_ICR_MNG       /* Manageability event */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1857
#define E1000_IMC_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1858
#define E1000_IMC_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* queue 0 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1859
#define E1000_IMC_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* queue 0 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1860
#define E1000_IMC_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1861
#define E1000_IMC_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1862
#define E1000_IMC_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* queue 1 Rx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1863
#define E1000_IMC_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* queue 1 Tx descriptor FIFO parity error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1864
#define E1000_IMC_DSW       E1000_ICR_DSW
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1865
#define E1000_IMC_PHYINT    E1000_ICR_PHYINT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1866
#define E1000_IMC_EPRST     E1000_ICR_EPRST
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1867
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1868
/* Receive Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1869
#define E1000_RCTL_RST            0x00000001    /* Software reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1870
#define E1000_RCTL_EN             0x00000002    /* enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1871
#define E1000_RCTL_SBP            0x00000004    /* store bad packet */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1872
#define E1000_RCTL_UPE            0x00000008    /* unicast promiscuous enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1873
#define E1000_RCTL_MPE            0x00000010    /* multicast promiscuous enab */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1874
#define E1000_RCTL_LPE            0x00000020    /* long packet enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1875
#define E1000_RCTL_LBM_NO         0x00000000    /* no loopback mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1876
#define E1000_RCTL_LBM_MAC        0x00000040    /* MAC loopback mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1877
#define E1000_RCTL_LBM_SLP        0x00000080    /* serial link loopback mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1878
#define E1000_RCTL_LBM_TCVR       0x000000C0    /* tcvr loopback mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1879
#define E1000_RCTL_DTYP_MASK      0x00000C00    /* Descriptor type mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1880
#define E1000_RCTL_DTYP_PS        0x00000400    /* Packet Split descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1881
#define E1000_RCTL_RDMTS_HALF     0x00000000    /* rx desc min threshold size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1882
#define E1000_RCTL_RDMTS_QUAT     0x00000100    /* rx desc min threshold size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1883
#define E1000_RCTL_RDMTS_EIGTH    0x00000200    /* rx desc min threshold size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1884
#define E1000_RCTL_MO_SHIFT       12            /* multicast offset shift */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1885
#define E1000_RCTL_MO_0           0x00000000    /* multicast offset 11:0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1886
#define E1000_RCTL_MO_1           0x00001000    /* multicast offset 12:1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1887
#define E1000_RCTL_MO_2           0x00002000    /* multicast offset 13:2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1888
#define E1000_RCTL_MO_3           0x00003000    /* multicast offset 15:4 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1889
#define E1000_RCTL_MDR            0x00004000    /* multicast desc ring 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1890
#define E1000_RCTL_BAM            0x00008000    /* broadcast enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1891
/* these buffer sizes are valid if E1000_RCTL_BSEX is 0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1892
#define E1000_RCTL_SZ_2048        0x00000000    /* rx buffer size 2048 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1893
#define E1000_RCTL_SZ_1024        0x00010000    /* rx buffer size 1024 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1894
#define E1000_RCTL_SZ_512         0x00020000    /* rx buffer size 512 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1895
#define E1000_RCTL_SZ_256         0x00030000    /* rx buffer size 256 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1896
/* these buffer sizes are valid if E1000_RCTL_BSEX is 1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1897
#define E1000_RCTL_SZ_16384       0x00010000    /* rx buffer size 16384 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1898
#define E1000_RCTL_SZ_8192        0x00020000    /* rx buffer size 8192 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1899
#define E1000_RCTL_SZ_4096        0x00030000    /* rx buffer size 4096 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1900
#define E1000_RCTL_VFE            0x00040000    /* vlan filter enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1901
#define E1000_RCTL_CFIEN          0x00080000    /* canonical form enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1902
#define E1000_RCTL_CFI            0x00100000    /* canonical form indicator */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1903
#define E1000_RCTL_DPF            0x00400000    /* discard pause frames */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1904
#define E1000_RCTL_PMCF           0x00800000    /* pass MAC control frames */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1905
#define E1000_RCTL_BSEX           0x02000000    /* Buffer size extension */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1906
#define E1000_RCTL_SECRC          0x04000000    /* Strip Ethernet CRC */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1907
#define E1000_RCTL_FLXBUF_MASK    0x78000000    /* Flexible buffer size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1908
#define E1000_RCTL_FLXBUF_SHIFT   27            /* Flexible buffer shift */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1909
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1910
/* Use byte values for the following shift parameters
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1911
 * Usage:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1912
 *     psrctl |= (((ROUNDUP(value0, 128) >> E1000_PSRCTL_BSIZE0_SHIFT) &
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1913
 *                  E1000_PSRCTL_BSIZE0_MASK) |
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1914
 *                ((ROUNDUP(value1, 1024) >> E1000_PSRCTL_BSIZE1_SHIFT) &
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1915
 *                  E1000_PSRCTL_BSIZE1_MASK) |
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1916
 *                ((ROUNDUP(value2, 1024) << E1000_PSRCTL_BSIZE2_SHIFT) &
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1917
 *                  E1000_PSRCTL_BSIZE2_MASK) |
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1918
 *                ((ROUNDUP(value3, 1024) << E1000_PSRCTL_BSIZE3_SHIFT) |;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1919
 *                  E1000_PSRCTL_BSIZE3_MASK))
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1920
 * where value0 = [128..16256],  default=256
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1921
 *       value1 = [1024..64512], default=4096
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1922
 *       value2 = [0..64512],    default=4096
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1923
 *       value3 = [0..64512],    default=0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1924
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1925
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1926
#define E1000_PSRCTL_BSIZE0_MASK   0x0000007F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1927
#define E1000_PSRCTL_BSIZE1_MASK   0x00003F00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1928
#define E1000_PSRCTL_BSIZE2_MASK   0x003F0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1929
#define E1000_PSRCTL_BSIZE3_MASK   0x3F000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1930
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1931
#define E1000_PSRCTL_BSIZE0_SHIFT  7            /* Shift _right_ 7 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1932
#define E1000_PSRCTL_BSIZE1_SHIFT  2            /* Shift _right_ 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1933
#define E1000_PSRCTL_BSIZE2_SHIFT  6            /* Shift _left_ 6 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1934
#define E1000_PSRCTL_BSIZE3_SHIFT 14            /* Shift _left_ 14 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1935
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1936
/* SW_W_SYNC definitions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1937
#define E1000_SWFW_EEP_SM     0x0001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1938
#define E1000_SWFW_PHY0_SM    0x0002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1939
#define E1000_SWFW_PHY1_SM    0x0004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1940
#define E1000_SWFW_MAC_CSR_SM 0x0008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1941
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1942
/* Receive Descriptor */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1943
#define E1000_RDT_DELAY 0x0000ffff      /* Delay timer (1=1024us) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1944
#define E1000_RDT_FPDB  0x80000000      /* Flush descriptor block */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1945
#define E1000_RDLEN_LEN 0x0007ff80      /* descriptor length */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1946
#define E1000_RDH_RDH   0x0000ffff      /* receive descriptor head */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1947
#define E1000_RDT_RDT   0x0000ffff      /* receive descriptor tail */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1948
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1949
/* Flow Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1950
#define E1000_FCRTH_RTH  0x0000FFF8     /* Mask Bits[15:3] for RTH */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1951
#define E1000_FCRTH_XFCE 0x80000000     /* External Flow Control Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1952
#define E1000_FCRTL_RTL  0x0000FFF8     /* Mask Bits[15:3] for RTL */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1953
#define E1000_FCRTL_XONE 0x80000000     /* Enable XON frame transmission */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1954
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1955
/* Header split receive */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1956
#define E1000_RFCTL_ISCSI_DIS           0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1957
#define E1000_RFCTL_ISCSI_DWC_MASK      0x0000003E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1958
#define E1000_RFCTL_ISCSI_DWC_SHIFT     1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1959
#define E1000_RFCTL_NFSW_DIS            0x00000040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1960
#define E1000_RFCTL_NFSR_DIS            0x00000080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1961
#define E1000_RFCTL_NFS_VER_MASK        0x00000300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1962
#define E1000_RFCTL_NFS_VER_SHIFT       8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1963
#define E1000_RFCTL_IPV6_DIS            0x00000400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1964
#define E1000_RFCTL_IPV6_XSUM_DIS       0x00000800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1965
#define E1000_RFCTL_ACK_DIS             0x00001000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1966
#define E1000_RFCTL_ACKD_DIS            0x00002000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1967
#define E1000_RFCTL_IPFRSP_DIS          0x00004000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1968
#define E1000_RFCTL_EXTEN               0x00008000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1969
#define E1000_RFCTL_IPV6_EX_DIS         0x00010000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1970
#define E1000_RFCTL_NEW_IPV6_EXT_DIS    0x00020000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1971
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1972
/* Receive Descriptor Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1973
#define E1000_RXDCTL_PTHRESH 0x0000003F /* RXDCTL Prefetch Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1974
#define E1000_RXDCTL_HTHRESH 0x00003F00 /* RXDCTL Host Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1975
#define E1000_RXDCTL_WTHRESH 0x003F0000 /* RXDCTL Writeback Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1976
#define E1000_RXDCTL_GRAN    0x01000000 /* RXDCTL Granularity */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1977
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1978
/* Transmit Descriptor Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1979
#define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1980
#define E1000_TXDCTL_HTHRESH 0x00003F00 /* TXDCTL Host Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1981
#define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1982
#define E1000_TXDCTL_GRAN    0x01000000 /* TXDCTL Granularity */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1983
#define E1000_TXDCTL_LWTHRESH 0xFE000000 /* TXDCTL Low Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1984
#define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1985
#define E1000_TXDCTL_COUNT_DESC 0x00400000 /* Enable the counting of desc.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1986
                                              still to be processed. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1987
/* Transmit Configuration Word */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1988
#define E1000_TXCW_FD         0x00000020        /* TXCW full duplex */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1989
#define E1000_TXCW_HD         0x00000040        /* TXCW half duplex */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1990
#define E1000_TXCW_PAUSE      0x00000080        /* TXCW sym pause request */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1991
#define E1000_TXCW_ASM_DIR    0x00000100        /* TXCW astm pause direction */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1992
#define E1000_TXCW_PAUSE_MASK 0x00000180        /* TXCW pause request mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1993
#define E1000_TXCW_RF         0x00003000        /* TXCW remote fault */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1994
#define E1000_TXCW_NP         0x00008000        /* TXCW next page */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1995
#define E1000_TXCW_CW         0x0000ffff        /* TxConfigWord mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1996
#define E1000_TXCW_TXC        0x40000000        /* Transmit Config control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1997
#define E1000_TXCW_ANE        0x80000000        /* Auto-neg enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1998
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  1999
/* Receive Configuration Word */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2000
#define E1000_RXCW_CW    0x0000ffff     /* RxConfigWord mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2001
#define E1000_RXCW_NC    0x04000000     /* Receive config no carrier */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2002
#define E1000_RXCW_IV    0x08000000     /* Receive config invalid */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2003
#define E1000_RXCW_CC    0x10000000     /* Receive config change */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2004
#define E1000_RXCW_C     0x20000000     /* Receive config */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2005
#define E1000_RXCW_SYNCH 0x40000000     /* Receive config synch */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2006
#define E1000_RXCW_ANC   0x80000000     /* Auto-neg complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2007
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2008
/* Transmit Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2009
#define E1000_TCTL_RST    0x00000001    /* software reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2010
#define E1000_TCTL_EN     0x00000002    /* enable tx */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2011
#define E1000_TCTL_BCE    0x00000004    /* busy check enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2012
#define E1000_TCTL_PSP    0x00000008    /* pad short packets */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2013
#define E1000_TCTL_CT     0x00000ff0    /* collision threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2014
#define E1000_TCTL_COLD   0x003ff000    /* collision distance */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2015
#define E1000_TCTL_SWXOFF 0x00400000    /* SW Xoff transmission */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2016
#define E1000_TCTL_PBE    0x00800000    /* Packet Burst Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2017
#define E1000_TCTL_RTLC   0x01000000    /* Re-transmit on late collision */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2018
#define E1000_TCTL_NRTU   0x02000000    /* No Re-transmit on underrun */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2019
#define E1000_TCTL_MULR   0x10000000    /* Multiple request support */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2020
/* Extended Transmit Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2021
#define E1000_TCTL_EXT_BST_MASK  0x000003FF /* Backoff Slot Time */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2022
#define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2023
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2024
#define DEFAULT_80003ES2LAN_TCTL_EXT_GCEX   0x00010000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2025
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2026
/* Receive Checksum Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2027
#define E1000_RXCSUM_PCSS_MASK 0x000000FF   /* Packet Checksum Start */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2028
#define E1000_RXCSUM_IPOFL     0x00000100   /* IPv4 checksum offload */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2029
#define E1000_RXCSUM_TUOFL     0x00000200   /* TCP / UDP checksum offload */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2030
#define E1000_RXCSUM_IPV6OFL   0x00000400   /* IPv6 checksum offload */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2031
#define E1000_RXCSUM_IPPCSE    0x00001000   /* IP payload checksum enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2032
#define E1000_RXCSUM_PCSD      0x00002000   /* packet checksum disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2033
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2034
/* Multiple Receive Queue Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2035
#define E1000_MRQC_ENABLE_MASK              0x00000003
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2036
#define E1000_MRQC_ENABLE_RSS_2Q            0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2037
#define E1000_MRQC_ENABLE_RSS_INT           0x00000004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2038
#define E1000_MRQC_RSS_FIELD_MASK           0xFFFF0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2039
#define E1000_MRQC_RSS_FIELD_IPV4_TCP       0x00010000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2040
#define E1000_MRQC_RSS_FIELD_IPV4           0x00020000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2041
#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX    0x00040000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2042
#define E1000_MRQC_RSS_FIELD_IPV6_EX        0x00080000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2043
#define E1000_MRQC_RSS_FIELD_IPV6           0x00100000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2044
#define E1000_MRQC_RSS_FIELD_IPV6_TCP       0x00200000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2045
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2046
/* Definitions for power management and wakeup registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2047
/* Wake Up Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2048
#define E1000_WUC_APME       0x00000001 /* APM Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2049
#define E1000_WUC_PME_EN     0x00000002 /* PME Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2050
#define E1000_WUC_PME_STATUS 0x00000004 /* PME Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2051
#define E1000_WUC_APMPME     0x00000008 /* Assert PME on APM Wakeup */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2052
#define E1000_WUC_SPM        0x80000000 /* Enable SPM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2053
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2054
/* Wake Up Filter Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2055
#define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2056
#define E1000_WUFC_MAG  0x00000002 /* Magic Packet Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2057
#define E1000_WUFC_EX   0x00000004 /* Directed Exact Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2058
#define E1000_WUFC_MC   0x00000008 /* Directed Multicast Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2059
#define E1000_WUFC_BC   0x00000010 /* Broadcast Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2060
#define E1000_WUFC_ARP  0x00000020 /* ARP Request Packet Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2061
#define E1000_WUFC_IPV4 0x00000040 /* Directed IPv4 Packet Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2062
#define E1000_WUFC_IPV6 0x00000080 /* Directed IPv6 Packet Wakeup Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2063
#define E1000_WUFC_IGNORE_TCO      0x00008000 /* Ignore WakeOn TCO packets */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2064
#define E1000_WUFC_FLX0 0x00010000 /* Flexible Filter 0 Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2065
#define E1000_WUFC_FLX1 0x00020000 /* Flexible Filter 1 Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2066
#define E1000_WUFC_FLX2 0x00040000 /* Flexible Filter 2 Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2067
#define E1000_WUFC_FLX3 0x00080000 /* Flexible Filter 3 Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2068
#define E1000_WUFC_ALL_FILTERS 0x000F00FF /* Mask for all wakeup filters */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2069
#define E1000_WUFC_FLX_OFFSET 16       /* Offset to the Flexible Filters bits */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2070
#define E1000_WUFC_FLX_FILTERS 0x000F0000 /* Mask for the 4 flexible filters */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2071
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2072
/* Wake Up Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2073
#define E1000_WUS_LNKC 0x00000001 /* Link Status Changed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2074
#define E1000_WUS_MAG  0x00000002 /* Magic Packet Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2075
#define E1000_WUS_EX   0x00000004 /* Directed Exact Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2076
#define E1000_WUS_MC   0x00000008 /* Directed Multicast Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2077
#define E1000_WUS_BC   0x00000010 /* Broadcast Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2078
#define E1000_WUS_ARP  0x00000020 /* ARP Request Packet Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2079
#define E1000_WUS_IPV4 0x00000040 /* Directed IPv4 Packet Wakeup Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2080
#define E1000_WUS_IPV6 0x00000080 /* Directed IPv6 Packet Wakeup Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2081
#define E1000_WUS_FLX0 0x00010000 /* Flexible Filter 0 Match */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2082
#define E1000_WUS_FLX1 0x00020000 /* Flexible Filter 1 Match */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2083
#define E1000_WUS_FLX2 0x00040000 /* Flexible Filter 2 Match */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2084
#define E1000_WUS_FLX3 0x00080000 /* Flexible Filter 3 Match */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2085
#define E1000_WUS_FLX_FILTERS 0x000F0000 /* Mask for the 4 flexible filters */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2086
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2087
/* Management Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2088
#define E1000_MANC_SMBUS_EN      0x00000001 /* SMBus Enabled - RO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2089
#define E1000_MANC_ASF_EN        0x00000002 /* ASF Enabled - RO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2090
#define E1000_MANC_R_ON_FORCE    0x00000004 /* Reset on Force TCO - RO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2091
#define E1000_MANC_RMCP_EN       0x00000100 /* Enable RCMP 026Fh Filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2092
#define E1000_MANC_0298_EN       0x00000200 /* Enable RCMP 0298h Filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2093
#define E1000_MANC_IPV4_EN       0x00000400 /* Enable IPv4 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2094
#define E1000_MANC_IPV6_EN       0x00000800 /* Enable IPv6 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2095
#define E1000_MANC_SNAP_EN       0x00001000 /* Accept LLC/SNAP */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2096
#define E1000_MANC_ARP_EN        0x00002000 /* Enable ARP Request Filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2097
#define E1000_MANC_NEIGHBOR_EN   0x00004000 /* Enable Neighbor Discovery
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2098
                                             * Filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2099
#define E1000_MANC_ARP_RES_EN    0x00008000 /* Enable ARP response Filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2100
#define E1000_MANC_TCO_RESET     0x00010000 /* TCO Reset Occurred */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2101
#define E1000_MANC_RCV_TCO_EN    0x00020000 /* Receive TCO Packets Enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2102
#define E1000_MANC_REPORT_STATUS 0x00040000 /* Status Reporting Enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2103
#define E1000_MANC_RCV_ALL       0x00080000 /* Receive All Enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2104
#define E1000_MANC_BLK_PHY_RST_ON_IDE   0x00040000 /* Block phy resets */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2105
#define E1000_MANC_EN_MAC_ADDR_FILTER   0x00100000 /* Enable MAC address
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2106
                                                    * filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2107
#define E1000_MANC_EN_MNG2HOST   0x00200000 /* Enable MNG packets to host
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2108
                                             * memory */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2109
#define E1000_MANC_EN_IP_ADDR_FILTER    0x00400000 /* Enable IP address
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2110
                                                    * filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2111
#define E1000_MANC_EN_XSUM_FILTER   0x00800000 /* Enable checksum filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2112
#define E1000_MANC_BR_EN         0x01000000 /* Enable broadcast filtering */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2113
#define E1000_MANC_SMB_REQ       0x01000000 /* SMBus Request */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2114
#define E1000_MANC_SMB_GNT       0x02000000 /* SMBus Grant */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2115
#define E1000_MANC_SMB_CLK_IN    0x04000000 /* SMBus Clock In */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2116
#define E1000_MANC_SMB_DATA_IN   0x08000000 /* SMBus Data In */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2117
#define E1000_MANC_SMB_DATA_OUT  0x10000000 /* SMBus Data Out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2118
#define E1000_MANC_SMB_CLK_OUT   0x20000000 /* SMBus Clock Out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2119
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2120
#define E1000_MANC_SMB_DATA_OUT_SHIFT  28 /* SMBus Data Out Shift */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2121
#define E1000_MANC_SMB_CLK_OUT_SHIFT   29 /* SMBus Clock Out Shift */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2122
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2123
/* SW Semaphore Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2124
#define E1000_SWSM_SMBI         0x00000001 /* Driver Semaphore bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2125
#define E1000_SWSM_SWESMBI      0x00000002 /* FW Semaphore bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2126
#define E1000_SWSM_WMNG         0x00000004 /* Wake MNG Clock */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2127
#define E1000_SWSM_DRV_LOAD     0x00000008 /* Driver Loaded Bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2128
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2129
/* FW Semaphore Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2130
#define E1000_FWSM_MODE_MASK    0x0000000E /* FW mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2131
#define E1000_FWSM_MODE_SHIFT            1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2132
#define E1000_FWSM_FW_VALID     0x00008000 /* FW established a valid mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2133
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2134
#define E1000_FWSM_RSPCIPHY        0x00000040 /* Reset PHY on PCI reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2135
#define E1000_FWSM_DISSW           0x10000000 /* FW disable SW Write Access */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2136
#define E1000_FWSM_SKUSEL_MASK     0x60000000 /* LAN SKU select */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2137
#define E1000_FWSM_SKUEL_SHIFT     29
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2138
#define E1000_FWSM_SKUSEL_EMB      0x0 /* Embedded SKU */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2139
#define E1000_FWSM_SKUSEL_CONS     0x1 /* Consumer SKU */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2140
#define E1000_FWSM_SKUSEL_PERF_100 0x2 /* Perf & Corp 10/100 SKU */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2141
#define E1000_FWSM_SKUSEL_PERF_GBE 0x3 /* Perf & Copr GbE SKU */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2142
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2143
/* FFLT Debug Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2144
#define E1000_FFLT_DBG_INVC     0x00100000 /* Invalid /C/ code handling */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2145
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2146
typedef enum {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2147
    e1000_mng_mode_none     = 0,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2148
    e1000_mng_mode_asf,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2149
    e1000_mng_mode_pt,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2150
    e1000_mng_mode_ipmi,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2151
    e1000_mng_mode_host_interface_only
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2152
} e1000_mng_mode;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2153
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2154
/* Host Inteface Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2155
#define E1000_HICR_EN           0x00000001  /* Enable Bit - RO */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2156
#define E1000_HICR_C            0x00000002  /* Driver sets this bit when done
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2157
                                             * to put command in RAM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2158
#define E1000_HICR_SV           0x00000004  /* Status Validity */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2159
#define E1000_HICR_FWR          0x00000080  /* FW reset. Set by the Host */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2160
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2161
/* Host Interface Command Interface - Address range 0x8800-0x8EFF */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2162
#define E1000_HI_MAX_DATA_LENGTH         252 /* Host Interface data length */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2163
#define E1000_HI_MAX_BLOCK_BYTE_LENGTH  1792 /* Number of bytes in range */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2164
#define E1000_HI_MAX_BLOCK_DWORD_LENGTH  448 /* Number of dwords in range */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2165
#define E1000_HI_COMMAND_TIMEOUT         500 /* Time in ms to process HI command */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2166
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2167
struct e1000_host_command_header {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2168
    u8 command_id;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2169
    u8 command_length;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2170
    u8 command_options;   /* I/F bits for command, status for return */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2171
    u8 checksum;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2172
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2173
struct e1000_host_command_info {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2174
    struct e1000_host_command_header command_header;  /* Command Head/Command Result Head has 4 bytes */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2175
    u8 command_data[E1000_HI_MAX_DATA_LENGTH];   /* Command data can length 0..252 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2176
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2177
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2178
/* Host SMB register #0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2179
#define E1000_HSMC0R_CLKIN      0x00000001  /* SMB Clock in */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2180
#define E1000_HSMC0R_DATAIN     0x00000002  /* SMB Data in */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2181
#define E1000_HSMC0R_DATAOUT    0x00000004  /* SMB Data out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2182
#define E1000_HSMC0R_CLKOUT     0x00000008  /* SMB Clock out */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2183
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2184
/* Host SMB register #1 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2185
#define E1000_HSMC1R_CLKIN      E1000_HSMC0R_CLKIN
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2186
#define E1000_HSMC1R_DATAIN     E1000_HSMC0R_DATAIN
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2187
#define E1000_HSMC1R_DATAOUT    E1000_HSMC0R_DATAOUT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2188
#define E1000_HSMC1R_CLKOUT     E1000_HSMC0R_CLKOUT
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2189
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2190
/* FW Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2191
#define E1000_FWSTS_FWS_MASK    0x000000FF  /* FW Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2192
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2193
/* Wake Up Packet Length */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2194
#define E1000_WUPL_LENGTH_MASK 0x0FFF   /* Only the lower 12 bits are valid */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2195
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2196
#define E1000_MDALIGN          4096
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2197
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2198
/* PCI-Ex registers*/
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2199
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2200
/* PCI-Ex Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2201
#define E1000_GCR_RXD_NO_SNOOP          0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2202
#define E1000_GCR_RXDSCW_NO_SNOOP       0x00000002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2203
#define E1000_GCR_RXDSCR_NO_SNOOP       0x00000004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2204
#define E1000_GCR_TXD_NO_SNOOP          0x00000008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2205
#define E1000_GCR_TXDSCW_NO_SNOOP       0x00000010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2206
#define E1000_GCR_TXDSCR_NO_SNOOP       0x00000020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2207
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2208
#define PCI_EX_NO_SNOOP_ALL (E1000_GCR_RXD_NO_SNOOP         | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2209
                             E1000_GCR_RXDSCW_NO_SNOOP      | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2210
                             E1000_GCR_RXDSCR_NO_SNOOP      | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2211
                             E1000_GCR_TXD_NO_SNOOP         | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2212
                             E1000_GCR_TXDSCW_NO_SNOOP      | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2213
                             E1000_GCR_TXDSCR_NO_SNOOP)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2214
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2215
#define PCI_EX_82566_SNOOP_ALL PCI_EX_NO_SNOOP_ALL
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2216
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2217
#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2218
/* Function Active and Power State to MNG */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2219
#define E1000_FACTPS_FUNC0_POWER_STATE_MASK         0x00000003
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2220
#define E1000_FACTPS_LAN0_VALID                     0x00000004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2221
#define E1000_FACTPS_FUNC0_AUX_EN                   0x00000008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2222
#define E1000_FACTPS_FUNC1_POWER_STATE_MASK         0x000000C0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2223
#define E1000_FACTPS_FUNC1_POWER_STATE_SHIFT        6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2224
#define E1000_FACTPS_LAN1_VALID                     0x00000100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2225
#define E1000_FACTPS_FUNC1_AUX_EN                   0x00000200
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2226
#define E1000_FACTPS_FUNC2_POWER_STATE_MASK         0x00003000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2227
#define E1000_FACTPS_FUNC2_POWER_STATE_SHIFT        12
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2228
#define E1000_FACTPS_IDE_ENABLE                     0x00004000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2229
#define E1000_FACTPS_FUNC2_AUX_EN                   0x00008000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2230
#define E1000_FACTPS_FUNC3_POWER_STATE_MASK         0x000C0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2231
#define E1000_FACTPS_FUNC3_POWER_STATE_SHIFT        18
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2232
#define E1000_FACTPS_SP_ENABLE                      0x00100000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2233
#define E1000_FACTPS_FUNC3_AUX_EN                   0x00200000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2234
#define E1000_FACTPS_FUNC4_POWER_STATE_MASK         0x03000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2235
#define E1000_FACTPS_FUNC4_POWER_STATE_SHIFT        24
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2236
#define E1000_FACTPS_IPMI_ENABLE                    0x04000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2237
#define E1000_FACTPS_FUNC4_AUX_EN                   0x08000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2238
#define E1000_FACTPS_MNGCG                          0x20000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2239
#define E1000_FACTPS_LAN_FUNC_SEL                   0x40000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2240
#define E1000_FACTPS_PM_STATE_CHANGED               0x80000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2241
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2242
/* PCI-Ex Config Space */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2243
#define PCI_EX_LINK_STATUS           0x12
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2244
#define PCI_EX_LINK_WIDTH_MASK       0x3F0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2245
#define PCI_EX_LINK_WIDTH_SHIFT      4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2246
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2247
/* EEPROM Commands - Microwire */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2248
#define EEPROM_READ_OPCODE_MICROWIRE  0x6  /* EEPROM read opcode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2249
#define EEPROM_WRITE_OPCODE_MICROWIRE 0x5  /* EEPROM write opcode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2250
#define EEPROM_ERASE_OPCODE_MICROWIRE 0x7  /* EEPROM erase opcode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2251
#define EEPROM_EWEN_OPCODE_MICROWIRE  0x13 /* EEPROM erase/write enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2252
#define EEPROM_EWDS_OPCODE_MICROWIRE  0x10 /* EEPROM erast/write disable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2253
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2254
/* EEPROM Commands - SPI */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2255
#define EEPROM_MAX_RETRY_SPI        5000 /* Max wait of 5ms, for RDY signal */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2256
#define EEPROM_READ_OPCODE_SPI      0x03  /* EEPROM read opcode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2257
#define EEPROM_WRITE_OPCODE_SPI     0x02  /* EEPROM write opcode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2258
#define EEPROM_A8_OPCODE_SPI        0x08  /* opcode bit-3 = address bit-8 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2259
#define EEPROM_WREN_OPCODE_SPI      0x06  /* EEPROM set Write Enable latch */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2260
#define EEPROM_WRDI_OPCODE_SPI      0x04  /* EEPROM reset Write Enable latch */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2261
#define EEPROM_RDSR_OPCODE_SPI      0x05  /* EEPROM read Status register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2262
#define EEPROM_WRSR_OPCODE_SPI      0x01  /* EEPROM write Status register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2263
#define EEPROM_ERASE4K_OPCODE_SPI   0x20  /* EEPROM ERASE 4KB */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2264
#define EEPROM_ERASE64K_OPCODE_SPI  0xD8  /* EEPROM ERASE 64KB */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2265
#define EEPROM_ERASE256_OPCODE_SPI  0xDB  /* EEPROM ERASE 256B */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2266
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2267
/* EEPROM Size definitions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2268
#define EEPROM_WORD_SIZE_SHIFT  6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2269
#define EEPROM_SIZE_SHIFT       10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2270
#define EEPROM_SIZE_MASK        0x1C00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2271
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2272
/* EEPROM Word Offsets */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2273
#define EEPROM_COMPAT                 0x0003
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2274
#define EEPROM_ID_LED_SETTINGS        0x0004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2275
#define EEPROM_VERSION                0x0005
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2276
#define EEPROM_SERDES_AMPLITUDE       0x0006 /* For SERDES output amplitude adjustment. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2277
#define EEPROM_PHY_CLASS_WORD         0x0007
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2278
#define EEPROM_INIT_CONTROL1_REG      0x000A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2279
#define EEPROM_INIT_CONTROL2_REG      0x000F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2280
#define EEPROM_SWDEF_PINS_CTRL_PORT_1 0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2281
#define EEPROM_INIT_CONTROL3_PORT_B   0x0014
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2282
#define EEPROM_INIT_3GIO_3            0x001A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2283
#define EEPROM_SWDEF_PINS_CTRL_PORT_0 0x0020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2284
#define EEPROM_INIT_CONTROL3_PORT_A   0x0024
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2285
#define EEPROM_CFG                    0x0012
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2286
#define EEPROM_FLASH_VERSION          0x0032
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2287
#define EEPROM_CHECKSUM_REG           0x003F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2288
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2289
#define E1000_EEPROM_CFG_DONE         0x00040000   /* MNG config cycle done */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2290
#define E1000_EEPROM_CFG_DONE_PORT_1  0x00080000   /* ...for second port */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2291
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2292
/* Word definitions for ID LED Settings */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2293
#define ID_LED_RESERVED_0000 0x0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2294
#define ID_LED_RESERVED_FFFF 0xFFFF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2295
#define ID_LED_RESERVED_82573  0xF746
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2296
#define ID_LED_DEFAULT_82573   0x1811
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2297
#define ID_LED_DEFAULT       ((ID_LED_OFF1_ON2 << 12) | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2298
                              (ID_LED_OFF1_OFF2 << 8) | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2299
                              (ID_LED_DEF1_DEF2 << 4) | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2300
                              (ID_LED_DEF1_DEF2))
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2301
#define ID_LED_DEFAULT_ICH8LAN  ((ID_LED_DEF1_DEF2 << 12) | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2302
                                 (ID_LED_DEF1_OFF2 <<  8) | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2303
                                 (ID_LED_DEF1_ON2  <<  4) | \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2304
                                 (ID_LED_DEF1_DEF2))
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2305
#define ID_LED_DEF1_DEF2     0x1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2306
#define ID_LED_DEF1_ON2      0x2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2307
#define ID_LED_DEF1_OFF2     0x3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2308
#define ID_LED_ON1_DEF2      0x4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2309
#define ID_LED_ON1_ON2       0x5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2310
#define ID_LED_ON1_OFF2      0x6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2311
#define ID_LED_OFF1_DEF2     0x7
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2312
#define ID_LED_OFF1_ON2      0x8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2313
#define ID_LED_OFF1_OFF2     0x9
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2314
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2315
#define IGP_ACTIVITY_LED_MASK   0xFFFFF0FF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2316
#define IGP_ACTIVITY_LED_ENABLE 0x0300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2317
#define IGP_LED3_MODE           0x07000000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2318
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2319
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2320
/* Mask bits for SERDES amplitude adjustment in Word 6 of the EEPROM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2321
#define EEPROM_SERDES_AMPLITUDE_MASK  0x000F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2322
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2323
/* Mask bit for PHY class in Word 7 of the EEPROM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2324
#define EEPROM_PHY_CLASS_A   0x8000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2325
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2326
/* Mask bits for fields in Word 0x0a of the EEPROM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2327
#define EEPROM_WORD0A_ILOS   0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2328
#define EEPROM_WORD0A_SWDPIO 0x01E0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2329
#define EEPROM_WORD0A_LRST   0x0200
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2330
#define EEPROM_WORD0A_FD     0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2331
#define EEPROM_WORD0A_66MHZ  0x0800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2332
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2333
/* Mask bits for fields in Word 0x0f of the EEPROM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2334
#define EEPROM_WORD0F_PAUSE_MASK 0x3000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2335
#define EEPROM_WORD0F_PAUSE      0x1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2336
#define EEPROM_WORD0F_ASM_DIR    0x2000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2337
#define EEPROM_WORD0F_ANE        0x0800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2338
#define EEPROM_WORD0F_SWPDIO_EXT 0x00F0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2339
#define EEPROM_WORD0F_LPLU       0x0001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2340
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2341
/* Mask bits for fields in Word 0x10/0x20 of the EEPROM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2342
#define EEPROM_WORD1020_GIGA_DISABLE         0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2343
#define EEPROM_WORD1020_GIGA_DISABLE_NON_D0A 0x0008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2344
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2345
/* Mask bits for fields in Word 0x1a of the EEPROM */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2346
#define EEPROM_WORD1A_ASPM_MASK  0x000C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2347
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2348
/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2349
#define EEPROM_SUM 0xBABA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2350
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2351
/* EEPROM Map defines (WORD OFFSETS)*/
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2352
#define EEPROM_NODE_ADDRESS_BYTE_0 0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2353
#define EEPROM_PBA_BYTE_1          8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2354
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2355
#define EEPROM_RESERVED_WORD          0xFFFF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2356
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2357
/* EEPROM Map Sizes (Byte Counts) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2358
#define PBA_SIZE 4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2359
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2360
/* Collision related configuration parameters */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2361
#define E1000_COLLISION_THRESHOLD       15
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2362
#define E1000_CT_SHIFT                  4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2363
/* Collision distance is a 0-based value that applies to
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2364
 * half-duplex-capable hardware only. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2365
#define E1000_COLLISION_DISTANCE        63
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2366
#define E1000_COLLISION_DISTANCE_82542  64
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2367
#define E1000_FDX_COLLISION_DISTANCE    E1000_COLLISION_DISTANCE
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2368
#define E1000_HDX_COLLISION_DISTANCE    E1000_COLLISION_DISTANCE
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2369
#define E1000_COLD_SHIFT                12
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2370
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2371
/* Number of Transmit and Receive Descriptors must be a multiple of 8 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2372
#define REQ_TX_DESCRIPTOR_MULTIPLE  8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2373
#define REQ_RX_DESCRIPTOR_MULTIPLE  8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2374
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2375
/* Default values for the transmit IPG register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2376
#define DEFAULT_82542_TIPG_IPGT        10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2377
#define DEFAULT_82543_TIPG_IPGT_FIBER  9
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2378
#define DEFAULT_82543_TIPG_IPGT_COPPER 8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2379
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2380
#define E1000_TIPG_IPGT_MASK  0x000003FF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2381
#define E1000_TIPG_IPGR1_MASK 0x000FFC00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2382
#define E1000_TIPG_IPGR2_MASK 0x3FF00000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2383
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2384
#define DEFAULT_82542_TIPG_IPGR1 2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2385
#define DEFAULT_82543_TIPG_IPGR1 8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2386
#define E1000_TIPG_IPGR1_SHIFT  10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2387
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2388
#define DEFAULT_82542_TIPG_IPGR2 10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2389
#define DEFAULT_82543_TIPG_IPGR2 6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2390
#define DEFAULT_80003ES2LAN_TIPG_IPGR2 7
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2391
#define E1000_TIPG_IPGR2_SHIFT  20
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2392
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2393
#define DEFAULT_80003ES2LAN_TIPG_IPGT_10_100 0x00000009
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2394
#define DEFAULT_80003ES2LAN_TIPG_IPGT_1000   0x00000008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2395
#define E1000_TXDMAC_DPP 0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2396
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2397
/* Adaptive IFS defines */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2398
#define TX_THRESHOLD_START     8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2399
#define TX_THRESHOLD_INCREMENT 10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2400
#define TX_THRESHOLD_DECREMENT 1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2401
#define TX_THRESHOLD_STOP      190
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2402
#define TX_THRESHOLD_DISABLE   0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2403
#define TX_THRESHOLD_TIMER_MS  10000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2404
#define MIN_NUM_XMITS          1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2405
#define IFS_MAX                80
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2406
#define IFS_STEP               10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2407
#define IFS_MIN                40
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2408
#define IFS_RATIO              4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2409
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2410
/* Extended Configuration Control and Size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2411
#define E1000_EXTCNF_CTRL_PCIE_WRITE_ENABLE 0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2412
#define E1000_EXTCNF_CTRL_PHY_WRITE_ENABLE  0x00000002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2413
#define E1000_EXTCNF_CTRL_D_UD_ENABLE       0x00000004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2414
#define E1000_EXTCNF_CTRL_D_UD_LATENCY      0x00000008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2415
#define E1000_EXTCNF_CTRL_D_UD_OWNER        0x00000010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2416
#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2417
#define E1000_EXTCNF_CTRL_MDIO_HW_OWNERSHIP 0x00000040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2418
#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER   0x0FFF0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2419
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2420
#define E1000_EXTCNF_SIZE_EXT_PHY_LENGTH    0x000000FF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2421
#define E1000_EXTCNF_SIZE_EXT_DOCK_LENGTH   0x0000FF00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2422
#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH   0x00FF0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2423
#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE  0x00000001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2424
#define E1000_EXTCNF_CTRL_SWFLAG            0x00000020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2425
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2426
/* PBA constants */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2427
#define E1000_PBA_8K 0x0008    /* 8KB, default Rx allocation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2428
#define E1000_PBA_12K 0x000C    /* 12KB, default Rx allocation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2429
#define E1000_PBA_16K 0x0010    /* 16KB, default TX allocation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2430
#define E1000_PBA_20K 0x0014
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2431
#define E1000_PBA_22K 0x0016
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2432
#define E1000_PBA_24K 0x0018
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2433
#define E1000_PBA_30K 0x001E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2434
#define E1000_PBA_32K 0x0020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2435
#define E1000_PBA_34K 0x0022
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2436
#define E1000_PBA_38K 0x0026
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2437
#define E1000_PBA_40K 0x0028
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2438
#define E1000_PBA_48K 0x0030    /* 48KB, default RX allocation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2439
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2440
#define E1000_PBS_16K E1000_PBA_16K
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2441
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2442
/* Flow Control Constants */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2443
#define FLOW_CONTROL_ADDRESS_LOW  0x00C28001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2444
#define FLOW_CONTROL_ADDRESS_HIGH 0x00000100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2445
#define FLOW_CONTROL_TYPE         0x8808
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2446
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2447
/* The historical defaults for the flow control values are given below. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2448
#define FC_DEFAULT_HI_THRESH        (0x8000)    /* 32KB */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2449
#define FC_DEFAULT_LO_THRESH        (0x4000)    /* 16KB */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2450
#define FC_DEFAULT_TX_TIMER         (0x100)     /* ~130 us */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2451
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2452
/* PCIX Config space */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2453
#define PCIX_COMMAND_REGISTER    0xE6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2454
#define PCIX_STATUS_REGISTER_LO  0xE8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2455
#define PCIX_STATUS_REGISTER_HI  0xEA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2456
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2457
#define PCIX_COMMAND_MMRBC_MASK      0x000C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2458
#define PCIX_COMMAND_MMRBC_SHIFT     0x2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2459
#define PCIX_STATUS_HI_MMRBC_MASK    0x0060
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2460
#define PCIX_STATUS_HI_MMRBC_SHIFT   0x5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2461
#define PCIX_STATUS_HI_MMRBC_4K      0x3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2462
#define PCIX_STATUS_HI_MMRBC_2K      0x2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2463
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2464
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2465
/* Number of bits required to shift right the "pause" bits from the
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2466
 * EEPROM (bits 13:12) to the "pause" (bits 8:7) field in the TXCW register.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2467
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2468
#define PAUSE_SHIFT 5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2469
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2470
/* Number of bits required to shift left the "SWDPIO" bits from the
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2471
 * EEPROM (bits 8:5) to the "SWDPIO" (bits 25:22) field in the CTRL register.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2472
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2473
#define SWDPIO_SHIFT 17
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2474
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2475
/* Number of bits required to shift left the "SWDPIO_EXT" bits from the
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2476
 * EEPROM word F (bits 7:4) to the bits 11:8 of The Extended CTRL register.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2477
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2478
#define SWDPIO__EXT_SHIFT 4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2479
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2480
/* Number of bits required to shift left the "ILOS" bit from the EEPROM
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2481
 * (bit 4) to the "ILOS" (bit 7) field in the CTRL register.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2482
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2483
#define ILOS_SHIFT  3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2484
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2485
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2486
#define RECEIVE_BUFFER_ALIGN_SIZE  (256)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2487
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2488
/* Number of milliseconds we wait for auto-negotiation to complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2489
#define LINK_UP_TIMEOUT             500
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2490
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2491
/* Number of 100 microseconds we wait for PCI Express master disable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2492
#define MASTER_DISABLE_TIMEOUT      800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2493
/* Number of milliseconds we wait for Eeprom auto read bit done after MAC reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2494
#define AUTO_READ_DONE_TIMEOUT      10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2495
/* Number of milliseconds we wait for PHY configuration done after MAC reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2496
#define PHY_CFG_TIMEOUT             100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2497
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2498
#define E1000_TX_BUFFER_SIZE ((u32)1514)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2499
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2500
/* The carrier extension symbol, as received by the NIC. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2501
#define CARRIER_EXTENSION   0x0F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2502
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2503
/* TBI_ACCEPT macro definition:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2504
 *
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2505
 * This macro requires:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2506
 *      adapter = a pointer to struct e1000_hw
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2507
 *      status = the 8 bit status field of the RX descriptor with EOP set
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2508
 *      error = the 8 bit error field of the RX descriptor with EOP set
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2509
 *      length = the sum of all the length fields of the RX descriptors that
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2510
 *               make up the current frame
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2511
 *      last_byte = the last byte of the frame DMAed by the hardware
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2512
 *      max_frame_length = the maximum frame length we want to accept.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2513
 *      min_frame_length = the minimum frame length we want to accept.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2514
 *
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2515
 * This macro is a conditional that should be used in the interrupt
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2516
 * handler's Rx processing routine when RxErrors have been detected.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2517
 *
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2518
 * Typical use:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2519
 *  ...
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2520
 *  if (TBI_ACCEPT) {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2521
 *      accept_frame = true;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2522
 *      e1000_tbi_adjust_stats(adapter, MacAddress);
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2523
 *      frame_length--;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2524
 *  } else {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2525
 *      accept_frame = false;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2526
 *  }
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2527
 *  ...
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2528
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2529
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2530
#define TBI_ACCEPT(adapter, status, errors, length, last_byte) \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2531
    ((adapter)->tbi_compatibility_on && \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2532
     (((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2533
     ((last_byte) == CARRIER_EXTENSION) && \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2534
     (((status) & E1000_RXD_STAT_VP) ? \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2535
          (((length) > ((adapter)->min_frame_size - VLAN_TAG_SIZE)) && \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2536
           ((length) <= ((adapter)->max_frame_size + 1))) : \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2537
          (((length) > (adapter)->min_frame_size) && \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2538
           ((length) <= ((adapter)->max_frame_size + VLAN_TAG_SIZE + 1)))))
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2539
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2540
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2541
/* Structures, enums, and macros for the PHY */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2542
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2543
/* Bit definitions for the Management Data IO (MDIO) and Management Data
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2544
 * Clock (MDC) pins in the Device Control Register.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2545
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2546
#define E1000_CTRL_PHY_RESET_DIR  E1000_CTRL_SWDPIO0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2547
#define E1000_CTRL_PHY_RESET      E1000_CTRL_SWDPIN0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2548
#define E1000_CTRL_MDIO_DIR       E1000_CTRL_SWDPIO2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2549
#define E1000_CTRL_MDIO           E1000_CTRL_SWDPIN2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2550
#define E1000_CTRL_MDC_DIR        E1000_CTRL_SWDPIO3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2551
#define E1000_CTRL_MDC            E1000_CTRL_SWDPIN3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2552
#define E1000_CTRL_PHY_RESET_DIR4 E1000_CTRL_EXT_SDP4_DIR
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2553
#define E1000_CTRL_PHY_RESET4     E1000_CTRL_EXT_SDP4_DATA
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2554
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2555
/* PHY 1000 MII Register/Bit Definitions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2556
/* PHY Registers defined by IEEE */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2557
#define PHY_CTRL         0x00 /* Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2558
#define PHY_STATUS       0x01 /* Status Regiser */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2559
#define PHY_ID1          0x02 /* Phy Id Reg (word 1) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2560
#define PHY_ID2          0x03 /* Phy Id Reg (word 2) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2561
#define PHY_AUTONEG_ADV  0x04 /* Autoneg Advertisement */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2562
#define PHY_LP_ABILITY   0x05 /* Link Partner Ability (Base Page) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2563
#define PHY_AUTONEG_EXP  0x06 /* Autoneg Expansion Reg */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2564
#define PHY_NEXT_PAGE_TX 0x07 /* Next Page TX */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2565
#define PHY_LP_NEXT_PAGE 0x08 /* Link Partner Next Page */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2566
#define PHY_1000T_CTRL   0x09 /* 1000Base-T Control Reg */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2567
#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2568
#define PHY_EXT_STATUS   0x0F /* Extended Status Reg */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2569
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2570
#define MAX_PHY_REG_ADDRESS        0x1F  /* 5 bit address bus (0-0x1F) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2571
#define MAX_PHY_MULTI_PAGE_REG     0xF   /* Registers equal on all pages */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2572
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2573
/* M88E1000 Specific Registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2574
#define M88E1000_PHY_SPEC_CTRL     0x10  /* PHY Specific Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2575
#define M88E1000_PHY_SPEC_STATUS   0x11  /* PHY Specific Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2576
#define M88E1000_INT_ENABLE        0x12  /* Interrupt Enable Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2577
#define M88E1000_INT_STATUS        0x13  /* Interrupt Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2578
#define M88E1000_EXT_PHY_SPEC_CTRL 0x14  /* Extended PHY Specific Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2579
#define M88E1000_RX_ERR_CNTR       0x15  /* Receive Error Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2580
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2581
#define M88E1000_PHY_EXT_CTRL      0x1A  /* PHY extend control register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2582
#define M88E1000_PHY_PAGE_SELECT   0x1D  /* Reg 29 for page number setting */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2583
#define M88E1000_PHY_GEN_CONTROL   0x1E  /* Its meaning depends on reg 29 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2584
#define M88E1000_PHY_VCO_REG_BIT8  0x100 /* Bits 8 & 11 are adjusted for */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2585
#define M88E1000_PHY_VCO_REG_BIT11 0x800    /* improved BER performance */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2586
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2587
#define IGP01E1000_IEEE_REGS_PAGE  0x0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2588
#define IGP01E1000_IEEE_RESTART_AUTONEG 0x3300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2589
#define IGP01E1000_IEEE_FORCE_GIGA      0x0140
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2590
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2591
/* IGP01E1000 Specific Registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2592
#define IGP01E1000_PHY_PORT_CONFIG 0x10 /* PHY Specific Port Config Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2593
#define IGP01E1000_PHY_PORT_STATUS 0x11 /* PHY Specific Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2594
#define IGP01E1000_PHY_PORT_CTRL   0x12 /* PHY Specific Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2595
#define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2596
#define IGP01E1000_GMII_FIFO       0x14 /* GMII FIFO Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2597
#define IGP01E1000_PHY_CHANNEL_QUALITY 0x15 /* PHY Channel Quality Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2598
#define IGP02E1000_PHY_POWER_MGMT      0x19
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2599
#define IGP01E1000_PHY_PAGE_SELECT     0x1F /* PHY Page Select Core Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2600
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2601
/* IGP01E1000 AGC Registers - stores the cable length values*/
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2602
#define IGP01E1000_PHY_AGC_A        0x1172
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2603
#define IGP01E1000_PHY_AGC_B        0x1272
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2604
#define IGP01E1000_PHY_AGC_C        0x1472
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2605
#define IGP01E1000_PHY_AGC_D        0x1872
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2606
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2607
/* IGP02E1000 AGC Registers for cable length values */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2608
#define IGP02E1000_PHY_AGC_A        0x11B1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2609
#define IGP02E1000_PHY_AGC_B        0x12B1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2610
#define IGP02E1000_PHY_AGC_C        0x14B1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2611
#define IGP02E1000_PHY_AGC_D        0x18B1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2612
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2613
/* IGP01E1000 DSP Reset Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2614
#define IGP01E1000_PHY_DSP_RESET   0x1F33
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2615
#define IGP01E1000_PHY_DSP_SET     0x1F71
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2616
#define IGP01E1000_PHY_DSP_FFE     0x1F35
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2617
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2618
#define IGP01E1000_PHY_CHANNEL_NUM    4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2619
#define IGP02E1000_PHY_CHANNEL_NUM    4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2620
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2621
#define IGP01E1000_PHY_AGC_PARAM_A    0x1171
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2622
#define IGP01E1000_PHY_AGC_PARAM_B    0x1271
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2623
#define IGP01E1000_PHY_AGC_PARAM_C    0x1471
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2624
#define IGP01E1000_PHY_AGC_PARAM_D    0x1871
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2625
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2626
#define IGP01E1000_PHY_EDAC_MU_INDEX        0xC000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2627
#define IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS 0x8000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2628
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2629
#define IGP01E1000_PHY_ANALOG_TX_STATE      0x2890
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2630
#define IGP01E1000_PHY_ANALOG_CLASS_A       0x2000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2631
#define IGP01E1000_PHY_FORCE_ANALOG_ENABLE  0x0004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2632
#define IGP01E1000_PHY_DSP_FFE_CM_CP        0x0069
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2633
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2634
#define IGP01E1000_PHY_DSP_FFE_DEFAULT      0x002A
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2635
/* IGP01E1000 PCS Initialization register - stores the polarity status when
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2636
 * speed = 1000 Mbps. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2637
#define IGP01E1000_PHY_PCS_INIT_REG  0x00B4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2638
#define IGP01E1000_PHY_PCS_CTRL_REG  0x00B5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2639
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2640
#define IGP01E1000_ANALOG_REGS_PAGE  0x20C0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2641
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2642
/* Bits...
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2643
 * 15-5: page
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2644
 * 4-0: register offset
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2645
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2646
#define GG82563_PAGE_SHIFT        5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2647
#define GG82563_REG(page, reg)    \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2648
        (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2649
#define GG82563_MIN_ALT_REG       30
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2650
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2651
/* GG82563 Specific Registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2652
#define GG82563_PHY_SPEC_CTRL           \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2653
        GG82563_REG(0, 16) /* PHY Specific Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2654
#define GG82563_PHY_SPEC_STATUS         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2655
        GG82563_REG(0, 17) /* PHY Specific Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2656
#define GG82563_PHY_INT_ENABLE          \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2657
        GG82563_REG(0, 18) /* Interrupt Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2658
#define GG82563_PHY_SPEC_STATUS_2       \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2659
        GG82563_REG(0, 19) /* PHY Specific Status 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2660
#define GG82563_PHY_RX_ERR_CNTR         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2661
        GG82563_REG(0, 21) /* Receive Error Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2662
#define GG82563_PHY_PAGE_SELECT         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2663
        GG82563_REG(0, 22) /* Page Select */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2664
#define GG82563_PHY_SPEC_CTRL_2         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2665
        GG82563_REG(0, 26) /* PHY Specific Control 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2666
#define GG82563_PHY_PAGE_SELECT_ALT     \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2667
        GG82563_REG(0, 29) /* Alternate Page Select */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2668
#define GG82563_PHY_TEST_CLK_CTRL       \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2669
        GG82563_REG(0, 30) /* Test Clock Control (use reg. 29 to select) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2670
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2671
#define GG82563_PHY_MAC_SPEC_CTRL       \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2672
        GG82563_REG(2, 21) /* MAC Specific Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2673
#define GG82563_PHY_MAC_SPEC_CTRL_2     \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2674
        GG82563_REG(2, 26) /* MAC Specific Control 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2675
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2676
#define GG82563_PHY_DSP_DISTANCE    \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2677
        GG82563_REG(5, 26) /* DSP Distance */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2678
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2679
/* Page 193 - Port Control Registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2680
#define GG82563_PHY_KMRN_MODE_CTRL   \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2681
        GG82563_REG(193, 16) /* Kumeran Mode Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2682
#define GG82563_PHY_PORT_RESET          \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2683
        GG82563_REG(193, 17) /* Port Reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2684
#define GG82563_PHY_REVISION_ID         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2685
        GG82563_REG(193, 18) /* Revision ID */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2686
#define GG82563_PHY_DEVICE_ID           \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2687
        GG82563_REG(193, 19) /* Device ID */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2688
#define GG82563_PHY_PWR_MGMT_CTRL       \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2689
        GG82563_REG(193, 20) /* Power Management Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2690
#define GG82563_PHY_RATE_ADAPT_CTRL     \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2691
        GG82563_REG(193, 25) /* Rate Adaptation Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2692
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2693
/* Page 194 - KMRN Registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2694
#define GG82563_PHY_KMRN_FIFO_CTRL_STAT \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2695
        GG82563_REG(194, 16) /* FIFO's Control/Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2696
#define GG82563_PHY_KMRN_CTRL           \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2697
        GG82563_REG(194, 17) /* Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2698
#define GG82563_PHY_INBAND_CTRL         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2699
        GG82563_REG(194, 18) /* Inband Control */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2700
#define GG82563_PHY_KMRN_DIAGNOSTIC     \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2701
        GG82563_REG(194, 19) /* Diagnostic */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2702
#define GG82563_PHY_ACK_TIMEOUTS        \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2703
        GG82563_REG(194, 20) /* Acknowledge Timeouts */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2704
#define GG82563_PHY_ADV_ABILITY         \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2705
        GG82563_REG(194, 21) /* Advertised Ability */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2706
#define GG82563_PHY_LINK_PARTNER_ADV_ABILITY \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2707
        GG82563_REG(194, 23) /* Link Partner Advertised Ability */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2708
#define GG82563_PHY_ADV_NEXT_PAGE       \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2709
        GG82563_REG(194, 24) /* Advertised Next Page */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2710
#define GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2711
        GG82563_REG(194, 25) /* Link Partner Advertised Next page */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2712
#define GG82563_PHY_KMRN_MISC           \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2713
        GG82563_REG(194, 26) /* Misc. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2714
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2715
/* PHY Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2716
#define MII_CR_SPEED_SELECT_MSB 0x0040  /* bits 6,13: 10=1000, 01=100, 00=10 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2717
#define MII_CR_COLL_TEST_ENABLE 0x0080  /* Collision test enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2718
#define MII_CR_FULL_DUPLEX      0x0100  /* FDX =1, half duplex =0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2719
#define MII_CR_RESTART_AUTO_NEG 0x0200  /* Restart auto negotiation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2720
#define MII_CR_ISOLATE          0x0400  /* Isolate PHY from MII */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2721
#define MII_CR_POWER_DOWN       0x0800  /* Power down */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2722
#define MII_CR_AUTO_NEG_EN      0x1000  /* Auto Neg Enable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2723
#define MII_CR_SPEED_SELECT_LSB 0x2000  /* bits 6,13: 10=1000, 01=100, 00=10 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2724
#define MII_CR_LOOPBACK         0x4000  /* 0 = normal, 1 = loopback */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2725
#define MII_CR_RESET            0x8000  /* 0 = normal, 1 = PHY reset */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2726
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2727
/* PHY Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2728
#define MII_SR_EXTENDED_CAPS     0x0001 /* Extended register capabilities */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2729
#define MII_SR_JABBER_DETECT     0x0002 /* Jabber Detected */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2730
#define MII_SR_LINK_STATUS       0x0004 /* Link Status 1 = link */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2731
#define MII_SR_AUTONEG_CAPS      0x0008 /* Auto Neg Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2732
#define MII_SR_REMOTE_FAULT      0x0010 /* Remote Fault Detect */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2733
#define MII_SR_AUTONEG_COMPLETE  0x0020 /* Auto Neg Complete */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2734
#define MII_SR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2735
#define MII_SR_EXTENDED_STATUS   0x0100 /* Ext. status info in Reg 0x0F */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2736
#define MII_SR_100T2_HD_CAPS     0x0200 /* 100T2 Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2737
#define MII_SR_100T2_FD_CAPS     0x0400 /* 100T2 Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2738
#define MII_SR_10T_HD_CAPS       0x0800 /* 10T   Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2739
#define MII_SR_10T_FD_CAPS       0x1000 /* 10T   Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2740
#define MII_SR_100X_HD_CAPS      0x2000 /* 100X  Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2741
#define MII_SR_100X_FD_CAPS      0x4000 /* 100X  Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2742
#define MII_SR_100T4_CAPS        0x8000 /* 100T4 Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2743
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2744
/* Autoneg Advertisement Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2745
#define NWAY_AR_SELECTOR_FIELD 0x0001   /* indicates IEEE 802.3 CSMA/CD */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2746
#define NWAY_AR_10T_HD_CAPS    0x0020   /* 10T   Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2747
#define NWAY_AR_10T_FD_CAPS    0x0040   /* 10T   Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2748
#define NWAY_AR_100TX_HD_CAPS  0x0080   /* 100TX Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2749
#define NWAY_AR_100TX_FD_CAPS  0x0100   /* 100TX Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2750
#define NWAY_AR_100T4_CAPS     0x0200   /* 100T4 Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2751
#define NWAY_AR_PAUSE          0x0400   /* Pause operation desired */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2752
#define NWAY_AR_ASM_DIR        0x0800   /* Asymmetric Pause Direction bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2753
#define NWAY_AR_REMOTE_FAULT   0x2000   /* Remote Fault detected */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2754
#define NWAY_AR_NEXT_PAGE      0x8000   /* Next Page ability supported */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2755
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2756
/* Link Partner Ability Register (Base Page) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2757
#define NWAY_LPAR_SELECTOR_FIELD 0x0000 /* LP protocol selector field */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2758
#define NWAY_LPAR_10T_HD_CAPS    0x0020 /* LP is 10T   Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2759
#define NWAY_LPAR_10T_FD_CAPS    0x0040 /* LP is 10T   Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2760
#define NWAY_LPAR_100TX_HD_CAPS  0x0080 /* LP is 100TX Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2761
#define NWAY_LPAR_100TX_FD_CAPS  0x0100 /* LP is 100TX Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2762
#define NWAY_LPAR_100T4_CAPS     0x0200 /* LP is 100T4 Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2763
#define NWAY_LPAR_PAUSE          0x0400 /* LP Pause operation desired */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2764
#define NWAY_LPAR_ASM_DIR        0x0800 /* LP Asymmetric Pause Direction bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2765
#define NWAY_LPAR_REMOTE_FAULT   0x2000 /* LP has detected Remote Fault */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2766
#define NWAY_LPAR_ACKNOWLEDGE    0x4000 /* LP has rx'd link code word */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2767
#define NWAY_LPAR_NEXT_PAGE      0x8000 /* Next Page ability supported */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2768
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2769
/* Autoneg Expansion Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2770
#define NWAY_ER_LP_NWAY_CAPS      0x0001 /* LP has Auto Neg Capability */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2771
#define NWAY_ER_PAGE_RXD          0x0002 /* LP is 10T   Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2772
#define NWAY_ER_NEXT_PAGE_CAPS    0x0004 /* LP is 10T   Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2773
#define NWAY_ER_LP_NEXT_PAGE_CAPS 0x0008 /* LP is 100TX Half Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2774
#define NWAY_ER_PAR_DETECT_FAULT  0x0010 /* LP is 100TX Full Duplex Capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2775
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2776
/* Next Page TX Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2777
#define NPTX_MSG_CODE_FIELD 0x0001 /* NP msg code or unformatted data */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2778
#define NPTX_TOGGLE         0x0800 /* Toggles between exchanges
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2779
                                    * of different NP
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2780
                                    */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2781
#define NPTX_ACKNOWLDGE2    0x1000 /* 1 = will comply with msg
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2782
                                    * 0 = cannot comply with msg
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2783
                                    */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2784
#define NPTX_MSG_PAGE       0x2000 /* formatted(1)/unformatted(0) pg */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2785
#define NPTX_NEXT_PAGE      0x8000 /* 1 = addition NP will follow
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2786
                                    * 0 = sending last NP
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2787
                                    */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2788
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2789
/* Link Partner Next Page Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2790
#define LP_RNPR_MSG_CODE_FIELD 0x0001 /* NP msg code or unformatted data */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2791
#define LP_RNPR_TOGGLE         0x0800 /* Toggles between exchanges
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2792
                                       * of different NP
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2793
                                       */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2794
#define LP_RNPR_ACKNOWLDGE2    0x1000 /* 1 = will comply with msg
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2795
                                       * 0 = cannot comply with msg
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2796
                                       */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2797
#define LP_RNPR_MSG_PAGE       0x2000  /* formatted(1)/unformatted(0) pg */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2798
#define LP_RNPR_ACKNOWLDGE     0x4000  /* 1 = ACK / 0 = NO ACK */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2799
#define LP_RNPR_NEXT_PAGE      0x8000  /* 1 = addition NP will follow
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2800
                                        * 0 = sending last NP
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2801
                                        */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2802
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2803
/* 1000BASE-T Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2804
#define CR_1000T_ASYM_PAUSE      0x0080 /* Advertise asymmetric pause bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2805
#define CR_1000T_HD_CAPS         0x0100 /* Advertise 1000T HD capability */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2806
#define CR_1000T_FD_CAPS         0x0200 /* Advertise 1000T FD capability  */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2807
#define CR_1000T_REPEATER_DTE    0x0400 /* 1=Repeater/switch device port */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2808
                                        /* 0=DTE device */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2809
#define CR_1000T_MS_VALUE        0x0800 /* 1=Configure PHY as Master */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2810
                                        /* 0=Configure PHY as Slave */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2811
#define CR_1000T_MS_ENABLE       0x1000 /* 1=Master/Slave manual config value */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2812
                                        /* 0=Automatic Master/Slave config */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2813
#define CR_1000T_TEST_MODE_NORMAL 0x0000 /* Normal Operation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2814
#define CR_1000T_TEST_MODE_1     0x2000 /* Transmit Waveform test */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2815
#define CR_1000T_TEST_MODE_2     0x4000 /* Master Transmit Jitter test */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2816
#define CR_1000T_TEST_MODE_3     0x6000 /* Slave Transmit Jitter test */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2817
#define CR_1000T_TEST_MODE_4     0x8000 /* Transmitter Distortion test */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2818
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2819
/* 1000BASE-T Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2820
#define SR_1000T_IDLE_ERROR_CNT   0x00FF /* Num idle errors since last read */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2821
#define SR_1000T_ASYM_PAUSE_DIR   0x0100 /* LP asymmetric pause direction bit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2822
#define SR_1000T_LP_HD_CAPS       0x0400 /* LP is 1000T HD capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2823
#define SR_1000T_LP_FD_CAPS       0x0800 /* LP is 1000T FD capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2824
#define SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2825
#define SR_1000T_LOCAL_RX_STATUS  0x2000 /* Local receiver OK */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2826
#define SR_1000T_MS_CONFIG_RES    0x4000 /* 1=Local TX is Master, 0=Slave */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2827
#define SR_1000T_MS_CONFIG_FAULT  0x8000 /* Master/Slave config fault */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2828
#define SR_1000T_REMOTE_RX_STATUS_SHIFT          12
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2829
#define SR_1000T_LOCAL_RX_STATUS_SHIFT           13
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2830
#define SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT    5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2831
#define FFE_IDLE_ERR_COUNT_TIMEOUT_20            20
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2832
#define FFE_IDLE_ERR_COUNT_TIMEOUT_100           100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2833
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2834
/* Extended Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2835
#define IEEE_ESR_1000T_HD_CAPS 0x1000 /* 1000T HD capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2836
#define IEEE_ESR_1000T_FD_CAPS 0x2000 /* 1000T FD capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2837
#define IEEE_ESR_1000X_HD_CAPS 0x4000 /* 1000X HD capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2838
#define IEEE_ESR_1000X_FD_CAPS 0x8000 /* 1000X FD capable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2839
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2840
#define PHY_TX_POLARITY_MASK   0x0100 /* register 10h bit 8 (polarity bit) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2841
#define PHY_TX_NORMAL_POLARITY 0      /* register 10h bit 8 (normal polarity) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2842
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2843
#define AUTO_POLARITY_DISABLE  0x0010 /* register 11h bit 4 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2844
                                      /* (0=enable, 1=disable) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2845
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2846
/* M88E1000 PHY Specific Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2847
#define M88E1000_PSCR_JABBER_DISABLE    0x0001 /* 1=Jabber Function disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2848
#define M88E1000_PSCR_POLARITY_REVERSAL 0x0002 /* 1=Polarity Reversal enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2849
#define M88E1000_PSCR_SQE_TEST          0x0004 /* 1=SQE Test enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2850
#define M88E1000_PSCR_CLK125_DISABLE    0x0010 /* 1=CLK125 low,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2851
                                                * 0=CLK125 toggling
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2852
                                                */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2853
#define M88E1000_PSCR_MDI_MANUAL_MODE  0x0000  /* MDI Crossover Mode bits 6:5 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2854
                                               /* Manual MDI configuration */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2855
#define M88E1000_PSCR_MDIX_MANUAL_MODE 0x0020  /* Manual MDIX configuration */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2856
#define M88E1000_PSCR_AUTO_X_1000T     0x0040  /* 1000BASE-T: Auto crossover,
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2857
                                                *  100BASE-TX/10BASE-T:
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2858
                                                *  MDI Mode
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2859
                                                */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2860
#define M88E1000_PSCR_AUTO_X_MODE      0x0060  /* Auto crossover enabled
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2861
                                                * all speeds.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2862
                                                */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2863
#define M88E1000_PSCR_10BT_EXT_DIST_ENABLE 0x0080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2864
                                        /* 1=Enable Extended 10BASE-T distance
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2865
                                         * (Lower 10BASE-T RX Threshold)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2866
                                         * 0=Normal 10BASE-T RX Threshold */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2867
#define M88E1000_PSCR_MII_5BIT_ENABLE      0x0100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2868
                                        /* 1=5-Bit interface in 100BASE-TX
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2869
                                         * 0=MII interface in 100BASE-TX */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2870
#define M88E1000_PSCR_SCRAMBLER_DISABLE    0x0200 /* 1=Scrambler disable */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2871
#define M88E1000_PSCR_FORCE_LINK_GOOD      0x0400 /* 1=Force link good */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2872
#define M88E1000_PSCR_ASSERT_CRS_ON_TX     0x0800 /* 1=Assert CRS on Transmit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2873
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2874
#define M88E1000_PSCR_POLARITY_REVERSAL_SHIFT    1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2875
#define M88E1000_PSCR_AUTO_X_MODE_SHIFT          5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2876
#define M88E1000_PSCR_10BT_EXT_DIST_ENABLE_SHIFT 7
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2877
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2878
/* M88E1000 PHY Specific Status Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2879
#define M88E1000_PSSR_JABBER             0x0001 /* 1=Jabber */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2880
#define M88E1000_PSSR_REV_POLARITY       0x0002 /* 1=Polarity reversed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2881
#define M88E1000_PSSR_DOWNSHIFT          0x0020 /* 1=Downshifted */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2882
#define M88E1000_PSSR_MDIX               0x0040 /* 1=MDIX; 0=MDI */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2883
#define M88E1000_PSSR_CABLE_LENGTH       0x0380 /* 0=<50M;1=50-80M;2=80-110M;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2884
                                            * 3=110-140M;4=>140M */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2885
#define M88E1000_PSSR_LINK               0x0400 /* 1=Link up, 0=Link down */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2886
#define M88E1000_PSSR_SPD_DPLX_RESOLVED  0x0800 /* 1=Speed & Duplex resolved */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2887
#define M88E1000_PSSR_PAGE_RCVD          0x1000 /* 1=Page received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2888
#define M88E1000_PSSR_DPLX               0x2000 /* 1=Duplex 0=Half Duplex */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2889
#define M88E1000_PSSR_SPEED              0xC000 /* Speed, bits 14:15 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2890
#define M88E1000_PSSR_10MBS              0x0000 /* 00=10Mbs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2891
#define M88E1000_PSSR_100MBS             0x4000 /* 01=100Mbs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2892
#define M88E1000_PSSR_1000MBS            0x8000 /* 10=1000Mbs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2893
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2894
#define M88E1000_PSSR_REV_POLARITY_SHIFT 1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2895
#define M88E1000_PSSR_DOWNSHIFT_SHIFT    5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2896
#define M88E1000_PSSR_MDIX_SHIFT         6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2897
#define M88E1000_PSSR_CABLE_LENGTH_SHIFT 7
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2898
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2899
/* M88E1000 Extended PHY Specific Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2900
#define M88E1000_EPSCR_FIBER_LOOPBACK 0x4000 /* 1=Fiber loopback */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2901
#define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000 /* 1=Lost lock detect enabled.
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2902
                                              * Will assert lost lock and bring
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2903
                                              * link down if idle not seen
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2904
                                              * within 1ms in 1000BASE-T
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2905
                                              */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2906
/* Number of times we will attempt to autonegotiate before downshifting if we
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2907
 * are the master */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2908
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK 0x0C00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2909
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_1X   0x0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2910
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_2X   0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2911
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_3X   0x0800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2912
#define M88E1000_EPSCR_MASTER_DOWNSHIFT_4X   0x0C00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2913
/* Number of times we will attempt to autonegotiate before downshifting if we
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2914
 * are the slave */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2915
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK  0x0300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2916
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS   0x0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2917
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X    0x0100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2918
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X    0x0200
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2919
#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X    0x0300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2920
#define M88E1000_EPSCR_TX_CLK_2_5     0x0060 /* 2.5 MHz TX_CLK */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2921
#define M88E1000_EPSCR_TX_CLK_25      0x0070 /* 25  MHz TX_CLK */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2922
#define M88E1000_EPSCR_TX_CLK_0       0x0000 /* NO  TX_CLK */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2923
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2924
/* M88EC018 Rev 2 specific DownShift settings */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2925
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK  0x0E00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2926
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X    0x0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2927
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X    0x0200
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2928
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X    0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2929
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X    0x0600
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2930
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X    0x0800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2931
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X    0x0A00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2932
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X    0x0C00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2933
#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X    0x0E00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2934
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2935
/* IGP01E1000 Specific Port Config Register - R/W */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2936
#define IGP01E1000_PSCFR_AUTO_MDIX_PAR_DETECT  0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2937
#define IGP01E1000_PSCFR_PRE_EN                0x0020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2938
#define IGP01E1000_PSCFR_SMART_SPEED           0x0080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2939
#define IGP01E1000_PSCFR_DISABLE_TPLOOPBACK    0x0100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2940
#define IGP01E1000_PSCFR_DISABLE_JABBER        0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2941
#define IGP01E1000_PSCFR_DISABLE_TRANSMIT      0x2000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2942
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2943
/* IGP01E1000 Specific Port Status Register - R/O */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2944
#define IGP01E1000_PSSR_AUTONEG_FAILED         0x0001 /* RO LH SC */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2945
#define IGP01E1000_PSSR_POLARITY_REVERSED      0x0002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2946
#define IGP01E1000_PSSR_CABLE_LENGTH           0x007C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2947
#define IGP01E1000_PSSR_FULL_DUPLEX            0x0200
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2948
#define IGP01E1000_PSSR_LINK_UP                0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2949
#define IGP01E1000_PSSR_MDIX                   0x0800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2950
#define IGP01E1000_PSSR_SPEED_MASK             0xC000 /* speed bits mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2951
#define IGP01E1000_PSSR_SPEED_10MBPS           0x4000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2952
#define IGP01E1000_PSSR_SPEED_100MBPS          0x8000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2953
#define IGP01E1000_PSSR_SPEED_1000MBPS         0xC000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2954
#define IGP01E1000_PSSR_CABLE_LENGTH_SHIFT     0x0002 /* shift right 2 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2955
#define IGP01E1000_PSSR_MDIX_SHIFT             0x000B /* shift right 11 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2956
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2957
/* IGP01E1000 Specific Port Control Register - R/W */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2958
#define IGP01E1000_PSCR_TP_LOOPBACK            0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2959
#define IGP01E1000_PSCR_CORRECT_NC_SCMBLR      0x0200
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2960
#define IGP01E1000_PSCR_TEN_CRS_SELECT         0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2961
#define IGP01E1000_PSCR_FLIP_CHIP              0x0800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2962
#define IGP01E1000_PSCR_AUTO_MDIX              0x1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2963
#define IGP01E1000_PSCR_FORCE_MDI_MDIX         0x2000 /* 0-MDI, 1-MDIX */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2964
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2965
/* IGP01E1000 Specific Port Link Health Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2966
#define IGP01E1000_PLHR_SS_DOWNGRADE           0x8000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2967
#define IGP01E1000_PLHR_GIG_SCRAMBLER_ERROR    0x4000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2968
#define IGP01E1000_PLHR_MASTER_FAULT           0x2000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2969
#define IGP01E1000_PLHR_MASTER_RESOLUTION      0x1000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2970
#define IGP01E1000_PLHR_GIG_REM_RCVR_NOK       0x0800 /* LH */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2971
#define IGP01E1000_PLHR_IDLE_ERROR_CNT_OFLOW   0x0400 /* LH */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2972
#define IGP01E1000_PLHR_DATA_ERR_1             0x0200 /* LH */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2973
#define IGP01E1000_PLHR_DATA_ERR_0             0x0100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2974
#define IGP01E1000_PLHR_AUTONEG_FAULT          0x0040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2975
#define IGP01E1000_PLHR_AUTONEG_ACTIVE         0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2976
#define IGP01E1000_PLHR_VALID_CHANNEL_D        0x0008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2977
#define IGP01E1000_PLHR_VALID_CHANNEL_C        0x0004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2978
#define IGP01E1000_PLHR_VALID_CHANNEL_B        0x0002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2979
#define IGP01E1000_PLHR_VALID_CHANNEL_A        0x0001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2980
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2981
/* IGP01E1000 Channel Quality Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2982
#define IGP01E1000_MSE_CHANNEL_D        0x000F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2983
#define IGP01E1000_MSE_CHANNEL_C        0x00F0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2984
#define IGP01E1000_MSE_CHANNEL_B        0x0F00
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2985
#define IGP01E1000_MSE_CHANNEL_A        0xF000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2986
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2987
#define IGP02E1000_PM_SPD                         0x0001  /* Smart Power Down */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2988
#define IGP02E1000_PM_D3_LPLU                     0x0004  /* Enable LPLU in non-D0a modes */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2989
#define IGP02E1000_PM_D0_LPLU                     0x0002  /* Enable LPLU in D0a mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2990
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2991
/* IGP01E1000 DSP reset macros */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2992
#define DSP_RESET_ENABLE     0x0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2993
#define DSP_RESET_DISABLE    0x2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2994
#define E1000_MAX_DSP_RESETS 10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2995
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2996
/* IGP01E1000 & IGP02E1000 AGC Registers */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2997
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2998
#define IGP01E1000_AGC_LENGTH_SHIFT 7         /* Coarse - 13:11, Fine - 10:7 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  2999
#define IGP02E1000_AGC_LENGTH_SHIFT 9         /* Coarse - 15:13, Fine - 12:9 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3001
/* IGP02E1000 AGC Register Length 9-bit mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3002
#define IGP02E1000_AGC_LENGTH_MASK  0x7F
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3003
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3004
/* 7 bits (3 Coarse + 4 Fine) --> 128 optional values */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3005
#define IGP01E1000_AGC_LENGTH_TABLE_SIZE 128
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3006
#define IGP02E1000_AGC_LENGTH_TABLE_SIZE 113
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3007
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3008
/* The precision error of the cable length is +/- 10 meters */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3009
#define IGP01E1000_AGC_RANGE    10
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3010
#define IGP02E1000_AGC_RANGE    15
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3011
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3012
/* IGP01E1000 PCS Initialization register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3013
/* bits 3:6 in the PCS registers stores the channels polarity */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3014
#define IGP01E1000_PHY_POLARITY_MASK    0x0078
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3015
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3016
/* IGP01E1000 GMII FIFO Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3017
#define IGP01E1000_GMII_FLEX_SPD               0x10 /* Enable flexible speed
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3018
                                                     * on Link-Up */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3019
#define IGP01E1000_GMII_SPD                    0x20 /* Enable SPD */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3021
/* IGP01E1000 Analog Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3022
#define IGP01E1000_ANALOG_SPARE_FUSE_STATUS       0x20D1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3023
#define IGP01E1000_ANALOG_FUSE_STATUS             0x20D0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3024
#define IGP01E1000_ANALOG_FUSE_CONTROL            0x20DC
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3025
#define IGP01E1000_ANALOG_FUSE_BYPASS             0x20DE
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3026
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3027
#define IGP01E1000_ANALOG_FUSE_POLY_MASK            0xF000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3028
#define IGP01E1000_ANALOG_FUSE_FINE_MASK            0x0F80
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3029
#define IGP01E1000_ANALOG_FUSE_COARSE_MASK          0x0070
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3030
#define IGP01E1000_ANALOG_SPARE_FUSE_ENABLED        0x0100
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3031
#define IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL    0x0002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3032
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3033
#define IGP01E1000_ANALOG_FUSE_COARSE_THRESH        0x0040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3034
#define IGP01E1000_ANALOG_FUSE_COARSE_10            0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3035
#define IGP01E1000_ANALOG_FUSE_FINE_1               0x0080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3036
#define IGP01E1000_ANALOG_FUSE_FINE_10              0x0500
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3037
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3038
/* GG82563 PHY Specific Status Register (Page 0, Register 16 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3039
#define GG82563_PSCR_DISABLE_JABBER             0x0001 /* 1=Disable Jabber */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3040
#define GG82563_PSCR_POLARITY_REVERSAL_DISABLE  0x0002 /* 1=Polarity Reversal Disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3041
#define GG82563_PSCR_POWER_DOWN                 0x0004 /* 1=Power Down */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3042
#define GG82563_PSCR_COPPER_TRANSMITER_DISABLE  0x0008 /* 1=Transmitter Disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3043
#define GG82563_PSCR_CROSSOVER_MODE_MASK        0x0060
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3044
#define GG82563_PSCR_CROSSOVER_MODE_MDI         0x0000 /* 00=Manual MDI configuration */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3045
#define GG82563_PSCR_CROSSOVER_MODE_MDIX        0x0020 /* 01=Manual MDIX configuration */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3046
#define GG82563_PSCR_CROSSOVER_MODE_AUTO        0x0060 /* 11=Automatic crossover */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3047
#define GG82563_PSCR_ENALBE_EXTENDED_DISTANCE   0x0080 /* 1=Enable Extended Distance */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3048
#define GG82563_PSCR_ENERGY_DETECT_MASK         0x0300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3049
#define GG82563_PSCR_ENERGY_DETECT_OFF          0x0000 /* 00,01=Off */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3050
#define GG82563_PSCR_ENERGY_DETECT_RX           0x0200 /* 10=Sense on Rx only (Energy Detect) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3051
#define GG82563_PSCR_ENERGY_DETECT_RX_TM        0x0300 /* 11=Sense and Tx NLP */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3052
#define GG82563_PSCR_FORCE_LINK_GOOD            0x0400 /* 1=Force Link Good */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3053
#define GG82563_PSCR_DOWNSHIFT_ENABLE           0x0800 /* 1=Enable Downshift */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3054
#define GG82563_PSCR_DOWNSHIFT_COUNTER_MASK     0x7000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3055
#define GG82563_PSCR_DOWNSHIFT_COUNTER_SHIFT    12
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3056
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3057
/* PHY Specific Status Register (Page 0, Register 17) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3058
#define GG82563_PSSR_JABBER                0x0001 /* 1=Jabber */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3059
#define GG82563_PSSR_POLARITY              0x0002 /* 1=Polarity Reversed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3060
#define GG82563_PSSR_LINK                  0x0008 /* 1=Link is Up */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3061
#define GG82563_PSSR_ENERGY_DETECT         0x0010 /* 1=Sleep, 0=Active */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3062
#define GG82563_PSSR_DOWNSHIFT             0x0020 /* 1=Downshift */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3063
#define GG82563_PSSR_CROSSOVER_STATUS      0x0040 /* 1=MDIX, 0=MDI */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3064
#define GG82563_PSSR_RX_PAUSE_ENABLED      0x0100 /* 1=Receive Pause Enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3065
#define GG82563_PSSR_TX_PAUSE_ENABLED      0x0200 /* 1=Transmit Pause Enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3066
#define GG82563_PSSR_LINK_UP               0x0400 /* 1=Link Up */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3067
#define GG82563_PSSR_SPEED_DUPLEX_RESOLVED 0x0800 /* 1=Resolved */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3068
#define GG82563_PSSR_PAGE_RECEIVED         0x1000 /* 1=Page Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3069
#define GG82563_PSSR_DUPLEX                0x2000 /* 1-Full-Duplex */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3070
#define GG82563_PSSR_SPEED_MASK            0xC000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3071
#define GG82563_PSSR_SPEED_10MBPS          0x0000 /* 00=10Mbps */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3072
#define GG82563_PSSR_SPEED_100MBPS         0x4000 /* 01=100Mbps */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3073
#define GG82563_PSSR_SPEED_1000MBPS        0x8000 /* 10=1000Mbps */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3074
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3075
/* PHY Specific Status Register 2 (Page 0, Register 19) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3076
#define GG82563_PSSR2_JABBER                0x0001 /* 1=Jabber */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3077
#define GG82563_PSSR2_POLARITY_CHANGED      0x0002 /* 1=Polarity Changed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3078
#define GG82563_PSSR2_ENERGY_DETECT_CHANGED 0x0010 /* 1=Energy Detect Changed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3079
#define GG82563_PSSR2_DOWNSHIFT_INTERRUPT   0x0020 /* 1=Downshift Detected */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3080
#define GG82563_PSSR2_MDI_CROSSOVER_CHANGE  0x0040 /* 1=Crossover Changed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3081
#define GG82563_PSSR2_FALSE_CARRIER         0x0100 /* 1=False Carrier */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3082
#define GG82563_PSSR2_SYMBOL_ERROR          0x0200 /* 1=Symbol Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3083
#define GG82563_PSSR2_LINK_STATUS_CHANGED   0x0400 /* 1=Link Status Changed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3084
#define GG82563_PSSR2_AUTO_NEG_COMPLETED    0x0800 /* 1=Auto-Neg Completed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3085
#define GG82563_PSSR2_PAGE_RECEIVED         0x1000 /* 1=Page Received */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3086
#define GG82563_PSSR2_DUPLEX_CHANGED        0x2000 /* 1=Duplex Changed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3087
#define GG82563_PSSR2_SPEED_CHANGED         0x4000 /* 1=Speed Changed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3088
#define GG82563_PSSR2_AUTO_NEG_ERROR        0x8000 /* 1=Auto-Neg Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3089
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3090
/* PHY Specific Control Register 2 (Page 0, Register 26) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3091
#define GG82563_PSCR2_10BT_POLARITY_FORCE           0x0002 /* 1=Force Negative Polarity */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3092
#define GG82563_PSCR2_1000MB_TEST_SELECT_MASK       0x000C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3093
#define GG82563_PSCR2_1000MB_TEST_SELECT_NORMAL     0x0000 /* 00,01=Normal Operation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3094
#define GG82563_PSCR2_1000MB_TEST_SELECT_112NS      0x0008 /* 10=Select 112ns Sequence */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3095
#define GG82563_PSCR2_1000MB_TEST_SELECT_16NS       0x000C /* 11=Select 16ns Sequence */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3096
#define GG82563_PSCR2_REVERSE_AUTO_NEG              0x2000 /* 1=Reverse Auto-Negotiation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3097
#define GG82563_PSCR2_1000BT_DISABLE                0x4000 /* 1=Disable 1000BASE-T */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3098
#define GG82563_PSCR2_TRANSMITER_TYPE_MASK          0x8000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3099
#define GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_B      0x0000 /* 0=Class B */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3100
#define GG82563_PSCR2_TRANSMITTER_TYPE_CLASS_A      0x8000 /* 1=Class A */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3101
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3102
/* MAC Specific Control Register (Page 2, Register 21) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3103
/* Tx clock speed for Link Down and 1000BASE-T for the following speeds */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3104
#define GG82563_MSCR_TX_CLK_MASK                    0x0007
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3105
#define GG82563_MSCR_TX_CLK_10MBPS_2_5MHZ           0x0004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3106
#define GG82563_MSCR_TX_CLK_100MBPS_25MHZ           0x0005
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3107
#define GG82563_MSCR_TX_CLK_1000MBPS_2_5MHZ         0x0006
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3108
#define GG82563_MSCR_TX_CLK_1000MBPS_25MHZ          0x0007
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3109
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3110
#define GG82563_MSCR_ASSERT_CRS_ON_TX               0x0010 /* 1=Assert */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3111
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3112
/* DSP Distance Register (Page 5, Register 26) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3113
#define GG82563_DSPD_CABLE_LENGTH               0x0007 /* 0 = <50M;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3114
                                                          1 = 50-80M;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3115
                                                          2 = 80-110M;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3116
                                                          3 = 110-140M;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3117
                                                          4 = >140M */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3118
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3119
/* Kumeran Mode Control Register (Page 193, Register 16) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3120
#define GG82563_KMCR_PHY_LEDS_EN                    0x0020 /* 1=PHY LEDs, 0=Kumeran Inband LEDs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3121
#define GG82563_KMCR_FORCE_LINK_UP                  0x0040 /* 1=Force Link Up */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3122
#define GG82563_KMCR_SUPPRESS_SGMII_EPD_EXT         0x0080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3123
#define GG82563_KMCR_MDIO_BUS_SPEED_SELECT_MASK     0x0400
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3124
#define GG82563_KMCR_MDIO_BUS_SPEED_SELECT          0x0400 /* 1=6.25MHz, 0=0.8MHz */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3125
#define GG82563_KMCR_PASS_FALSE_CARRIER             0x0800
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3126
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3127
/* Power Management Control Register (Page 193, Register 20) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3128
#define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE         0x0001 /* 1=Enalbe SERDES Electrical Idle */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3129
#define GG82563_PMCR_DISABLE_PORT                   0x0002 /* 1=Disable Port */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3130
#define GG82563_PMCR_DISABLE_SERDES                 0x0004 /* 1=Disable SERDES */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3131
#define GG82563_PMCR_REVERSE_AUTO_NEG               0x0008 /* 1=Enable Reverse Auto-Negotiation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3132
#define GG82563_PMCR_DISABLE_1000_NON_D0            0x0010 /* 1=Disable 1000Mbps Auto-Neg in non D0 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3133
#define GG82563_PMCR_DISABLE_1000                   0x0020 /* 1=Disable 1000Mbps Auto-Neg Always */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3134
#define GG82563_PMCR_REVERSE_AUTO_NEG_D0A           0x0040 /* 1=Enable D0a Reverse Auto-Negotiation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3135
#define GG82563_PMCR_FORCE_POWER_STATE              0x0080 /* 1=Force Power State */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3136
#define GG82563_PMCR_PROGRAMMED_POWER_STATE_MASK    0x0300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3137
#define GG82563_PMCR_PROGRAMMED_POWER_STATE_DR      0x0000 /* 00=Dr */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3138
#define GG82563_PMCR_PROGRAMMED_POWER_STATE_D0U     0x0100 /* 01=D0u */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3139
#define GG82563_PMCR_PROGRAMMED_POWER_STATE_D0A     0x0200 /* 10=D0a */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3140
#define GG82563_PMCR_PROGRAMMED_POWER_STATE_D3      0x0300 /* 11=D3 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3141
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3142
/* In-Band Control Register (Page 194, Register 18) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3143
#define GG82563_ICR_DIS_PADDING                     0x0010 /* Disable Padding Use */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3144
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3145
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3146
/* Bit definitions for valid PHY IDs. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3147
/* I = Integrated
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3148
 * E = External
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3149
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3150
#define M88_VENDOR         0x0141
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3151
#define M88E1000_E_PHY_ID  0x01410C50
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3152
#define M88E1000_I_PHY_ID  0x01410C30
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3153
#define M88E1011_I_PHY_ID  0x01410C20
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3154
#define IGP01E1000_I_PHY_ID  0x02A80380
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3155
#define M88E1000_12_PHY_ID M88E1000_E_PHY_ID
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3156
#define M88E1000_14_PHY_ID M88E1000_E_PHY_ID
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3157
#define M88E1011_I_REV_4   0x04
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3158
#define M88E1111_I_PHY_ID  0x01410CC0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3159
#define L1LXT971A_PHY_ID   0x001378E0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3160
#define GG82563_E_PHY_ID   0x01410CA0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3161
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3162
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3163
/* Bits...
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3164
 * 15-5: page
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3165
 * 4-0: register offset
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3166
 */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3167
#define PHY_PAGE_SHIFT        5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3168
#define PHY_REG(page, reg)    \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3169
        (((page) << PHY_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3170
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3171
#define IGP3_PHY_PORT_CTRL           \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3172
        PHY_REG(769, 17) /* Port General Configuration */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3173
#define IGP3_PHY_RATE_ADAPT_CTRL \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3174
        PHY_REG(769, 25) /* Rate Adapter Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3175
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3176
#define IGP3_KMRN_FIFO_CTRL_STATS \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3177
        PHY_REG(770, 16) /* KMRN FIFO's control/status register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3178
#define IGP3_KMRN_POWER_MNG_CTRL \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3179
        PHY_REG(770, 17) /* KMRN Power Management Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3180
#define IGP3_KMRN_INBAND_CTRL \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3181
        PHY_REG(770, 18) /* KMRN Inband Control Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3182
#define IGP3_KMRN_DIAG \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3183
        PHY_REG(770, 19) /* KMRN Diagnostic register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3184
#define IGP3_KMRN_DIAG_PCS_LOCK_LOSS 0x0002 /* RX PCS is not synced */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3185
#define IGP3_KMRN_ACK_TIMEOUT \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3186
        PHY_REG(770, 20) /* KMRN Acknowledge Timeouts register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3187
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3188
#define IGP3_VR_CTRL \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3189
        PHY_REG(776, 18) /* Voltage regulator control register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3190
#define IGP3_VR_CTRL_MODE_SHUT       0x0200 /* Enter powerdown, shutdown VRs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3191
#define IGP3_VR_CTRL_MODE_MASK       0x0300 /* Shutdown VR Mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3192
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3193
#define IGP3_CAPABILITY \
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3194
        PHY_REG(776, 19) /* IGP3 Capability Register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3195
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3196
/* Capabilities for SKU Control  */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3197
#define IGP3_CAP_INITIATE_TEAM       0x0001 /* Able to initiate a team */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3198
#define IGP3_CAP_WFM                 0x0002 /* Support WoL and PXE */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3199
#define IGP3_CAP_ASF                 0x0004 /* Support ASF */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3200
#define IGP3_CAP_LPLU                0x0008 /* Support Low Power Link Up */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3201
#define IGP3_CAP_DC_AUTO_SPEED       0x0010 /* Support AC/DC Auto Link Speed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3202
#define IGP3_CAP_SPD                 0x0020 /* Support Smart Power Down */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3203
#define IGP3_CAP_MULT_QUEUE          0x0040 /* Support 2 tx & 2 rx queues */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3204
#define IGP3_CAP_RSS                 0x0080 /* Support RSS */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3205
#define IGP3_CAP_8021PQ              0x0100 /* Support 802.1Q & 802.1p */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3206
#define IGP3_CAP_AMT_CB              0x0200 /* Support active manageability and circuit breaker */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3207
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3208
#define IGP3_PPC_JORDAN_EN           0x0001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3209
#define IGP3_PPC_JORDAN_GIGA_SPEED   0x0002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3210
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3211
#define IGP3_KMRN_PMC_EE_IDLE_LINK_DIS         0x0001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3212
#define IGP3_KMRN_PMC_K0S_ENTRY_LATENCY_MASK   0x001E
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3213
#define IGP3_KMRN_PMC_K0S_MODE1_EN_GIGA        0x0020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3214
#define IGP3_KMRN_PMC_K0S_MODE1_EN_100         0x0040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3215
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3216
#define IGP3E1000_PHY_MISC_CTRL                0x1B   /* Misc. Ctrl register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3217
#define IGP3_PHY_MISC_DUPLEX_MANUAL_SET        0x1000 /* Duplex Manual Set */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3218
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3219
#define IGP3_KMRN_EXT_CTRL  PHY_REG(770, 18)
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3220
#define IGP3_KMRN_EC_DIS_INBAND    0x0080
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3221
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3222
#define IGP03E1000_E_PHY_ID  0x02A80390
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3223
#define IFE_E_PHY_ID         0x02A80330 /* 10/100 PHY */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3224
#define IFE_PLUS_E_PHY_ID    0x02A80320
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3225
#define IFE_C_E_PHY_ID       0x02A80310
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3226
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3227
#define IFE_PHY_EXTENDED_STATUS_CONTROL   0x10  /* 100BaseTx Extended Status, Control and Address */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3228
#define IFE_PHY_SPECIAL_CONTROL           0x11  /* 100BaseTx PHY special control register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3229
#define IFE_PHY_RCV_FALSE_CARRIER         0x13  /* 100BaseTx Receive False Carrier Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3230
#define IFE_PHY_RCV_DISCONNECT            0x14  /* 100BaseTx Receive Disconnet Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3231
#define IFE_PHY_RCV_ERROT_FRAME           0x15  /* 100BaseTx Receive Error Frame Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3232
#define IFE_PHY_RCV_SYMBOL_ERR            0x16  /* Receive Symbol Error Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3233
#define IFE_PHY_PREM_EOF_ERR              0x17  /* 100BaseTx Receive Premature End Of Frame Error Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3234
#define IFE_PHY_RCV_EOF_ERR               0x18  /* 10BaseT Receive End Of Frame Error Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3235
#define IFE_PHY_TX_JABBER_DETECT          0x19  /* 10BaseT Transmit Jabber Detect Counter */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3236
#define IFE_PHY_EQUALIZER                 0x1A  /* PHY Equalizer Control and Status */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3237
#define IFE_PHY_SPECIAL_CONTROL_LED       0x1B  /* PHY special control and LED configuration */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3238
#define IFE_PHY_MDIX_CONTROL              0x1C  /* MDI/MDI-X Control register */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3239
#define IFE_PHY_HWI_CONTROL               0x1D  /* Hardware Integrity Control (HWI) */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3240
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3241
#define IFE_PESC_REDUCED_POWER_DOWN_DISABLE  0x2000  /* Defaut 1 = Disable auto reduced power down */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3242
#define IFE_PESC_100BTX_POWER_DOWN           0x0400  /* Indicates the power state of 100BASE-TX */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3243
#define IFE_PESC_10BTX_POWER_DOWN            0x0200  /* Indicates the power state of 10BASE-T */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3244
#define IFE_PESC_POLARITY_REVERSED           0x0100  /* Indicates 10BASE-T polarity */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3245
#define IFE_PESC_PHY_ADDR_MASK               0x007C  /* Bit 6:2 for sampled PHY address */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3246
#define IFE_PESC_SPEED                       0x0002  /* Auto-negotiation speed result 1=100Mbs, 0=10Mbs */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3247
#define IFE_PESC_DUPLEX                      0x0001  /* Auto-negotiation duplex result 1=Full, 0=Half */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3248
#define IFE_PESC_POLARITY_REVERSED_SHIFT     8
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3249
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3250
#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN   0x0100  /* 1 = Dyanmic Power Down disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3251
#define IFE_PSC_FORCE_POLARITY               0x0020  /* 1=Reversed Polarity, 0=Normal */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3252
#define IFE_PSC_AUTO_POLARITY_DISABLE        0x0010  /* 1=Auto Polarity Disabled, 0=Enabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3253
#define IFE_PSC_JABBER_FUNC_DISABLE          0x0001  /* 1=Jabber Disabled, 0=Normal Jabber Operation */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3254
#define IFE_PSC_FORCE_POLARITY_SHIFT         5
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3255
#define IFE_PSC_AUTO_POLARITY_DISABLE_SHIFT  4
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3256
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3257
#define IFE_PMC_AUTO_MDIX                    0x0080  /* 1=enable MDI/MDI-X feature, default 0=disabled */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3258
#define IFE_PMC_FORCE_MDIX                   0x0040  /* 1=force MDIX-X, 0=force MDI */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3259
#define IFE_PMC_MDIX_STATUS                  0x0020  /* 1=MDI-X, 0=MDI */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3260
#define IFE_PMC_AUTO_MDIX_COMPLETE           0x0010  /* Resolution algorithm is completed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3261
#define IFE_PMC_MDIX_MODE_SHIFT              6
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3262
#define IFE_PHC_MDIX_RESET_ALL_MASK          0x0000  /* Disable auto MDI-X */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3263
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3264
#define IFE_PHC_HWI_ENABLE                   0x8000  /* Enable the HWI feature */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3265
#define IFE_PHC_ABILITY_CHECK                0x4000  /* 1= Test Passed, 0=failed */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3266
#define IFE_PHC_TEST_EXEC                    0x2000  /* PHY launch test pulses on the wire */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3267
#define IFE_PHC_HIGHZ                        0x0200  /* 1 = Open Circuit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3268
#define IFE_PHC_LOWZ                         0x0400  /* 1 = Short Circuit */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3269
#define IFE_PHC_LOW_HIGH_Z_MASK              0x0600  /* Mask for indication type of problem on the line */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3270
#define IFE_PHC_DISTANCE_MASK                0x01FF  /* Mask for distance to the cable problem, in 80cm granularity */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3271
#define IFE_PHC_RESET_ALL_MASK               0x0000  /* Disable HWI */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3272
#define IFE_PSCL_PROBE_MODE                  0x0020  /* LED Probe mode */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3273
#define IFE_PSCL_PROBE_LEDS_OFF              0x0006  /* Force LEDs 0 and 2 off */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3274
#define IFE_PSCL_PROBE_LEDS_ON               0x0007  /* Force LEDs 0 and 2 on */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3275
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3276
#define ICH_FLASH_COMMAND_TIMEOUT            5000    /* 5000 uSecs - adjusted */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3277
#define ICH_FLASH_ERASE_TIMEOUT              3000000 /* Up to 3 seconds - worst case */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3278
#define ICH_FLASH_CYCLE_REPEAT_COUNT         10      /* 10 cycles */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3279
#define ICH_FLASH_SEG_SIZE_256               256
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3280
#define ICH_FLASH_SEG_SIZE_4K                4096
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3281
#define ICH_FLASH_SEG_SIZE_64K               65536
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3282
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3283
#define ICH_CYCLE_READ                       0x0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3284
#define ICH_CYCLE_RESERVED                   0x1
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3285
#define ICH_CYCLE_WRITE                      0x2
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3286
#define ICH_CYCLE_ERASE                      0x3
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3287
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3288
#define ICH_FLASH_GFPREG   0x0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3289
#define ICH_FLASH_HSFSTS   0x0004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3290
#define ICH_FLASH_HSFCTL   0x0006
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3291
#define ICH_FLASH_FADDR    0x0008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3292
#define ICH_FLASH_FDATA0   0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3293
#define ICH_FLASH_FRACC    0x0050
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3294
#define ICH_FLASH_FREG0    0x0054
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3295
#define ICH_FLASH_FREG1    0x0058
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3296
#define ICH_FLASH_FREG2    0x005C
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3297
#define ICH_FLASH_FREG3    0x0060
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3298
#define ICH_FLASH_FPR0     0x0074
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3299
#define ICH_FLASH_FPR1     0x0078
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3300
#define ICH_FLASH_SSFSTS   0x0090
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3301
#define ICH_FLASH_SSFCTL   0x0092
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3302
#define ICH_FLASH_PREOP    0x0094
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3303
#define ICH_FLASH_OPTYPE   0x0096
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3304
#define ICH_FLASH_OPMENU   0x0098
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3305
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3306
#define ICH_FLASH_REG_MAPSIZE      0x00A0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3307
#define ICH_FLASH_SECTOR_SIZE      4096
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3308
#define ICH_GFPREG_BASE_MASK       0x1FFF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3309
#define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3310
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3311
/* ICH8 GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3312
/* Offset 04h HSFSTS */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3313
union ich8_hws_flash_status {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3314
    struct ich8_hsfsts {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3315
#ifdef __BIG_ENDIAN
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3316
        u16 reserved2      :6;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3317
        u16 fldesvalid     :1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3318
        u16 flockdn        :1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3319
        u16 flcdone        :1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3320
        u16 flcerr         :1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3321
        u16 dael           :1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3322
        u16 berasesz       :2;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3323
        u16 flcinprog      :1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3324
        u16 reserved1      :2;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3325
#else
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3326
        u16 flcdone        :1;   /* bit 0 Flash Cycle Done */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3327
        u16 flcerr         :1;   /* bit 1 Flash Cycle Error */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3328
        u16 dael           :1;   /* bit 2 Direct Access error Log */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3329
        u16 berasesz       :2;   /* bit 4:3 Block/Sector Erase Size */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3330
        u16 flcinprog      :1;   /* bit 5 flash SPI cycle in Progress */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3331
        u16 reserved1      :2;   /* bit 13:6 Reserved */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3332
        u16 reserved2      :6;   /* bit 13:6 Reserved */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3333
        u16 fldesvalid     :1;   /* bit 14 Flash Descriptor Valid */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3334
        u16 flockdn        :1;   /* bit 15 Flash Configuration Lock-Down */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3335
#endif
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3336
    } hsf_status;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3337
    u16 regval;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3338
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3339
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3340
/* ICH8 GbE Flash Hardware Sequencing Flash control Register bit breakdown */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3341
/* Offset 06h FLCTL */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3342
union ich8_hws_flash_ctrl {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3343
    struct ich8_hsflctl {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3344
#ifdef __BIG_ENDIAN
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3345
        u16 fldbcount      :2;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3346
        u16 flockdn        :6;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3347
        u16 flcgo          :1;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3348
        u16 flcycle        :2;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3349
        u16 reserved       :5;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3350
#else
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3351
        u16 flcgo          :1;   /* 0 Flash Cycle Go */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3352
        u16 flcycle        :2;   /* 2:1 Flash Cycle */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3353
        u16 reserved       :5;   /* 7:3 Reserved  */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3354
        u16 fldbcount      :2;   /* 9:8 Flash Data Byte Count */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3355
        u16 flockdn        :6;   /* 15:10 Reserved */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3356
#endif
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3357
    } hsf_ctrl;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3358
    u16 regval;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3359
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3360
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3361
/* ICH8 Flash Region Access Permissions */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3362
union ich8_hws_flash_regacc {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3363
    struct ich8_flracc {
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3364
#ifdef __BIG_ENDIAN
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3365
        u32 gmwag          :8;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3366
        u32 gmrag          :8;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3367
        u32 grwa           :8;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3368
        u32 grra           :8;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3369
#else
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3370
        u32 grra           :8;   /* 0:7 GbE region Read Access */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3371
        u32 grwa           :8;   /* 8:15 GbE region Write Access */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3372
        u32 gmrag          :8;   /* 23:16 GbE Master Read Access Grant  */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3373
        u32 gmwag          :8;   /* 31:24 GbE Master Write Access Grant */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3374
#endif
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3375
    } hsf_flregacc;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3376
    u16 regval;
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3377
};
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3378
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3379
/* Miscellaneous PHY bit definitions. */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3380
#define PHY_PREAMBLE        0xFFFFFFFF
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3381
#define PHY_SOF             0x01
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3382
#define PHY_OP_READ         0x02
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3383
#define PHY_OP_WRITE        0x01
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3384
#define PHY_TURNAROUND      0x02
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3385
#define PHY_PREAMBLE_SIZE   32
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3386
#define MII_CR_SPEED_1000   0x0040
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3387
#define MII_CR_SPEED_100    0x2000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3388
#define MII_CR_SPEED_10     0x0000
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3389
#define E1000_PHY_ADDRESS   0x01
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3390
#define PHY_AUTO_NEG_TIME   45  /* 4.5 Seconds */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3391
#define PHY_FORCE_TIME      20  /* 2.0 Seconds */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3392
#define PHY_REVISION_MASK   0xFFFFFFF0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3393
#define DEVICE_SPEED_MASK   0x00000300  /* Device Ctrl Reg Speed Mask */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3394
#define REG4_SPEED_MASK     0x01E0
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3395
#define REG9_SPEED_MASK     0x0300
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3396
#define ADVERTISE_10_HALF   0x0001
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3397
#define ADVERTISE_10_FULL   0x0002
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3398
#define ADVERTISE_100_HALF  0x0004
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3399
#define ADVERTISE_100_FULL  0x0008
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3400
#define ADVERTISE_1000_HALF 0x0010
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3401
#define ADVERTISE_1000_FULL 0x0020
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3402
#define AUTONEG_ADVERTISE_SPEED_DEFAULT 0x002F  /* Everything but 1000-Half */
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3403
#define AUTONEG_ADVERTISE_10_100_ALL    0x000F /* All 10/100 speeds*/
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3404
#define AUTONEG_ADVERTISE_10_ALL        0x0003 /* 10Mbps Full & Half speeds*/
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3405
4adb56c4198d Add e1000 for 2.6.29
Andreas Stewering-Bone <ab@igh-essen.com>
parents:
diff changeset
  3406
#endif /* _E1000_HW_H_ */