| author | Florian Pose <fp@igh-essen.com> |
| Fri, 28 Oct 2005 15:12:27 +0000 | |
| changeset 2 | b0a7a4745bf9 |
| parent 1 | 98acc19c7594 |
| child 3 | 3ea74844c2df |
| permissions | -rw-r--r-- |
| 0 | 1 |
/****************************************************************************** |
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* |
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* drv_8139too.c |
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* |
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* EtherCAT-Treiber für RTL8139-kompatible Netzwerkkarten. |
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* |
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* Autoren: Wilhelm Hagemeister, Florian Pose |
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* |
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* $Date$ |
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* $Author$ |
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* |
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* (C) Copyright IgH 2005 |
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* Ingenieurgemeinschaft IgH |
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* Heinz-Bäcker Str. 34 |
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* D-45356 Essen |
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* Tel.: +49 201/61 99 31 |
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* Fax.: +49 201/61 98 36 |
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* E-mail: sp@igh-essen.com |
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* |
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******************************************************************************/ |
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/* |
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8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. |
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Maintained by Jeff Garzik <jgarzik@mandrakesoft.com> |
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Copyright 2000-2002 Jeff Garzik |
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Much code comes from Donald Becker's rtl8139.c driver, |
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versions 1.13 and older. This driver was originally based |
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on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: |
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-----<snip>----- |
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Written 1997-2001 by Donald Becker. |
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This software may be used and distributed according to the |
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terms of the GNU General Public License (GPL), incorporated |
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herein by reference. Drivers based on or derived from this |
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code fall under the GPL and must retain the authorship, |
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copyright and license notice. This file is not a complete |
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program and may only be used when the entire operating |
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system is licensed under the GPL. |
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This driver is for boards based on the RTL8129 and RTL8139 |
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PCI ethernet chips. |
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The author may be reached as becker@scyld.com, or C/O Scyld |
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Computing Corporation 410 Severn Ave., Suite 210 Annapolis |
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MD 21403 |
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Support and updates available at |
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http://www.scyld.com/network/rtl8139.html |
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Twister-tuning table provided by Kinston |
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<shangh@realtek.com.tw>. |
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-----<snip>----- |
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This software may be used and distributed according to the terms |
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of the GNU General Public License, incorporated herein by reference. |
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Contributors: |
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Donald Becker - he wrote the original driver, kudos to him! |
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(but please don't e-mail him for support, this isn't his driver) |
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Tigran Aivazian - bug fixes, skbuff free cleanup |
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Martin Mares - suggestions for PCI cleanup |
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David S. Miller - PCI DMA and softnet updates |
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Ernst Gill - fixes ported from BSD driver |
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Daniel Kobras - identified specific locations of |
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posted MMIO write bugginess |
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Gerard Sharp - bug fix, testing and feedback |
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David Ford - Rx ring wrap fix |
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Dan DeMaggio - swapped RTL8139 cards with me, and allowed me |
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to find and fix a crucial bug on older chipsets. |
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Donald Becker/Chris Butterworth/Marcus Westergren - |
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Noticed various Rx packet size-related buglets. |
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Santiago Garcia Mantinan - testing and feedback |
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Jens David - 2.2.x kernel backports |
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Martin Dennett - incredibly helpful insight on undocumented |
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features of the 8139 chips |
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Jean-Jacques Michel - bug fix |
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Tobias Ringström - Rx interrupt status checking suggestion |
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Andrew Morton - Clear blocked signals, avoid |
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buffer overrun setting current->comm. |
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Kalle Olavi Niemitalo - Wake-on-LAN ioctls |
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Robert Kuebel - Save kernel thread from dying on any signal. |
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Submitting bug reports: |
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"rtl8139-diag -mmmaaavvveefN" output |
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enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log |
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See 8139too.txt for more details. |
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*/ |
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#define DRV_NAME "8139too_ecat" |
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#define DRV_VERSION "0.9.26" |
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#include <linux/config.h> |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/compiler.h> |
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#include <linux/pci.h> |
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#include <linux/init.h> |
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#include <linux/ioport.h> |
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#include <linux/netdevice.h> |
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#include <linux/etherdevice.h> |
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#include <linux/rtnetlink.h> |
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#include <linux/delay.h> |
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#include <linux/ethtool.h> |
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#include <linux/mii.h> |
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#include <linux/completion.h> |
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#include <linux/crc32.h> |
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#include <asm/io.h> |
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#include <asm/uaccess.h> |
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/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
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#include "ec_device.h" |
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#include <rtai.h> |
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#include <linux/delay.h> |
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#include "ec_dbg.h" |
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/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
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#define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION |
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#define PFX DRV_NAME ": " |
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/* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */ |
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#ifdef CONFIG_8139TOO_PIO |
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#define USE_IO_OPS 1 |
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#endif |
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/* define to 1 to enable copious debugging info */ |
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//#define RTL8139_DEBUG 1 |
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#undef RTL8139_DEBUG |
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/* define to 1 to disable lightweight runtime debugging checks */ |
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#undef RTL8139_NDEBUG |
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#ifdef RTL8139_DEBUG |
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/* note: prints function name for you */ |
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# define DPRINTK(fmt, args...) EC_DBG(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) |
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#else |
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# define DPRINTK(fmt, args...) |
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#endif |
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#ifdef RTL8139_NDEBUG |
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# define assert(expr) do {} while (0)
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#else |
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# define assert(expr) \ |
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if(!(expr)) { \
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printk( "Assertion failed! %s,%s,%s,line=%d\n", \ |
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#expr,__FILE__,__FUNCTION__,__LINE__); \ |
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} |
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#endif |
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/* A few user-configurable values. */ |
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/* media options */ |
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#define MAX_UNITS 8 |
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static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
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static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
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/* Maximum events (Rx packets, etc.) to handle at each interrupt. */ |
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static int max_interrupt_work = 20; |
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/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). |
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The RTL chips use a 64 element hash table based on the Ethernet CRC. */ |
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static int multicast_filter_limit = 32; |
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/* bitmapped message enable number */ |
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static int debug = -1; |
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/* Size of the in-memory receive ring. */ |
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#define RX_BUF_LEN_IDX 2 /* 0==8K, 1==16K, 2==32K, 3==64K */ |
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#define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) |
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#define RX_BUF_PAD 16 |
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#define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ |
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#define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) |
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/* Number of Tx descriptor registers. */ |
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#define NUM_TX_DESC 4 |
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/* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ |
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#define MAX_ETH_FRAME_SIZE 1536 |
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/* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ |
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#define TX_BUF_SIZE MAX_ETH_FRAME_SIZE |
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#define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) |
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/* PCI Tuning Parameters |
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Threshold is bytes transferred to chip before transmission starts. */ |
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#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ |
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/* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ |
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#define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ |
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#define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ |
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#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
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#define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ |
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/* Operational parameters that usually are not changed. */ |
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/* Time in jiffies before concluding the transmitter is hung. */ |
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#define TX_TIMEOUT (6*HZ) |
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enum {
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HAS_MII_XCVR = 0x010000, |
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HAS_CHIP_XCVR = 0x020000, |
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HAS_LNK_CHNG = 0x040000, |
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}; |
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#define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ |
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#define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ |
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#define RTL_MIN_IO_SIZE 0x80 |
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#define RTL8139B_IO_SIZE 256 |
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#define RTL8129_CAPS HAS_MII_XCVR |
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#define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG |
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typedef enum {
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RTL8139 = 0, |
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RTL8139_CB, |
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SMC1211TX, |
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/*MPX5030,*/ |
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DELTA8139, |
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ADDTRON8139, |
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DFE538TX, |
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DFE690TXD, |
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FE2000VX, |
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ALLIED8139, |
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RTL8129, |
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FNW3603TX, |
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FNW3800TX, |
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} board_t; |
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/* indexed by board_t, above */ |
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static struct {
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const char *name; |
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u32 hw_flags; |
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} board_info[] __devinitdata = {
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{ "RealTek RTL8139 Fast Ethernet", RTL8139_CAPS },
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{ "RealTek RTL8139B PCI/CardBus", RTL8139_CAPS },
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{ "SMC1211TX EZCard 10/100 (RealTek RTL8139)", RTL8139_CAPS },
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/* { MPX5030, "Accton MPX5030 (RealTek RTL8139)", RTL8139_CAPS },*/
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{ "Delta Electronics 8139 10/100BaseTX", RTL8139_CAPS },
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{ "Addtron Technolgy 8139 10/100BaseTX", RTL8139_CAPS },
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{ "D-Link DFE-538TX (RealTek RTL8139)", RTL8139_CAPS },
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{ "D-Link DFE-690TXD (RealTek RTL8139)", RTL8139_CAPS },
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{ "AboCom FE2000VX (RealTek RTL8139)", RTL8139_CAPS },
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{ "Allied Telesyn 8139 CardBus", RTL8139_CAPS },
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{ "RealTek RTL8129", RTL8129_CAPS },
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{ "Planex FNW-3603-TX 10/100 CardBus", RTL8139_CAPS },
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{ "Planex FNW-3800-TX 10/100 CardBus", RTL8139_CAPS },
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}; |
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static struct pci_device_id rtl8139_pci_tbl[] __devinitdata = {
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{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
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{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139_CB },
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{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SMC1211TX },
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/* {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MPX5030 },*/
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{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DELTA8139 },
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{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ADDTRON8139 },
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{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE538TX },
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{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE690TXD },
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{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FE2000VX },
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{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALLIED8139 },
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{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FNW3603TX },
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{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FNW3800TX },
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#ifdef CONFIG_8139TOO_8129 |
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{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
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#endif |
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/* some crazy cards report invalid vendor ids like |
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* 0x0001 here. The other ids are valid and constant, |
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* so we simply don't match on the main vendor id. |
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*/ |
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{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
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{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, DFE538TX },
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{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, FE2000VX },
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{0,}
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}; |
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MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); |
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static struct {
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const char str[ETH_GSTRING_LEN]; |
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} ethtool_stats_keys[] = {
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{ "early_rx" },
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{ "tx_buf_mapped" },
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{ "tx_timeouts" },
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{ "rx_lost_in_ring" },
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}; |
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/* The rest of these values should never change. */ |
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/* Symbolic offsets to registers. */ |
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enum RTL8139_registers {
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MAC0 = 0, /* Ethernet hardware address. */ |
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MAR0 = 8, /* Multicast filter. */ |
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TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ |
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TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ |
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RxBuf = 0x30, |
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ChipCmd = 0x37, |
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RxBufPtr = 0x38, |
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RxBufAddr = 0x3A, |
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IntrMask = 0x3C, |
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IntrStatus = 0x3E, |
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TxConfig = 0x40, |
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ChipVersion = 0x43, |
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RxConfig = 0x44, |
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Timer = 0x48, /* A general-purpose counter. */ |
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RxMissed = 0x4C, /* 24 bits valid, write clears. */ |
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Cfg9346 = 0x50, |
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Config0 = 0x51, |
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Config1 = 0x52, |
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FlashReg = 0x54, |
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MediaStatus = 0x58, |
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Config3 = 0x59, |
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Config4 = 0x5A, /* absent on RTL-8139A */ |
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HltClk = 0x5B, |
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MultiIntr = 0x5C, |
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TxSummary = 0x60, |
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BasicModeCtrl = 0x62, |
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BasicModeStatus = 0x64, |
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NWayAdvert = 0x66, |
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NWayLPAR = 0x68, |
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NWayExpansion = 0x6A, |
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/* Undocumented registers, but required for proper operation. */ |
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FIFOTMS = 0x70, /* FIFO Control and test. */ |
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CSCR = 0x74, /* Chip Status and Configuration Register. */ |
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PARA78 = 0x78, |
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PARA7c = 0x7c, /* Magic transceiver parameter register. */ |
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Config5 = 0xD8, /* absent on RTL-8139A */ |
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}; |
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||
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enum ClearBitMasks {
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MultiIntrClear = 0xF000, |
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ChipCmdClear = 0xE2, |
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Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), |
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}; |
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enum ChipCmdBits {
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CmdReset = 0x10, |
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CmdRxEnb = 0x08, |
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CmdTxEnb = 0x04, |
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RxBufEmpty = 0x01, |
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}; |
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||
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/* Interrupt register bits, using my own meaningful names. */ |
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enum IntrStatusBits {
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PCIErr = 0x8000, |
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PCSTimeout = 0x4000, |
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RxFIFOOver = 0x40, |
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RxUnderrun = 0x20, |
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RxOverflow = 0x10, |
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TxErr = 0x08, |
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TxOK = 0x04, |
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RxErr = 0x02, |
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RxOK = 0x01, |
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||
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RxAckBits = RxFIFOOver | RxOverflow | RxOK, |
|
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}; |
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||
389 |
enum TxStatusBits {
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TxHostOwns = 0x2000, |
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TxUnderrun = 0x4000, |
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TxStatOK = 0x8000, |
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TxOutOfWindow = 0x20000000, |
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TxAborted = 0x40000000, |
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TxCarrierLost = 0x80000000, |
|
396 |
}; |
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397 |
enum RxStatusBits {
|
|
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RxMulticast = 0x8000, |
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RxPhysical = 0x4000, |
|
400 |
RxBroadcast = 0x2000, |
|
401 |
RxBadSymbol = 0x0020, |
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RxRunt = 0x0010, |
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403 |
RxTooLong = 0x0008, |
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RxCRCErr = 0x0004, |
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RxBadAlign = 0x0002, |
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RxStatusOK = 0x0001, |
|
407 |
}; |
|
408 |
||
409 |
/* Bits in RxConfig. */ |
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410 |
enum rx_mode_bits {
|
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411 |
AcceptErr = 0x20, |
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AcceptRunt = 0x10, |
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413 |
AcceptBroadcast = 0x08, |
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414 |
AcceptMulticast = 0x04, |
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415 |
AcceptMyPhys = 0x02, |
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416 |
AcceptAllPhys = 0x01, |
|
417 |
}; |
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418 |
||
419 |
/* Bits in TxConfig. */ |
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420 |
enum tx_config_bits {
|
|
421 |
TxIFG1 = (1 << 25), /* Interframe Gap Time */ |
|
422 |
TxIFG0 = (1 << 24), /* Enabling these bits violates IEEE 802.3 */ |
|
423 |
TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ |
|
424 |
TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */ |
|
425 |
TxClearAbt = (1 << 0), /* Clear abort (WO) */ |
|
426 |
TxDMAShift = 8, /* DMA burst value (0-7) is shifted this many bits */ |
|
427 |
TxRetryShift = 4, /* TXRR value (0-15) is shifted this many bits */ |
|
428 |
||
429 |
TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ |
|
430 |
}; |
|
431 |
||
432 |
/* Bits in Config1 */ |
|
433 |
enum Config1Bits {
|
|
434 |
Cfg1_PM_Enable = 0x01, |
|
435 |
Cfg1_VPD_Enable = 0x02, |
|
436 |
Cfg1_PIO = 0x04, |
|
437 |
Cfg1_MMIO = 0x08, |
|
438 |
LWAKE = 0x10, /* not on 8139, 8139A */ |
|
439 |
Cfg1_Driver_Load = 0x20, |
|
440 |
Cfg1_LED0 = 0x40, |
|
441 |
Cfg1_LED1 = 0x80, |
|
442 |
SLEEP = (1 << 1), /* only on 8139, 8139A */ |
|
443 |
PWRDN = (1 << 0), /* only on 8139, 8139A */ |
|
444 |
}; |
|
445 |
||
446 |
/* Bits in Config3 */ |
|
447 |
enum Config3Bits {
|
|
448 |
Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ |
|
449 |
Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ |
|
450 |
Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ |
|
451 |
Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ |
|
452 |
Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ |
|
453 |
Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ |
|
454 |
Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ |
|
455 |
Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ |
|
456 |
}; |
|
457 |
||
458 |
/* Bits in Config4 */ |
|
459 |
enum Config4Bits {
|
|
460 |
LWPTN = (1 << 2), /* not on 8139, 8139A */ |
|
461 |
}; |
|
462 |
||
463 |
/* Bits in Config5 */ |
|
464 |
enum Config5Bits {
|
|
465 |
Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ |
|
466 |
Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ |
|
467 |
Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ |
|
468 |
Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */ |
|
469 |
Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ |
|
470 |
Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ |
|
471 |
Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ |
|
472 |
}; |
|
473 |
||
474 |
enum RxConfigBits {
|
|
475 |
/* rx fifo threshold */ |
|
476 |
RxCfgFIFOShift = 13, |
|
477 |
RxCfgFIFONone = (7 << RxCfgFIFOShift), |
|
478 |
||
479 |
/* Max DMA burst */ |
|
480 |
RxCfgDMAShift = 8, |
|
481 |
RxCfgDMAUnlimited = (7 << RxCfgDMAShift), |
|
482 |
||
483 |
/* rx ring buffer length */ |
|
484 |
RxCfgRcv8K = 0, |
|
485 |
RxCfgRcv16K = (1 << 11), |
|
486 |
RxCfgRcv32K = (1 << 12), |
|
487 |
RxCfgRcv64K = (1 << 11) | (1 << 12), |
|
488 |
||
489 |
/* Disable packet wrap at end of Rx buffer */ |
|
490 |
RxNoWrap = (1 << 7), |
|
491 |
}; |
|
492 |
||
493 |
||
494 |
/* Twister tuning parameters from RealTek. |
|
495 |
Completely undocumented, but required to tune bad links on some boards. */ |
|
496 |
enum CSCRBits {
|
|
497 |
CSCR_LinkOKBit = 0x0400, |
|
498 |
CSCR_LinkChangeBit = 0x0800, |
|
499 |
CSCR_LinkStatusBits = 0x0f000, |
|
500 |
CSCR_LinkDownOffCmd = 0x003c0, |
|
501 |
CSCR_LinkDownCmd = 0x0f3c0, |
|
502 |
}; |
|
503 |
||
504 |
||
505 |
enum Cfg9346Bits {
|
|
506 |
Cfg9346_Lock = 0x00, |
|
507 |
Cfg9346_Unlock = 0xC0, |
|
508 |
}; |
|
509 |
||
510 |
#ifdef CONFIG_8139TOO_TUNE_TWISTER |
|
511 |
||
512 |
enum TwisterParamVals {
|
|
513 |
PARA78_default = 0x78fa8388, |
|
514 |
PARA7c_default = 0xcb38de43, /* param[0][3] */ |
|
515 |
PARA7c_xxx = 0xcb38de43, |
|
516 |
}; |
|
517 |
||
518 |
static const unsigned long param[4][4] = {
|
|
519 |
{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
|
|
520 |
{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
|
|
521 |
{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
|
|
522 |
{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
|
|
523 |
}; |
|
524 |
||
525 |
#endif /* CONFIG_8139TOO_TUNE_TWISTER */ |
|
526 |
||
527 |
typedef enum {
|
|
528 |
CH_8139 = 0, |
|
529 |
CH_8139_K, |
|
530 |
CH_8139A, |
|
531 |
CH_8139B, |
|
532 |
CH_8130, |
|
533 |
CH_8139C, |
|
534 |
} chip_t; |
|
535 |
||
536 |
enum chip_flags {
|
|
537 |
HasHltClk = (1 << 0), |
|
538 |
HasLWake = (1 << 1), |
|
539 |
}; |
|
540 |
||
541 |
||
542 |
/* directly indexed by chip_t, above */ |
|
543 |
const static struct {
|
|
544 |
const char *name; |
|
545 |
u8 version; /* from RTL8139C docs */ |
|
546 |
u32 RxConfigMask; /* should clear the bits supported by this chip */ |
|
547 |
u32 flags; |
|
548 |
} rtl_chip_info[] = {
|
|
549 |
{ "RTL-8139",
|
|
550 |
0x40, |
|
551 |
0xf0fe0040, /* XXX copied from RTL8139A, verify */ |
|
552 |
HasHltClk, |
|
553 |
}, |
|
554 |
||
555 |
{ "RTL-8139 rev K",
|
|
556 |
0x60, |
|
557 |
0xf0fe0040, |
|
558 |
HasHltClk, |
|
559 |
}, |
|
560 |
||
561 |
{ "RTL-8139A",
|
|
562 |
0x70, |
|
563 |
0xf0fe0040, |
|
564 |
HasHltClk, /* XXX undocumented? */ |
|
565 |
}, |
|
566 |
||
567 |
{ "RTL-8139B",
|
|
568 |
0x78, |
|
569 |
0xf0fc0040, |
|
570 |
HasLWake, |
|
571 |
}, |
|
572 |
||
573 |
{ "RTL-8130",
|
|
574 |
0x7C, |
|
575 |
0xf0fe0040, /* XXX copied from RTL8139A, verify */ |
|
576 |
HasLWake, |
|
577 |
}, |
|
578 |
||
579 |
{ "RTL-8139C",
|
|
580 |
0x74, |
|
581 |
0xf0fc0040, /* XXX copied from RTL8139B, verify */ |
|
582 |
HasLWake, |
|
583 |
}, |
|
584 |
||
585 |
}; |
|
586 |
||
587 |
struct rtl_extra_stats {
|
|
588 |
unsigned long early_rx; |
|
589 |
unsigned long tx_buf_mapped; |
|
590 |
unsigned long tx_timeouts; |
|
591 |
unsigned long rx_lost_in_ring; |
|
592 |
}; |
|
593 |
||
594 |
struct rtl8139_private {
|
|
595 |
void *mmio_addr; |
|
596 |
int drv_flags; |
|
597 |
struct pci_dev *pci_dev; |
|
598 |
struct net_device_stats stats; |
|
599 |
unsigned char *rx_ring; |
|
600 |
unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */ |
|
601 |
unsigned int tx_flag; |
|
602 |
unsigned long cur_tx; |
|
603 |
unsigned long dirty_tx; |
|
604 |
unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ |
|
605 |
unsigned char *tx_bufs; /* Tx bounce buffer region. */ |
|
606 |
dma_addr_t rx_ring_dma; |
|
607 |
dma_addr_t tx_bufs_dma; |
|
608 |
signed char phys[4]; /* MII device addresses. */ |
|
609 |
char twistie, twist_row, twist_col; /* Twister tune state. */ |
|
610 |
unsigned int default_port:4; /* Last dev->if_port value. */ |
|
611 |
spinlock_t lock; |
|
612 |
chip_t chipset; |
|
613 |
pid_t thr_pid; |
|
614 |
wait_queue_head_t thr_wait; |
|
615 |
struct completion thr_exited; |
|
616 |
u32 rx_config; |
|
617 |
struct rtl_extra_stats xstats; |
|
618 |
int time_to_die; |
|
619 |
struct mii_if_info mii; |
|
620 |
unsigned int regs_len; |
|
621 |
}; |
|
622 |
||
623 |
MODULE_AUTHOR ("Jeff Garzik <jgarzik@mandrakesoft.com>");
|
|
624 |
MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
|
|
625 |
MODULE_LICENSE("GPL");
|
|
626 |
||
627 |
MODULE_PARM (multicast_filter_limit, "i"); |
|
628 |
MODULE_PARM (max_interrupt_work, "i"); |
|
629 |
MODULE_PARM (media, "1-" __MODULE_STRING(MAX_UNITS) "i"); |
|
630 |
MODULE_PARM (full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i"); |
|
631 |
MODULE_PARM (debug, "i"); |
|
632 |
MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); |
|
633 |
MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); |
|
634 |
MODULE_PARM_DESC (max_interrupt_work, "8139too maximum events handled per interrupt"); |
|
635 |
MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); |
|
636 |
MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); |
|
637 |
||
638 |
static int read_eeprom (void *ioaddr, int location, int addr_len); |
|
639 |
static int rtl8139_open (struct net_device *dev); |
|
640 |
static int mdio_read (struct net_device *dev, int phy_id, int location); |
|
641 |
static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
642 |
int val); |
|
643 |
static int rtl8139_thread (void *data); |
|
644 |
static void rtl8139_tx_timeout (struct net_device *dev); |
|
645 |
static void rtl8139_init_ring (struct net_device *dev); |
|
646 |
static int rtl8139_start_xmit (struct sk_buff *skb, |
|
647 |
struct net_device *dev); |
|
648 |
static void rtl8139_interrupt (int irq, void *dev_instance, |
|
649 |
struct pt_regs *regs); |
|
650 |
static void rt_rtl8139_interrupt(void); |
|
651 |
static int rtl8139_close (struct net_device *dev); |
|
652 |
static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); |
|
653 |
static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); |
|
654 |
static void rtl8139_set_rx_mode (struct net_device *dev); |
|
655 |
static void __set_rx_mode (struct net_device *dev); |
|
656 |
static void rtl8139_hw_start (struct net_device *dev); |
|
657 |
||
658 |
#ifdef USE_IO_OPS |
|
659 |
||
660 |
#define RTL_R8(reg) inb (((unsigned long)ioaddr) + (reg)) |
|
661 |
#define RTL_R16(reg) inw (((unsigned long)ioaddr) + (reg)) |
|
662 |
#define RTL_R32(reg) ((unsigned long) inl (((unsigned long)ioaddr) + (reg))) |
|
663 |
#define RTL_W8(reg, val8) outb ((val8), ((unsigned long)ioaddr) + (reg)) |
|
664 |
#define RTL_W16(reg, val16) outw ((val16), ((unsigned long)ioaddr) + (reg)) |
|
665 |
#define RTL_W32(reg, val32) outl ((val32), ((unsigned long)ioaddr) + (reg)) |
|
666 |
#define RTL_W8_F RTL_W8 |
|
667 |
#define RTL_W16_F RTL_W16 |
|
668 |
#define RTL_W32_F RTL_W32 |
|
669 |
#undef readb |
|
670 |
#undef readw |
|
671 |
#undef readl |
|
672 |
#undef writeb |
|
673 |
#undef writew |
|
674 |
#undef writel |
|
675 |
#define readb(addr) inb((unsigned long)(addr)) |
|
676 |
#define readw(addr) inw((unsigned long)(addr)) |
|
677 |
#define readl(addr) inl((unsigned long)(addr)) |
|
678 |
#define writeb(val,addr) outb((val),(unsigned long)(addr)) |
|
679 |
#define writew(val,addr) outw((val),(unsigned long)(addr)) |
|
680 |
#define writel(val,addr) outl((val),(unsigned long)(addr)) |
|
681 |
||
682 |
#else |
|
683 |
||
684 |
/* write MMIO register, with flush */ |
|
685 |
/* Flush avoids rtl8139 bug w/ posted MMIO writes */ |
|
686 |
#define RTL_W8_F(reg, val8) do { writeb ((val8), ioaddr + (reg)); readb (ioaddr + (reg)); } while (0)
|
|
687 |
#define RTL_W16_F(reg, val16) do { writew ((val16), ioaddr + (reg)); readw (ioaddr + (reg)); } while (0)
|
|
688 |
#define RTL_W32_F(reg, val32) do { writel ((val32), ioaddr + (reg)); readl (ioaddr + (reg)); } while (0)
|
|
689 |
||
690 |
||
691 |
#define MMIO_FLUSH_AUDIT_COMPLETE 1 |
|
692 |
#if MMIO_FLUSH_AUDIT_COMPLETE |
|
693 |
||
694 |
/* write MMIO register */ |
|
695 |
#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) |
|
696 |
#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) |
|
697 |
#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) |
|
698 |
||
699 |
#else |
|
700 |
||
701 |
/* write MMIO register, then flush */ |
|
702 |
#define RTL_W8 RTL_W8_F |
|
703 |
#define RTL_W16 RTL_W16_F |
|
704 |
#define RTL_W32 RTL_W32_F |
|
705 |
||
706 |
#endif /* MMIO_FLUSH_AUDIT_COMPLETE */ |
|
707 |
||
708 |
/* read MMIO register */ |
|
709 |
#define RTL_R8(reg) readb (ioaddr + (reg)) |
|
710 |
#define RTL_R16(reg) readw (ioaddr + (reg)) |
|
711 |
#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) |
|
712 |
||
713 |
#endif /* USE_IO_OPS */ |
|
714 |
||
715 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
716 |
||
717 |
#define ECATcard 1 // Diese Ethernetkarte wird für Ethercat verwendet |
|
718 |
||
719 |
//#define ECAT_DEBUG |
|
720 |
||
721 |
EtherCAT_device_t rtl_ecat_dev; |
|
722 |
||
723 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
724 |
||
725 |
static const u16 rtl8139_intr_mask = |
|
726 |
PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | |
|
727 |
TxErr | TxOK | RxErr | RxOK; |
|
728 |
||
729 |
static const unsigned int rtl8139_rx_config = |
|
730 |
RxCfgRcv32K | RxNoWrap | |
|
731 |
(RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
732 |
(RX_DMA_BURST << RxCfgDMAShift); |
|
733 |
||
734 |
static const unsigned int rtl8139_tx_config = |
|
735 |
(TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); |
|
736 |
||
737 |
static void __rtl8139_cleanup_dev (struct net_device *dev) |
|
738 |
{
|
|
739 |
struct rtl8139_private *tp; |
|
740 |
struct pci_dev *pdev; |
|
741 |
||
742 |
assert (dev != NULL); |
|
743 |
assert (dev->priv != NULL); |
|
744 |
||
745 |
tp = dev->priv; |
|
746 |
assert (tp->pci_dev != NULL); |
|
747 |
pdev = tp->pci_dev; |
|
748 |
||
749 |
#ifndef USE_IO_OPS |
|
750 |
if (tp->mmio_addr) |
|
751 |
iounmap (tp->mmio_addr); |
|
752 |
#endif /* !USE_IO_OPS */ |
|
753 |
||
754 |
/* it's ok to call this even if we have no regions to free */ |
|
755 |
pci_release_regions (pdev); |
|
756 |
||
757 |
#ifndef RTL8139_NDEBUG |
|
758 |
/* poison memory before freeing */ |
|
759 |
memset (dev, 0xBC, |
|
760 |
sizeof (struct net_device) + |
|
761 |
sizeof (struct rtl8139_private)); |
|
762 |
#endif /* RTL8139_NDEBUG */ |
|
763 |
||
764 |
kfree (dev); |
|
765 |
||
766 |
pci_set_drvdata (pdev, NULL); |
|
767 |
} |
|
768 |
||
769 |
||
770 |
static void rtl8139_chip_reset (void *ioaddr) |
|
771 |
{
|
|
772 |
int i; |
|
773 |
int succ = 0 ; |
|
774 |
/* Soft reset the chip. */ |
|
775 |
RTL_W8 (ChipCmd, CmdReset); |
|
776 |
||
777 |
/* Check that the chip has finished the reset. */ |
|
778 |
for (i = 1000; i > 0; i--) {
|
|
779 |
barrier(); |
|
780 |
if ((RTL_R8 (ChipCmd) & CmdReset) == 0) {
|
|
781 |
succ = 1; |
|
782 |
break; |
|
783 |
} |
|
784 |
udelay (10); |
|
785 |
} |
|
786 |
EC_DBG("rtl8139 chipreset");
|
|
787 |
if(succ == 0) |
|
788 |
EC_DBG("failed");
|
|
789 |
else |
|
790 |
EC_DBG("success at count %d",i);
|
|
791 |
||
792 |
} |
|
793 |
||
794 |
||
795 |
static int __devinit rtl8139_init_board (struct pci_dev *pdev, |
|
796 |
struct net_device **dev_out) |
|
797 |
{
|
|
798 |
void *ioaddr; |
|
799 |
struct net_device *dev; |
|
800 |
struct rtl8139_private *tp; |
|
801 |
u8 tmp8; |
|
802 |
int rc; |
|
803 |
unsigned int i; |
|
804 |
u32 pio_start, pio_end, pio_flags, pio_len; |
|
805 |
unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; |
|
806 |
u32 tmp; |
|
807 |
||
808 |
assert (pdev != NULL); |
|
809 |
||
810 |
*dev_out = NULL; |
|
811 |
||
812 |
/* dev and dev->priv zeroed in alloc_etherdev */ |
|
813 |
dev = alloc_etherdev (sizeof (*tp)); |
|
814 |
if (dev == NULL) {
|
|
815 |
EC_DBG (KERN_ERR PFX "%s: Unable to alloc new net device\n", pdev->slot_name); |
|
816 |
return -ENOMEM; |
|
817 |
} |
|
818 |
SET_MODULE_OWNER(dev); |
|
819 |
tp = dev->priv; |
|
820 |
tp->pci_dev = pdev; |
|
821 |
||
822 |
/* enable device (incl. PCI PM wakeup and hotplug setup) */ |
|
823 |
rc = pci_enable_device (pdev); |
|
824 |
if (rc) |
|
825 |
goto err_out; |
|
826 |
||
827 |
pio_start = pci_resource_start (pdev, 0); |
|
828 |
pio_end = pci_resource_end (pdev, 0); |
|
829 |
pio_flags = pci_resource_flags (pdev, 0); |
|
830 |
pio_len = pci_resource_len (pdev, 0); |
|
831 |
||
832 |
mmio_start = pci_resource_start (pdev, 1); |
|
833 |
mmio_end = pci_resource_end (pdev, 1); |
|
834 |
mmio_flags = pci_resource_flags (pdev, 1); |
|
835 |
mmio_len = pci_resource_len (pdev, 1); |
|
836 |
||
837 |
/* set this immediately, we need to know before |
|
838 |
* we talk to the chip directly */ |
|
839 |
DPRINTK("PIO region size == 0x%02X\n", pio_len);
|
|
840 |
DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
|
|
841 |
||
842 |
#ifdef USE_IO_OPS |
|
843 |
/* make sure PCI base addr 0 is PIO */ |
|
844 |
if (!(pio_flags & IORESOURCE_IO)) {
|
|
845 |
EC_DBG (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pdev->slot_name); |
|
846 |
rc = -ENODEV; |
|
847 |
goto err_out; |
|
848 |
} |
|
849 |
/* check for weird/broken PCI region reporting */ |
|
850 |
if (pio_len < RTL_MIN_IO_SIZE) {
|
|
851 |
EC_DBG (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pdev->slot_name); |
|
852 |
rc = -ENODEV; |
|
853 |
goto err_out; |
|
854 |
} |
|
855 |
#else |
|
856 |
/* make sure PCI base addr 1 is MMIO */ |
|
857 |
if (!(mmio_flags & IORESOURCE_MEM)) {
|
|
858 |
EC_DBG (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pdev->slot_name); |
|
859 |
rc = -ENODEV; |
|
860 |
goto err_out; |
|
861 |
} |
|
862 |
if (mmio_len < RTL_MIN_IO_SIZE) {
|
|
863 |
EC_DBG (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pdev->slot_name); |
|
864 |
rc = -ENODEV; |
|
865 |
goto err_out; |
|
866 |
} |
|
867 |
#endif |
|
868 |
||
869 |
rc = pci_request_regions (pdev, "8139too"); |
|
870 |
if (rc) |
|
871 |
goto err_out; |
|
872 |
||
873 |
/* enable PCI bus-mastering */ |
|
874 |
pci_set_master (pdev); |
|
875 |
||
876 |
#ifdef USE_IO_OPS |
|
877 |
ioaddr = (void *) pio_start; |
|
878 |
dev->base_addr = pio_start; |
|
879 |
tp->mmio_addr = ioaddr; |
|
880 |
tp->regs_len = pio_len; |
|
881 |
#else |
|
882 |
/* ioremap MMIO region */ |
|
883 |
ioaddr = ioremap (mmio_start, mmio_len); |
|
884 |
if (ioaddr == NULL) {
|
|
885 |
EC_DBG (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pdev->slot_name); |
|
886 |
rc = -EIO; |
|
887 |
goto err_out; |
|
888 |
} |
|
889 |
dev->base_addr = (long) ioaddr; |
|
890 |
tp->mmio_addr = ioaddr; |
|
891 |
tp->regs_len = mmio_len; |
|
892 |
#endif /* USE_IO_OPS */ |
|
893 |
||
894 |
/* Bring old chips out of low-power mode. */ |
|
895 |
RTL_W8 (HltClk, 'R'); |
|
896 |
||
897 |
/* check for missing/broken hardware */ |
|
898 |
if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
|
|
899 |
EC_DBG (KERN_ERR PFX "%s: Chip not responding, ignoring board\n", |
|
900 |
pdev->slot_name); |
|
901 |
rc = -EIO; |
|
902 |
goto err_out; |
|
903 |
} |
|
904 |
||
905 |
/* identify chip attached to board */ |
|
906 |
tmp = RTL_R8 (ChipVersion); |
|
907 |
for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) |
|
908 |
if (tmp == rtl_chip_info[i].version) {
|
|
909 |
tp->chipset = i; |
|
910 |
goto match; |
|
911 |
} |
|
912 |
||
913 |
/* if unknown chip, assume array element #0, original RTL-8139 in this case */ |
|
914 |
EC_DBG (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n", |
|
915 |
pdev->slot_name); |
|
916 |
EC_DBG (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pdev->slot_name, RTL_R32 (TxConfig)); |
|
917 |
tp->chipset = 0; |
|
918 |
||
919 |
match: |
|
920 |
DPRINTK ("chipset id (%d) == index %d, '%s'\n",
|
|
921 |
tmp, |
|
922 |
tp->chipset, |
|
923 |
rtl_chip_info[tp->chipset].name); |
|
924 |
||
925 |
if (tp->chipset >= CH_8139B) {
|
|
926 |
u8 new_tmp8 = tmp8 = RTL_R8 (Config1); |
|
927 |
DPRINTK("PCI PM wakeup\n");
|
|
928 |
if ((rtl_chip_info[tp->chipset].flags & HasLWake) && |
|
929 |
(tmp8 & LWAKE)) |
|
930 |
new_tmp8 &= ~LWAKE; |
|
931 |
new_tmp8 |= Cfg1_PM_Enable; |
|
932 |
if (new_tmp8 != tmp8) {
|
|
933 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
934 |
RTL_W8 (Config1, tmp8); |
|
935 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
936 |
} |
|
937 |
if (rtl_chip_info[tp->chipset].flags & HasLWake) {
|
|
938 |
tmp8 = RTL_R8 (Config4); |
|
939 |
if (tmp8 & LWPTN) |
|
940 |
RTL_W8 (Config4, tmp8 & ~LWPTN); |
|
941 |
} |
|
942 |
} else {
|
|
943 |
DPRINTK("Old chip wakeup\n");
|
|
944 |
tmp8 = RTL_R8 (Config1); |
|
945 |
tmp8 &= ~(SLEEP | PWRDN); |
|
946 |
RTL_W8 (Config1, tmp8); |
|
947 |
} |
|
948 |
||
949 |
rtl8139_chip_reset (ioaddr); |
|
950 |
||
951 |
*dev_out = dev; |
|
952 |
return 0; |
|
953 |
||
954 |
err_out: |
|
955 |
__rtl8139_cleanup_dev (dev); |
|
956 |
return rc; |
|
957 |
} |
|
958 |
||
959 |
||
960 |
static int __devinit rtl8139_init_one (struct pci_dev *pdev, |
|
961 |
const struct pci_device_id *ent) |
|
962 |
{
|
|
963 |
struct net_device *dev = NULL; |
|
964 |
struct rtl8139_private *tp; |
|
965 |
int i, addr_len, option; |
|
966 |
void *ioaddr; |
|
967 |
static int board_idx = -1; |
|
968 |
u8 pci_rev; |
|
969 |
||
970 |
assert (pdev != NULL); |
|
971 |
assert (ent != NULL); |
|
972 |
||
973 |
board_idx++; |
|
974 |
||
975 |
||
976 |
/* when we're built into the kernel, the driver version message |
|
977 |
* is only printed if at least one 8139 board has been found |
|
978 |
*/ |
|
979 |
#ifndef MODULE |
|
980 |
{
|
|
981 |
static int printed_version; |
|
982 |
if (!printed_version++) |
|
983 |
EC_DBG (KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
984 |
} |
|
985 |
#endif |
|
986 |
||
987 |
pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); |
|
988 |
||
989 |
if (pdev->vendor == PCI_VENDOR_ID_REALTEK && |
|
990 |
pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) {
|
|
991 |
EC_DBG(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n", |
|
992 |
pdev->slot_name, pdev->vendor, pdev->device, pci_rev); |
|
993 |
EC_DBG(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n"); |
|
994 |
} |
|
995 |
||
996 |
i = rtl8139_init_board (pdev, &dev); |
|
997 |
if (i < 0) |
|
998 |
return i; |
|
999 |
||
1000 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1001 |
||
1002 |
if (board_idx == ECATcard) |
|
1003 |
{
|
|
1004 |
EC_DBG("EtherCAT registering board %d.\n", board_idx);
|
|
1005 |
||
1006 |
if (EtherCAT_device_assign(&rtl_ecat_dev, dev) < 0) |
|
1007 |
goto err_out; |
|
1008 |
||
1009 |
strcpy(dev->name,"ECAT"); //device name überschreiben |
|
1010 |
} |
|
1011 |
||
1012 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1013 |
||
1014 |
tp = dev->priv; |
|
1015 |
ioaddr = tp->mmio_addr; |
|
1016 |
||
1017 |
assert (ioaddr != NULL); |
|
1018 |
assert (dev != NULL); |
|
1019 |
assert (tp != NULL); |
|
1020 |
||
1021 |
addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; |
|
1022 |
for (i = 0; i < 3; i++) |
|
1023 |
((u16 *) (dev->dev_addr))[i] = |
|
1024 |
le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); |
|
1025 |
||
1026 |
/* The Rtl8139-specific entries in the device structure. */ |
|
1027 |
dev->open = rtl8139_open; |
|
1028 |
dev->hard_start_xmit = rtl8139_start_xmit; |
|
1029 |
dev->stop = rtl8139_close; |
|
1030 |
dev->get_stats = rtl8139_get_stats; |
|
1031 |
dev->set_multicast_list = rtl8139_set_rx_mode; |
|
1032 |
dev->do_ioctl = netdev_ioctl; |
|
1033 |
dev->tx_timeout = rtl8139_tx_timeout; |
|
1034 |
dev->watchdog_timeo = TX_TIMEOUT; |
|
1035 |
dev->features |= NETIF_F_SG|NETIF_F_HW_CSUM; |
|
1036 |
||
1037 |
dev->irq = pdev->irq; |
|
1038 |
||
1039 |
/* dev->priv/tp zeroed and aligned in init_etherdev */ |
|
1040 |
tp = dev->priv; |
|
1041 |
||
1042 |
/* note: tp->chipset set in rtl8139_init_board */ |
|
1043 |
tp->drv_flags = board_info[ent->driver_data].hw_flags; |
|
1044 |
tp->mmio_addr = ioaddr; |
|
1045 |
spin_lock_init (&tp->lock); |
|
1046 |
||
1047 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1048 |
||
1049 |
if (board_idx == ECATcard) |
|
1050 |
{
|
|
1051 |
rtl_ecat_dev.lock = &tp->lock; |
|
1052 |
} |
|
1053 |
||
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1054 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
| 0 | 1055 |
|
1056 |
init_waitqueue_head (&tp->thr_wait); |
|
1057 |
init_completion (&tp->thr_exited); |
|
1058 |
tp->mii.dev = dev; |
|
1059 |
tp->mii.mdio_read = mdio_read; |
|
1060 |
tp->mii.mdio_write = mdio_write; |
|
1061 |
tp->mii.phy_id_mask = 0x3f; |
|
1062 |
tp->mii.reg_num_mask = 0x1f; |
|
1063 |
||
1064 |
/* dev is fully set up and ready to use now */ |
|
1065 |
||
1066 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1067 |
||
1068 |
/* EtherCAT-Karten nicht beim Stack anmelden. */ |
|
1069 |
if (dev != rtl_ecat_dev.dev) |
|
1070 |
{
|
|
1071 |
DPRINTK("About to register device named %s (%p)...\n", dev->name, dev);
|
|
1072 |
i = register_netdev (dev); |
|
1073 |
if (i) goto err_out; |
|
1074 |
} |
|
1075 |
||
1076 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1077 |
||
1078 |
pci_set_drvdata (pdev, dev); |
|
1079 |
||
1080 |
EC_DBG (KERN_INFO "%s: %s at 0x%lx, " |
|
1081 |
"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " |
|
1082 |
"IRQ %d\n", |
|
1083 |
dev->name, |
|
1084 |
board_info[ent->driver_data].name, |
|
1085 |
dev->base_addr, |
|
1086 |
dev->dev_addr[0], dev->dev_addr[1], |
|
1087 |
dev->dev_addr[2], dev->dev_addr[3], |
|
1088 |
dev->dev_addr[4], dev->dev_addr[5], |
|
1089 |
dev->irq); |
|
1090 |
||
1091 |
EC_DBG (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", |
|
1092 |
dev->name, rtl_chip_info[tp->chipset].name); |
|
1093 |
||
1094 |
/* Find the connected MII xcvrs. |
|
1095 |
Doing this in open() would allow detecting external xcvrs later, but |
|
1096 |
takes too much time. */ |
|
1097 |
#ifdef CONFIG_8139TOO_8129 |
|
1098 |
if (tp->drv_flags & HAS_MII_XCVR) {
|
|
1099 |
int phy, phy_idx = 0; |
|
1100 |
for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
|
|
1101 |
int mii_status = mdio_read(dev, phy, 1); |
|
1102 |
if (mii_status != 0xffff && mii_status != 0x0000) {
|
|
1103 |
u16 advertising = mdio_read(dev, phy, 4); |
|
1104 |
tp->phys[phy_idx++] = phy; |
|
1105 |
EC_DBG(KERN_INFO "%s: MII transceiver %d status 0x%4.4x " |
|
1106 |
"advertising %4.4x.\n", |
|
1107 |
dev->name, phy, mii_status, advertising); |
|
1108 |
} |
|
1109 |
} |
|
1110 |
if (phy_idx == 0) {
|
|
1111 |
EC_DBG(KERN_INFO "%s: No MII transceivers found! Assuming SYM " |
|
1112 |
"transceiver.\n", |
|
1113 |
dev->name); |
|
1114 |
tp->phys[0] = 32; |
|
1115 |
} |
|
1116 |
} else |
|
1117 |
#endif |
|
1118 |
tp->phys[0] = 32; |
|
1119 |
tp->mii.phy_id = tp->phys[0]; |
|
1120 |
||
1121 |
/* The lower four bits are the media type. */ |
|
1122 |
option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; |
|
1123 |
if (option > 0) {
|
|
1124 |
tp->mii.full_duplex = (option & 0x210) ? 1 : 0; |
|
1125 |
tp->default_port = option & 0xFF; |
|
1126 |
if (tp->default_port) |
|
1127 |
tp->mii.force_media = 1; |
|
1128 |
} |
|
1129 |
if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) |
|
1130 |
tp->mii.full_duplex = full_duplex[board_idx]; |
|
1131 |
if (tp->mii.full_duplex) {
|
|
1132 |
EC_DBG(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name); |
|
1133 |
/* Changing the MII-advertised media because might prevent |
|
1134 |
re-connection. */ |
|
1135 |
tp->mii.force_media = 1; |
|
1136 |
} |
|
1137 |
if (tp->default_port) {
|
|
1138 |
EC_DBG(KERN_INFO " Forcing %dMbps %s-duplex operation.\n", |
|
1139 |
(option & 0x20 ? 100 : 10), |
|
1140 |
(option & 0x10 ? "full" : "half")); |
|
1141 |
mdio_write(dev, tp->phys[0], 0, |
|
1142 |
((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ |
|
1143 |
((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ |
|
1144 |
} |
|
1145 |
||
1146 |
/* Put the chip into low-power mode. */ |
|
1147 |
if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1148 |
RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
1149 |
||
1150 |
return 0; |
|
1151 |
||
1152 |
err_out: |
|
1153 |
__rtl8139_cleanup_dev (dev); |
|
1154 |
return i; |
|
1155 |
} |
|
1156 |
||
1157 |
||
1158 |
static void __devexit rtl8139_remove_one (struct pci_dev *pdev) |
|
1159 |
{
|
|
1160 |
struct net_device *dev = pci_get_drvdata (pdev); |
|
1161 |
struct rtl8139_private *np; |
|
1162 |
||
1163 |
assert (dev != NULL); |
|
1164 |
np = dev->priv; |
|
1165 |
assert (np != NULL); |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1166 |
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1167 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1168 |
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1169 |
if (dev != rtl_ecat_dev.dev) |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1170 |
{
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1171 |
unregister_netdev (dev); |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1172 |
} |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1173 |
|
| 0 | 1174 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
1175 |
||
1176 |
__rtl8139_cleanup_dev (dev); |
|
1177 |
} |
|
1178 |
||
1179 |
||
1180 |
/* Serial EEPROM section. */ |
|
1181 |
||
1182 |
/* EEPROM_Ctrl bits. */ |
|
1183 |
#define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ |
|
1184 |
#define EE_CS 0x08 /* EEPROM chip select. */ |
|
1185 |
#define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ |
|
1186 |
#define EE_WRITE_0 0x00 |
|
1187 |
#define EE_WRITE_1 0x02 |
|
1188 |
#define EE_DATA_READ 0x01 /* EEPROM chip data out. */ |
|
1189 |
#define EE_ENB (0x80 | EE_CS) |
|
1190 |
||
1191 |
/* Delay between EEPROM clock transitions. |
|
1192 |
No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. |
|
1193 |
*/ |
|
1194 |
||
1195 |
#define eeprom_delay() readl(ee_addr) |
|
1196 |
||
1197 |
/* The EEPROM commands include the alway-set leading bit. */ |
|
1198 |
#define EE_WRITE_CMD (5) |
|
1199 |
#define EE_READ_CMD (6) |
|
1200 |
#define EE_ERASE_CMD (7) |
|
1201 |
||
1202 |
static int __devinit read_eeprom (void *ioaddr, int location, int addr_len) |
|
1203 |
{
|
|
1204 |
int i; |
|
1205 |
unsigned retval = 0; |
|
1206 |
void *ee_addr = ioaddr + Cfg9346; |
|
1207 |
int read_cmd = location | (EE_READ_CMD << addr_len); |
|
1208 |
||
1209 |
writeb (EE_ENB & ~EE_CS, ee_addr); |
|
1210 |
writeb (EE_ENB, ee_addr); |
|
1211 |
eeprom_delay (); |
|
1212 |
||
1213 |
/* Shift the read command bits out. */ |
|
1214 |
for (i = 4 + addr_len; i >= 0; i--) {
|
|
1215 |
int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; |
|
1216 |
writeb (EE_ENB | dataval, ee_addr); |
|
1217 |
eeprom_delay (); |
|
1218 |
writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); |
|
1219 |
eeprom_delay (); |
|
1220 |
} |
|
1221 |
writeb (EE_ENB, ee_addr); |
|
1222 |
eeprom_delay (); |
|
1223 |
||
1224 |
for (i = 16; i > 0; i--) {
|
|
1225 |
writeb (EE_ENB | EE_SHIFT_CLK, ee_addr); |
|
1226 |
eeprom_delay (); |
|
1227 |
retval = |
|
1228 |
(retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 : |
|
1229 |
0); |
|
1230 |
writeb (EE_ENB, ee_addr); |
|
1231 |
eeprom_delay (); |
|
1232 |
} |
|
1233 |
||
1234 |
/* Terminate the EEPROM access. */ |
|
1235 |
writeb (~EE_CS, ee_addr); |
|
1236 |
eeprom_delay (); |
|
1237 |
||
1238 |
return retval; |
|
1239 |
} |
|
1240 |
||
1241 |
/* MII serial management: mostly bogus for now. */ |
|
1242 |
/* Read and write the MII management registers using software-generated |
|
1243 |
serial MDIO protocol. |
|
1244 |
The maximum data clock rate is 2.5 Mhz. The minimum timing is usually |
|
1245 |
met by back-to-back PCI I/O cycles, but we insert a delay to avoid |
|
1246 |
"overclocking" issues. */ |
|
1247 |
#define MDIO_DIR 0x80 |
|
1248 |
#define MDIO_DATA_OUT 0x04 |
|
1249 |
#define MDIO_DATA_IN 0x02 |
|
1250 |
#define MDIO_CLK 0x01 |
|
1251 |
#define MDIO_WRITE0 (MDIO_DIR) |
|
1252 |
#define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) |
|
1253 |
||
1254 |
#define mdio_delay(mdio_addr) readb(mdio_addr) |
|
1255 |
||
1256 |
||
1257 |
static char mii_2_8139_map[8] = {
|
|
1258 |
BasicModeCtrl, |
|
1259 |
BasicModeStatus, |
|
1260 |
0, |
|
1261 |
0, |
|
1262 |
NWayAdvert, |
|
1263 |
NWayLPAR, |
|
1264 |
NWayExpansion, |
|
1265 |
0 |
|
1266 |
}; |
|
1267 |
||
1268 |
||
1269 |
#ifdef CONFIG_8139TOO_8129 |
|
1270 |
/* Syncronize the MII management interface by shifting 32 one bits out. */ |
|
1271 |
static void mdio_sync (void *mdio_addr) |
|
1272 |
{
|
|
1273 |
int i; |
|
1274 |
||
1275 |
for (i = 32; i >= 0; i--) {
|
|
1276 |
writeb (MDIO_WRITE1, mdio_addr); |
|
1277 |
mdio_delay (mdio_addr); |
|
1278 |
writeb (MDIO_WRITE1 | MDIO_CLK, mdio_addr); |
|
1279 |
mdio_delay (mdio_addr); |
|
1280 |
} |
|
1281 |
} |
|
1282 |
#endif |
|
1283 |
||
1284 |
static int mdio_read (struct net_device *dev, int phy_id, int location) |
|
1285 |
{
|
|
1286 |
struct rtl8139_private *tp = dev->priv; |
|
1287 |
int retval = 0; |
|
1288 |
#ifdef CONFIG_8139TOO_8129 |
|
1289 |
void *mdio_addr = tp->mmio_addr + Config4; |
|
1290 |
int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; |
|
1291 |
int i; |
|
1292 |
#endif |
|
1293 |
||
1294 |
if (phy_id > 31) { /* Really a 8139. Use internal registers. */
|
|
1295 |
return location < 8 && mii_2_8139_map[location] ? |
|
1296 |
readw (tp->mmio_addr + mii_2_8139_map[location]) : 0; |
|
1297 |
} |
|
1298 |
||
1299 |
#ifdef CONFIG_8139TOO_8129 |
|
1300 |
mdio_sync (mdio_addr); |
|
1301 |
/* Shift the read command bits out. */ |
|
1302 |
for (i = 15; i >= 0; i--) {
|
|
1303 |
int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; |
|
1304 |
||
1305 |
writeb (MDIO_DIR | dataval, mdio_addr); |
|
1306 |
mdio_delay (mdio_addr); |
|
1307 |
writeb (MDIO_DIR | dataval | MDIO_CLK, mdio_addr); |
|
1308 |
mdio_delay (mdio_addr); |
|
1309 |
} |
|
1310 |
||
1311 |
/* Read the two transition, 16 data, and wire-idle bits. */ |
|
1312 |
for (i = 19; i > 0; i--) {
|
|
1313 |
writeb (0, mdio_addr); |
|
1314 |
mdio_delay (mdio_addr); |
|
1315 |
retval = (retval << 1) | ((readb (mdio_addr) & MDIO_DATA_IN) ? 1 : 0); |
|
1316 |
writeb (MDIO_CLK, mdio_addr); |
|
1317 |
mdio_delay (mdio_addr); |
|
1318 |
} |
|
1319 |
#endif |
|
1320 |
||
1321 |
return (retval >> 1) & 0xffff; |
|
1322 |
} |
|
1323 |
||
1324 |
||
1325 |
static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
1326 |
int value) |
|
1327 |
{
|
|
1328 |
struct rtl8139_private *tp = dev->priv; |
|
1329 |
#ifdef CONFIG_8139TOO_8129 |
|
1330 |
void *mdio_addr = tp->mmio_addr + Config4; |
|
1331 |
int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; |
|
1332 |
int i; |
|
1333 |
#endif |
|
1334 |
||
1335 |
if (phy_id > 31) { /* Really a 8139. Use internal registers. */
|
|
1336 |
void *ioaddr = tp->mmio_addr; |
|
1337 |
if (location == 0) {
|
|
1338 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1339 |
RTL_W16 (BasicModeCtrl, value); |
|
1340 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1341 |
} else if (location < 8 && mii_2_8139_map[location]) |
|
1342 |
RTL_W16 (mii_2_8139_map[location], value); |
|
1343 |
return; |
|
1344 |
} |
|
1345 |
||
1346 |
#ifdef CONFIG_8139TOO_8129 |
|
1347 |
mdio_sync (mdio_addr); |
|
1348 |
||
1349 |
/* Shift the command bits out. */ |
|
1350 |
for (i = 31; i >= 0; i--) {
|
|
1351 |
int dataval = |
|
1352 |
(mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; |
|
1353 |
writeb (dataval, mdio_addr); |
|
1354 |
mdio_delay (mdio_addr); |
|
1355 |
writeb (dataval | MDIO_CLK, mdio_addr); |
|
1356 |
mdio_delay (mdio_addr); |
|
1357 |
} |
|
1358 |
/* Clear out extra bits. */ |
|
1359 |
for (i = 2; i > 0; i--) {
|
|
1360 |
writeb (0, mdio_addr); |
|
1361 |
mdio_delay (mdio_addr); |
|
1362 |
writeb (MDIO_CLK, mdio_addr); |
|
1363 |
mdio_delay (mdio_addr); |
|
1364 |
} |
|
1365 |
#endif |
|
1366 |
} |
|
1367 |
||
1368 |
||
1369 |
static int rtl8139_open (struct net_device *dev) |
|
1370 |
{
|
|
1371 |
struct rtl8139_private *tp = dev->priv; |
|
1372 |
int retval; |
|
1373 |
#ifdef RTL8139_DEBUG |
|
1374 |
void *ioaddr = tp->mmio_addr; |
|
1375 |
#endif |
|
1376 |
||
1377 |
EC_DBG(KERN_DEBUG "%s: open\n", dev->name); |
|
1378 |
||
1379 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1380 |
|
| 0 | 1381 |
if (dev != rtl_ecat_dev.dev) |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1382 |
{
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1383 |
retval = request_irq(dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev); |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1384 |
} |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1385 |
else |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1386 |
{
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1387 |
//rt_disable_irq(dev->irq); |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1388 |
retval = rt_request_global_irq(dev->irq,rt_rtl8139_interrupt); |
| 0 | 1389 |
//rt_enable_irq(dev->irq); |
1390 |
} |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1391 |
|
| 0 | 1392 |
if (retval) |
1393 |
return retval; |
|
1394 |
||
1395 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1396 |
||
1397 |
tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
1398 |
&tp->tx_bufs_dma); |
|
1399 |
tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
1400 |
&tp->rx_ring_dma); |
|
1401 |
if (tp->tx_bufs == NULL || tp->rx_ring == NULL) |
|
1402 |
{
|
|
1403 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1404 |
||
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1405 |
if (dev != rtl_ecat_dev.dev) |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1406 |
{
|
| 0 | 1407 |
free_irq(dev->irq, dev); |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1408 |
} |
| 0 | 1409 |
else |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1410 |
{
|
| 0 | 1411 |
rt_free_global_irq (dev->irq); |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1412 |
} |
| 0 | 1413 |
|
1414 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1415 |
||
1416 |
if (tp->tx_bufs) |
|
1417 |
pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
1418 |
tp->tx_bufs, tp->tx_bufs_dma); |
|
1419 |
if (tp->rx_ring) |
|
1420 |
pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
1421 |
tp->rx_ring, tp->rx_ring_dma); |
|
1422 |
||
1423 |
return -ENOMEM; |
|
1424 |
||
1425 |
} |
|
1426 |
||
1427 |
tp->mii.full_duplex = tp->mii.force_media; |
|
1428 |
tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; |
|
1429 |
tp->twistie = (tp->chipset == CH_8139_K) ? 1 : 0; |
|
1430 |
tp->time_to_die = 0; |
|
1431 |
||
1432 |
rtl8139_init_ring (dev); |
|
1433 |
rtl8139_hw_start (dev); |
|
1434 |
||
1435 |
DPRINTK ("%s: rtl8139_open() ioaddr %#lx IRQ %d"
|
|
1436 |
" GP Pins %2.2x %s-duplex.\n", |
|
1437 |
dev->name, pci_resource_start (tp->pci_dev, 1), |
|
1438 |
dev->irq, RTL_R8 (MediaStatus), |
|
1439 |
tp->mii.full_duplex ? "full" : "half"); |
|
1440 |
||
1441 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1442 |
||
1443 |
if (dev != rtl_ecat_dev.dev) |
|
1444 |
{
|
|
1445 |
EC_DBG(KERN_DEBUG "%s: starting kernel thread...\n", dev->name); |
|
1446 |
tp->thr_pid = kernel_thread (rtl8139_thread, dev, CLONE_FS | CLONE_FILES); |
|
1447 |
||
1448 |
if (tp->thr_pid < 0) |
|
1449 |
EC_DBG (KERN_WARNING "%s: unable to start kernel thread\n", |
|
1450 |
dev->name); |
|
1451 |
} |
|
1452 |
#if 0 |
|
1453 |
else |
|
1454 |
{
|
|
1455 |
rt_enable_irq(dev->irq); |
|
1456 |
} |
|
1457 |
#endif |
|
1458 |
||
1459 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1460 |
||
1461 |
EC_DBG(KERN_DEBUG "%s: open finished.\n", dev->name); |
|
1462 |
||
1463 |
return 0; |
|
1464 |
} |
|
1465 |
||
1466 |
||
1467 |
static void rtl_check_media (struct net_device *dev) |
|
1468 |
{
|
|
1469 |
struct rtl8139_private *tp = dev->priv; |
|
1470 |
||
1471 |
if (tp->phys[0] >= 0) {
|
|
1472 |
u16 mii_lpa = mdio_read(dev, tp->phys[0], MII_LPA); |
|
1473 |
if (mii_lpa == 0xffff) |
|
1474 |
; /* Not there */ |
|
1475 |
else if ((mii_lpa & LPA_100FULL) == LPA_100FULL |
|
1476 |
|| (mii_lpa & 0x00C0) == LPA_10FULL) |
|
1477 |
tp->mii.full_duplex = 1; |
|
1478 |
||
1479 |
EC_DBG (KERN_INFO "%s: Setting %s%s-duplex based on" |
|
1480 |
" auto-negotiated partner ability %4.4x.\n", |
|
1481 |
dev->name, mii_lpa == 0 ? "" : |
|
1482 |
(mii_lpa & 0x0180) ? "100mbps " : "10mbps ", |
|
1483 |
tp->mii.full_duplex ? "full" : "half", mii_lpa); |
|
1484 |
} |
|
1485 |
EC_DBG(KERN_DEBUG "rtl_check_media done.\n"); |
|
1486 |
} |
|
1487 |
||
1488 |
/* Start the hardware at open or resume. */ |
|
1489 |
static void rtl8139_hw_start (struct net_device *dev) |
|
1490 |
{
|
|
1491 |
struct rtl8139_private *tp = dev->priv; |
|
1492 |
void *ioaddr = tp->mmio_addr; |
|
1493 |
u32 i; |
|
1494 |
u8 tmp; |
|
1495 |
||
1496 |
EC_DBG(KERN_DEBUG "%s: rtl8139_hw_start\n", dev->name); |
|
1497 |
||
1498 |
/* Bring old chips out of low-power mode. */ |
|
1499 |
if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1500 |
RTL_W8 (HltClk, 'R'); |
|
1501 |
||
1502 |
rtl8139_chip_reset (ioaddr); |
|
1503 |
||
1504 |
/* unlock Config[01234] and BMCR register writes */ |
|
1505 |
RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
1506 |
/* Restore our idea of the MAC address. */ |
|
1507 |
RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); |
|
1508 |
RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); |
|
1509 |
||
1510 |
/* Must enable Tx/Rx before setting transfer thresholds! */ |
|
1511 |
RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1512 |
||
1513 |
tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
1514 |
RTL_W32 (RxConfig, tp->rx_config); |
|
1515 |
||
1516 |
/* Check this value: the documentation for IFG contradicts ifself. */ |
|
1517 |
RTL_W32 (TxConfig, rtl8139_tx_config); |
|
1518 |
||
1519 |
tp->cur_rx = 0; |
|
1520 |
||
1521 |
rtl_check_media (dev); |
|
1522 |
||
1523 |
if (tp->chipset >= CH_8139B) {
|
|
1524 |
/* Disable magic packet scanning, which is enabled |
|
1525 |
* when PM is enabled in Config1. It can be reenabled |
|
1526 |
* via ETHTOOL_SWOL if desired. */ |
|
1527 |
RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); |
|
1528 |
} |
|
1529 |
||
1530 |
DPRINTK("init buffer addresses\n");
|
|
1531 |
||
1532 |
/* Lock Config[01234] and BMCR register writes */ |
|
1533 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1534 |
||
1535 |
/* init Rx ring buffer DMA address */ |
|
1536 |
RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
1537 |
||
1538 |
/* init Tx buffer DMA addresses */ |
|
1539 |
for (i = 0; i < NUM_TX_DESC; i++) |
|
1540 |
RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); |
|
1541 |
||
1542 |
RTL_W32 (RxMissed, 0); |
|
1543 |
||
1544 |
rtl8139_set_rx_mode (dev); |
|
1545 |
||
1546 |
/* no early-rx interrupts */ |
|
1547 |
RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); |
|
1548 |
||
1549 |
/* make sure RxTx has started */ |
|
1550 |
tmp = RTL_R8 (ChipCmd); |
|
1551 |
if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) |
|
1552 |
RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1553 |
||
1554 |
/* Enable all known interrupts by setting the interrupt mask. */ |
|
1555 |
RTL_W16 (IntrMask, rtl8139_intr_mask); |
|
1556 |
||
1557 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1558 |
|
| 0 | 1559 |
if (dev != rtl_ecat_dev.dev) netif_start_queue (dev); |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1560 |
|
| 0 | 1561 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
1562 |
||
1563 |
EC_DBG(KERN_DEBUG "%s: rtl8139_hw_start finished.\n", dev->name); |
|
1564 |
} |
|
1565 |
||
1566 |
||
1567 |
/* Initialize the Rx and Tx rings, along with various 'dev' bits. */ |
|
1568 |
static void rtl8139_init_ring (struct net_device *dev) |
|
1569 |
{
|
|
1570 |
struct rtl8139_private *tp = dev->priv; |
|
1571 |
int i; |
|
1572 |
||
1573 |
tp->cur_rx = 0; |
|
1574 |
tp->cur_tx = 0; |
|
1575 |
tp->dirty_tx = 0; |
|
1576 |
||
1577 |
for (i = 0; i < NUM_TX_DESC; i++) |
|
1578 |
tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; |
|
1579 |
} |
|
1580 |
||
1581 |
||
1582 |
/* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ |
|
1583 |
static int next_tick = 3 * HZ; |
|
1584 |
||
1585 |
#ifndef CONFIG_8139TOO_TUNE_TWISTER |
|
1586 |
static inline void rtl8139_tune_twister (struct net_device *dev, |
|
1587 |
struct rtl8139_private *tp) {}
|
|
1588 |
#else |
|
1589 |
static void rtl8139_tune_twister (struct net_device *dev, |
|
1590 |
struct rtl8139_private *tp) |
|
1591 |
{
|
|
1592 |
int linkcase; |
|
1593 |
void *ioaddr = tp->mmio_addr; |
|
1594 |
||
1595 |
/* This is a complicated state machine to configure the "twister" for |
|
1596 |
impedance/echos based on the cable length. |
|
1597 |
All of this is magic and undocumented. |
|
1598 |
*/ |
|
1599 |
switch (tp->twistie) {
|
|
1600 |
case 1: |
|
1601 |
if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
|
|
1602 |
/* We have link beat, let us tune the twister. */ |
|
1603 |
RTL_W16 (CSCR, CSCR_LinkDownOffCmd); |
|
1604 |
tp->twistie = 2; /* Change to state 2. */ |
|
1605 |
next_tick = HZ / 10; |
|
1606 |
} else {
|
|
1607 |
/* Just put in some reasonable defaults for when beat returns. */ |
|
1608 |
RTL_W16 (CSCR, CSCR_LinkDownCmd); |
|
1609 |
RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ |
|
1610 |
RTL_W32 (PARA78, PARA78_default); |
|
1611 |
RTL_W32 (PARA7c, PARA7c_default); |
|
1612 |
tp->twistie = 0; /* Bail from future actions. */ |
|
1613 |
} |
|
1614 |
break; |
|
1615 |
case 2: |
|
1616 |
/* Read how long it took to hear the echo. */ |
|
1617 |
linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; |
|
1618 |
if (linkcase == 0x7000) |
|
1619 |
tp->twist_row = 3; |
|
1620 |
else if (linkcase == 0x3000) |
|
1621 |
tp->twist_row = 2; |
|
1622 |
else if (linkcase == 0x1000) |
|
1623 |
tp->twist_row = 1; |
|
1624 |
else |
|
1625 |
tp->twist_row = 0; |
|
1626 |
tp->twist_col = 0; |
|
1627 |
tp->twistie = 3; /* Change to state 2. */ |
|
1628 |
next_tick = HZ / 10; |
|
1629 |
break; |
|
1630 |
case 3: |
|
1631 |
/* Put out four tuning parameters, one per 100msec. */ |
|
1632 |
if (tp->twist_col == 0) |
|
1633 |
RTL_W16 (FIFOTMS, 0); |
|
1634 |
RTL_W32 (PARA7c, param[(int) tp->twist_row] |
|
1635 |
[(int) tp->twist_col]); |
|
1636 |
next_tick = HZ / 10; |
|
1637 |
if (++tp->twist_col >= 4) {
|
|
1638 |
/* For short cables we are done. |
|
1639 |
For long cables (row == 3) check for mistune. */ |
|
1640 |
tp->twistie = |
|
1641 |
(tp->twist_row == 3) ? 4 : 0; |
|
1642 |
} |
|
1643 |
break; |
|
1644 |
case 4: |
|
1645 |
/* Special case for long cables: check for mistune. */ |
|
1646 |
if ((RTL_R16 (CSCR) & |
|
1647 |
CSCR_LinkStatusBits) == 0x7000) {
|
|
1648 |
tp->twistie = 0; |
|
1649 |
break; |
|
1650 |
} else {
|
|
1651 |
RTL_W32 (PARA7c, 0xfb38de03); |
|
1652 |
tp->twistie = 5; |
|
1653 |
next_tick = HZ / 10; |
|
1654 |
} |
|
1655 |
break; |
|
1656 |
case 5: |
|
1657 |
/* Retune for shorter cable (column 2). */ |
|
1658 |
RTL_W32 (FIFOTMS, 0x20); |
|
1659 |
RTL_W32 (PARA78, PARA78_default); |
|
1660 |
RTL_W32 (PARA7c, PARA7c_default); |
|
1661 |
RTL_W32 (FIFOTMS, 0x00); |
|
1662 |
tp->twist_row = 2; |
|
1663 |
tp->twist_col = 0; |
|
1664 |
tp->twistie = 3; |
|
1665 |
next_tick = HZ / 10; |
|
1666 |
break; |
|
1667 |
||
1668 |
default: |
|
1669 |
/* do nothing */ |
|
1670 |
break; |
|
1671 |
} |
|
1672 |
} |
|
1673 |
#endif /* CONFIG_8139TOO_TUNE_TWISTER */ |
|
1674 |
||
1675 |
||
1676 |
static inline void rtl8139_thread_iter (struct net_device *dev, |
|
1677 |
struct rtl8139_private *tp, |
|
1678 |
void *ioaddr) |
|
1679 |
{
|
|
1680 |
int mii_lpa; |
|
1681 |
||
1682 |
mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); |
|
1683 |
||
1684 |
if (!tp->mii.force_media && mii_lpa != 0xffff) {
|
|
1685 |
int duplex = (mii_lpa & LPA_100FULL) |
|
1686 |
|| (mii_lpa & 0x01C0) == 0x0040; |
|
1687 |
if (tp->mii.full_duplex != duplex) {
|
|
1688 |
tp->mii.full_duplex = duplex; |
|
1689 |
||
1690 |
if (mii_lpa) {
|
|
1691 |
EC_DBG (KERN_INFO |
|
1692 |
"%s: Setting %s-duplex based on MII #%d link" |
|
1693 |
" partner ability of %4.4x.\n", |
|
1694 |
dev->name, |
|
1695 |
tp->mii.full_duplex ? "full" : "half", |
|
1696 |
tp->phys[0], mii_lpa); |
|
1697 |
} else {
|
|
1698 |
EC_DBG(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n", |
|
1699 |
dev->name); |
|
1700 |
} |
|
1701 |
#if 0 |
|
1702 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1703 |
RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); |
|
1704 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1705 |
#endif |
|
1706 |
} |
|
1707 |
} |
|
1708 |
||
1709 |
next_tick = HZ * 60; |
|
1710 |
||
1711 |
rtl8139_tune_twister (dev, tp); |
|
1712 |
||
1713 |
DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
|
|
1714 |
dev->name, RTL_R16 (NWayLPAR)); |
|
1715 |
DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n",
|
|
1716 |
dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); |
|
1717 |
DPRINTK ("%s: Chip config %2.2x %2.2x.\n",
|
|
1718 |
dev->name, RTL_R8 (Config0), |
|
1719 |
RTL_R8 (Config1)); |
|
1720 |
} |
|
1721 |
||
1722 |
||
1723 |
static int rtl8139_thread (void *data) |
|
1724 |
{
|
|
1725 |
struct net_device *dev = data; |
|
1726 |
struct rtl8139_private *tp = dev->priv; |
|
1727 |
unsigned long timeout; |
|
1728 |
||
1729 |
EC_DBG(KERN_DEBUG "%s: thread\n", dev->name); |
|
1730 |
||
1731 |
daemonize (); |
|
1732 |
reparent_to_init(); |
|
1733 |
spin_lock_irq(¤t->sigmask_lock); |
|
1734 |
sigemptyset(¤t->blocked); |
|
1735 |
recalc_sigpending(current); |
|
1736 |
spin_unlock_irq(¤t->sigmask_lock); |
|
1737 |
||
1738 |
strncpy (current->comm, dev->name, sizeof(current->comm) - 1); |
|
1739 |
current->comm[sizeof(current->comm) - 1] = '\0'; |
|
1740 |
||
1741 |
EC_DBG(KERN_DEBUG "%s: thread entering loop...\n", dev->name); |
|
1742 |
||
1743 |
while (1) {
|
|
1744 |
timeout = next_tick; |
|
1745 |
do {
|
|
1746 |
timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout); |
|
1747 |
} while (!signal_pending (current) && (timeout > 0)); |
|
1748 |
||
1749 |
if (signal_pending (current)) {
|
|
1750 |
spin_lock_irq(¤t->sigmask_lock); |
|
1751 |
flush_signals(current); |
|
1752 |
spin_unlock_irq(¤t->sigmask_lock); |
|
1753 |
} |
|
1754 |
||
1755 |
if (tp->time_to_die) |
|
1756 |
break; |
|
1757 |
||
1758 |
rtnl_lock (); |
|
1759 |
EC_DBG(KERN_DEBUG "%s: thread iter\n", dev->name); |
|
1760 |
rtl8139_thread_iter (dev, tp, tp->mmio_addr); |
|
1761 |
EC_DBG(KERN_DEBUG "%s: thread iter finished.\n", dev->name); |
|
1762 |
rtnl_unlock (); |
|
1763 |
} |
|
1764 |
||
1765 |
EC_DBG(KERN_DEBUG "%s: thread exiting...\n", dev->name); |
|
1766 |
||
1767 |
complete_and_exit (&tp->thr_exited, 0); |
|
1768 |
||
1769 |
EC_DBG(KERN_DEBUG "%s: thread exit.\n", dev->name); |
|
1770 |
} |
|
1771 |
||
1772 |
||
1773 |
static void rtl8139_tx_clear (struct rtl8139_private *tp) |
|
1774 |
{
|
|
1775 |
tp->cur_tx = 0; |
|
1776 |
tp->dirty_tx = 0; |
|
1777 |
||
1778 |
/* XXX account for unsent Tx packets in tp->stats.tx_dropped */ |
|
1779 |
} |
|
1780 |
||
1781 |
||
1782 |
static void rtl8139_tx_timeout (struct net_device *dev) |
|
1783 |
{
|
|
1784 |
struct rtl8139_private *tp = dev->priv; |
|
1785 |
void *ioaddr = tp->mmio_addr; |
|
1786 |
int i; |
|
1787 |
u8 tmp8; |
|
1788 |
unsigned long flags; |
|
1789 |
||
1790 |
EC_DBG(KERN_DEBUG "%s: tx_timeout\n", dev->name); |
|
1791 |
||
1792 |
DPRINTK ("%s: Transmit timeout, status %2.2x %4.4x "
|
|
1793 |
"media %2.2x.\n", dev->name, |
|
1794 |
RTL_R8 (ChipCmd), |
|
1795 |
RTL_R16 (IntrStatus), |
|
1796 |
RTL_R8 (MediaStatus)); |
|
1797 |
||
1798 |
tp->xstats.tx_timeouts++; |
|
1799 |
||
1800 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1801 |
||
1802 |
if (dev == rtl_ecat_dev.dev) |
|
1803 |
{
|
|
1804 |
if (rtl_ecat_dev.state != ECAT_DS_SENT) |
|
1805 |
{
|
|
1806 |
EC_DBG(KERN_WARNING "EtherCAT: Wrong status at timeout!\n"); |
|
1807 |
} |
|
1808 |
else |
|
1809 |
{
|
|
1810 |
rtl_ecat_dev.state = ECAT_DS_TIMEOUT; |
|
1811 |
} |
|
1812 |
} |
|
1813 |
||
1814 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1815 |
||
1816 |
/* disable Tx ASAP, if not already */ |
|
1817 |
tmp8 = RTL_R8 (ChipCmd); |
|
1818 |
if (tmp8 & CmdTxEnb) |
|
1819 |
RTL_W8 (ChipCmd, CmdRxEnb); |
|
1820 |
||
1821 |
/* Disable interrupts by clearing the interrupt mask. */ |
|
1822 |
RTL_W16 (IntrMask, 0x0000); |
|
1823 |
||
1824 |
/* Emit info to figure out what went wrong. */ |
|
1825 |
EC_DBG (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n", |
|
1826 |
dev->name, tp->cur_tx, tp->dirty_tx); |
|
1827 |
for (i = 0; i < NUM_TX_DESC; i++) |
|
1828 |
EC_DBG (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", |
|
1829 |
dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), |
|
1830 |
i == (int) (tp->dirty_tx % NUM_TX_DESC) ? |
|
1831 |
" (queue head)" : ""); |
|
1832 |
||
1833 |
/* Stop a shared interrupt from scavenging while we are. */ |
|
1834 |
if(dev == rtl_ecat_dev.dev) {
|
|
1835 |
flags = rt_spin_lock_irqsave (&tp->lock); |
|
1836 |
rtl8139_tx_clear (tp); |
|
1837 |
rt_spin_unlock_irqrestore (&tp->lock,flags); |
|
1838 |
} |
|
1839 |
else {
|
|
1840 |
spin_lock_irqsave (&tp->lock, flags); |
|
1841 |
rtl8139_tx_clear (tp); |
|
1842 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
1843 |
} |
|
1844 |
/* ...and finally, reset everything */ |
|
1845 |
rtl8139_hw_start (dev); |
|
1846 |
||
1847 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1848 |
|
| 0 | 1849 |
if (dev != rtl_ecat_dev.dev) netif_wake_queue (dev); |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1850 |
|
| 0 | 1851 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
1852 |
||
1853 |
EC_DBG(KERN_DEBUG "%s: tx_timeout finished.\n", dev->name); |
|
1854 |
} |
|
1855 |
||
1856 |
static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) |
|
1857 |
{
|
|
1858 |
struct rtl8139_private *tp = dev->priv; |
|
1859 |
void *ioaddr = tp->mmio_addr; |
|
1860 |
unsigned int entry; |
|
1861 |
unsigned int len = skb->len; |
|
1862 |
||
1863 |
/* Calculate the next Tx descriptor entry. */ |
|
1864 |
entry = tp->cur_tx % NUM_TX_DESC; |
|
1865 |
||
1866 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1867 |
||
1868 |
if (likely(len < TX_BUF_SIZE)) |
|
1869 |
{
|
|
1870 |
skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); |
|
1871 |
||
1872 |
// Socket buffer nicht löschen, wenn vom EtherCAT-device |
|
1873 |
if (dev != rtl_ecat_dev.dev) dev_kfree_skb(skb); |
|
1874 |
} |
|
1875 |
else |
|
1876 |
{
|
|
1877 |
if (dev != rtl_ecat_dev.dev) dev_kfree_skb(skb); |
|
1878 |
tp->stats.tx_dropped++; |
|
1879 |
return 0; |
|
1880 |
} |
|
1881 |
||
1882 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1883 |
||
1884 |
/* Note: the chip doesn't have auto-pad! */ |
|
1885 |
if(dev == rtl_ecat_dev.dev) |
|
1886 |
rt_spin_lock_irq(&tp->lock); |
|
1887 |
else |
|
1888 |
spin_lock_irq(&tp->lock); |
|
1889 |
||
1890 |
RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), |
|
1891 |
tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); |
|
1892 |
||
1893 |
dev->trans_start = jiffies; |
|
1894 |
||
1895 |
tp->cur_tx++; |
|
1896 |
wmb(); |
|
1897 |
||
1898 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1899 |
||
1900 |
if (dev != rtl_ecat_dev.dev && ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)) |
|
1901 |
netif_stop_queue (dev); |
|
1902 |
||
1903 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1904 |
||
1905 |
if(dev == rtl_ecat_dev.dev) |
|
1906 |
rt_spin_unlock_irq(&tp->lock); |
|
1907 |
else |
|
1908 |
spin_unlock_irq(&tp->lock); |
|
1909 |
DPRINTK ("%s: Queued Tx packet size %u to slot %d.\n",
|
|
1910 |
dev->name, len, entry); |
|
1911 |
||
1912 |
return 0; |
|
1913 |
} |
|
1914 |
||
1915 |
||
1916 |
static void rtl8139_tx_interrupt (struct net_device *dev, |
|
1917 |
struct rtl8139_private *tp, |
|
1918 |
void *ioaddr) |
|
1919 |
{
|
|
1920 |
unsigned long dirty_tx, tx_left; |
|
1921 |
||
1922 |
assert (dev != NULL); |
|
1923 |
assert (tp != NULL); |
|
1924 |
assert (ioaddr != NULL); |
|
1925 |
||
1926 |
dirty_tx = tp->dirty_tx; |
|
1927 |
tx_left = tp->cur_tx - dirty_tx; |
|
1928 |
||
1929 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1930 |
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1931 |
if (dev == rtl_ecat_dev.dev) |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1932 |
{
|
| 0 | 1933 |
(rtl_ecat_dev.tx_intr_cnt)++; |
1934 |
rdtscl(rtl_ecat_dev.tx_time); // Get CPU cycles |
|
1935 |
} |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
1936 |
|
| 0 | 1937 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
1938 |
||
1939 |
while (tx_left > 0) {
|
|
1940 |
int entry = dirty_tx % NUM_TX_DESC; |
|
1941 |
int txstatus; |
|
1942 |
||
1943 |
txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); |
|
1944 |
||
1945 |
if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) |
|
1946 |
break; /* It still hasn't been Txed */ |
|
1947 |
||
1948 |
/* Note: TxCarrierLost is always asserted at 100mbps. */ |
|
1949 |
if (txstatus & (TxOutOfWindow | TxAborted)) {
|
|
1950 |
/* There was an major error, log it. */ |
|
1951 |
DPRINTK ("%s: Transmit error, Tx status %8.8x.\n",
|
|
1952 |
dev->name, txstatus); |
|
1953 |
tp->stats.tx_errors++; |
|
1954 |
if (txstatus & TxAborted) {
|
|
1955 |
tp->stats.tx_aborted_errors++; |
|
1956 |
RTL_W32 (TxConfig, TxClearAbt); |
|
1957 |
RTL_W16 (IntrStatus, TxErr); |
|
1958 |
wmb(); |
|
1959 |
} |
|
1960 |
if (txstatus & TxCarrierLost) |
|
1961 |
tp->stats.tx_carrier_errors++; |
|
1962 |
if (txstatus & TxOutOfWindow) |
|
1963 |
tp->stats.tx_window_errors++; |
|
1964 |
||
1965 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1966 |
||
1967 |
if (dev == rtl_ecat_dev.dev) |
|
1968 |
{
|
|
1969 |
rtl_ecat_dev.state = ECAT_DS_ERROR; |
|
1970 |
} |
|
1971 |
||
1972 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1973 |
||
1974 |
} else {
|
|
1975 |
if (txstatus & TxUnderrun) {
|
|
1976 |
/* Add 64 to the Tx FIFO threshold. */ |
|
1977 |
if (tp->tx_flag < 0x00300000) |
|
1978 |
tp->tx_flag += 0x00020000; |
|
1979 |
tp->stats.tx_fifo_errors++; |
|
1980 |
} |
|
1981 |
tp->stats.collisions += (txstatus >> 24) & 15; |
|
1982 |
tp->stats.tx_bytes += txstatus & 0x7ff; |
|
1983 |
tp->stats.tx_packets++; |
|
1984 |
} |
|
1985 |
||
1986 |
dirty_tx++; |
|
1987 |
tx_left--; |
|
1988 |
} |
|
1989 |
||
1990 |
#ifndef RTL8139_NDEBUG |
|
1991 |
if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
|
|
1992 |
EC_DBG (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", |
|
1993 |
dev->name, dirty_tx, tp->cur_tx); |
|
1994 |
dirty_tx += NUM_TX_DESC; |
|
1995 |
} |
|
1996 |
#endif /* RTL8139_NDEBUG */ |
|
1997 |
||
1998 |
/* only wake the queue if we did work, and the queue is stopped */ |
|
1999 |
if (tp->dirty_tx != dirty_tx) {
|
|
2000 |
tp->dirty_tx = dirty_tx; |
|
2001 |
mb(); |
|
2002 |
||
2003 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2004 |
||
2005 |
if (dev != rtl_ecat_dev.dev && netif_queue_stopped (dev)) |
|
2006 |
netif_wake_queue (dev); |
|
2007 |
||
2008 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2009 |
} |
|
2010 |
} |
|
2011 |
||
2012 |
||
2013 |
/* TODO: clean this up! Rx reset need not be this intensive */ |
|
2014 |
static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, |
|
2015 |
struct rtl8139_private *tp, void *ioaddr) |
|
2016 |
{
|
|
2017 |
u8 tmp8; |
|
2018 |
#ifdef CONFIG_8139_OLD_RX_RESET |
|
2019 |
int tmp_work; |
|
2020 |
#endif |
|
2021 |
||
2022 |
DPRINTK ("%s: Ethernet frame had errors, status %8.8x.\n",
|
|
2023 |
dev->name, rx_status); |
|
2024 |
tp->stats.rx_errors++; |
|
2025 |
if (!(rx_status & RxStatusOK)) {
|
|
2026 |
if (rx_status & RxTooLong) {
|
|
2027 |
DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
|
|
2028 |
dev->name, rx_status); |
|
2029 |
/* A.C.: The chip hangs here. */ |
|
2030 |
} |
|
2031 |
if (rx_status & (RxBadSymbol | RxBadAlign)) |
|
2032 |
tp->stats.rx_frame_errors++; |
|
2033 |
if (rx_status & (RxRunt | RxTooLong)) |
|
2034 |
tp->stats.rx_length_errors++; |
|
2035 |
if (rx_status & RxCRCErr) |
|
2036 |
tp->stats.rx_crc_errors++; |
|
2037 |
} else {
|
|
2038 |
tp->xstats.rx_lost_in_ring++; |
|
2039 |
} |
|
2040 |
||
2041 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2042 |
||
2043 |
if (dev == rtl_ecat_dev.dev) |
|
2044 |
{
|
|
2045 |
rtl_ecat_dev.state = ECAT_DS_ERROR; |
|
2046 |
} |
|
2047 |
||
2048 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2049 |
||
2050 |
#ifndef CONFIG_8139_OLD_RX_RESET |
|
2051 |
tmp8 = RTL_R8 (ChipCmd); |
|
2052 |
RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); |
|
2053 |
RTL_W8 (ChipCmd, tmp8); |
|
2054 |
RTL_W32 (RxConfig, tp->rx_config); |
|
2055 |
tp->cur_rx = 0; |
|
2056 |
#else |
|
2057 |
/* Reset the receiver, based on RealTek recommendation. (Bug?) */ |
|
2058 |
||
2059 |
/* disable receive */ |
|
2060 |
RTL_W8_F (ChipCmd, CmdTxEnb); |
|
2061 |
tmp_work = 200; |
|
2062 |
while (--tmp_work > 0) {
|
|
2063 |
udelay(1); |
|
2064 |
tmp8 = RTL_R8 (ChipCmd); |
|
2065 |
if (!(tmp8 & CmdRxEnb)) |
|
2066 |
break; |
|
2067 |
} |
|
2068 |
if (tmp_work <= 0) |
|
2069 |
EC_DBG (KERN_WARNING PFX "rx stop wait too long\n"); |
|
2070 |
/* restart receive */ |
|
2071 |
tmp_work = 200; |
|
2072 |
while (--tmp_work > 0) {
|
|
2073 |
RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
2074 |
udelay(1); |
|
2075 |
tmp8 = RTL_R8 (ChipCmd); |
|
2076 |
if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) |
|
2077 |
break; |
|
2078 |
} |
|
2079 |
if (tmp_work <= 0) |
|
2080 |
EC_DBG (KERN_WARNING PFX "tx/rx enable wait too long\n"); |
|
2081 |
||
2082 |
/* and reinitialize all rx related registers */ |
|
2083 |
RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
2084 |
/* Must enable Tx/Rx before setting transfer thresholds! */ |
|
2085 |
RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
2086 |
||
2087 |
tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
2088 |
RTL_W32 (RxConfig, tp->rx_config); |
|
2089 |
tp->cur_rx = 0; |
|
2090 |
||
2091 |
DPRINTK("init buffer addresses\n");
|
|
2092 |
||
2093 |
/* Lock Config[01234] and BMCR register writes */ |
|
2094 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2095 |
||
2096 |
/* init Rx ring buffer DMA address */ |
|
2097 |
RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
2098 |
||
2099 |
/* A.C.: Reset the multicast list. */ |
|
2100 |
__set_rx_mode (dev); |
|
2101 |
#endif |
|
2102 |
} |
|
2103 |
||
2104 |
static void rtl8139_rx_interrupt (struct net_device *dev, |
|
2105 |
struct rtl8139_private *tp, void *ioaddr) |
|
2106 |
{
|
|
2107 |
unsigned char *rx_ring; |
|
2108 |
u16 cur_rx; |
|
2109 |
||
2110 |
assert (dev != NULL); |
|
2111 |
assert (tp != NULL); |
|
2112 |
assert (ioaddr != NULL); |
|
2113 |
||
2114 |
rx_ring = tp->rx_ring; |
|
2115 |
cur_rx = tp->cur_rx; |
|
2116 |
||
2117 |
DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
|
|
2118 |
" free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, |
|
2119 |
RTL_R16 (RxBufAddr), |
|
2120 |
RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2121 |
||
2122 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2123 |
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2124 |
if (dev == rtl_ecat_dev.dev) |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2125 |
{
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2126 |
(rtl_ecat_dev.rx_intr_cnt)++; |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2127 |
rdtscl(rtl_ecat_dev.rx_time); // Get CPU cycles |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2128 |
} |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2129 |
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2130 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
| 0 | 2131 |
|
2132 |
while ((RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
|
|
2133 |
int ring_offset = cur_rx % RX_BUF_LEN; |
|
2134 |
u32 rx_status; |
|
2135 |
unsigned int rx_size; |
|
2136 |
unsigned int pkt_size; |
|
2137 |
struct sk_buff *skb; |
|
2138 |
||
2139 |
rmb(); |
|
2140 |
||
2141 |
/* read size+status of next frame from DMA ring buffer */ |
|
2142 |
rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset)); |
|
2143 |
rx_size = rx_status >> 16; |
|
2144 |
pkt_size = rx_size - 4; |
|
2145 |
||
2146 |
||
2147 |
DPRINTK ("%s: rtl8139_rx() status %4.4x, size %4.4x,"
|
|
2148 |
" cur %4.4x.\n", dev->name, rx_status, |
|
2149 |
rx_size, cur_rx); |
|
2150 |
||
2151 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2152 |
|
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2153 |
#if RTL8139_DEBUG > 2 |
| 0 | 2154 |
if (dev == rtl_ecat_dev.dev) |
2155 |
{
|
|
2156 |
int i; |
|
2157 |
DPRINTK ("%s: Frame contents ", dev->name);
|
|
2158 |
for (i = 0; i < 70; i++) |
|
2159 |
EC_DBG (" %2.2x",
|
|
2160 |
rx_ring[ring_offset + i]); |
|
2161 |
EC_DBG (".\n");
|
|
2162 |
} |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2163 |
#endif |
| 0 | 2164 |
|
2165 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2166 |
||
2167 |
/* Packet copy from FIFO still in progress. |
|
2168 |
* Theoretically, this should never happen |
|
2169 |
* since EarlyRx is disabled. |
|
2170 |
*/ |
|
2171 |
if (rx_size == 0xfff0) {
|
|
2172 |
tp->xstats.early_rx++; |
|
2173 |
break; |
|
2174 |
} |
|
2175 |
||
2176 |
/* If Rx err or invalid rx_size/rx_status received |
|
2177 |
* (which happens if we get lost in the ring), |
|
2178 |
* Rx process gets reset, so we abort any further |
|
2179 |
* Rx processing. |
|
2180 |
*/ |
|
2181 |
if ((rx_size > (MAX_ETH_FRAME_SIZE+4)) || |
|
2182 |
(rx_size < 8) || |
|
2183 |
(!(rx_status & RxStatusOK))) {
|
|
2184 |
rtl8139_rx_err (rx_status, dev, tp, ioaddr); |
|
2185 |
return; |
|
2186 |
} |
|
2187 |
||
2188 |
/* Malloc up new buffer, compatible with net-2e. */ |
|
2189 |
/* Omit the four octet CRC from the length. */ |
|
2190 |
||
2191 |
/* TODO: consider allocating skb's outside of |
|
2192 |
* interrupt context, both to speed interrupt processing, |
|
2193 |
* and also to reduce the chances of having to |
|
2194 |
* drop packets here under memory pressure. |
|
2195 |
*/ |
|
2196 |
||
2197 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2198 |
||
2199 |
if (dev != rtl_ecat_dev.dev) |
|
2200 |
{
|
|
2201 |
skb = dev_alloc_skb(pkt_size + 2); |
|
2202 |
||
2203 |
if (skb) |
|
2204 |
{
|
|
2205 |
skb->dev = dev; |
|
2206 |
skb_reserve (skb, 2); /* 16 byte align the IP fields. */ |
|
2207 |
eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0); |
|
2208 |
skb_put (skb, pkt_size); |
|
2209 |
skb->protocol = eth_type_trans (skb, dev); // Entfernt auch den Ethernet Header! |
|
2210 |
netif_rx(skb); |
|
2211 |
||
2212 |
||
2213 |
dev->last_rx = jiffies; |
|
2214 |
tp->stats.rx_bytes += pkt_size; |
|
2215 |
tp->stats.rx_packets++; |
|
2216 |
} |
|
2217 |
else |
|
2218 |
{
|
|
2219 |
EC_DBG (KERN_WARNING |
|
2220 |
"%s: Memory squeeze, dropping packet.\n", |
|
2221 |
dev->name); |
|
2222 |
tp->stats.rx_dropped++; |
|
2223 |
} |
|
2224 |
} |
|
2225 |
else |
|
2226 |
{
|
|
2227 |
if (rtl_ecat_dev.state != ECAT_DS_SENT) |
|
2228 |
{
|
|
2229 |
EC_DBG(KERN_WARNING "EtherCAT: Received frame while not in SENT state!\n"); |
|
2230 |
} |
|
2231 |
else |
|
2232 |
{
|
|
2233 |
// Copy received data to ethercat-device buffer, skip Ethernet-II header |
|
2234 |
memcpy(rtl_ecat_dev.rx_data, &rx_ring[ring_offset + 4] + ETH_HLEN, |
|
2235 |
pkt_size - ETH_HLEN); |
|
2236 |
rtl_ecat_dev.rx_data_length = pkt_size - ETH_HLEN; |
|
2237 |
||
2238 |
rtl_ecat_dev.state = ECAT_DS_RECEIVED; |
|
2239 |
||
2240 |
dev->last_rx = jiffies; |
|
2241 |
tp->stats.rx_bytes += pkt_size; |
|
2242 |
tp->stats.rx_packets++; |
|
2243 |
} |
|
2244 |
} |
|
2245 |
||
2246 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2247 |
||
2248 |
cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; |
|
2249 |
RTL_W16 (RxBufPtr, cur_rx - 16); |
|
2250 |
||
2251 |
if (RTL_R16 (IntrStatus) & RxAckBits) |
|
2252 |
RTL_W16_F (IntrStatus, RxAckBits); |
|
2253 |
} |
|
2254 |
||
2255 |
DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
|
|
2256 |
" free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, |
|
2257 |
RTL_R16 (RxBufAddr), |
|
2258 |
RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2259 |
||
2260 |
tp->cur_rx = cur_rx; |
|
2261 |
} |
|
2262 |
||
2263 |
||
2264 |
static void rtl8139_weird_interrupt (struct net_device *dev, |
|
2265 |
struct rtl8139_private *tp, |
|
2266 |
void *ioaddr, |
|
2267 |
int status, int link_changed) |
|
2268 |
{
|
|
2269 |
DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
|
|
2270 |
dev->name, status); |
|
2271 |
||
2272 |
assert (dev != NULL); |
|
2273 |
assert (tp != NULL); |
|
2274 |
assert (ioaddr != NULL); |
|
2275 |
||
2276 |
/* Update the error count. */ |
|
2277 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2278 |
RTL_W32 (RxMissed, 0); |
|
2279 |
||
2280 |
if ((status & RxUnderrun) && link_changed && |
|
2281 |
(tp->drv_flags & HAS_LNK_CHNG)) {
|
|
2282 |
/* Really link-change on new chips. */ |
|
2283 |
int lpar = RTL_R16 (NWayLPAR); |
|
2284 |
int duplex = (lpar & LPA_100FULL) || (lpar & 0x01C0) == 0x0040 |
|
2285 |
|| tp->mii.force_media; |
|
2286 |
if (tp->mii.full_duplex != duplex) {
|
|
2287 |
tp->mii.full_duplex = duplex; |
|
2288 |
#if 0 |
|
2289 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2290 |
RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); |
|
2291 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2292 |
#endif |
|
2293 |
} |
|
2294 |
status &= ~RxUnderrun; |
|
2295 |
} |
|
2296 |
||
2297 |
/* XXX along with rtl8139_rx_err, are we double-counting errors? */ |
|
2298 |
if (status & |
|
2299 |
(RxUnderrun | RxOverflow | RxErr | RxFIFOOver)) |
|
2300 |
tp->stats.rx_errors++; |
|
2301 |
||
2302 |
if (status & PCSTimeout) |
|
2303 |
tp->stats.rx_length_errors++; |
|
2304 |
if (status & (RxUnderrun | RxFIFOOver)) |
|
2305 |
tp->stats.rx_fifo_errors++; |
|
2306 |
if (status & PCIErr) {
|
|
2307 |
u16 pci_cmd_status; |
|
2308 |
pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); |
|
2309 |
pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); |
|
2310 |
||
2311 |
EC_DBG (KERN_ERR "%s: PCI Bus error %4.4x.\n", |
|
2312 |
dev->name, pci_cmd_status); |
|
2313 |
} |
|
2314 |
} |
|
2315 |
||
2316 |
||
2317 |
||
2318 |
/* The interrupt handler does all of the Rx thread work and cleans up |
|
2319 |
after the Tx thread. */ |
|
2320 |
static void rtl8139_interrupt (int irq, void *dev_instance, |
|
2321 |
struct pt_regs *regs) |
|
2322 |
{
|
|
2323 |
struct net_device *dev = (struct net_device *) dev_instance; |
|
2324 |
struct rtl8139_private *tp = dev->priv; |
|
2325 |
int boguscnt = max_interrupt_work; |
|
2326 |
void *ioaddr = tp->mmio_addr; |
|
2327 |
int ackstat, status; |
|
2328 |
int link_changed = 0; /* avoid bogus "uninit" warning */ |
|
2329 |
||
2330 |
if(dev == rtl_ecat_dev.dev) {
|
|
2331 |
rt_spin_lock (&tp->lock); |
|
2332 |
(rtl_ecat_dev.intr_cnt)++; |
|
2333 |
} |
|
2334 |
else |
|
2335 |
spin_lock (&tp->lock); |
|
2336 |
||
2337 |
do {
|
|
2338 |
status = RTL_R16 (IntrStatus); |
|
2339 |
||
2340 |
/* h/w no longer present (hotplug?) or major error, bail */ |
|
2341 |
if (status == 0xFFFF) |
|
2342 |
break; |
|
2343 |
||
2344 |
if ((status & |
|
2345 |
(PCIErr | PCSTimeout | RxUnderrun | RxOverflow | |
|
2346 |
RxFIFOOver | TxErr | TxOK | RxErr | RxOK)) == 0) |
|
2347 |
break; |
|
2348 |
||
2349 |
/* Acknowledge all of the current interrupt sources ASAP, but |
|
2350 |
an first get an additional status bit from CSCR. */ |
|
2351 |
if (status & RxUnderrun) |
|
2352 |
link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; |
|
2353 |
||
2354 |
/* The chip takes special action when we clear RxAckBits, |
|
2355 |
* so we clear them later in rtl8139_rx_interrupt |
|
2356 |
*/ |
|
2357 |
ackstat = status & ~(RxAckBits | TxErr); |
|
2358 |
RTL_W16 (IntrStatus, ackstat); |
|
2359 |
||
2360 |
DPRINTK ("%s: interrupt status=%#4.4x ackstat=%#4.4x new intstat=%#4.4x.\n",
|
|
2361 |
dev->name, ackstat, status, RTL_R16 (IntrStatus)); |
|
2362 |
||
2363 |
if ((dev == rtl_ecat_dev.dev || netif_running (dev)) && (status & RxAckBits)) |
|
2364 |
rtl8139_rx_interrupt (dev, tp, ioaddr); |
|
2365 |
||
2366 |
/* Check uncommon events with one test. */ |
|
2367 |
if (status & (PCIErr | PCSTimeout | RxUnderrun | RxOverflow | |
|
2368 |
RxFIFOOver | RxErr)) |
|
2369 |
rtl8139_weird_interrupt (dev, tp, ioaddr, |
|
2370 |
status, link_changed); |
|
2371 |
||
2372 |
if ((dev == rtl_ecat_dev.dev || netif_running (dev)) && (status & (TxOK | TxErr))) {
|
|
2373 |
rtl8139_tx_interrupt (dev, tp, ioaddr); |
|
2374 |
if (status & TxErr) |
|
2375 |
RTL_W16 (IntrStatus, TxErr); |
|
2376 |
} |
|
2377 |
||
2378 |
boguscnt--; |
|
2379 |
} while (boguscnt > 0); |
|
2380 |
||
2381 |
if (boguscnt <= 0) {
|
|
2382 |
EC_DBG (KERN_WARNING "%s: Too much work at interrupt, " |
|
2383 |
"IntrStatus=0x%4.4x.\n", dev->name, status); |
|
2384 |
||
2385 |
/* Clear all interrupt sources. */ |
|
2386 |
RTL_W16 (IntrStatus, 0xffff); |
|
2387 |
} |
|
2388 |
||
2389 |
if(dev == rtl_ecat_dev.dev) |
|
2390 |
rt_spin_unlock (&tp->lock); |
|
2391 |
else |
|
2392 |
spin_unlock (&tp->lock); |
|
2393 |
||
2394 |
DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
|
|
2395 |
dev->name, RTL_R16 (IntrStatus)); |
|
2396 |
} |
|
2397 |
||
2398 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2399 |
||
2400 |
static void rt_rtl8139_interrupt(void) |
|
2401 |
{
|
|
2402 |
rtl8139_interrupt(rtl_ecat_dev.dev->irq, rtl_ecat_dev.dev, NULL); |
|
2403 |
} |
|
2404 |
||
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2405 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
| 0 | 2406 |
|
2407 |
static int rtl8139_close (struct net_device *dev) |
|
2408 |
{
|
|
2409 |
struct rtl8139_private *tp = dev->priv; |
|
2410 |
void *ioaddr = tp->mmio_addr; |
|
2411 |
int ret = 0; |
|
2412 |
unsigned long flags; |
|
2413 |
||
2414 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2415 |
||
2416 |
if (dev != rtl_ecat_dev.dev) |
|
2417 |
{
|
|
2418 |
netif_stop_queue(dev); |
|
2419 |
||
2420 |
if (tp->thr_pid >= 0) {
|
|
2421 |
tp->time_to_die = 1; |
|
2422 |
wmb(); |
|
2423 |
ret = kill_proc (tp->thr_pid, SIGTERM, 1); |
|
2424 |
if (ret) {
|
|
2425 |
EC_DBG (KERN_ERR "%s: unable to signal thread\n", dev->name); |
|
2426 |
return ret; |
|
2427 |
} |
|
2428 |
wait_for_completion (&tp->thr_exited); |
|
2429 |
} |
|
2430 |
} |
|
2431 |
||
2432 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2433 |
||
2434 |
DPRINTK ("%s: Shutting down ethercard, status was 0x%4.4x.\n",
|
|
2435 |
dev->name, RTL_R16 (IntrStatus)); |
|
2436 |
||
2437 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2438 |
||
2439 |
mdelay(1); //hm |
|
2440 |
||
2441 |
if (dev == rtl_ecat_dev.dev) |
|
2442 |
{
|
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2443 |
flags = rt_spin_lock_irqsave(&tp->lock); |
| 0 | 2444 |
} |
2445 |
else |
|
2446 |
{
|
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2447 |
spin_lock_irqsave(&tp->lock, flags); |
| 0 | 2448 |
} |
2449 |
||
2450 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2451 |
||
2452 |
/* Stop the chip's Tx and Rx DMA processes. */ |
|
2453 |
RTL_W8 (ChipCmd, 0); |
|
2454 |
||
2455 |
/* Disable interrupts by clearing the interrupt mask. */ |
|
2456 |
RTL_W16 (IntrMask, 0); |
|
2457 |
||
2458 |
/* Update the error counts. */ |
|
2459 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2460 |
RTL_W32 (RxMissed, 0); |
|
2461 |
||
2462 |
if (dev == rtl_ecat_dev.dev) {
|
|
2463 |
rt_spin_unlock_irqrestore (&tp->lock, flags); |
|
2464 |
synchronize_irq (); |
|
2465 |
} |
|
2466 |
else {
|
|
2467 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2468 |
synchronize_irq (); |
|
2469 |
} |
|
2470 |
||
2471 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2472 |
|
| 0 | 2473 |
EC_DBG ("rtl8139: freeing irq");
|
2474 |
mdelay(1); //hm |
|
2475 |
||
2476 |
if (dev != rtl_ecat_dev.dev) |
|
2477 |
{
|
|
2478 |
free_irq (dev->irq, dev); |
|
2479 |
} |
|
2480 |
else |
|
2481 |
{
|
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2482 |
rt_disable_irq(dev->irq); |
| 0 | 2483 |
rt_free_global_irq (dev->irq); |
2484 |
rt_enable_irq(dev->irq); |
|
2485 |
} |
|
2486 |
||
2487 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2488 |
||
2489 |
rtl8139_tx_clear (tp); |
|
2490 |
||
2491 |
pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
2492 |
tp->rx_ring, tp->rx_ring_dma); |
|
2493 |
pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
2494 |
tp->tx_bufs, tp->tx_bufs_dma); |
|
2495 |
tp->rx_ring = NULL; |
|
2496 |
tp->tx_bufs = NULL; |
|
2497 |
||
2498 |
/* Green! Put the chip in low-power mode. */ |
|
2499 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2500 |
||
2501 |
if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
2502 |
RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
2503 |
||
2504 |
EC_DBG ("rtl8139: closing done\n");
|
|
2505 |
||
2506 |
return 0; |
|
2507 |
} |
|
2508 |
||
2509 |
||
2510 |
/* Get the ethtool Wake-on-LAN settings. Assumes that wol points to |
|
2511 |
kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
|
|
2512 |
other threads or interrupts aren't messing with the 8139. */ |
|
2513 |
static void netdev_get_wol (struct net_device *dev, struct ethtool_wolinfo *wol) |
|
2514 |
{
|
|
2515 |
struct rtl8139_private *np = dev->priv; |
|
2516 |
void *ioaddr = np->mmio_addr; |
|
2517 |
||
2518 |
if (rtl_chip_info[np->chipset].flags & HasLWake) {
|
|
2519 |
u8 cfg3 = RTL_R8 (Config3); |
|
2520 |
u8 cfg5 = RTL_R8 (Config5); |
|
2521 |
||
2522 |
wol->supported = WAKE_PHY | WAKE_MAGIC |
|
2523 |
| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; |
|
2524 |
||
2525 |
wol->wolopts = 0; |
|
2526 |
if (cfg3 & Cfg3_LinkUp) |
|
2527 |
wol->wolopts |= WAKE_PHY; |
|
2528 |
if (cfg3 & Cfg3_Magic) |
|
2529 |
wol->wolopts |= WAKE_MAGIC; |
|
2530 |
/* (KON)FIXME: See how netdev_set_wol() handles the |
|
2531 |
following constants. */ |
|
2532 |
if (cfg5 & Cfg5_UWF) |
|
2533 |
wol->wolopts |= WAKE_UCAST; |
|
2534 |
if (cfg5 & Cfg5_MWF) |
|
2535 |
wol->wolopts |= WAKE_MCAST; |
|
2536 |
if (cfg5 & Cfg5_BWF) |
|
2537 |
wol->wolopts |= WAKE_BCAST; |
|
2538 |
} |
|
2539 |
} |
|
2540 |
||
2541 |
||
2542 |
/* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes |
|
2543 |
that wol points to kernel memory and other threads or interrupts |
|
2544 |
aren't messing with the 8139. */ |
|
2545 |
static int netdev_set_wol (struct net_device *dev, |
|
2546 |
const struct ethtool_wolinfo *wol) |
|
2547 |
{
|
|
2548 |
struct rtl8139_private *np = dev->priv; |
|
2549 |
void *ioaddr = np->mmio_addr; |
|
2550 |
u32 support; |
|
2551 |
u8 cfg3, cfg5; |
|
2552 |
||
2553 |
support = ((rtl_chip_info[np->chipset].flags & HasLWake) |
|
2554 |
? (WAKE_PHY | WAKE_MAGIC |
|
2555 |
| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) |
|
2556 |
: 0); |
|
2557 |
if (wol->wolopts & ~support) |
|
2558 |
return -EINVAL; |
|
2559 |
||
2560 |
cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); |
|
2561 |
if (wol->wolopts & WAKE_PHY) |
|
2562 |
cfg3 |= Cfg3_LinkUp; |
|
2563 |
if (wol->wolopts & WAKE_MAGIC) |
|
2564 |
cfg3 |= Cfg3_Magic; |
|
2565 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2566 |
RTL_W8 (Config3, cfg3); |
|
2567 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2568 |
||
2569 |
cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); |
|
2570 |
/* (KON)FIXME: These are untested. We may have to set the |
|
2571 |
CRC0, Wakeup0 and LSBCRC0 registers too, but I have no |
|
2572 |
documentation. */ |
|
2573 |
if (wol->wolopts & WAKE_UCAST) |
|
2574 |
cfg5 |= Cfg5_UWF; |
|
2575 |
if (wol->wolopts & WAKE_MCAST) |
|
2576 |
cfg5 |= Cfg5_MWF; |
|
2577 |
if (wol->wolopts & WAKE_BCAST) |
|
2578 |
cfg5 |= Cfg5_BWF; |
|
2579 |
RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ |
|
2580 |
||
2581 |
return 0; |
|
2582 |
} |
|
2583 |
||
2584 |
static int netdev_ethtool_ioctl (struct net_device *dev, void *useraddr) |
|
2585 |
{
|
|
2586 |
struct rtl8139_private *np = dev->priv; |
|
2587 |
u32 ethcmd; |
|
2588 |
||
2589 |
/* dev_ioctl() in ../../net/core/dev.c has already checked |
|
2590 |
capable(CAP_NET_ADMIN), so don't bother with that here. */ |
|
2591 |
||
2592 |
if (get_user(ethcmd, (u32 *)useraddr)) |
|
2593 |
return -EFAULT; |
|
2594 |
||
2595 |
switch (ethcmd) {
|
|
2596 |
||
2597 |
case ETHTOOL_GDRVINFO: {
|
|
2598 |
struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
|
|
2599 |
strcpy (info.driver, DRV_NAME); |
|
2600 |
strcpy (info.version, DRV_VERSION); |
|
2601 |
strcpy (info.bus_info, np->pci_dev->slot_name); |
|
2602 |
info.regdump_len = np->regs_len; |
|
2603 |
if (copy_to_user (useraddr, &info, sizeof (info))) |
|
2604 |
return -EFAULT; |
|
2605 |
return 0; |
|
2606 |
} |
|
2607 |
||
2608 |
/* get settings */ |
|
2609 |
case ETHTOOL_GSET: {
|
|
2610 |
struct ethtool_cmd ecmd = { ETHTOOL_GSET };
|
|
2611 |
spin_lock_irq(&np->lock); |
|
2612 |
mii_ethtool_gset(&np->mii, &ecmd); |
|
2613 |
spin_unlock_irq(&np->lock); |
|
2614 |
if (copy_to_user(useraddr, &ecmd, sizeof(ecmd))) |
|
2615 |
return -EFAULT; |
|
2616 |
return 0; |
|
2617 |
} |
|
2618 |
/* set settings */ |
|
2619 |
case ETHTOOL_SSET: {
|
|
2620 |
int r; |
|
2621 |
struct ethtool_cmd ecmd; |
|
2622 |
if (copy_from_user(&ecmd, useraddr, sizeof(ecmd))) |
|
2623 |
return -EFAULT; |
|
2624 |
spin_lock_irq(&np->lock); |
|
2625 |
r = mii_ethtool_sset(&np->mii, &ecmd); |
|
2626 |
spin_unlock_irq(&np->lock); |
|
2627 |
return r; |
|
2628 |
} |
|
2629 |
/* restart autonegotiation */ |
|
2630 |
case ETHTOOL_NWAY_RST: {
|
|
2631 |
return mii_nway_restart(&np->mii); |
|
2632 |
} |
|
2633 |
/* get link status */ |
|
2634 |
case ETHTOOL_GLINK: {
|
|
2635 |
struct ethtool_value edata = {ETHTOOL_GLINK};
|
|
2636 |
edata.data = mii_link_ok(&np->mii); |
|
2637 |
if (copy_to_user(useraddr, &edata, sizeof(edata))) |
|
2638 |
return -EFAULT; |
|
2639 |
return 0; |
|
2640 |
} |
|
2641 |
||
2642 |
/* get message-level */ |
|
2643 |
case ETHTOOL_GMSGLVL: {
|
|
2644 |
struct ethtool_value edata = {ETHTOOL_GMSGLVL};
|
|
2645 |
edata.data = debug; |
|
2646 |
if (copy_to_user(useraddr, &edata, sizeof(edata))) |
|
2647 |
return -EFAULT; |
|
2648 |
return 0; |
|
2649 |
} |
|
2650 |
/* set message-level */ |
|
2651 |
case ETHTOOL_SMSGLVL: {
|
|
2652 |
struct ethtool_value edata; |
|
2653 |
if (copy_from_user(&edata, useraddr, sizeof(edata))) |
|
2654 |
return -EFAULT; |
|
2655 |
debug = edata.data; |
|
2656 |
return 0; |
|
2657 |
} |
|
2658 |
||
2659 |
case ETHTOOL_GWOL: |
|
2660 |
{
|
|
2661 |
struct ethtool_wolinfo wol = { ETHTOOL_GWOL };
|
|
2662 |
spin_lock_irq (&np->lock); |
|
2663 |
netdev_get_wol (dev, &wol); |
|
2664 |
spin_unlock_irq (&np->lock); |
|
2665 |
if (copy_to_user (useraddr, &wol, sizeof (wol))) |
|
2666 |
return -EFAULT; |
|
2667 |
return 0; |
|
2668 |
} |
|
2669 |
||
2670 |
case ETHTOOL_SWOL: |
|
2671 |
{
|
|
2672 |
struct ethtool_wolinfo wol; |
|
2673 |
int rc; |
|
2674 |
if (copy_from_user (&wol, useraddr, sizeof (wol))) |
|
2675 |
return -EFAULT; |
|
2676 |
spin_lock_irq (&np->lock); |
|
2677 |
rc = netdev_set_wol (dev, &wol); |
|
2678 |
spin_unlock_irq (&np->lock); |
|
2679 |
return rc; |
|
2680 |
} |
|
2681 |
||
2682 |
/* TODO: we are too slack to do reg dumping for pio, for now */ |
|
2683 |
#ifndef CONFIG_8139TOO_PIO |
|
2684 |
/* NIC register dump */ |
|
2685 |
case ETHTOOL_GREGS: {
|
|
2686 |
struct ethtool_regs regs; |
|
2687 |
unsigned int regs_len = np->regs_len; |
|
2688 |
u8 *regbuf = kmalloc(regs_len, GFP_KERNEL); |
|
2689 |
int rc; |
|
2690 |
||
2691 |
if (!regbuf) |
|
2692 |
return -ENOMEM; |
|
2693 |
memset(regbuf, 0, regs_len); |
|
2694 |
||
2695 |
rc = copy_from_user(®s, useraddr, sizeof(regs)); |
|
2696 |
if (rc) {
|
|
2697 |
rc = -EFAULT; |
|
2698 |
goto err_out_gregs; |
|
2699 |
} |
|
2700 |
||
2701 |
if (regs.len > regs_len) |
|
2702 |
regs.len = regs_len; |
|
2703 |
if (regs.len < regs_len) {
|
|
2704 |
rc = -EINVAL; |
|
2705 |
goto err_out_gregs; |
|
2706 |
} |
|
2707 |
||
2708 |
regs.version = RTL_REGS_VER; |
|
2709 |
rc = copy_to_user(useraddr, ®s, sizeof(regs)); |
|
2710 |
if (rc) {
|
|
2711 |
rc = -EFAULT; |
|
2712 |
goto err_out_gregs; |
|
2713 |
} |
|
2714 |
||
2715 |
useraddr += offsetof(struct ethtool_regs, data); |
|
2716 |
||
2717 |
spin_lock_irq(&np->lock); |
|
2718 |
memcpy_fromio(regbuf, np->mmio_addr, regs_len); |
|
2719 |
spin_unlock_irq(&np->lock); |
|
2720 |
||
2721 |
if (copy_to_user(useraddr, regbuf, regs_len)) |
|
2722 |
rc = -EFAULT; |
|
2723 |
||
2724 |
err_out_gregs: |
|
2725 |
kfree(regbuf); |
|
2726 |
return rc; |
|
2727 |
} |
|
2728 |
#endif /* CONFIG_8139TOO_PIO */ |
|
2729 |
||
2730 |
/* get string list(s) */ |
|
2731 |
case ETHTOOL_GSTRINGS: {
|
|
2732 |
struct ethtool_gstrings estr = { ETHTOOL_GSTRINGS };
|
|
2733 |
||
2734 |
if (copy_from_user(&estr, useraddr, sizeof(estr))) |
|
2735 |
return -EFAULT; |
|
2736 |
if (estr.string_set != ETH_SS_STATS) |
|
2737 |
return -EINVAL; |
|
2738 |
||
2739 |
estr.len = RTL_NUM_STATS; |
|
2740 |
if (copy_to_user(useraddr, &estr, sizeof(estr))) |
|
2741 |
return -EFAULT; |
|
2742 |
if (copy_to_user(useraddr + sizeof(estr), |
|
2743 |
ðtool_stats_keys, |
|
2744 |
sizeof(ethtool_stats_keys))) |
|
2745 |
return -EFAULT; |
|
2746 |
return 0; |
|
2747 |
} |
|
2748 |
||
2749 |
/* get NIC-specific statistics */ |
|
2750 |
case ETHTOOL_GSTATS: {
|
|
2751 |
struct ethtool_stats estats = { ETHTOOL_GSTATS };
|
|
2752 |
u64 *tmp_stats; |
|
2753 |
const unsigned int sz = sizeof(u64) * RTL_NUM_STATS; |
|
2754 |
int i; |
|
2755 |
||
2756 |
estats.n_stats = RTL_NUM_STATS; |
|
2757 |
if (copy_to_user(useraddr, &estats, sizeof(estats))) |
|
2758 |
return -EFAULT; |
|
2759 |
||
2760 |
tmp_stats = kmalloc(sz, GFP_KERNEL); |
|
2761 |
if (!tmp_stats) |
|
2762 |
return -ENOMEM; |
|
2763 |
memset(tmp_stats, 0, sz); |
|
2764 |
||
2765 |
i = 0; |
|
2766 |
tmp_stats[i++] = np->xstats.early_rx; |
|
2767 |
tmp_stats[i++] = np->xstats.tx_buf_mapped; |
|
2768 |
tmp_stats[i++] = np->xstats.tx_timeouts; |
|
2769 |
tmp_stats[i++] = np->xstats.rx_lost_in_ring; |
|
2770 |
if (i != RTL_NUM_STATS) |
|
2771 |
BUG(); |
|
2772 |
||
2773 |
i = copy_to_user(useraddr + sizeof(estats), tmp_stats, sz); |
|
2774 |
kfree(tmp_stats); |
|
2775 |
||
2776 |
if (i) |
|
2777 |
return -EFAULT; |
|
2778 |
return 0; |
|
2779 |
} |
|
2780 |
default: |
|
2781 |
break; |
|
2782 |
} |
|
2783 |
||
2784 |
return -EOPNOTSUPP; |
|
2785 |
} |
|
2786 |
||
2787 |
||
2788 |
static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
|
2789 |
{
|
|
2790 |
struct rtl8139_private *np = dev->priv; |
|
2791 |
struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data; |
|
2792 |
int rc; |
|
2793 |
||
2794 |
if (dev == rtl_ecat_dev.dev || !netif_running(dev)) |
|
2795 |
return -EINVAL; |
|
2796 |
||
2797 |
if (cmd == SIOCETHTOOL) |
|
2798 |
rc = netdev_ethtool_ioctl(dev, (void *) rq->ifr_data); |
|
2799 |
||
2800 |
else {
|
|
2801 |
spin_lock_irq(&np->lock); |
|
2802 |
rc = generic_mii_ioctl(&np->mii, data, cmd, NULL); |
|
2803 |
spin_unlock_irq(&np->lock); |
|
2804 |
} |
|
2805 |
||
2806 |
return rc; |
|
2807 |
} |
|
2808 |
||
2809 |
||
2810 |
static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) |
|
2811 |
{
|
|
2812 |
struct rtl8139_private *tp = dev->priv; |
|
2813 |
void *ioaddr = tp->mmio_addr; |
|
2814 |
unsigned long flags; |
|
2815 |
||
2816 |
EC_DBG("%s: rtl8139 GETSTATS called...",dev->name);
|
|
2817 |
||
2818 |
if (dev == rtl_ecat_dev.dev) {
|
|
2819 |
flags = rt_spin_lock_irqsave (&tp->lock); |
|
2820 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2821 |
RTL_W32 (RxMissed, 0); |
|
2822 |
rt_spin_unlock_irqrestore (&tp->lock, flags); |
|
2823 |
} |
|
2824 |
else {
|
|
2825 |
if (netif_running(dev)) {
|
|
2826 |
spin_lock_irqsave (&tp->lock, flags); |
|
2827 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2828 |
RTL_W32 (RxMissed, 0); |
|
2829 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2830 |
} |
|
2831 |
} |
|
2832 |
||
2833 |
return &tp->stats; |
|
2834 |
} |
|
2835 |
||
2836 |
/* Set or clear the multicast filter for this adaptor. |
|
2837 |
This routine is not state sensitive and need not be SMP locked. */ |
|
2838 |
||
2839 |
static void __set_rx_mode (struct net_device *dev) |
|
2840 |
{
|
|
2841 |
struct rtl8139_private *tp = dev->priv; |
|
2842 |
void *ioaddr = tp->mmio_addr; |
|
2843 |
u32 mc_filter[2]; /* Multicast hash filter */ |
|
2844 |
int i, rx_mode; |
|
2845 |
u32 tmp; |
|
2846 |
||
2847 |
DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
|
|
2848 |
dev->name, dev->flags, RTL_R32 (RxConfig)); |
|
2849 |
||
2850 |
/* Note: do not reorder, GCC is clever about common statements. */ |
|
2851 |
if (dev->flags & IFF_PROMISC) {
|
|
2852 |
/* Unconditionally log net taps. */ |
|
2853 |
EC_DBG (KERN_NOTICE "%s: Promiscuous mode enabled.\n", |
|
2854 |
dev->name); |
|
2855 |
rx_mode = |
|
2856 |
AcceptBroadcast | AcceptMulticast | AcceptMyPhys | |
|
2857 |
AcceptAllPhys; |
|
2858 |
mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2859 |
} else if ((dev->mc_count > multicast_filter_limit) |
|
2860 |
|| (dev->flags & IFF_ALLMULTI)) {
|
|
2861 |
/* Too many to filter perfectly -- accept all multicasts. */ |
|
2862 |
rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; |
|
2863 |
mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2864 |
} else {
|
|
2865 |
struct dev_mc_list *mclist; |
|
2866 |
rx_mode = AcceptBroadcast | AcceptMyPhys; |
|
2867 |
mc_filter[1] = mc_filter[0] = 0; |
|
2868 |
for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; |
|
2869 |
i++, mclist = mclist->next) {
|
|
2870 |
int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; |
|
2871 |
||
2872 |
mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); |
|
2873 |
rx_mode |= AcceptMulticast; |
|
2874 |
} |
|
2875 |
} |
|
2876 |
||
2877 |
/* We can safely update without stopping the chip. */ |
|
2878 |
tmp = rtl8139_rx_config | rx_mode; |
|
2879 |
if (tp->rx_config != tmp) {
|
|
2880 |
RTL_W32_F (RxConfig, tmp); |
|
2881 |
tp->rx_config = tmp; |
|
2882 |
} |
|
2883 |
RTL_W32_F (MAR0 + 0, mc_filter[0]); |
|
2884 |
RTL_W32_F (MAR0 + 4, mc_filter[1]); |
|
2885 |
} |
|
2886 |
||
2887 |
static void rtl8139_set_rx_mode (struct net_device *dev) |
|
2888 |
{
|
|
2889 |
unsigned long flags; |
|
2890 |
struct rtl8139_private *tp = dev->priv; |
|
2891 |
||
2892 |
if(dev == rtl_ecat_dev.dev) {
|
|
2893 |
flags = rt_spin_lock_irqsave (&tp->lock); |
|
2894 |
__set_rx_mode(dev); |
|
2895 |
rt_spin_unlock_irqrestore (&tp->lock, flags); |
|
2896 |
} |
|
2897 |
else {
|
|
2898 |
spin_lock_irqsave (&tp->lock, flags); |
|
2899 |
__set_rx_mode(dev); |
|
2900 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2901 |
} |
|
2902 |
} |
|
2903 |
||
2904 |
#ifdef CONFIG_PM |
|
2905 |
||
2906 |
static int rtl8139_suspend (struct pci_dev *pdev, u32 state) |
|
2907 |
{
|
|
2908 |
struct net_device *dev = pci_get_drvdata (pdev); |
|
2909 |
struct rtl8139_private *tp = dev->priv; |
|
2910 |
void *ioaddr = tp->mmio_addr; |
|
2911 |
unsigned long flags; |
|
2912 |
||
2913 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2914 |
|
| 0 | 2915 |
if (dev == rtl_ecat_dev.dev || !netif_running (dev)) |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2916 |
return 0; |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2917 |
|
| 0 | 2918 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
2919 |
||
2920 |
netif_device_detach (dev); |
|
2921 |
||
2922 |
spin_lock_irqsave (&tp->lock, flags); |
|
2923 |
||
2924 |
/* Disable interrupts, stop Tx and Rx. */ |
|
2925 |
RTL_W16 (IntrMask, 0); |
|
2926 |
RTL_W8 (ChipCmd, 0); |
|
2927 |
||
2928 |
/* Update the error counts. */ |
|
2929 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2930 |
RTL_W32 (RxMissed, 0); |
|
2931 |
||
2932 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2933 |
return 0; |
|
2934 |
} |
|
2935 |
||
2936 |
||
2937 |
static int rtl8139_resume (struct pci_dev *pdev) |
|
2938 |
{
|
|
2939 |
struct net_device *dev = pci_get_drvdata (pdev); |
|
2940 |
||
2941 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2942 |
|
| 0 | 2943 |
if (dev == rtl_ecat_dev.dev || !netif_running (dev)) |
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2944 |
return 0; |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2945 |
|
| 0 | 2946 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
2947 |
||
2948 |
netif_device_attach (dev); |
|
2949 |
||
2950 |
rtl8139_hw_start (dev); |
|
2951 |
return 0; |
|
2952 |
} |
|
2953 |
||
2954 |
#endif /* CONFIG_PM */ |
|
2955 |
||
2956 |
||
2957 |
static struct pci_driver rtl8139_pci_driver = {
|
|
2958 |
.name = DRV_NAME, |
|
2959 |
.id_table = rtl8139_pci_tbl, |
|
2960 |
.probe = rtl8139_init_one, |
|
2961 |
.remove = __devexit_p(rtl8139_remove_one), |
|
2962 |
#ifdef CONFIG_PM |
|
2963 |
.suspend = rtl8139_suspend, |
|
2964 |
.resume = rtl8139_resume, |
|
2965 |
#endif /* CONFIG_PM */ |
|
2966 |
}; |
|
2967 |
||
2968 |
||
2969 |
static int rtl8139_init_module (void) |
|
2970 |
{
|
|
2971 |
/* when we're a module, we always print a version message, |
|
2972 |
* even if no 8139 board is found. |
|
2973 |
*/ |
|
2974 |
#ifdef MODULE |
|
2975 |
EC_DBG (KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
2976 |
#endif |
|
2977 |
||
2978 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2979 |
||
2980 |
EtherCAT_device_init(&rtl_ecat_dev); |
|
2981 |
||
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2982 |
printk(KERN_DEBUG "Driver rtl_ecat_dev has address %X.\n", |
|
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2983 |
(unsigned) &rtl_ecat_dev); |
| 0 | 2984 |
|
2985 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2986 |
||
2987 |
return pci_module_init (&rtl8139_pci_driver); |
|
2988 |
} |
|
2989 |
||
2990 |
||
2991 |
static void rtl8139_cleanup_module (void) |
|
2992 |
{
|
|
2993 |
pci_unregister_driver (&rtl8139_pci_driver); |
|
2994 |
||
2995 |
/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2996 |
||
|
1
98acc19c7594
Kommentare im 8139-Treiber ge?ndert.
Florian Pose <fp@igh-essen.com>
parents:
0
diff
changeset
|
2997 |
EtherCAT_device_clear(&rtl_ecat_dev); |
| 0 | 2998 |
|
2999 |
/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
3000 |
} |
|
3001 |
||
3002 |
||
3003 |
module_init(rtl8139_init_module); |
|
3004 |
module_exit(rtl8139_cleanup_module); |