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/******************************************************************************

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 *

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 *  $Id$

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 *

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 *  main.c	        Copyright (C) 2011       IgH Andreas Stewering-Bone

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 *

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 *  This file is part of ethercatrtdm interface to IgH EtherCAT master 

     8

 *  

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 *  The IgH EtherCAT master is free software; you can

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 *  redistribute it and/or modify it under the terms of the GNU Lesser General

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 *  Public License as published by the Free Software Foundation; version 2.1

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 *  of the License.

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 *

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 *  The IgH EtherCAT Master is free software; you can redistribute it and/or

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 *  modify it under the terms of the GNU General Public License version 2, as

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 *  published by the Free Software Foundation.

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 *

    18

 *  The IgH EtherCAT master userspace library is distributed in the hope that

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 *  it will be useful, but WITHOUT ANY WARRANTY; without even the implied

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 *  warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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 *  GNU Lesser General Public License for more details.

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 *

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 *  You should have received a copy of the GNU Lesser General Public License

    24

 *  along with the IgH EtherCAT master userspace library. If not, see

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 *  <http://www.gnu.org/licenses/>.

    26

 *  

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 *  The license mentioned above concerns the source code only. Using the

    28

 *  EtherCAT technology and brand is only permitted in compliance with the

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 *  industrial property and similar rights of Beckhoff Automation GmbH.

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 *

    31

 *****************************************************************************/

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#include <sched.h>

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#include <stdio.h>

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#include <stdlib.h>

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#include <fcntl.h>

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#include <signal.h>

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    42

#include <rtai_lxrt.h>

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#include <rtdm/rtdm.h>

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    45

#include "../../include/ecrt.h"

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#include "../../include/ec_rtdm.h"

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#define rt_printf(X,Y) 

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#define NSEC_PER_SEC 1000000000

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RT_TASK* task;    // Stores a handle.

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int priority=0;   // Highest

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int stack_size=0; // Use default (512)

    57

int msg_size=0;   // Use default (256)

    58

    59

static unsigned int cycle = 1000; /* 1 ms */

    60

    61

int rt_fd = -1;

    62

int run=0;

    63

    64

unsigned int sync_ref_counter = 0;

    65

    66

CstructMstrAttach MstrAttach;

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    68

/****************************************************************************/

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    70

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    73

// Optional features

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#define CONFIGURE_PDOS  1

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/****************************************************************************/

    78

    79

// EtherCAT

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static ec_master_t *master = NULL;

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static ec_master_state_t master_state = {};

    82

    83

static ec_domain_t *domain1 = NULL;

    84

static ec_domain_state_t domain1_state = {};

    85

    86

    87

/****************************************************************************/

    88

static uint8_t *domain1_pd = NULL;

    89

    90

// process data

    91

    92

#define BusCoupler01_Pos    0, 0

    93

#define DigOutSlave01_Pos   0, 1

    94

#define DigOutSlave02_Pos   0, 2

    95

#define DigInSlave01_Pos    0, 3

    96

#define AnaOutSlave01_Pos   0, 4

    97

#define AnaInSlave01_Pos    0, 5

    98

#define BusCoupler02_Pos    0, 6

    99

#define AnaInSlave02_Pos    0, 7

   100

   101

   102

#define Beckhoff_EK1100 0x00000002, 0x044c2c52

   103

#define Beckhoff_EL1014 0x00000002, 0x03f63052

   104

#define Beckhoff_EL2004 0x00000002, 0x07d43052

   105

#define Beckhoff_EL4132 0x00000002, 0x10243052

   106

#define Beckhoff_EL3102 0x00000002, 0x0c1e3052

   107

#define Beckhoff_EL4102 0x00000002, 0x10063052

   108

#define Beckhoff_EL6731 0x00000002, 0x1a4b3052

   109

#define Beckhoff_EL6600 0x00000002, 0x19c93052

   110

#define Beckhoff_EL3602 0x00000002, 0x0e123052

   111

#define Beckhoff_EL5151 0x00000002, 0x141f3052

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   113

   114

// offsets for PDO entries

   115

static unsigned int off_dig_out0      = 0;

   116

static unsigned int off_dig_out1      = 0;

   117

static unsigned int off_dig_out2      = 0;

   118

static unsigned int off_dig_out3      = 0;

   119

static unsigned int off_dig_in0       = 0;

   120

static unsigned int off_ana_out0      = 0;

   121

static unsigned int off_ana_out1      = 0;

   122

static unsigned int off_ana_in0_status = 0;

   123

static unsigned int off_ana_in0_value  = 0;

   124

static unsigned int off_ana_in1_status = 0;

   125

static unsigned int off_ana_in1_value  = 0;

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   127

   128

// process data

   129

unsigned int bit_position0=0; /* Pointer to a variable to store a bit */

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unsigned int bit_position1=0; /* Pointer to a variable to store a bit */

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unsigned int bit_position2=0; /* Pointer to a variable to store a bit */

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unsigned int bit_position3=0; /* Pointer to a variable to store a bit */

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const static ec_pdo_entry_reg_t domain1_regs[] = {

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   {DigOutSlave01_Pos, Beckhoff_EL2004, 0x7000, 0x01, &off_dig_out0, &bit_position0},

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   {DigOutSlave01_Pos, Beckhoff_EL2004, 0x7010, 0x01, &off_dig_out1, &bit_position1},

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   {DigOutSlave01_Pos, Beckhoff_EL2004, 0x7020, 0x01, &off_dig_out2, &bit_position2},

   138

   {DigOutSlave01_Pos, Beckhoff_EL2004, 0x7030, 0x01, &off_dig_out3, &bit_position3},

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   {DigInSlave01_Pos,  Beckhoff_EL1014, 0x6000, 0x01, &off_dig_in0},

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   {AnaOutSlave01_Pos, Beckhoff_EL4132, 0x3001, 0x01, &off_ana_out0},

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   {AnaOutSlave01_Pos, Beckhoff_EL4132, 0x3002, 0x01, &off_ana_out1},

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   {AnaInSlave01_Pos,  Beckhoff_EL3102, 0x3101, 0x01, &off_ana_in0_status},

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   {AnaInSlave01_Pos,  Beckhoff_EL3102, 0x3101, 0x02, &off_ana_in0_value},

   144

   {AnaInSlave01_Pos,  Beckhoff_EL3102, 0x3102, 0x01, &off_ana_in1_status},

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   {AnaInSlave01_Pos,  Beckhoff_EL3102, 0x3102, 0x02, &off_ana_in1_value},

   146

   {}

   147

};

   148

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char rt_dev_file[64];

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static unsigned int blink = 0;

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static ec_slave_config_t *sc_dig_out_01 = NULL;

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static ec_slave_config_t *sc_dig_out_02 = NULL;

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static ec_slave_config_t *sc_dig_in_01 = NULL;

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static ec_slave_config_t *sc_ana_out_01 = NULL;

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static ec_slave_config_t *sc_ana_in_01 = NULL;

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static ec_slave_config_t *sc_ana_in_02 = NULL;

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/*****************************************************************************/

   165

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/* Slave 1, "EL2004"

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 * Vendor ID:       0x00000002

   168

 * Product code:    0x07d43052

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 * Revision number: 0x00100000

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 */

   171

   172

ec_pdo_entry_info_t slave_1_pdo_entries[] = {

   173

   {0x7000, 0x01, 1}, /* Output */

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   {0x7010, 0x01, 1}, /* Output */

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   {0x7020, 0x01, 1}, /* Output */

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   {0x7030, 0x01, 1}, /* Output */

   177

};

   178

   179

ec_pdo_info_t slave_1_pdos[] = {

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   {0x1600, 1, slave_1_pdo_entries + 0}, /* Channel 1 */

   181

   {0x1601, 1, slave_1_pdo_entries + 1}, /* Channel 2 */

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   {0x1602, 1, slave_1_pdo_entries + 2}, /* Channel 3 */

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   {0x1603, 1, slave_1_pdo_entries + 3}, /* Channel 4 */

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};

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ec_sync_info_t slave_1_syncs[] = {

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   {0, EC_DIR_OUTPUT, 4, slave_1_pdos + 0, EC_WD_ENABLE},

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   {0xff}

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};

   190

   191

/* Slave 2, "EL2004"

   192

 * Vendor ID:       0x00000002

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 * Product code:    0x07d43052

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 * Revision number: 0x00100000

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 */

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ec_pdo_entry_info_t slave_2_pdo_entries[] = {

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   {0x7000, 0x01, 1}, /* Output */

   199

   {0x7010, 0x01, 1}, /* Output */

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   {0x7020, 0x01, 1}, /* Output */

   201

   {0x7030, 0x01, 1}, /* Output */

   202

};

   203

   204

ec_pdo_info_t slave_2_pdos[] = {

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   {0x1600, 1, slave_2_pdo_entries + 0}, /* Channel 1 */

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   {0x1601, 1, slave_2_pdo_entries + 1}, /* Channel 2 */

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   {0x1602, 1, slave_2_pdo_entries + 2}, /* Channel 3 */

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   {0x1603, 1, slave_2_pdo_entries + 3}, /* Channel 4 */

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};

   210

   211

ec_sync_info_t slave_2_syncs[] = {

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   {0, EC_DIR_OUTPUT, 4, slave_2_pdos + 0, EC_WD_ENABLE},

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   {0xff}

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};

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/* Slave 3, "EL1014"

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 * Vendor ID:       0x00000002

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 * Product code:    0x03f63052

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 * Revision number: 0x00100000

   220

 */

   221

   222

ec_pdo_entry_info_t slave_3_pdo_entries[] = {

   223

   {0x6000, 0x01, 1}, /* Input */

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   {0x6010, 0x01, 1}, /* Input */

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   {0x6020, 0x01, 1}, /* Input */

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   {0x6030, 0x01, 1}, /* Input */

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};

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ec_pdo_info_t slave_3_pdos[] = {

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   {0x1a00, 1, slave_3_pdo_entries + 0}, /* Channel 1 */

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   {0x1a01, 1, slave_3_pdo_entries + 1}, /* Channel 2 */

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   {0x1a02, 1, slave_3_pdo_entries + 2}, /* Channel 3 */

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   {0x1a03, 1, slave_3_pdo_entries + 3}, /* Channel 4 */

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};

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ec_sync_info_t slave_3_syncs[] = {

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   {0, EC_DIR_INPUT, 4, slave_3_pdos + 0, EC_WD_DISABLE},

   238

   {0xff}

   239

};

   240

   241

/* Slave 4, "EL4132"

   242

 * Vendor ID:       0x00000002

   243

 * Product code:    0x10243052

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 * Revision number: 0x03f90000

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 */

   246

   247

ec_pdo_entry_info_t slave_4_pdo_entries[] = {

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   {0x3001, 0x01, 16}, /* Output */

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   {0x3002, 0x01, 16}, /* Output */

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};

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ec_pdo_info_t slave_4_pdos[] = {

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   {0x1600, 1, slave_4_pdo_entries + 0}, /* RxPDO 01 mapping */

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   {0x1601, 1, slave_4_pdo_entries + 1}, /* RxPDO 02 mapping */

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};

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   257

ec_sync_info_t slave_4_syncs[] = {

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   {0, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

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   {1, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

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   {2, EC_DIR_OUTPUT, 2, slave_4_pdos + 0, EC_WD_DISABLE},

   261

   {3, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

   262

   {0xff}

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};

   264

   265

/* Slave 5, "EL3102"

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 * Vendor ID:       0x00000002

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 * Product code:    0x0c1e3052

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 * Revision number: 0x00000000

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 */

   270

   271

ec_pdo_entry_info_t slave_5_pdo_entries[] = {

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   {0x3101, 0x01, 8}, /* Status */

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   {0x3101, 0x02, 16}, /* Value */

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   {0x3102, 0x01, 8}, /* Status */

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   {0x3102, 0x02, 16}, /* Value */

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};

   277

   278

ec_pdo_info_t slave_5_pdos[] = {

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   {0x1a00, 2, slave_5_pdo_entries + 0}, /* TxPDO 001 mapping */

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   {0x1a01, 2, slave_5_pdo_entries + 2}, /* TxPDO 002 mapping */

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};

   282

   283

ec_sync_info_t slave_5_syncs[] = {

   284

   {0, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

   285

   {1, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

   286

   {2, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

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   {3, EC_DIR_INPUT, 2, slave_5_pdos + 0, EC_WD_DISABLE},

   288

   {0xff}

   289

};

   290

   291

/* Slave 6, "EL6731-0010"

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 * Vendor ID:       0x00000002

   293

 * Product code:    0x1a4b3052

   294

 * Revision number: 0x0011000a

   295

 */

   296

   297

ec_sync_info_t slave_6_syncs[] = {

   298

   {0, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

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   {1, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

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   {2, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

   301

   {3, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

   302

};

   303

   304

   305

/* Slave 7, "EL6601"

   306

 * Vendor ID:       0x00000002

   307

 * Product code:    0x19c93052

   308

 * Revision number: 0x00110000

   309

 */

   310

/*

   311

ec_sync_info_t slave_7_syncs[] = {

   312

   {0, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

   313

   {1, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

   314

   {2, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

   315

   {3, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

   316

   {0xff}

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};

   318

*/

   319

   320

/* Master 0, Slave 7, "EL3602"

   321

 * Vendor ID:       0x00000002

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 * Product code:    0x0e123052

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 * Revision number: 0x00100000

   324

 */

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ec_pdo_entry_info_t slave_7_pdo_entries[] = {

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   {0x6000, 0x01, 1}, /* Underrange */

   327

   {0x6000, 0x02, 1}, /* Overrange */

   328

   {0x6000, 0x03, 2}, /* Limit 1 */

   329

   {0x6000, 0x05, 2}, /* Limit 2 */

   330

   {0x6000, 0x07, 1}, /* Error */

   331

   {0x0000, 0x00, 7}, /* Gap */

   332

   {0x1800, 0x07, 1},

   333

   {0x1800, 0x09, 1},

   334

   {0x6000, 0x11, 32}, /* Value */

   335

   {0x6010, 0x01, 1}, /* Underrange */

   336

   {0x6010, 0x02, 1}, /* Overrange */

   337

   {0x6010, 0x03, 2}, /* Limit 1 */

   338

   {0x6010, 0x05, 2}, /* Limit 2 */

   339

   {0x6010, 0x07, 1}, /* Error */

   340

   {0x0000, 0x00, 7}, /* Gap */

   341

   {0x1801, 0x07, 1},

   342

   {0x1801, 0x09, 1},

   343

   {0x6010, 0x11, 32}, /* Value */

   344

};

   345

   346

ec_pdo_info_t slave_7_pdos[] = {

   347

   {0x1a00, 9, slave_7_pdo_entries + 0}, /* AI TxPDO-Map Inputs Ch.1 */

   348

   {0x1a01, 9, slave_7_pdo_entries + 9}, /* AI TxPDO-Map Inputs Ch.2 */

   349

};

   350

   351

ec_sync_info_t slave_7_syncs[] = {

   352

   {0, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

   353

   {1, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

   354

   {2, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

   355

   {3, EC_DIR_INPUT, 2, slave_7_pdos + 0, EC_WD_DISABLE},

   356

   {0xff}

   357

};

   358

   359

/* Master 0, Slave 8, "EL5151"

   360

 * Vendor ID:       0x00000002

   361

 * Product code:    0x141f3052

   362

 * Revision number: 0x00130000

   363

 */

   364

   365

ec_pdo_entry_info_t slave_8_pdo_entries[] = {

   366

   {0x6000, 0x01, 1},

   367

   {0x6000, 0x02, 1},

   368

   {0x6000, 0x03, 1},

   369

   {0x0000, 0x00, 4}, /* Gap */

   370

   {0x6000, 0x08, 1},

   371

   {0x6000, 0x09, 1},

   372

   {0x6000, 0x0a, 1},

   373

   {0x6000, 0x0b, 1},

   374

   {0x0000, 0x00, 1}, /* Gap */

   375

   {0x6000, 0x0d, 1},

   376

   {0x1c32, 0x20, 1},

   377

   {0x0000, 0x00, 1}, /* Gap */

   378

   {0x1800, 0x09, 1},

   379

   {0x6000, 0x11, 32},

   380

   {0x6000, 0x12, 32},

   381

   {0x6000, 0x14, 32},

   382

};

   383

   384

ec_pdo_info_t slave_8_pdos[] = {

   385

   {0x0000, 0, NULL},

   386

   {0x1a00, 15, slave_8_pdo_entries + 0},

   387

   {0x1a02, 1, slave_8_pdo_entries + 15},

   388

};

   389

   390

ec_sync_info_t slave_8_syncs[] = {

   391

   {0, EC_DIR_OUTPUT, 0, NULL, EC_WD_DISABLE},

   392

   {1, EC_DIR_INPUT, 0, NULL, EC_WD_DISABLE},

   393

   {2, EC_DIR_OUTPUT, 1, slave_8_pdos + 0, EC_WD_DISABLE},

   394

   {3, EC_DIR_INPUT, 2, slave_8_pdos + 1, EC_WD_DISABLE},

   395

   {0xff}

   396

};

   397

   398

   399

/*****************************************************************************/

   400

   401

   402

void rt_check_domain_state(void)

   403

{

   404

    ec_domain_state_t ds;

   405

   406

    if (rt_fd>=0)

   407

      {

   408

          ecrt_rtdm_domain_state(rt_fd,&ds);  

   409

      }

   410

   411

    if (ds.working_counter != domain1_state.working_counter)

   412

     {

   413

        rt_printf("Domain1: WC %u.\n", ds.working_counter);

   414

     }

   415

    if (ds.wc_state != domain1_state.wc_state)

   416

     {

   417

    	rt_printf("Domain1: State %u.\n", ds.wc_state);

   418

     }

   419

   420

    domain1_state = ds;

   421

}

   422

   423

void rt_check_master_state(void)

   424

{

   425

    ec_master_state_t ms;

   426

   427

    if (rt_fd>=0)

   428

      {

   429

          ecrt_rtdm_master_state(rt_fd,&ms);

   430

      }

   431

   432

    if (ms.slaves_responding != master_state.slaves_responding)

   433

    {

   434

        rt_printf("%u slave(s).\n", ms.slaves_responding);

   435

    }

   436

    if (ms.al_states != master_state.al_states)

   437

    {

   438

        rt_printf("AL states: 0x%02X.\n", ms.al_states);

   439

    }

   440

    if (ms.link_up != master_state.link_up)

   441

    {

   442

        rt_printf("Link is %s.\n", ms.link_up ? "up" : "down");

   443

    }

   444

    master_state = ms;

   445

}

   446

   447

   448

   449

   450

void rt_sync(void)

   451

{

   452

   453

  RTIME now_ns;

   454

  uint64_t now;

   455

  now_ns = rt_get_cpu_time_ns();

   456

  now = (uint64_t)now_ns;

   457

   458

  if (rt_fd>=0)

   459

  {

   460

      ecrt_rtdm_master_application_time(rt_fd, &now);

   461

  }

   462

   463

  if (sync_ref_counter) {

   464

     sync_ref_counter--;

   465

  } else {

   466

     sync_ref_counter = 9;

   467

     if (rt_fd>=0)

   468

     {

   469

         ecrt_rtdm_master_sync_reference_clock(rt_fd);

   470

     }

   471

  }

   472

  if (rt_fd>=0)

   473

  {

   474

      ecrt_rtdm_master_sync_slave_clocks(rt_fd) ;

   475

  }

   476

}

   477

   478

/*****************************************************************************/

   479

   480

/**********************************************************/

   481

void cleanup_all(void)

   482

{

   483

    run = 0;   

   484

}

   485

   486

void catch_signal(int sig)

   487

{

   488

    cleanup_all();    

   489

}

   490

   491

   492

   493

   494

   495

void my_cyclic(void)

   496

{

   497

   498

    int counter = 0;

   499

    int divcounter = 0;

   500

    int divider = 10;

   501

    int period;

   502

   503

    rt_set_periodic_mode();

   504

    period = (int) nano2count((RTIME)cycle*1000);

   505

    start_rt_timer(period);

   506

    rt_make_hard_real_time();

   507

    rt_task_make_periodic(task, rt_get_time() + 10*period, period);

   508

   509

   510

   511

    while(1) {

   512

   513

        rt_task_wait_period();

   514

   515

   516

        counter++;

   517

        if (counter>60000) {

   518

            run=0;

   519

        }

   520

   521

        if(run ==  0) {

   522

            rt_make_soft_real_time();

   523

            stop_rt_timer();

   524

            return;

   525

        }

   526

   527

   528

        // receive ethercat