peter@521: //* ----------------------------------------------------------------------------
peter@521: //* ATMEL Microcontroller Software Support - ROUSSET -
peter@521: //* ----------------------------------------------------------------------------
peter@521: //* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
peter@521: //* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
peter@521: //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
peter@521: //* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
peter@521: //* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
peter@521: //* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
peter@521: //* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
peter@521: //* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
peter@521: //* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
peter@521: //* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
peter@521: //* ----------------------------------------------------------------------------
peter@521: //* File Name : lib_AT91SAM7X256.h
peter@521: //* Object : AT91SAM7X256 inlined functions
peter@521: //* Generated : AT91 SW Application Group 11/02/2005 (15:17:24)
peter@521: //*
peter@521: //* CVS Reference : /lib_dbgu.h/1.1/Thu Aug 25 12:56:22 2005//
peter@521: //* CVS Reference : /lib_pmc_SAM7X.h/1.4/Tue Aug 30 13:00:36 2005//
peter@521: //* CVS Reference : /lib_VREG_6085B.h/1.1/Tue Feb 1 16:20:47 2005//
peter@521: //* CVS Reference : /lib_rstc_6098A.h/1.1/Wed Oct 6 10:39:20 2004//
peter@521: //* CVS Reference : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
peter@521: //* CVS Reference : /lib_wdtc_6080A.h/1.1/Wed Oct 6 10:38:30 2004//
peter@521: //* CVS Reference : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002//
peter@521: //* CVS Reference : /lib_spi2.h/1.2/Tue Aug 23 15:37:28 2005//
peter@521: //* CVS Reference : /lib_pitc_6079A.h/1.2/Tue Nov 9 14:43:56 2004//
peter@521: //* CVS Reference : /lib_aic_6075b.h/1.2/Thu Jul 7 07:48:22 2005//
peter@521: //* CVS Reference : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004//
peter@521: //* CVS Reference : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003//
peter@521: //* CVS Reference : /lib_rttc_6081A.h/1.1/Wed Oct 6 10:39:38 2004//
peter@521: //* CVS Reference : /lib_udp.h/1.5/Tue Aug 30 12:13:47 2005//
peter@521: //* CVS Reference : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
peter@521: //* CVS Reference : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004//
peter@521: //* CVS Reference : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
peter@521: //* CVS Reference : /lib_can_AT91.h/1.5/Tue Aug 23 15:37:07 2005//
peter@521: //* CVS Reference : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
peter@521: //* CVS Reference : /lib_pdc.h/1.2/Tue Jul 2 13:29:40 2002//
peter@521: //* ----------------------------------------------------------------------------
peter@521:
peter@521: #ifndef lib_AT91SAM7X256_H
peter@521: #define lib_AT91SAM7X256_H
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR AIC
peter@521: ***************************************************************************** */
peter@521: #define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20) // ldr, pc, [pc, #-&F20]
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_ConfigureIt
peter@521: //* \brief Interrupt Handler Initialization
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_AIC_ConfigureIt (
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: unsigned int irq_id, // \arg interrupt number to initialize
peter@521: unsigned int priority, // \arg priority to give to the interrupt
peter@521: unsigned int src_type, // \arg activation and sense of activation
peter@521: void (*newHandler) () ) // \arg address of the interrupt handler
peter@521: {
peter@521: unsigned int oldHandler;
peter@521: unsigned int mask ;
peter@521:
peter@521: oldHandler = pAic->AIC_SVR[irq_id];
peter@521:
peter@521: mask = 0x1 << irq_id ;
peter@521: //* Disable the interrupt on the interrupt controller
peter@521: pAic->AIC_IDCR = mask ;
peter@521: //* Save the interrupt handler routine pointer and the interrupt priority
peter@521: pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
peter@521: //* Store the Source Mode Register
peter@521: pAic->AIC_SMR[irq_id] = src_type | priority ;
peter@521: //* Clear the interrupt on the interrupt controller
peter@521: pAic->AIC_ICCR = mask ;
peter@521:
peter@521: return oldHandler;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_EnableIt
peter@521: //* \brief Enable corresponding IT number
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_EnableIt (
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: unsigned int irq_id ) // \arg interrupt number to initialize
peter@521: {
peter@521: //* Enable the interrupt on the interrupt controller
peter@521: pAic->AIC_IECR = 0x1 << irq_id ;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_DisableIt
peter@521: //* \brief Disable corresponding IT number
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_DisableIt (
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: unsigned int irq_id ) // \arg interrupt number to initialize
peter@521: {
peter@521: unsigned int mask = 0x1 << irq_id;
peter@521: //* Disable the interrupt on the interrupt controller
peter@521: pAic->AIC_IDCR = mask ;
peter@521: //* Clear the interrupt on the Interrupt Controller ( if one is pending )
peter@521: pAic->AIC_ICCR = mask ;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_ClearIt
peter@521: //* \brief Clear corresponding IT number
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_ClearIt (
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: unsigned int irq_id) // \arg interrupt number to initialize
peter@521: {
peter@521: //* Clear the interrupt on the Interrupt Controller ( if one is pending )
peter@521: pAic->AIC_ICCR = (0x1 << irq_id);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_AcknowledgeIt
peter@521: //* \brief Acknowledge corresponding IT number
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_AcknowledgeIt (
peter@521: AT91PS_AIC pAic) // \arg pointer to the AIC registers
peter@521: {
peter@521: pAic->AIC_EOICR = pAic->AIC_EOICR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_SetExceptionVector
peter@521: //* \brief Configure vector handler
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_AIC_SetExceptionVector (
peter@521: unsigned int *pVector, // \arg pointer to the AIC registers
peter@521: void (*Handler) () ) // \arg Interrupt Handler
peter@521: {
peter@521: unsigned int oldVector = *pVector;
peter@521:
peter@521: if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
peter@521: *pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
peter@521: else
peter@521: *pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
peter@521:
peter@521: return oldVector;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_Trig
peter@521: //* \brief Trig an IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_Trig (
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: unsigned int irq_id) // \arg interrupt number
peter@521: {
peter@521: pAic->AIC_ISCR = (0x1 << irq_id) ;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_IsActive
peter@521: //* \brief Test if an IT is active
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_AIC_IsActive (
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: unsigned int irq_id) // \arg Interrupt Number
peter@521: {
peter@521: return (pAic->AIC_ISR & (0x1 << irq_id));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_IsPending
peter@521: //* \brief Test if an IT is pending
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_AIC_IsPending (
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: unsigned int irq_id) // \arg Interrupt Number
peter@521: {
peter@521: return (pAic->AIC_IPR & (0x1 << irq_id));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_Open
peter@521: //* \brief Set exception vectors and AIC registers to default values
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_Open(
peter@521: AT91PS_AIC pAic, // \arg pointer to the AIC registers
peter@521: void (*IrqHandler) (), // \arg Default IRQ vector exception
peter@521: void (*FiqHandler) (), // \arg Default FIQ vector exception
peter@521: void (*DefaultHandler) (), // \arg Default Handler set in ISR
peter@521: void (*SpuriousHandler) (), // \arg Default Spurious Handler
peter@521: unsigned int protectMode) // \arg Debug Control Register
peter@521: {
peter@521: int i;
peter@521:
peter@521: // Disable all interrupts and set IVR to the default handler
peter@521: for (i = 0; i < 32; ++i) {
peter@521: AT91F_AIC_DisableIt(pAic, i);
peter@521: AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler);
peter@521: }
peter@521:
peter@521: // Set the IRQ exception vector
peter@521: AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
peter@521: // Set the Fast Interrupt exception vector
peter@521: AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
peter@521:
peter@521: pAic->AIC_SPU = (unsigned int) SpuriousHandler;
peter@521: pAic->AIC_DCR = protectMode;
peter@521: }
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR PDC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_SetNextRx
peter@521: //* \brief Set the next receive transfer descriptor
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_SetNextRx (
peter@521: AT91PS_PDC pPDC, // \arg pointer to a PDC controller
peter@521: char *address, // \arg address to the next bloc to be received
peter@521: unsigned int bytes) // \arg number of bytes to be received
peter@521: {
peter@521: pPDC->PDC_RNPR = (unsigned int) address;
peter@521: pPDC->PDC_RNCR = bytes;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_SetNextTx
peter@521: //* \brief Set the next transmit transfer descriptor
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_SetNextTx (
peter@521: AT91PS_PDC pPDC, // \arg pointer to a PDC controller
peter@521: char *address, // \arg address to the next bloc to be transmitted
peter@521: unsigned int bytes) // \arg number of bytes to be transmitted
peter@521: {
peter@521: pPDC->PDC_TNPR = (unsigned int) address;
peter@521: pPDC->PDC_TNCR = bytes;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_SetRx
peter@521: //* \brief Set the receive transfer descriptor
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_SetRx (
peter@521: AT91PS_PDC pPDC, // \arg pointer to a PDC controller
peter@521: char *address, // \arg address to the next bloc to be received
peter@521: unsigned int bytes) // \arg number of bytes to be received
peter@521: {
peter@521: pPDC->PDC_RPR = (unsigned int) address;
peter@521: pPDC->PDC_RCR = bytes;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_SetTx
peter@521: //* \brief Set the transmit transfer descriptor
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_SetTx (
peter@521: AT91PS_PDC pPDC, // \arg pointer to a PDC controller
peter@521: char *address, // \arg address to the next bloc to be transmitted
peter@521: unsigned int bytes) // \arg number of bytes to be transmitted
peter@521: {
peter@521: pPDC->PDC_TPR = (unsigned int) address;
peter@521: pPDC->PDC_TCR = bytes;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_EnableTx
peter@521: //* \brief Enable transmit
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_EnableTx (
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_EnableRx
peter@521: //* \brief Enable receive
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_EnableRx (
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_DisableTx
peter@521: //* \brief Disable transmit
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_DisableTx (
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_DisableRx
peter@521: //* \brief Disable receive
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_DisableRx (
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_IsTxEmpty
peter@521: //* \brief Test if the current transfer descriptor has been sent
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PDC_IsTxEmpty ( // \return return 1 if transfer is complete
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: return !(pPDC->PDC_TCR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_IsNextTxEmpty
peter@521: //* \brief Test if the next transfer descriptor has been moved to the current td
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PDC_IsNextTxEmpty ( // \return return 1 if transfer is complete
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: return !(pPDC->PDC_TNCR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_IsRxEmpty
peter@521: //* \brief Test if the current transfer descriptor has been filled
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PDC_IsRxEmpty ( // \return return 1 if transfer is complete
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: return !(pPDC->PDC_RCR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_IsNextRxEmpty
peter@521: //* \brief Test if the next transfer descriptor has been moved to the current td
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PDC_IsNextRxEmpty ( // \return return 1 if transfer is complete
peter@521: AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
peter@521: {
peter@521: return !(pPDC->PDC_RNCR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_Open
peter@521: //* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_Open (
peter@521: AT91PS_PDC pPDC) // \arg pointer to a PDC controller
peter@521: {
peter@521: //* Disable the RX and TX PDC transfer requests
peter@521: AT91F_PDC_DisableRx(pPDC);
peter@521: AT91F_PDC_DisableTx(pPDC);
peter@521:
peter@521: //* Reset all Counter register Next buffer first
peter@521: AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
peter@521: AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
peter@521: AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
peter@521: AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
peter@521:
peter@521: //* Enable the RX and TX PDC transfer requests
peter@521: AT91F_PDC_EnableRx(pPDC);
peter@521: AT91F_PDC_EnableTx(pPDC);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_Close
peter@521: //* \brief Close PDC: disable TX and RX reset transfer descriptors
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PDC_Close (
peter@521: AT91PS_PDC pPDC) // \arg pointer to a PDC controller
peter@521: {
peter@521: //* Disable the RX and TX PDC transfer requests
peter@521: AT91F_PDC_DisableRx(pPDC);
peter@521: AT91F_PDC_DisableTx(pPDC);
peter@521:
peter@521: //* Reset all Counter register Next buffer first
peter@521: AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
peter@521: AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
peter@521: AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
peter@521: AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
peter@521:
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_SendFrame
peter@521: //* \brief Close PDC: disable TX and RX reset transfer descriptors
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PDC_SendFrame(
peter@521: AT91PS_PDC pPDC,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: if (AT91F_PDC_IsTxEmpty(pPDC)) {
peter@521: //* Buffer and next buffer can be initialized
peter@521: AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
peter@521: AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
peter@521: return 2;
peter@521: }
peter@521: else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
peter@521: //* Only one buffer can be initialized
peter@521: AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
peter@521: return 1;
peter@521: }
peter@521: else {
peter@521: //* All buffer are in use...
peter@521: return 0;
peter@521: }
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PDC_ReceiveFrame
peter@521: //* \brief Close PDC: disable TX and RX reset transfer descriptors
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PDC_ReceiveFrame (
peter@521: AT91PS_PDC pPDC,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: if (AT91F_PDC_IsRxEmpty(pPDC)) {
peter@521: //* Buffer and next buffer can be initialized
peter@521: AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
peter@521: AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
peter@521: return 2;
peter@521: }
peter@521: else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
peter@521: //* Only one buffer can be initialized
peter@521: AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
peter@521: return 1;
peter@521: }
peter@521: else {
peter@521: //* All buffer are in use...
peter@521: return 0;
peter@521: }
peter@521: }
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR DBGU
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_DBGU_InterruptEnable
peter@521: //* \brief Enable DBGU Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_DBGU_InterruptEnable(
peter@521: AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
peter@521: unsigned int flag) // \arg dbgu interrupt to be enabled
peter@521: {
peter@521: pDbgu->DBGU_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_DBGU_InterruptDisable
peter@521: //* \brief Disable DBGU Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_DBGU_InterruptDisable(
peter@521: AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
peter@521: unsigned int flag) // \arg dbgu interrupt to be disabled
peter@521: {
peter@521: pDbgu->DBGU_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_DBGU_GetInterruptMaskStatus
peter@521: //* \brief Return DBGU Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( // \return DBGU Interrupt Mask Status
peter@521: AT91PS_DBGU pDbgu) // \arg pointer to a DBGU controller
peter@521: {
peter@521: return pDbgu->DBGU_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_DBGU_IsInterruptMasked
peter@521: //* \brief Test if DBGU Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_DBGU_IsInterruptMasked(
peter@521: AT91PS_DBGU pDbgu, // \arg pointer to a DBGU controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_DBGU_GetInterruptMaskStatus(pDbgu) & flag);
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR PIO
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_CfgPeriph
peter@521: //* \brief Enable pins to be drived by peripheral
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_CfgPeriph(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int periphAEnable, // \arg PERIPH A to enable
peter@521: unsigned int periphBEnable) // \arg PERIPH B to enable
peter@521:
peter@521: {
peter@521: pPio->PIO_ASR = periphAEnable;
peter@521: pPio->PIO_BSR = periphBEnable;
peter@521: pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_CfgOutput
peter@521: //* \brief Enable PIO in output mode
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_CfgOutput(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int pioEnable) // \arg PIO to be enabled
peter@521: {
peter@521: pPio->PIO_PER = pioEnable; // Set in PIO mode
peter@521: pPio->PIO_OER = pioEnable; // Configure in Output
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_CfgInput
peter@521: //* \brief Enable PIO in input mode
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_CfgInput(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int inputEnable) // \arg PIO to be enabled
peter@521: {
peter@521: // Disable output
peter@521: pPio->PIO_ODR = inputEnable;
peter@521: pPio->PIO_PER = inputEnable;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_CfgOpendrain
peter@521: //* \brief Configure PIO in open drain
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_CfgOpendrain(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int multiDrvEnable) // \arg pio to be configured in open drain
peter@521: {
peter@521: // Configure the multi-drive option
peter@521: pPio->PIO_MDDR = ~multiDrvEnable;
peter@521: pPio->PIO_MDER = multiDrvEnable;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_CfgPullup
peter@521: //* \brief Enable pullup on PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_CfgPullup(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int pullupEnable) // \arg enable pullup on PIO
peter@521: {
peter@521: // Connect or not Pullup
peter@521: pPio->PIO_PPUDR = ~pullupEnable;
peter@521: pPio->PIO_PPUER = pullupEnable;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_CfgDirectDrive
peter@521: //* \brief Enable direct drive on PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_CfgDirectDrive(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int directDrive) // \arg PIO to be configured with direct drive
peter@521:
peter@521: {
peter@521: // Configure the Direct Drive
peter@521: pPio->PIO_OWDR = ~directDrive;
peter@521: pPio->PIO_OWER = directDrive;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_CfgInputFilter
peter@521: //* \brief Enable input filter on input PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_CfgInputFilter(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int inputFilter) // \arg PIO to be configured with input filter
peter@521:
peter@521: {
peter@521: // Configure the Direct Drive
peter@521: pPio->PIO_IFDR = ~inputFilter;
peter@521: pPio->PIO_IFER = inputFilter;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetInput
peter@521: //* \brief Return PIO input value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetInput( // \return PIO input
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_PDSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsInputSet
peter@521: //* \brief Test if PIO is input flag is active
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsInputSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetInput(pPio) & flag);
peter@521: }
peter@521:
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_SetOutput
peter@521: //* \brief Set to 1 output PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_SetOutput(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg output to be set
peter@521: {
peter@521: pPio->PIO_SODR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_ClearOutput
peter@521: //* \brief Set to 0 output PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_ClearOutput(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg output to be cleared
peter@521: {
peter@521: pPio->PIO_CODR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_ForceOutput
peter@521: //* \brief Force output when Direct drive option is enabled
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_ForceOutput(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg output to be forced
peter@521: {
peter@521: pPio->PIO_ODSR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_Enable
peter@521: //* \brief Enable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_Enable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio to be enabled
peter@521: {
peter@521: pPio->PIO_PER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_Disable
peter@521: //* \brief Disable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_Disable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio to be disabled
peter@521: {
peter@521: pPio->PIO_PDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetStatus
peter@521: //* \brief Return PIO Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetStatus( // \return PIO Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_PSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsSet
peter@521: //* \brief Test if PIO is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_OutputEnable
peter@521: //* \brief Output Enable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_OutputEnable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio output to be enabled
peter@521: {
peter@521: pPio->PIO_OER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_OutputDisable
peter@521: //* \brief Output Enable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_OutputDisable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio output to be disabled
peter@521: {
peter@521: pPio->PIO_ODR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetOutputStatus
peter@521: //* \brief Return PIO Output Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetOutputStatus( // \return PIO Output Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_OSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsOuputSet
peter@521: //* \brief Test if PIO Output is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsOutputSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetOutputStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_InputFilterEnable
peter@521: //* \brief Input Filter Enable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_InputFilterEnable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio input filter to be enabled
peter@521: {
peter@521: pPio->PIO_IFER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_InputFilterDisable
peter@521: //* \brief Input Filter Disable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_InputFilterDisable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio input filter to be disabled
peter@521: {
peter@521: pPio->PIO_IFDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetInputFilterStatus
peter@521: //* \brief Return PIO Input Filter Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetInputFilterStatus( // \return PIO Input Filter Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_IFSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsInputFilterSet
peter@521: //* \brief Test if PIO Input filter is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsInputFilterSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetInputFilterStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetOutputDataStatus
peter@521: //* \brief Return PIO Output Data Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_ODSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_InterruptEnable
peter@521: //* \brief Enable PIO Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_InterruptEnable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio interrupt to be enabled
peter@521: {
peter@521: pPio->PIO_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_InterruptDisable
peter@521: //* \brief Disable PIO Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_InterruptDisable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio interrupt to be disabled
peter@521: {
peter@521: pPio->PIO_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetInterruptMaskStatus
peter@521: //* \brief Return PIO Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetInterruptMaskStatus( // \return PIO Interrupt Mask Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetInterruptStatus
peter@521: //* \brief Return PIO Interrupt Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_ISR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsInterruptMasked
peter@521: //* \brief Test if PIO Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsInterruptMasked(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetInterruptMaskStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsInterruptSet
peter@521: //* \brief Test if PIO Interrupt is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsInterruptSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetInterruptStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_MultiDriverEnable
peter@521: //* \brief Multi Driver Enable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_MultiDriverEnable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio to be enabled
peter@521: {
peter@521: pPio->PIO_MDER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_MultiDriverDisable
peter@521: //* \brief Multi Driver Disable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_MultiDriverDisable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio to be disabled
peter@521: {
peter@521: pPio->PIO_MDDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetMultiDriverStatus
peter@521: //* \brief Return PIO Multi Driver Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetMultiDriverStatus( // \return PIO Multi Driver Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_MDSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsMultiDriverSet
peter@521: //* \brief Test if PIO MultiDriver is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsMultiDriverSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetMultiDriverStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_A_RegisterSelection
peter@521: //* \brief PIO A Register Selection
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_A_RegisterSelection(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio A register selection
peter@521: {
peter@521: pPio->PIO_ASR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_B_RegisterSelection
peter@521: //* \brief PIO B Register Selection
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_B_RegisterSelection(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio B register selection
peter@521: {
peter@521: pPio->PIO_BSR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_Get_AB_RegisterStatus
peter@521: //* \brief Return PIO Interrupt Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( // \return PIO AB Register Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_ABSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsAB_RegisterSet
peter@521: //* \brief Test if PIO AB Register is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsAB_RegisterSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_Get_AB_RegisterStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_OutputWriteEnable
peter@521: //* \brief Output Write Enable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_OutputWriteEnable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio output write to be enabled
peter@521: {
peter@521: pPio->PIO_OWER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_OutputWriteDisable
peter@521: //* \brief Output Write Disable PIO
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIO_OutputWriteDisable(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg pio output write to be disabled
peter@521: {
peter@521: pPio->PIO_OWDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetOutputWriteStatus
peter@521: //* \brief Return PIO Output Write Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetOutputWriteStatus( // \return PIO Output Write Status
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_OWSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsOutputWriteSet
peter@521: //* \brief Test if PIO OutputWrite is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsOutputWriteSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetOutputWriteStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_GetCfgPullup
peter@521: //* \brief Return PIO Configuration Pullup
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PIO_GetCfgPullup( // \return PIO Configuration Pullup
peter@521: AT91PS_PIO pPio) // \arg pointer to a PIO controller
peter@521: {
peter@521: return pPio->PIO_PPUSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsOutputDataStatusSet
peter@521: //* \brief Test if PIO Output Data Status is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsOutputDataStatusSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PIO_GetOutputDataStatus(pPio) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIO_IsCfgPullupStatusSet
peter@521: //* \brief Test if PIO Configuration Pullup Status is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_PIO_IsCfgPullupStatusSet(
peter@521: AT91PS_PIO pPio, // \arg pointer to a PIO controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (~AT91F_PIO_GetCfgPullup(pPio) & flag);
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR PMC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_CfgSysClkEnableReg
peter@521: //* \brief Configure the System Clock Enable Register of the PMC controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_CfgSysClkEnableReg (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: unsigned int mode)
peter@521: {
peter@521: //* Write to the SCER register
peter@521: pPMC->PMC_SCER = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_CfgSysClkDisableReg
peter@521: //* \brief Configure the System Clock Disable Register of the PMC controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_CfgSysClkDisableReg (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: unsigned int mode)
peter@521: {
peter@521: //* Write to the SCDR register
peter@521: pPMC->PMC_SCDR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_GetSysClkStatusReg
peter@521: //* \brief Return the System Clock Status Register of the PMC controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_GetSysClkStatusReg (
peter@521: AT91PS_PMC pPMC // pointer to a CAN controller
peter@521: )
peter@521: {
peter@521: return pPMC->PMC_SCSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_EnablePeriphClock
peter@521: //* \brief Enable peripheral clock
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_EnablePeriphClock (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: unsigned int periphIds) // \arg IDs of peripherals to enable
peter@521: {
peter@521: pPMC->PMC_PCER = periphIds;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_DisablePeriphClock
peter@521: //* \brief Disable peripheral clock
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_DisablePeriphClock (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: unsigned int periphIds) // \arg IDs of peripherals to enable
peter@521: {
peter@521: pPMC->PMC_PCDR = periphIds;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_GetPeriphClock
peter@521: //* \brief Get peripheral clock status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_GetPeriphClock (
peter@521: AT91PS_PMC pPMC) // \arg pointer to PMC controller
peter@521: {
peter@521: return pPMC->PMC_PCSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CKGR_CfgMainOscillatorReg
peter@521: //* \brief Cfg the main oscillator
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CKGR_CfgMainOscillatorReg (
peter@521: AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
peter@521: unsigned int mode)
peter@521: {
peter@521: pCKGR->CKGR_MOR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CKGR_GetMainOscillatorReg
peter@521: //* \brief Cfg the main oscillator
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CKGR_GetMainOscillatorReg (
peter@521: AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
peter@521: {
peter@521: return pCKGR->CKGR_MOR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CKGR_EnableMainOscillator
peter@521: //* \brief Enable the main oscillator
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CKGR_EnableMainOscillator(
peter@521: AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
peter@521: {
peter@521: pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CKGR_DisableMainOscillator
peter@521: //* \brief Disable the main oscillator
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CKGR_DisableMainOscillator (
peter@521: AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
peter@521: {
peter@521: pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CKGR_CfgMainOscStartUpTime
peter@521: //* \brief Cfg MOR Register according to the main osc startup time
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CKGR_CfgMainOscStartUpTime (
peter@521: AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
peter@521: unsigned int startup_time, // \arg main osc startup time in microsecond (us)
peter@521: unsigned int slowClock) // \arg slowClock in Hz
peter@521: {
peter@521: pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT;
peter@521: pCKGR->CKGR_MOR |= ((slowClock * startup_time)/(8*1000000)) << 8;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CKGR_GetMainClockFreqReg
peter@521: //* \brief Cfg the main oscillator
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CKGR_GetMainClockFreqReg (
peter@521: AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
peter@521: {
peter@521: return pCKGR->CKGR_MCFR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CKGR_GetMainClock
peter@521: //* \brief Return Main clock in Hz
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CKGR_GetMainClock (
peter@521: AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
peter@521: unsigned int slowClock) // \arg slowClock in Hz
peter@521: {
peter@521: return ((pCKGR->CKGR_MCFR & AT91C_CKGR_MAINF) * slowClock) >> 4;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_CfgMCKReg
peter@521: //* \brief Cfg Master Clock Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_CfgMCKReg (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: unsigned int mode)
peter@521: {
peter@521: pPMC->PMC_MCKR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_GetMCKReg
peter@521: //* \brief Return Master Clock Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_GetMCKReg(
peter@521: AT91PS_PMC pPMC) // \arg pointer to PMC controller
peter@521: {
peter@521: return pPMC->PMC_MCKR;
peter@521: }
peter@521:
peter@521: //*------------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_GetMasterClock
peter@521: //* \brief Return master clock in Hz which correponds to processor clock for ARM7
peter@521: //*------------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_GetMasterClock (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
peter@521: unsigned int slowClock) // \arg slowClock in Hz
peter@521: {
peter@521: unsigned int reg = pPMC->PMC_MCKR;
peter@521: unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
peter@521: unsigned int pllDivider, pllMultiplier;
peter@521:
peter@521: switch (reg & AT91C_PMC_CSS) {
peter@521: case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected
peter@521: return slowClock / prescaler;
peter@521: case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
peter@521: return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
peter@521: case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected
peter@521: reg = pCKGR->CKGR_PLLR;
peter@521: pllDivider = (reg & AT91C_CKGR_DIV);
peter@521: pllMultiplier = ((reg & AT91C_CKGR_MUL) >> 16) + 1;
peter@521: return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
peter@521: }
peter@521: return 0;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_EnablePCK
peter@521: //* \brief Enable peripheral clock
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_EnablePCK (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: unsigned int pck, // \arg Peripheral clock identifier 0 .. 7
peter@521: unsigned int mode)
peter@521: {
peter@521: pPMC->PMC_PCKR[pck] = mode;
peter@521: pPMC->PMC_SCER = (1 << pck) << 8;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_DisablePCK
peter@521: //* \brief Enable peripheral clock
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_DisablePCK (
peter@521: AT91PS_PMC pPMC, // \arg pointer to PMC controller
peter@521: unsigned int pck) // \arg Peripheral clock identifier 0 .. 7
peter@521: {
peter@521: pPMC->PMC_SCDR = (1 << pck) << 8;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_EnableIt
peter@521: //* \brief Enable PMC interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_EnableIt (
peter@521: AT91PS_PMC pPMC, // pointer to a PMC controller
peter@521: unsigned int flag) // IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pPMC->PMC_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_DisableIt
peter@521: //* \brief Disable PMC interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_DisableIt (
peter@521: AT91PS_PMC pPMC, // pointer to a PMC controller
peter@521: unsigned int flag) // IT to be disabled
peter@521: {
peter@521: //* Write to the IDR register
peter@521: pPMC->PMC_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_GetStatus
peter@521: //* \brief Return PMC Interrupt Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_GetStatus( // \return PMC Interrupt Status
peter@521: AT91PS_PMC pPMC) // pointer to a PMC controller
peter@521: {
peter@521: return pPMC->PMC_SR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_GetInterruptMaskStatus
peter@521: //* \brief Return PMC Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_GetInterruptMaskStatus( // \return PMC Interrupt Mask Status
peter@521: AT91PS_PMC pPMC) // pointer to a PMC controller
peter@521: {
peter@521: return pPMC->PMC_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_IsInterruptMasked
peter@521: //* \brief Test if PMC Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_IsInterruptMasked(
peter@521: AT91PS_PMC pPMC, // \arg pointer to a PMC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PMC_GetInterruptMaskStatus(pPMC) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_IsStatusSet
peter@521: //* \brief Test if PMC Status is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PMC_IsStatusSet(
peter@521: AT91PS_PMC pPMC, // \arg pointer to a PMC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PMC_GetStatus(pPMC) & flag);
peter@521: }
peter@521:
peter@521: // ----------------------------------------------------------------------------
peter@521: // \fn AT91F_CKGR_CfgPLLReg
peter@521: // \brief Cfg the PLL Register
peter@521: // ----------------------------------------------------------------------------
peter@521: __inline void AT91F_CKGR_CfgPLLReg (
peter@521: AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
peter@521: unsigned int mode)
peter@521: {
peter@521: pCKGR->CKGR_PLLR = mode;
peter@521: }
peter@521:
peter@521: // ----------------------------------------------------------------------------
peter@521: // \fn AT91F_CKGR_GetPLLReg
peter@521: // \brief Get the PLL Register
peter@521: // ----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CKGR_GetPLLReg (
peter@521: AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
peter@521: {
peter@521: return pCKGR->CKGR_PLLR;
peter@521: }
peter@521:
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR RSTC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_RSTSoftReset
peter@521: //* \brief Start Software Reset
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_RSTSoftReset(
peter@521: AT91PS_RSTC pRSTC,
peter@521: unsigned int reset)
peter@521: {
peter@521: pRSTC->RSTC_RCR = (0xA5000000 | reset);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_RSTSetMode
peter@521: //* \brief Set Reset Mode
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_RSTSetMode(
peter@521: AT91PS_RSTC pRSTC,
peter@521: unsigned int mode)
peter@521: {
peter@521: pRSTC->RSTC_RMR = (0xA5000000 | mode);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_RSTGetMode
peter@521: //* \brief Get Reset Mode
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RSTGetMode(
peter@521: AT91PS_RSTC pRSTC)
peter@521: {
peter@521: return (pRSTC->RSTC_RMR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_RSTGetStatus
peter@521: //* \brief Get Reset Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RSTGetStatus(
peter@521: AT91PS_RSTC pRSTC)
peter@521: {
peter@521: return (pRSTC->RSTC_RSR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_RSTIsSoftRstActive
peter@521: //* \brief Return !=0 if software reset is still not completed
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RSTIsSoftRstActive(
peter@521: AT91PS_RSTC pRSTC)
peter@521: {
peter@521: return ((pRSTC->RSTC_RSR) & AT91C_RSTC_SRCMP);
peter@521: }
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR RTTC
peter@521: ***************************************************************************** */
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_SetRTT_TimeBase()
peter@521: //* \brief Set the RTT prescaler according to the TimeBase in ms
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RTTSetTimeBase(
peter@521: AT91PS_RTTC pRTTC,
peter@521: unsigned int ms)
peter@521: {
peter@521: if (ms > 2000)
peter@521: return 1; // AT91C_TIME_OUT_OF_RANGE
peter@521: pRTTC->RTTC_RTMR &= ~0xFFFF;
peter@521: pRTTC->RTTC_RTMR |= (((ms << 15) /1000) & 0xFFFF);
peter@521: return 0;
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTTSetPrescaler()
peter@521: //* \brief Set the new prescaler value
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RTTSetPrescaler(
peter@521: AT91PS_RTTC pRTTC,
peter@521: unsigned int rtpres)
peter@521: {
peter@521: pRTTC->RTTC_RTMR &= ~0xFFFF;
peter@521: pRTTC->RTTC_RTMR |= (rtpres & 0xFFFF);
peter@521: return (pRTTC->RTTC_RTMR);
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTTRestart()
peter@521: //* \brief Restart the RTT prescaler
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline void AT91F_RTTRestart(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST;
peter@521: }
peter@521:
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTT_SetAlarmINT()
peter@521: //* \brief Enable RTT Alarm Interrupt
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline void AT91F_RTTSetAlarmINT(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN;
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTT_ClearAlarmINT()
peter@521: //* \brief Disable RTT Alarm Interrupt
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline void AT91F_RTTClearAlarmINT(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN;
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTT_SetRttIncINT()
peter@521: //* \brief Enable RTT INC Interrupt
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline void AT91F_RTTSetRttIncINT(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN;
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTT_ClearRttIncINT()
peter@521: //* \brief Disable RTT INC Interrupt
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline void AT91F_RTTClearRttIncINT(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN;
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTT_SetAlarmValue()
peter@521: //* \brief Set RTT Alarm Value
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline void AT91F_RTTSetAlarmValue(
peter@521: AT91PS_RTTC pRTTC, unsigned int alarm)
peter@521: {
peter@521: pRTTC->RTTC_RTAR = alarm;
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTT_GetAlarmValue()
peter@521: //* \brief Get RTT Alarm Value
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RTTGetAlarmValue(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: return(pRTTC->RTTC_RTAR);
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTTGetStatus()
peter@521: //* \brief Read the RTT status
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RTTGetStatus(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: return(pRTTC->RTTC_RTSR);
peter@521: }
peter@521:
peter@521: //*--------------------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTT_ReadValue()
peter@521: //* \brief Read the RTT value
peter@521: //*--------------------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_RTTReadValue(
peter@521: AT91PS_RTTC pRTTC)
peter@521: {
peter@521: register volatile unsigned int val1,val2;
peter@521: do
peter@521: {
peter@521: val1 = pRTTC->RTTC_RTVR;
peter@521: val2 = pRTTC->RTTC_RTVR;
peter@521: }
peter@521: while(val1 != val2);
peter@521: return(val1);
peter@521: }
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR PITC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITInit
peter@521: //* \brief System timer init : period in µsecond, system clock freq in MHz
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PITInit(
peter@521: AT91PS_PITC pPITC,
peter@521: unsigned int period,
peter@521: unsigned int pit_frequency)
peter@521: {
peter@521: pPITC->PITC_PIMR = period? (period * pit_frequency + 8) >> 4 : 0; // +8 to avoid %10 and /10
peter@521: pPITC->PITC_PIMR |= AT91C_PITC_PITEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITSetPIV
peter@521: //* \brief Set the PIT Periodic Interval Value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PITSetPIV(
peter@521: AT91PS_PITC pPITC,
peter@521: unsigned int piv)
peter@521: {
peter@521: pPITC->PITC_PIMR = piv | (pPITC->PITC_PIMR & (AT91C_PITC_PITEN | AT91C_PITC_PITIEN));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITEnableInt
peter@521: //* \brief Enable PIT periodic interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PITEnableInt(
peter@521: AT91PS_PITC pPITC)
peter@521: {
peter@521: pPITC->PITC_PIMR |= AT91C_PITC_PITIEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITDisableInt
peter@521: //* \brief Disable PIT periodic interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PITDisableInt(
peter@521: AT91PS_PITC pPITC)
peter@521: {
peter@521: pPITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITGetMode
peter@521: //* \brief Read PIT mode register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PITGetMode(
peter@521: AT91PS_PITC pPITC)
peter@521: {
peter@521: return(pPITC->PITC_PIMR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITGetStatus
peter@521: //* \brief Read PIT status register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PITGetStatus(
peter@521: AT91PS_PITC pPITC)
peter@521: {
peter@521: return(pPITC->PITC_PISR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITGetPIIR
peter@521: //* \brief Read PIT CPIV and PICNT without ressetting the counters
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PITGetPIIR(
peter@521: AT91PS_PITC pPITC)
peter@521: {
peter@521: return(pPITC->PITC_PIIR);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITGetPIVR
peter@521: //* \brief Read System timer CPIV and PICNT without ressetting the counters
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PITGetPIVR(
peter@521: AT91PS_PITC pPITC)
peter@521: {
peter@521: return(pPITC->PITC_PIVR);
peter@521: }
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR WDTC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_WDTSetMode
peter@521: //* \brief Set Watchdog Mode Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_WDTSetMode(
peter@521: AT91PS_WDTC pWDTC,
peter@521: unsigned int Mode)
peter@521: {
peter@521: pWDTC->WDTC_WDMR = Mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_WDTRestart
peter@521: //* \brief Restart Watchdog
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_WDTRestart(
peter@521: AT91PS_WDTC pWDTC)
peter@521: {
peter@521: pWDTC->WDTC_WDCR = 0xA5000001;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_WDTSGettatus
peter@521: //* \brief Get Watchdog Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_WDTSGettatus(
peter@521: AT91PS_WDTC pWDTC)
peter@521: {
peter@521: return(pWDTC->WDTC_WDSR & 0x3);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_WDTGetPeriod
peter@521: //* \brief Translate ms into Watchdog Compatible value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_WDTGetPeriod(unsigned int ms)
peter@521: {
peter@521: if ((ms < 4) || (ms > 16000))
peter@521: return 0;
peter@521: return((ms << 8) / 1000);
peter@521: }
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR VREG
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_VREG_Enable_LowPowerMode
peter@521: //* \brief Enable VREG Low Power Mode
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_VREG_Enable_LowPowerMode(
peter@521: AT91PS_VREG pVREG)
peter@521: {
peter@521: pVREG->VREG_MR |= AT91C_VREG_PSTDBY;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_VREG_Disable_LowPowerMode
peter@521: //* \brief Disable VREG Low Power Mode
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_VREG_Disable_LowPowerMode(
peter@521: AT91PS_VREG pVREG)
peter@521: {
peter@521: pVREG->VREG_MR &= ~AT91C_VREG_PSTDBY;
peter@521: }/* *****************************************************************************
peter@521: SOFTWARE API FOR MC
peter@521: ***************************************************************************** */
peter@521:
peter@521: #define AT91C_MC_CORRECT_KEY ((unsigned int) 0x5A << 24) // (MC) Correct Protect Key
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_Remap
peter@521: //* \brief Make Remap
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_MC_Remap (void) //
peter@521: {
peter@521: AT91PS_MC pMC = (AT91PS_MC) AT91C_BASE_MC;
peter@521:
peter@521: pMC->MC_RCR = AT91C_MC_RCB;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_EFC_CfgModeReg
peter@521: //* \brief Configure the EFC Mode Register of the MC controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_MC_EFC_CfgModeReg (
peter@521: AT91PS_MC pMC, // pointer to a MC controller
peter@521: unsigned int mode) // mode register
peter@521: {
peter@521: // Write to the FMR register
peter@521: pMC->MC_FMR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_EFC_GetModeReg
peter@521: //* \brief Return MC EFC Mode Regsiter
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_MC_EFC_GetModeReg(
peter@521: AT91PS_MC pMC) // pointer to a MC controller
peter@521: {
peter@521: return pMC->MC_FMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_EFC_ComputeFMCN
peter@521: //* \brief Return MC EFC Mode Regsiter
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_MC_EFC_ComputeFMCN(
peter@521: int master_clock) // master clock in Hz
peter@521: {
peter@521: return (master_clock/1000000 +2);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_EFC_PerformCmd
peter@521: //* \brief Perform EFC Command
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_MC_EFC_PerformCmd (
peter@521: AT91PS_MC pMC, // pointer to a MC controller
peter@521: unsigned int transfer_cmd)
peter@521: {
peter@521: pMC->MC_FCR = transfer_cmd;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_EFC_GetStatus
peter@521: //* \brief Return MC EFC Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_MC_EFC_GetStatus(
peter@521: AT91PS_MC pMC) // pointer to a MC controller
peter@521: {
peter@521: return pMC->MC_FSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_EFC_IsInterruptMasked
peter@521: //* \brief Test if EFC MC Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_MC_EFC_IsInterruptMasked(
peter@521: AT91PS_MC pMC, // \arg pointer to a MC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_MC_EFC_GetModeReg(pMC) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_EFC_IsInterruptSet
peter@521: //* \brief Test if EFC MC Interrupt is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_MC_EFC_IsInterruptSet(
peter@521: AT91PS_MC pMC, // \arg pointer to a MC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_MC_EFC_GetStatus(pMC) & flag);
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR SPI
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_CfgCs
peter@521: //* \brief Configure SPI chip select register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_CfgCs (
peter@521: AT91PS_SPI pSPI, // pointer to a SPI controller
peter@521: int cs, // SPI cs number (0 to 3)
peter@521: int val) // chip select register
peter@521: {
peter@521: //* Write to the CSR register
peter@521: *(pSPI->SPI_CSR + cs) = val;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_EnableIt
peter@521: //* \brief Enable SPI interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_EnableIt (
peter@521: AT91PS_SPI pSPI, // pointer to a SPI controller
peter@521: unsigned int flag) // IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pSPI->SPI_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_DisableIt
peter@521: //* \brief Disable SPI interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_DisableIt (
peter@521: AT91PS_SPI pSPI, // pointer to a SPI controller
peter@521: unsigned int flag) // IT to be disabled
peter@521: {
peter@521: //* Write to the IDR register
peter@521: pSPI->SPI_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_Reset
peter@521: //* \brief Reset the SPI controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_Reset (
peter@521: AT91PS_SPI pSPI // pointer to a SPI controller
peter@521: )
peter@521: {
peter@521: //* Write to the CR register
peter@521: pSPI->SPI_CR = AT91C_SPI_SWRST;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_Enable
peter@521: //* \brief Enable the SPI controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_Enable (
peter@521: AT91PS_SPI pSPI // pointer to a SPI controller
peter@521: )
peter@521: {
peter@521: //* Write to the CR register
peter@521: pSPI->SPI_CR = AT91C_SPI_SPIEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_Disable
peter@521: //* \brief Disable the SPI controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_Disable (
peter@521: AT91PS_SPI pSPI // pointer to a SPI controller
peter@521: )
peter@521: {
peter@521: //* Write to the CR register
peter@521: pSPI->SPI_CR = AT91C_SPI_SPIDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_CfgMode
peter@521: //* \brief Enable the SPI controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_CfgMode (
peter@521: AT91PS_SPI pSPI, // pointer to a SPI controller
peter@521: int mode) // mode register
peter@521: {
peter@521: //* Write to the MR register
peter@521: pSPI->SPI_MR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_CfgPCS
peter@521: //* \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_CfgPCS (
peter@521: AT91PS_SPI pSPI, // pointer to a SPI controller
peter@521: char PCS_Device) // PCS of the Device
peter@521: {
peter@521: //* Write to the MR register
peter@521: pSPI->SPI_MR &= 0xFFF0FFFF;
peter@521: pSPI->SPI_MR |= ( (PCS_Device<<16) & AT91C_SPI_PCS );
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_ReceiveFrame
peter@521: //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_SPI_ReceiveFrame (
peter@521: AT91PS_SPI pSPI,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: return AT91F_PDC_ReceiveFrame(
peter@521: (AT91PS_PDC) &(pSPI->SPI_RPR),
peter@521: pBuffer,
peter@521: szBuffer,
peter@521: pNextBuffer,
peter@521: szNextBuffer);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_SendFrame
peter@521: //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_SPI_SendFrame(
peter@521: AT91PS_SPI pSPI,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: return AT91F_PDC_SendFrame(
peter@521: (AT91PS_PDC) &(pSPI->SPI_RPR),
peter@521: pBuffer,
peter@521: szBuffer,
peter@521: pNextBuffer,
peter@521: szNextBuffer);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_Close
peter@521: //* \brief Close SPI: disable IT disable transfert, close PDC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_Close (
peter@521: AT91PS_SPI pSPI) // \arg pointer to a SPI controller
peter@521: {
peter@521: //* Reset all the Chip Select register
peter@521: pSPI->SPI_CSR[0] = 0 ;
peter@521: pSPI->SPI_CSR[1] = 0 ;
peter@521: pSPI->SPI_CSR[2] = 0 ;
peter@521: pSPI->SPI_CSR[3] = 0 ;
peter@521:
peter@521: //* Reset the SPI mode
peter@521: pSPI->SPI_MR = 0 ;
peter@521:
peter@521: //* Disable all interrupts
peter@521: pSPI->SPI_IDR = 0xFFFFFFFF ;
peter@521:
peter@521: //* Abort the Peripheral Data Transfers
peter@521: AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));
peter@521:
peter@521: //* Disable receiver and transmitter and stop any activity immediately
peter@521: pSPI->SPI_CR = AT91C_SPI_SPIDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_PutChar
peter@521: //* \brief Send a character,does not check if ready to send
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI_PutChar (
peter@521: AT91PS_SPI pSPI,
peter@521: unsigned int character,
peter@521: unsigned int cs_number )
peter@521: {
peter@521: unsigned int value_for_cs;
peter@521: value_for_cs = (~(1 << cs_number)) & 0xF; //Place a zero among a 4 ONEs number
peter@521: pSPI->SPI_TDR = (character & 0xFFFF) | (value_for_cs << 16);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_GetChar
peter@521: //* \brief Receive a character,does not check if a character is available
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_SPI_GetChar (
peter@521: const AT91PS_SPI pSPI)
peter@521: {
peter@521: return((pSPI->SPI_RDR) & 0xFFFF);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_GetInterruptMaskStatus
peter@521: //* \brief Return SPI Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_SPI_GetInterruptMaskStatus( // \return SPI Interrupt Mask Status
peter@521: AT91PS_SPI pSpi) // \arg pointer to a SPI controller
peter@521: {
peter@521: return pSpi->SPI_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI_IsInterruptMasked
peter@521: //* \brief Test if SPI Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_SPI_IsInterruptMasked(
peter@521: AT91PS_SPI pSpi, // \arg pointer to a SPI controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_SPI_GetInterruptMaskStatus(pSpi) & flag);
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR USART
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_Baudrate
peter@521: //* \brief Calculate the baudrate
peter@521: //* Standard Asynchronous Mode : 8 bits , 1 stop , no parity
peter@521: #define AT91C_US_ASYNC_MODE ( AT91C_US_USMODE_NORMAL + \
peter@521: AT91C_US_NBSTOP_1_BIT + \
peter@521: AT91C_US_PAR_NONE + \
peter@521: AT91C_US_CHRL_8_BITS + \
peter@521: AT91C_US_CLKS_CLOCK )
peter@521:
peter@521: //* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity
peter@521: #define AT91C_US_ASYNC_SCK_MODE ( AT91C_US_USMODE_NORMAL + \
peter@521: AT91C_US_NBSTOP_1_BIT + \
peter@521: AT91C_US_PAR_NONE + \
peter@521: AT91C_US_CHRL_8_BITS + \
peter@521: AT91C_US_CLKS_EXT )
peter@521:
peter@521: //* Standard Synchronous Mode : 8 bits , 1 stop , no parity
peter@521: #define AT91C_US_SYNC_MODE ( AT91C_US_SYNC + \
peter@521: AT91C_US_USMODE_NORMAL + \
peter@521: AT91C_US_NBSTOP_1_BIT + \
peter@521: AT91C_US_PAR_NONE + \
peter@521: AT91C_US_CHRL_8_BITS + \
peter@521: AT91C_US_CLKS_CLOCK )
peter@521:
peter@521: //* SCK used Label
peter@521: #define AT91C_US_SCK_USED (AT91C_US_CKLO | AT91C_US_CLKS_EXT)
peter@521:
peter@521: //* Standard ISO T=0 Mode : 8 bits , 1 stop , parity
peter@521: #define AT91C_US_ISO_READER_MODE ( AT91C_US_USMODE_ISO7816_0 + \
peter@521: AT91C_US_CLKS_CLOCK +\
peter@521: AT91C_US_NBSTOP_1_BIT + \
peter@521: AT91C_US_PAR_EVEN + \
peter@521: AT91C_US_CHRL_8_BITS + \
peter@521: AT91C_US_CKLO +\
peter@521: AT91C_US_OVER)
peter@521:
peter@521: //* Standard IRDA mode
peter@521: #define AT91C_US_ASYNC_IRDA_MODE ( AT91C_US_USMODE_IRDA + \
peter@521: AT91C_US_NBSTOP_1_BIT + \
peter@521: AT91C_US_PAR_NONE + \
peter@521: AT91C_US_CHRL_8_BITS + \
peter@521: AT91C_US_CLKS_CLOCK )
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_Baudrate
peter@521: //* \brief Caluculate baud_value according to the main clock and the baud rate
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_US_Baudrate (
peter@521: const unsigned int main_clock, // \arg peripheral clock
peter@521: const unsigned int baud_rate) // \arg UART baudrate
peter@521: {
peter@521: unsigned int baud_value = ((main_clock*10)/(baud_rate * 16));
peter@521: if ((baud_value % 10) >= 5)
peter@521: baud_value = (baud_value / 10) + 1;
peter@521: else
peter@521: baud_value /= 10;
peter@521: return baud_value;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_SetBaudrate
peter@521: //* \brief Set the baudrate according to the CPU clock
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_SetBaudrate (
peter@521: AT91PS_USART pUSART, // \arg pointer to a USART controller
peter@521: unsigned int mainClock, // \arg peripheral clock
peter@521: unsigned int speed) // \arg UART baudrate
peter@521: {
peter@521: //* Define the baud rate divisor register
peter@521: pUSART->US_BRGR = AT91F_US_Baudrate(mainClock, speed);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_SetTimeguard
peter@521: //* \brief Set USART timeguard
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_SetTimeguard (
peter@521: AT91PS_USART pUSART, // \arg pointer to a USART controller
peter@521: unsigned int timeguard) // \arg timeguard value
peter@521: {
peter@521: //* Write the Timeguard Register
peter@521: pUSART->US_TTGR = timeguard ;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_EnableIt
peter@521: //* \brief Enable USART IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_EnableIt (
peter@521: AT91PS_USART pUSART, // \arg pointer to a USART controller
peter@521: unsigned int flag) // \arg IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pUSART->US_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_DisableIt
peter@521: //* \brief Disable USART IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_DisableIt (
peter@521: AT91PS_USART pUSART, // \arg pointer to a USART controller
peter@521: unsigned int flag) // \arg IT to be disabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pUSART->US_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_Configure
peter@521: //* \brief Configure USART
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_Configure (
peter@521: AT91PS_USART pUSART, // \arg pointer to a USART controller
peter@521: unsigned int mainClock, // \arg peripheral clock
peter@521: unsigned int mode , // \arg mode Register to be programmed
peter@521: unsigned int baudRate , // \arg baudrate to be programmed
peter@521: unsigned int timeguard ) // \arg timeguard to be programmed
peter@521: {
peter@521: //* Disable interrupts
peter@521: pUSART->US_IDR = (unsigned int) -1;
peter@521:
peter@521: //* Reset receiver and transmitter
peter@521: pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS ;
peter@521:
peter@521: //* Define the baud rate divisor register
peter@521: AT91F_US_SetBaudrate(pUSART, mainClock, baudRate);
peter@521:
peter@521: //* Write the Timeguard Register
peter@521: AT91F_US_SetTimeguard(pUSART, timeguard);
peter@521:
peter@521: //* Clear Transmit and Receive Counters
peter@521: AT91F_PDC_Open((AT91PS_PDC) &(pUSART->US_RPR));
peter@521:
peter@521: //* Define the USART mode
peter@521: pUSART->US_MR = mode ;
peter@521:
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_EnableRx
peter@521: //* \brief Enable receiving characters
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_EnableRx (
peter@521: AT91PS_USART pUSART) // \arg pointer to a USART controller
peter@521: {
peter@521: //* Enable receiver
peter@521: pUSART->US_CR = AT91C_US_RXEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_EnableTx
peter@521: //* \brief Enable sending characters
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_EnableTx (
peter@521: AT91PS_USART pUSART) // \arg pointer to a USART controller
peter@521: {
peter@521: //* Enable transmitter
peter@521: pUSART->US_CR = AT91C_US_TXEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_ResetRx
peter@521: //* \brief Reset Receiver and re-enable it
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_ResetRx (
peter@521: AT91PS_USART pUSART) // \arg pointer to a USART controller
peter@521: {
peter@521: //* Reset receiver
peter@521: pUSART->US_CR = AT91C_US_RSTRX;
peter@521: //* Re-Enable receiver
peter@521: pUSART->US_CR = AT91C_US_RXEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_ResetTx
peter@521: //* \brief Reset Transmitter and re-enable it
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_ResetTx (
peter@521: AT91PS_USART pUSART) // \arg pointer to a USART controller
peter@521: {
peter@521: //* Reset transmitter
peter@521: pUSART->US_CR = AT91C_US_RSTTX;
peter@521: //* Enable transmitter
peter@521: pUSART->US_CR = AT91C_US_TXEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_DisableRx
peter@521: //* \brief Disable Receiver
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_DisableRx (
peter@521: AT91PS_USART pUSART) // \arg pointer to a USART controller
peter@521: {
peter@521: //* Disable receiver
peter@521: pUSART->US_CR = AT91C_US_RXDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_DisableTx
peter@521: //* \brief Disable Transmitter
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_DisableTx (
peter@521: AT91PS_USART pUSART) // \arg pointer to a USART controller
peter@521: {
peter@521: //* Disable transmitter
peter@521: pUSART->US_CR = AT91C_US_TXDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_Close
peter@521: //* \brief Close USART: disable IT disable receiver and transmitter, close PDC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_Close (
peter@521: AT91PS_USART pUSART) // \arg pointer to a USART controller
peter@521: {
peter@521: //* Reset the baud rate divisor register
peter@521: pUSART->US_BRGR = 0 ;
peter@521:
peter@521: //* Reset the USART mode
peter@521: pUSART->US_MR = 0 ;
peter@521:
peter@521: //* Reset the Timeguard Register
peter@521: pUSART->US_TTGR = 0;
peter@521:
peter@521: //* Disable all interrupts
peter@521: pUSART->US_IDR = 0xFFFFFFFF ;
peter@521:
peter@521: //* Abort the Peripheral Data Transfers
peter@521: AT91F_PDC_Close((AT91PS_PDC) &(pUSART->US_RPR));
peter@521:
peter@521: //* Disable receiver and transmitter and stop any activity immediately
peter@521: pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX ;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_TxReady
peter@521: //* \brief Return 1 if a character can be written in US_THR
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_US_TxReady (
peter@521: AT91PS_USART pUSART ) // \arg pointer to a USART controller
peter@521: {
peter@521: return (pUSART->US_CSR & AT91C_US_TXRDY);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_RxReady
peter@521: //* \brief Return 1 if a character can be read in US_RHR
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_US_RxReady (
peter@521: AT91PS_USART pUSART ) // \arg pointer to a USART controller
peter@521: {
peter@521: return (pUSART->US_CSR & AT91C_US_RXRDY);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_Error
peter@521: //* \brief Return the error flag
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_US_Error (
peter@521: AT91PS_USART pUSART ) // \arg pointer to a USART controller
peter@521: {
peter@521: return (pUSART->US_CSR &
peter@521: (AT91C_US_OVRE | // Overrun error
peter@521: AT91C_US_FRAME | // Framing error
peter@521: AT91C_US_PARE)); // Parity error
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_PutChar
peter@521: //* \brief Send a character,does not check if ready to send
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_PutChar (
peter@521: AT91PS_USART pUSART,
peter@521: int character )
peter@521: {
peter@521: pUSART->US_THR = (character & 0x1FF);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_GetChar
peter@521: //* \brief Receive a character,does not check if a character is available
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_US_GetChar (
peter@521: const AT91PS_USART pUSART)
peter@521: {
peter@521: return((pUSART->US_RHR) & 0x1FF);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_SendFrame
peter@521: //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_US_SendFrame(
peter@521: AT91PS_USART pUSART,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: return AT91F_PDC_SendFrame(
peter@521: (AT91PS_PDC) &(pUSART->US_RPR),
peter@521: pBuffer,
peter@521: szBuffer,
peter@521: pNextBuffer,
peter@521: szNextBuffer);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_ReceiveFrame
peter@521: //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_US_ReceiveFrame (
peter@521: AT91PS_USART pUSART,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: return AT91F_PDC_ReceiveFrame(
peter@521: (AT91PS_PDC) &(pUSART->US_RPR),
peter@521: pBuffer,
peter@521: szBuffer,
peter@521: pNextBuffer,
peter@521: szNextBuffer);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US_SetIrdaFilter
peter@521: //* \brief Set the value of IrDa filter tregister
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US_SetIrdaFilter (
peter@521: AT91PS_USART pUSART,
peter@521: unsigned char value
peter@521: )
peter@521: {
peter@521: pUSART->US_IF = value;
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR SSC
peter@521: ***************************************************************************** */
peter@521: //* Define the standard I2S mode configuration
peter@521:
peter@521: //* Configuration to set in the SSC Transmit Clock Mode Register
peter@521: //* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
peter@521: //* nb_slot_by_frame : number of channels
peter@521: #define AT91C_I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
peter@521: AT91C_SSC_CKS_DIV +\
peter@521: AT91C_SSC_CKO_CONTINOUS +\
peter@521: AT91C_SSC_CKG_NONE +\
peter@521: AT91C_SSC_START_FALL_RF +\
peter@521: AT91C_SSC_STTOUT +\
peter@521: ((1<<16) & AT91C_SSC_STTDLY) +\
peter@521: ((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24))
peter@521:
peter@521:
peter@521: //* Configuration to set in the SSC Transmit Frame Mode Register
peter@521: //* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
peter@521: //* nb_slot_by_frame : number of channels
peter@521: #define AT91C_I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
peter@521: (nb_bit_by_slot-1) +\
peter@521: AT91C_SSC_MSBF +\
peter@521: (((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB) +\
peter@521: (((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\
peter@521: AT91C_SSC_FSOS_NEGATIVE)
peter@521:
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_SetBaudrate
peter@521: //* \brief Set the baudrate according to the CPU clock
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_SetBaudrate (
peter@521: AT91PS_SSC pSSC, // \arg pointer to a SSC controller
peter@521: unsigned int mainClock, // \arg peripheral clock
peter@521: unsigned int speed) // \arg SSC baudrate
peter@521: {
peter@521: unsigned int baud_value;
peter@521: //* Define the baud rate divisor register
peter@521: if (speed == 0)
peter@521: baud_value = 0;
peter@521: else
peter@521: {
peter@521: baud_value = (unsigned int) (mainClock * 10)/(2*speed);
peter@521: if ((baud_value % 10) >= 5)
peter@521: baud_value = (baud_value / 10) + 1;
peter@521: else
peter@521: baud_value /= 10;
peter@521: }
peter@521:
peter@521: pSSC->SSC_CMR = baud_value;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_Configure
peter@521: //* \brief Configure SSC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_Configure (
peter@521: AT91PS_SSC pSSC, // \arg pointer to a SSC controller
peter@521: unsigned int syst_clock, // \arg System Clock Frequency
peter@521: unsigned int baud_rate, // \arg Expected Baud Rate Frequency
peter@521: unsigned int clock_rx, // \arg Receiver Clock Parameters
peter@521: unsigned int mode_rx, // \arg mode Register to be programmed
peter@521: unsigned int clock_tx, // \arg Transmitter Clock Parameters
peter@521: unsigned int mode_tx) // \arg mode Register to be programmed
peter@521: {
peter@521: //* Disable interrupts
peter@521: pSSC->SSC_IDR = (unsigned int) -1;
peter@521:
peter@521: //* Reset receiver and transmitter
peter@521: pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
peter@521:
peter@521: //* Define the Clock Mode Register
peter@521: AT91F_SSC_SetBaudrate(pSSC, syst_clock, baud_rate);
peter@521:
peter@521: //* Write the Receive Clock Mode Register
peter@521: pSSC->SSC_RCMR = clock_rx;
peter@521:
peter@521: //* Write the Transmit Clock Mode Register
peter@521: pSSC->SSC_TCMR = clock_tx;
peter@521:
peter@521: //* Write the Receive Frame Mode Register
peter@521: pSSC->SSC_RFMR = mode_rx;
peter@521:
peter@521: //* Write the Transmit Frame Mode Register
peter@521: pSSC->SSC_TFMR = mode_tx;
peter@521:
peter@521: //* Clear Transmit and Receive Counters
peter@521: AT91F_PDC_Open((AT91PS_PDC) &(pSSC->SSC_RPR));
peter@521:
peter@521:
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_EnableRx
peter@521: //* \brief Enable receiving datas
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_EnableRx (
peter@521: AT91PS_SSC pSSC) // \arg pointer to a SSC controller
peter@521: {
peter@521: //* Enable receiver
peter@521: pSSC->SSC_CR = AT91C_SSC_RXEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_DisableRx
peter@521: //* \brief Disable receiving datas
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_DisableRx (
peter@521: AT91PS_SSC pSSC) // \arg pointer to a SSC controller
peter@521: {
peter@521: //* Disable receiver
peter@521: pSSC->SSC_CR = AT91C_SSC_RXDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_EnableTx
peter@521: //* \brief Enable sending datas
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_EnableTx (
peter@521: AT91PS_SSC pSSC) // \arg pointer to a SSC controller
peter@521: {
peter@521: //* Enable transmitter
peter@521: pSSC->SSC_CR = AT91C_SSC_TXEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_DisableTx
peter@521: //* \brief Disable sending datas
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_DisableTx (
peter@521: AT91PS_SSC pSSC) // \arg pointer to a SSC controller
peter@521: {
peter@521: //* Disable transmitter
peter@521: pSSC->SSC_CR = AT91C_SSC_TXDIS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_EnableIt
peter@521: //* \brief Enable SSC IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_EnableIt (
peter@521: AT91PS_SSC pSSC, // \arg pointer to a SSC controller
peter@521: unsigned int flag) // \arg IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pSSC->SSC_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_DisableIt
peter@521: //* \brief Disable SSC IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_DisableIt (
peter@521: AT91PS_SSC pSSC, // \arg pointer to a SSC controller
peter@521: unsigned int flag) // \arg IT to be disabled
peter@521: {
peter@521: //* Write to the IDR register
peter@521: pSSC->SSC_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_ReceiveFrame
peter@521: //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_SSC_ReceiveFrame (
peter@521: AT91PS_SSC pSSC,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: return AT91F_PDC_ReceiveFrame(
peter@521: (AT91PS_PDC) &(pSSC->SSC_RPR),
peter@521: pBuffer,
peter@521: szBuffer,
peter@521: pNextBuffer,
peter@521: szNextBuffer);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_SendFrame
peter@521: //* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_SSC_SendFrame(
peter@521: AT91PS_SSC pSSC,
peter@521: char *pBuffer,
peter@521: unsigned int szBuffer,
peter@521: char *pNextBuffer,
peter@521: unsigned int szNextBuffer )
peter@521: {
peter@521: return AT91F_PDC_SendFrame(
peter@521: (AT91PS_PDC) &(pSSC->SSC_RPR),
peter@521: pBuffer,
peter@521: szBuffer,
peter@521: pNextBuffer,
peter@521: szNextBuffer);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_GetInterruptMaskStatus
peter@521: //* \brief Return SSC Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_SSC_GetInterruptMaskStatus( // \return SSC Interrupt Mask Status
peter@521: AT91PS_SSC pSsc) // \arg pointer to a SSC controller
peter@521: {
peter@521: return pSsc->SSC_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_IsInterruptMasked
peter@521: //* \brief Test if SSC Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_SSC_IsInterruptMasked(
peter@521: AT91PS_SSC pSsc, // \arg pointer to a SSC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_SSC_GetInterruptMaskStatus(pSsc) & flag);
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR TWI
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TWI_EnableIt
peter@521: //* \brief Enable TWI IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TWI_EnableIt (
peter@521: AT91PS_TWI pTWI, // \arg pointer to a TWI controller
peter@521: unsigned int flag) // \arg IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pTWI->TWI_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TWI_DisableIt
peter@521: //* \brief Disable TWI IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TWI_DisableIt (
peter@521: AT91PS_TWI pTWI, // \arg pointer to a TWI controller
peter@521: unsigned int flag) // \arg IT to be disabled
peter@521: {
peter@521: //* Write to the IDR register
peter@521: pTWI->TWI_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TWI_Configure
peter@521: //* \brief Configure TWI in master mode
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TWI_Configure ( AT91PS_TWI pTWI ) // \arg pointer to a TWI controller
peter@521: {
peter@521: //* Disable interrupts
peter@521: pTWI->TWI_IDR = (unsigned int) -1;
peter@521:
peter@521: //* Reset peripheral
peter@521: pTWI->TWI_CR = AT91C_TWI_SWRST;
peter@521:
peter@521: //* Set Master mode
peter@521: pTWI->TWI_CR = AT91C_TWI_MSEN;
peter@521:
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TWI_GetInterruptMaskStatus
peter@521: //* \brief Return TWI Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_TWI_GetInterruptMaskStatus( // \return TWI Interrupt Mask Status
peter@521: AT91PS_TWI pTwi) // \arg pointer to a TWI controller
peter@521: {
peter@521: return pTwi->TWI_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TWI_IsInterruptMasked
peter@521: //* \brief Test if TWI Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_TWI_IsInterruptMasked(
peter@521: AT91PS_TWI pTwi, // \arg pointer to a TWI controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_TWI_GetInterruptMaskStatus(pTwi) & flag);
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR PWMC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_GetStatus
peter@521: //* \brief Return PWM Interrupt Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PWMC_GetStatus( // \return PWM Interrupt Status
peter@521: AT91PS_PWMC pPWM) // pointer to a PWM controller
peter@521: {
peter@521: return pPWM->PWMC_SR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_InterruptEnable
peter@521: //* \brief Enable PWM Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_InterruptEnable(
peter@521: AT91PS_PWMC pPwm, // \arg pointer to a PWM controller
peter@521: unsigned int flag) // \arg PWM interrupt to be enabled
peter@521: {
peter@521: pPwm->PWMC_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_InterruptDisable
peter@521: //* \brief Disable PWM Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_InterruptDisable(
peter@521: AT91PS_PWMC pPwm, // \arg pointer to a PWM controller
peter@521: unsigned int flag) // \arg PWM interrupt to be disabled
peter@521: {
peter@521: pPwm->PWMC_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_GetInterruptMaskStatus
peter@521: //* \brief Return PWM Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PWMC_GetInterruptMaskStatus( // \return PWM Interrupt Mask Status
peter@521: AT91PS_PWMC pPwm) // \arg pointer to a PWM controller
peter@521: {
peter@521: return pPwm->PWMC_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_IsInterruptMasked
peter@521: //* \brief Test if PWM Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PWMC_IsInterruptMasked(
peter@521: AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PWMC_GetInterruptMaskStatus(pPWM) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_IsStatusSet
peter@521: //* \brief Test if PWM Interrupt is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_PWMC_IsStatusSet(
peter@521: AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_PWMC_GetStatus(pPWM) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_CfgChannel
peter@521: //* \brief Test if PWM Interrupt is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_CfgChannel(
peter@521: AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
peter@521: unsigned int channelId, // \arg PWM channel ID
peter@521: unsigned int mode, // \arg PWM mode
peter@521: unsigned int period, // \arg PWM period
peter@521: unsigned int duty) // \arg PWM duty cycle
peter@521: {
peter@521: pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
peter@521: pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
peter@521: pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_StartChannel
peter@521: //* \brief Enable channel
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_StartChannel(
peter@521: AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
peter@521: unsigned int flag) // \arg Channels IDs to be enabled
peter@521: {
peter@521: pPWM->PWMC_ENA = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_StopChannel
peter@521: //* \brief Disable channel
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_StopChannel(
peter@521: AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
peter@521: unsigned int flag) // \arg Channels IDs to be enabled
peter@521: {
peter@521: pPWM->PWMC_DIS = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWM_UpdateChannel
peter@521: //* \brief Update Period or Duty Cycle
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_UpdateChannel(
peter@521: AT91PS_PWMC pPWM, // \arg pointer to a PWM controller
peter@521: unsigned int channelId, // \arg PWM channel ID
peter@521: unsigned int update) // \arg Channels IDs to be enabled
peter@521: {
peter@521: pPWM->PWMC_CH[channelId].PWMC_CUPDR = update;
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR UDP
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EnableIt
peter@521: //* \brief Enable UDP IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EnableIt (
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned int flag) // \arg IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pUDP->UDP_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_DisableIt
peter@521: //* \brief Disable UDP IT
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_DisableIt (
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned int flag) // \arg IT to be disabled
peter@521: {
peter@521: //* Write to the IDR register
peter@521: pUDP->UDP_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_SetAddress
peter@521: //* \brief Set UDP functional address
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_SetAddress (
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char address) // \arg new UDP address
peter@521: {
peter@521: pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EnableEp
peter@521: //* \brief Enable Endpoint
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EnableEp (
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint) // \arg endpoint number
peter@521: {
peter@521: pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_DisableEp
peter@521: //* \brief Enable Endpoint
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_DisableEp (
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint) // \arg endpoint number
peter@521: {
peter@521: pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_SetState
peter@521: //* \brief Set UDP Device state
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_SetState (
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned int flag) // \arg new UDP address
peter@521: {
peter@521: pUDP->UDP_GLBSTATE &= ~(AT91C_UDP_FADDEN | AT91C_UDP_CONFG);
peter@521: pUDP->UDP_GLBSTATE |= flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_GetState
peter@521: //* \brief return UDP Device state
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_UDP_GetState ( // \return the UDP device state
peter@521: AT91PS_UDP pUDP) // \arg pointer to a UDP controller
peter@521: {
peter@521: return (pUDP->UDP_GLBSTATE & (AT91C_UDP_FADDEN | AT91C_UDP_CONFG));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_ResetEp
peter@521: //* \brief Reset UDP endpoint
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_ResetEp ( // \return the UDP device state
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned int flag) // \arg Endpoints to be reset
peter@521: {
peter@521: pUDP->UDP_RSTEP = flag;
peter@521: pUDP->UDP_RSTEP = 0;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EpStall
peter@521: //* \brief Endpoint will STALL requests
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EpStall(
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint) // \arg endpoint number
peter@521: {
peter@521: pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EpWrite
peter@521: //* \brief Write value in the DPR
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EpWrite(
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint, // \arg endpoint number
peter@521: unsigned char value) // \arg value to be written in the DPR
peter@521: {
peter@521: pUDP->UDP_FDR[endpoint] = value;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EpRead
peter@521: //* \brief Return value from the DPR
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_UDP_EpRead(
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint) // \arg endpoint number
peter@521: {
peter@521: return pUDP->UDP_FDR[endpoint];
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EpEndOfWr
peter@521: //* \brief Notify the UDP that values in DPR are ready to be sent
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EpEndOfWr(
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint) // \arg endpoint number
peter@521: {
peter@521: pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EpClear
peter@521: //* \brief Clear flag in the endpoint CSR register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EpClear(
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint, // \arg endpoint number
peter@521: unsigned int flag) // \arg flag to be cleared
peter@521: {
peter@521: pUDP->UDP_CSR[endpoint] &= ~(flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EpSet
peter@521: //* \brief Set flag in the endpoint CSR register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EpSet(
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint, // \arg endpoint number
peter@521: unsigned int flag) // \arg flag to be cleared
peter@521: {
peter@521: pUDP->UDP_CSR[endpoint] |= flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_EpStatus
peter@521: //* \brief Return the endpoint CSR register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_UDP_EpStatus(
peter@521: AT91PS_UDP pUDP, // \arg pointer to a UDP controller
peter@521: unsigned char endpoint) // \arg endpoint number
peter@521: {
peter@521: return pUDP->UDP_CSR[endpoint];
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_GetInterruptMaskStatus
peter@521: //* \brief Return UDP Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_UDP_GetInterruptMaskStatus(
peter@521: AT91PS_UDP pUdp) // \arg pointer to a UDP controller
peter@521: {
peter@521: return pUdp->UDP_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_IsInterruptMasked
peter@521: //* \brief Test if UDP Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_UDP_IsInterruptMasked(
peter@521: AT91PS_UDP pUdp, // \arg pointer to a UDP controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_UDP_GetInterruptMaskStatus(pUdp) & flag);
peter@521: }
peter@521:
peter@521: // ----------------------------------------------------------------------------
peter@521: // \fn AT91F_UDP_InterruptStatusRegister
peter@521: // \brief Return the Interrupt Status Register
peter@521: // ----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_UDP_InterruptStatusRegister(
peter@521: AT91PS_UDP pUDP ) // \arg pointer to a UDP controller
peter@521: {
peter@521: return pUDP->UDP_ISR;
peter@521: }
peter@521:
peter@521: // ----------------------------------------------------------------------------
peter@521: // \fn AT91F_UDP_InterruptClearRegister
peter@521: // \brief Clear Interrupt Register
peter@521: // ----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_InterruptClearRegister (
peter@521: AT91PS_UDP pUDP, // \arg pointer to UDP controller
peter@521: unsigned int flag) // \arg IT to be cleat
peter@521: {
peter@521: pUDP->UDP_ICR = flag;
peter@521: }
peter@521:
peter@521: // ----------------------------------------------------------------------------
peter@521: // \fn AT91F_UDP_EnableTransceiver
peter@521: // \brief Enable transceiver
peter@521: // ----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_EnableTransceiver(
peter@521: AT91PS_UDP pUDP ) // \arg pointer to a UDP controller
peter@521: {
peter@521: pUDP->UDP_TXVC &= ~AT91C_UDP_TXVDIS;
peter@521: }
peter@521:
peter@521: // ----------------------------------------------------------------------------
peter@521: // \fn AT91F_UDP_DisableTransceiver
peter@521: // \brief Disable transceiver
peter@521: // ----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_DisableTransceiver(
peter@521: AT91PS_UDP pUDP ) // \arg pointer to a UDP controller
peter@521: {
peter@521: pUDP->UDP_TXVC = AT91C_UDP_TXVDIS;
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR TC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC_InterruptEnable
peter@521: //* \brief Enable TC Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC_InterruptEnable(
peter@521: AT91PS_TC pTc, // \arg pointer to a TC controller
peter@521: unsigned int flag) // \arg TC interrupt to be enabled
peter@521: {
peter@521: pTc->TC_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC_InterruptDisable
peter@521: //* \brief Disable TC Interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC_InterruptDisable(
peter@521: AT91PS_TC pTc, // \arg pointer to a TC controller
peter@521: unsigned int flag) // \arg TC interrupt to be disabled
peter@521: {
peter@521: pTc->TC_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC_GetInterruptMaskStatus
peter@521: //* \brief Return TC Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_TC_GetInterruptMaskStatus( // \return TC Interrupt Mask Status
peter@521: AT91PS_TC pTc) // \arg pointer to a TC controller
peter@521: {
peter@521: return pTc->TC_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC_IsInterruptMasked
peter@521: //* \brief Test if TC Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline int AT91F_TC_IsInterruptMasked(
peter@521: AT91PS_TC pTc, // \arg pointer to a TC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_TC_GetInterruptMaskStatus(pTc) & flag);
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR CAN
peter@521: ***************************************************************************** */
peter@521: #define STANDARD_FORMAT 0
peter@521: #define EXTENDED_FORMAT 1
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_InitMailboxRegisters()
peter@521: //* \brief Configure the corresponding mailbox
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_InitMailboxRegisters(AT91PS_CAN_MB CAN_Mailbox,
peter@521: int mode_reg,
peter@521: int acceptance_mask_reg,
peter@521: int id_reg,
peter@521: int data_low_reg,
peter@521: int data_high_reg,
peter@521: int control_reg)
peter@521: {
peter@521: CAN_Mailbox->CAN_MB_MCR = 0x0;
peter@521: CAN_Mailbox->CAN_MB_MMR = mode_reg;
peter@521: CAN_Mailbox->CAN_MB_MAM = acceptance_mask_reg;
peter@521: CAN_Mailbox->CAN_MB_MID = id_reg;
peter@521: CAN_Mailbox->CAN_MB_MDL = data_low_reg;
peter@521: CAN_Mailbox->CAN_MB_MDH = data_high_reg;
peter@521: CAN_Mailbox->CAN_MB_MCR = control_reg;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_EnableCAN()
peter@521: //* \brief
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_EnableCAN(
peter@521: AT91PS_CAN pCAN) // pointer to a CAN controller
peter@521: {
peter@521: pCAN->CAN_MR |= AT91C_CAN_CANEN;
peter@521:
peter@521: // Wait for WAKEUP flag raising <=> 11-recessive-bit were scanned by the transceiver
peter@521: while( (pCAN->CAN_SR & AT91C_CAN_WAKEUP) != AT91C_CAN_WAKEUP );
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_DisableCAN()
peter@521: //* \brief
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_DisableCAN(
peter@521: AT91PS_CAN pCAN) // pointer to a CAN controller
peter@521: {
peter@521: pCAN->CAN_MR &= ~AT91C_CAN_CANEN;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_EnableIt
peter@521: //* \brief Enable CAN interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_EnableIt (
peter@521: AT91PS_CAN pCAN, // pointer to a CAN controller
peter@521: unsigned int flag) // IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pCAN->CAN_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_DisableIt
peter@521: //* \brief Disable CAN interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_DisableIt (
peter@521: AT91PS_CAN pCAN, // pointer to a CAN controller
peter@521: unsigned int flag) // IT to be disabled
peter@521: {
peter@521: //* Write to the IDR register
peter@521: pCAN->CAN_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetStatus
peter@521: //* \brief Return CAN Interrupt Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetStatus( // \return CAN Interrupt Status
peter@521: AT91PS_CAN pCAN) // pointer to a CAN controller
peter@521: {
peter@521: return pCAN->CAN_SR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetInterruptMaskStatus
peter@521: //* \brief Return CAN Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetInterruptMaskStatus( // \return CAN Interrupt Mask Status
peter@521: AT91PS_CAN pCAN) // pointer to a CAN controller
peter@521: {
peter@521: return pCAN->CAN_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_IsInterruptMasked
peter@521: //* \brief Test if CAN Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_IsInterruptMasked(
peter@521: AT91PS_CAN pCAN, // \arg pointer to a CAN controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_CAN_GetInterruptMaskStatus(pCAN) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_IsStatusSet
peter@521: //* \brief Test if CAN Interrupt is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_IsStatusSet(
peter@521: AT91PS_CAN pCAN, // \arg pointer to a CAN controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_CAN_GetStatus(pCAN) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgModeReg
peter@521: //* \brief Configure the Mode Register of the CAN controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgModeReg (
peter@521: AT91PS_CAN pCAN, // pointer to a CAN controller
peter@521: unsigned int mode) // mode register
peter@521: {
peter@521: //* Write to the MR register
peter@521: pCAN->CAN_MR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetModeReg
peter@521: //* \brief Return the Mode Register of the CAN controller value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetModeReg (
peter@521: AT91PS_CAN pCAN // pointer to a CAN controller
peter@521: )
peter@521: {
peter@521: return pCAN->CAN_MR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgBaudrateReg
peter@521: //* \brief Configure the Baudrate of the CAN controller for the network
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgBaudrateReg (
peter@521: AT91PS_CAN pCAN, // pointer to a CAN controller
peter@521: unsigned int baudrate_cfg)
peter@521: {
peter@521: //* Write to the BR register
peter@521: pCAN->CAN_BR = baudrate_cfg;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetBaudrate
peter@521: //* \brief Return the Baudrate of the CAN controller for the network value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetBaudrate (
peter@521: AT91PS_CAN pCAN // pointer to a CAN controller
peter@521: )
peter@521: {
peter@521: return pCAN->CAN_BR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetInternalCounter
peter@521: //* \brief Return CAN Timer Regsiter Value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetInternalCounter (
peter@521: AT91PS_CAN pCAN // pointer to a CAN controller
peter@521: )
peter@521: {
peter@521: return pCAN->CAN_TIM;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetTimestamp
peter@521: //* \brief Return CAN Timestamp Register Value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetTimestamp (
peter@521: AT91PS_CAN pCAN // pointer to a CAN controller
peter@521: )
peter@521: {
peter@521: return pCAN->CAN_TIMESTP;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetErrorCounter
peter@521: //* \brief Return CAN Error Counter Register Value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetErrorCounter (
peter@521: AT91PS_CAN pCAN // pointer to a CAN controller
peter@521: )
peter@521: {
peter@521: return pCAN->CAN_ECR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_InitTransferRequest
peter@521: //* \brief Request for a transfer on the corresponding mailboxes
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_InitTransferRequest (
peter@521: AT91PS_CAN pCAN, // pointer to a CAN controller
peter@521: unsigned int transfer_cmd)
peter@521: {
peter@521: pCAN->CAN_TCR = transfer_cmd;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_InitAbortRequest
peter@521: //* \brief Abort the corresponding mailboxes
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_InitAbortRequest (
peter@521: AT91PS_CAN pCAN, // pointer to a CAN controller
peter@521: unsigned int abort_cmd)
peter@521: {
peter@521: pCAN->CAN_ACR = abort_cmd;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgMessageModeReg
peter@521: //* \brief Program the Message Mode Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgMessageModeReg (
peter@521: AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
peter@521: unsigned int mode)
peter@521: {
peter@521: CAN_Mailbox->CAN_MB_MMR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetMessageModeReg
peter@521: //* \brief Return the Message Mode Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetMessageModeReg (
peter@521: AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
peter@521: {
peter@521: return CAN_Mailbox->CAN_MB_MMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgMessageIDReg
peter@521: //* \brief Program the Message ID Register
peter@521: //* \brief Version == 0 for Standard messsage, Version == 1 for Extended
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgMessageIDReg (
peter@521: AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
peter@521: unsigned int id,
peter@521: unsigned char version)
peter@521: {
peter@521: if(version==0) // IDvA Standard Format
peter@521: CAN_Mailbox->CAN_MB_MID = id<<18;
peter@521: else // IDvB Extended Format
peter@521: CAN_Mailbox->CAN_MB_MID = id | (1<<29); // set MIDE bit
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetMessageIDReg
peter@521: //* \brief Return the Message ID Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetMessageIDReg (
peter@521: AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
peter@521: {
peter@521: return CAN_Mailbox->CAN_MB_MID;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgMessageAcceptanceMaskReg
peter@521: //* \brief Program the Message Acceptance Mask Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgMessageAcceptanceMaskReg (
peter@521: AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
peter@521: unsigned int mask)
peter@521: {
peter@521: CAN_Mailbox->CAN_MB_MAM = mask;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetMessageAcceptanceMaskReg
peter@521: //* \brief Return the Message Acceptance Mask Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetMessageAcceptanceMaskReg (
peter@521: AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
peter@521: {
peter@521: return CAN_Mailbox->CAN_MB_MAM;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetFamilyID
peter@521: //* \brief Return the Message ID Register
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetFamilyID (
peter@521: AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
peter@521: {
peter@521: return CAN_Mailbox->CAN_MB_MFID;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgMessageCtrlReg
peter@521: //* \brief Request and config for a transfer on the corresponding mailbox
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgMessageCtrlReg (
peter@521: AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
peter@521: unsigned int message_ctrl_cmd)
peter@521: {
peter@521: CAN_Mailbox->CAN_MB_MCR = message_ctrl_cmd;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetMessageStatus
peter@521: //* \brief Return CAN Mailbox Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetMessageStatus (
peter@521: AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
peter@521: {
peter@521: return CAN_Mailbox->CAN_MB_MSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgMessageDataLow
peter@521: //* \brief Program data low value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgMessageDataLow (
peter@521: AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
peter@521: unsigned int data)
peter@521: {
peter@521: CAN_Mailbox->CAN_MB_MDL = data;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetMessageDataLow
peter@521: //* \brief Return data low value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetMessageDataLow (
peter@521: AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
peter@521: {
peter@521: return CAN_Mailbox->CAN_MB_MDL;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgMessageDataHigh
peter@521: //* \brief Program data high value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgMessageDataHigh (
peter@521: AT91PS_CAN_MB CAN_Mailbox, // pointer to a CAN Mailbox
peter@521: unsigned int data)
peter@521: {
peter@521: CAN_Mailbox->CAN_MB_MDH = data;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_GetMessageDataHigh
peter@521: //* \brief Return data high value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_CAN_GetMessageDataHigh (
peter@521: AT91PS_CAN_MB CAN_Mailbox) // pointer to a CAN Mailbox
peter@521: {
peter@521: return CAN_Mailbox->CAN_MB_MDH;
peter@521: }
peter@521:
peter@521: /* *****************************************************************************
peter@521: SOFTWARE API FOR ADC
peter@521: ***************************************************************************** */
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_EnableIt
peter@521: //* \brief Enable ADC interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_EnableIt (
peter@521: AT91PS_ADC pADC, // pointer to a ADC controller
peter@521: unsigned int flag) // IT to be enabled
peter@521: {
peter@521: //* Write to the IER register
peter@521: pADC->ADC_IER = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_DisableIt
peter@521: //* \brief Disable ADC interrupt
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_DisableIt (
peter@521: AT91PS_ADC pADC, // pointer to a ADC controller
peter@521: unsigned int flag) // IT to be disabled
peter@521: {
peter@521: //* Write to the IDR register
peter@521: pADC->ADC_IDR = flag;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetStatus
peter@521: //* \brief Return ADC Interrupt Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetStatus( // \return ADC Interrupt Status
peter@521: AT91PS_ADC pADC) // pointer to a ADC controller
peter@521: {
peter@521: return pADC->ADC_SR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetInterruptMaskStatus
peter@521: //* \brief Return ADC Interrupt Mask Status
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetInterruptMaskStatus( // \return ADC Interrupt Mask Status
peter@521: AT91PS_ADC pADC) // pointer to a ADC controller
peter@521: {
peter@521: return pADC->ADC_IMR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_IsInterruptMasked
peter@521: //* \brief Test if ADC Interrupt is Masked
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_IsInterruptMasked(
peter@521: AT91PS_ADC pADC, // \arg pointer to a ADC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_ADC_GetInterruptMaskStatus(pADC) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_IsStatusSet
peter@521: //* \brief Test if ADC Status is Set
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_IsStatusSet(
peter@521: AT91PS_ADC pADC, // \arg pointer to a ADC controller
peter@521: unsigned int flag) // \arg flag to be tested
peter@521: {
peter@521: return (AT91F_ADC_GetStatus(pADC) & flag);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_CfgModeReg
peter@521: //* \brief Configure the Mode Register of the ADC controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_CfgModeReg (
peter@521: AT91PS_ADC pADC, // pointer to a ADC controller
peter@521: unsigned int mode) // mode register
peter@521: {
peter@521: //* Write to the MR register
peter@521: pADC->ADC_MR = mode;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetModeReg
peter@521: //* \brief Return the Mode Register of the ADC controller value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetModeReg (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_MR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_CfgTimings
peter@521: //* \brief Configure the different necessary timings of the ADC controller
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_CfgTimings (
peter@521: AT91PS_ADC pADC, // pointer to a ADC controller
peter@521: unsigned int mck_clock, // in MHz
peter@521: unsigned int adc_clock, // in MHz
peter@521: unsigned int startup_time, // in us
peter@521: unsigned int sample_and_hold_time) // in ns
peter@521: {
peter@521: unsigned int prescal,startup,shtim;
peter@521:
peter@521: prescal = mck_clock/(2*adc_clock) - 1;
peter@521: startup = adc_clock*startup_time/8 - 1;
peter@521: shtim = adc_clock*sample_and_hold_time/1000 - 1;
peter@521:
peter@521: //* Write to the MR register
peter@521: pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_EnableChannel
peter@521: //* \brief Return ADC Timer Register Value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_EnableChannel (
peter@521: AT91PS_ADC pADC, // pointer to a ADC controller
peter@521: unsigned int channel) // mode register
peter@521: {
peter@521: //* Write to the CHER register
peter@521: pADC->ADC_CHER = channel;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_DisableChannel
peter@521: //* \brief Return ADC Timer Register Value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_DisableChannel (
peter@521: AT91PS_ADC pADC, // pointer to a ADC controller
peter@521: unsigned int channel) // mode register
peter@521: {
peter@521: //* Write to the CHDR register
peter@521: pADC->ADC_CHDR = channel;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetChannelStatus
peter@521: //* \brief Return ADC Timer Register Value
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetChannelStatus (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CHSR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_StartConversion
peter@521: //* \brief Software request for a analog to digital conversion
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_StartConversion (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: pADC->ADC_CR = AT91C_ADC_START;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_SoftReset
peter@521: //* \brief Software reset
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_SoftReset (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: pADC->ADC_CR = AT91C_ADC_SWRST;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetLastConvertedData
peter@521: //* \brief Return the Last Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetLastConvertedData (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_LCDR;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH0
peter@521: //* \brief Return the Channel 0 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH0 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR0;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH1
peter@521: //* \brief Return the Channel 1 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH1 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR1;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH2
peter@521: //* \brief Return the Channel 2 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH2 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR2;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH3
peter@521: //* \brief Return the Channel 3 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH3 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR3;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH4
peter@521: //* \brief Return the Channel 4 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH4 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR4;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH5
peter@521: //* \brief Return the Channel 5 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH5 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR5;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH6
peter@521: //* \brief Return the Channel 6 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH6 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR6;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_GetConvertedDataCH7
peter@521: //* \brief Return the Channel 7 Converted Data
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline unsigned int AT91F_ADC_GetConvertedDataCH7 (
peter@521: AT91PS_ADC pADC // pointer to a ADC controller
peter@521: )
peter@521: {
peter@521: return pADC->ADC_CDR7;
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_DBGU_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for DBGU
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_DBGU_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_DBGU_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive DBGU signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_DBGU_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA27_DRXD ) |
peter@521: ((unsigned int) AT91C_PA28_DTXD ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for PMC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PMC_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive PMC signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PMC_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB30_PCK2 ) |
peter@521: ((unsigned int) AT91C_PB29_PCK1 ), // Peripheral A
peter@521: ((unsigned int) AT91C_PB20_PCK0 ) |
peter@521: ((unsigned int) AT91C_PB0_PCK0 ) |
peter@521: ((unsigned int) AT91C_PB22_PCK2 ) |
peter@521: ((unsigned int) AT91C_PB21_PCK1 )); // Peripheral B
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: 0, // Peripheral A
peter@521: ((unsigned int) AT91C_PA30_PCK2 ) |
peter@521: ((unsigned int) AT91C_PA13_PCK1 ) |
peter@521: ((unsigned int) AT91C_PA27_PCK3 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_VREG_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for VREG
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_VREG_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_RSTC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for RSTC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_RSTC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for SSC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SSC));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SSC_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive SSC signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SSC_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA25_RK ) |
peter@521: ((unsigned int) AT91C_PA22_TK ) |
peter@521: ((unsigned int) AT91C_PA21_TF ) |
peter@521: ((unsigned int) AT91C_PA24_RD ) |
peter@521: ((unsigned int) AT91C_PA26_RF ) |
peter@521: ((unsigned int) AT91C_PA23_TD ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_WDTC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for WDTC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_WDTC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US1_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for US1
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US1_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_US1));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US1_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive US1 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US1_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: 0, // Peripheral A
peter@521: ((unsigned int) AT91C_PB26_RI1 ) |
peter@521: ((unsigned int) AT91C_PB24_DSR1 ) |
peter@521: ((unsigned int) AT91C_PB23_DCD1 ) |
peter@521: ((unsigned int) AT91C_PB25_DTR1 )); // Peripheral B
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA7_SCK1 ) |
peter@521: ((unsigned int) AT91C_PA8_RTS1 ) |
peter@521: ((unsigned int) AT91C_PA6_TXD1 ) |
peter@521: ((unsigned int) AT91C_PA5_RXD1 ) |
peter@521: ((unsigned int) AT91C_PA9_CTS1 ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US0_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for US0
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US0_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_US0));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_US0_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive US0 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_US0_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA0_RXD0 ) |
peter@521: ((unsigned int) AT91C_PA4_CTS0 ) |
peter@521: ((unsigned int) AT91C_PA3_RTS0 ) |
peter@521: ((unsigned int) AT91C_PA2_SCK0 ) |
peter@521: ((unsigned int) AT91C_PA1_TXD0 ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI1_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for SPI1
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI1_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SPI1));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI1_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive SPI1 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI1_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: 0, // Peripheral A
peter@521: ((unsigned int) AT91C_PB11_SPI1_NPCS2) |
peter@521: ((unsigned int) AT91C_PB10_SPI1_NPCS1) |
peter@521: ((unsigned int) AT91C_PB16_SPI1_NPCS3)); // Peripheral B
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: 0, // Peripheral A
peter@521: ((unsigned int) AT91C_PA22_SPI1_SPCK) |
peter@521: ((unsigned int) AT91C_PA3_SPI1_NPCS2) |
peter@521: ((unsigned int) AT91C_PA26_SPI1_NPCS2) |
peter@521: ((unsigned int) AT91C_PA25_SPI1_NPCS1) |
peter@521: ((unsigned int) AT91C_PA2_SPI1_NPCS1) |
peter@521: ((unsigned int) AT91C_PA24_SPI1_MISO) |
peter@521: ((unsigned int) AT91C_PA4_SPI1_NPCS3) |
peter@521: ((unsigned int) AT91C_PA29_SPI1_NPCS3) |
peter@521: ((unsigned int) AT91C_PA21_SPI1_NPCS0) |
peter@521: ((unsigned int) AT91C_PA23_SPI1_MOSI)); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI0_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for SPI0
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI0_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SPI0));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_SPI0_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive SPI0 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_SPI0_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: 0, // Peripheral A
peter@521: ((unsigned int) AT91C_PB13_SPI0_NPCS1) |
peter@521: ((unsigned int) AT91C_PB14_SPI0_NPCS2) |
peter@521: ((unsigned int) AT91C_PB17_SPI0_NPCS3)); // Peripheral B
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA16_SPI0_MISO) |
peter@521: ((unsigned int) AT91C_PA13_SPI0_NPCS1) |
peter@521: ((unsigned int) AT91C_PA14_SPI0_NPCS2) |
peter@521: ((unsigned int) AT91C_PA12_SPI0_NPCS0) |
peter@521: ((unsigned int) AT91C_PA17_SPI0_MOSI) |
peter@521: ((unsigned int) AT91C_PA15_SPI0_NPCS3) |
peter@521: ((unsigned int) AT91C_PA18_SPI0_SPCK), // Peripheral A
peter@521: ((unsigned int) AT91C_PA7_SPI0_NPCS1) |
peter@521: ((unsigned int) AT91C_PA8_SPI0_NPCS2) |
peter@521: ((unsigned int) AT91C_PA9_SPI0_NPCS3)); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PITC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for PITC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PITC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for AIC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_FIQ) |
peter@521: ((unsigned int) 1 << AT91C_ID_IRQ0) |
peter@521: ((unsigned int) 1 << AT91C_ID_IRQ1));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_AIC_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive AIC signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_AIC_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA30_IRQ0 ) |
peter@521: ((unsigned int) AT91C_PA29_FIQ ), // Peripheral A
peter@521: ((unsigned int) AT91C_PA14_IRQ1 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TWI_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for TWI
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TWI_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_TWI));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TWI_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive TWI signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TWI_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA11_TWCK ) |
peter@521: ((unsigned int) AT91C_PA10_TWD ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for ADC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_ADC));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_ADC_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive ADC signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_ADC_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: 0, // Peripheral A
peter@521: ((unsigned int) AT91C_PB18_ADTRG )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWMC_CH3_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive PWMC_CH3 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_CH3_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB22_PWM3 ), // Peripheral A
peter@521: ((unsigned int) AT91C_PB30_PWM3 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWMC_CH2_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive PWMC_CH2 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_CH2_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB21_PWM2 ), // Peripheral A
peter@521: ((unsigned int) AT91C_PB29_PWM2 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWMC_CH1_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive PWMC_CH1 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_CH1_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB20_PWM1 ), // Peripheral A
peter@521: ((unsigned int) AT91C_PB28_PWM1 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWMC_CH0_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive PWMC_CH0 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_CH0_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB19_PWM0 ), // Peripheral A
peter@521: ((unsigned int) AT91C_PB27_PWM0 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_RTTC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for RTTC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_RTTC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_UDP_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for UDP
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_UDP_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_UDP));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_EMAC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for EMAC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_EMAC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_EMAC));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_EMAC_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive EMAC signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_EMAC_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB2_ETX0 ) |
peter@521: ((unsigned int) AT91C_PB12_ETXER ) |
peter@521: ((unsigned int) AT91C_PB16_ECOL ) |
peter@521: ((unsigned int) AT91C_PB15_ERXDV_ECRSDV) |
peter@521: ((unsigned int) AT91C_PB11_ETX3 ) |
peter@521: ((unsigned int) AT91C_PB6_ERX1 ) |
peter@521: ((unsigned int) AT91C_PB13_ERX2 ) |
peter@521: ((unsigned int) AT91C_PB3_ETX1 ) |
peter@521: ((unsigned int) AT91C_PB4_ECRS ) |
peter@521: ((unsigned int) AT91C_PB8_EMDC ) |
peter@521: ((unsigned int) AT91C_PB5_ERX0 ) |
peter@521: ((unsigned int) AT91C_PB18_EF100 ) |
peter@521: ((unsigned int) AT91C_PB14_ERX3 ) |
peter@521: ((unsigned int) AT91C_PB1_ETXEN ) |
peter@521: ((unsigned int) AT91C_PB10_ETX2 ) |
peter@521: ((unsigned int) AT91C_PB0_ETXCK_EREFCK) |
peter@521: ((unsigned int) AT91C_PB9_EMDIO ) |
peter@521: ((unsigned int) AT91C_PB7_ERXER ) |
peter@521: ((unsigned int) AT91C_PB17_ERXCK ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC0_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for TC0
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC0_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_TC0));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC0_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive TC0 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC0_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB23_TIOA0 ) |
peter@521: ((unsigned int) AT91C_PB24_TIOB0 ), // Peripheral A
peter@521: ((unsigned int) AT91C_PB12_TCLK0 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC1_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for TC1
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC1_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_TC1));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC1_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive TC1 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC1_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB25_TIOA1 ) |
peter@521: ((unsigned int) AT91C_PB26_TIOB1 ), // Peripheral A
peter@521: ((unsigned int) AT91C_PB19_TCLK1 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC2_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for TC2
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC2_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_TC2));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_TC2_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive TC2 signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_TC2_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOB, // PIO controller base address
peter@521: ((unsigned int) AT91C_PB28_TIOB2 ) |
peter@521: ((unsigned int) AT91C_PB27_TIOA2 ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: 0, // Peripheral A
peter@521: ((unsigned int) AT91C_PA15_TCLK2 )); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_MC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for MC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_MC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_SYS));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIOA_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for PIOA
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIOA_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_PIOA));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PIOB_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for PIOB
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PIOB_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_PIOB));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for CAN
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_CAN));
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_CAN_CfgPIO
peter@521: //* \brief Configure PIO controllers to drive CAN signals
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_CAN_CfgPIO (void)
peter@521: {
peter@521: // Configure PIO controllers to periph mode
peter@521: AT91F_PIO_CfgPeriph(
peter@521: AT91C_BASE_PIOA, // PIO controller base address
peter@521: ((unsigned int) AT91C_PA20_CANTX ) |
peter@521: ((unsigned int) AT91C_PA19_CANRX ), // Peripheral A
peter@521: 0); // Peripheral B
peter@521: }
peter@521:
peter@521: //*----------------------------------------------------------------------------
peter@521: //* \fn AT91F_PWMC_CfgPMC
peter@521: //* \brief Enable Peripheral clock in PMC for PWMC
peter@521: //*----------------------------------------------------------------------------
peter@521: __inline void AT91F_PWMC_CfgPMC (void)
peter@521: {
peter@521: AT91F_PMC_EnablePeriphClock(
peter@521: AT91C_BASE_PMC, // PIO controller base address
peter@521: ((unsigned int) 1 << AT91C_ID_PWMC));
peter@521: }
peter@521:
peter@521: #endif // lib_AT91SAM7X256_H