author | frdupin |
Wed, 13 Dec 2006 14:14:18 +0100 | |
changeset 53 | 73bc47a0db55 |
parent 18 | 2fc8aa46980b |
permissions | -rw-r--r-- |
0 | 1 |
/* |
2 |
This file is part of CanFestival, a library implementing CanOpen Stack. |
|
3 |
||
18
2fc8aa46980b
First version of NVRAM implemented on the file system for can_virtual
oremeq
parents:
3
diff
changeset
|
4 |
Author: Christian Fortin (canfestival@canopencanada.ca) |
0 | 5 |
|
6 |
See COPYING file for copyrights details. |
|
7 |
||
8 |
This library is free software; you can redistribute it and/or |
|
9 |
modify it under the terms of the GNU Lesser General Public |
|
10 |
License as published by the Free Software Foundation; either |
|
11 |
version 2.1 of the License, or (at your option) any later version. |
|
12 |
||
13 |
This library is distributed in the hope that it will be useful, |
|
14 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
15 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
|
16 |
Lesser General Public License for more details. |
|
17 |
||
18 |
You should have received a copy of the GNU Lesser General Public |
|
19 |
License along with this library; if not, write to the Free Software |
|
20 |
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
21 |
*/ |
|
22 |
||
23 |
/** |
|
24 |
* Définitions du brochage LPC2138 par défaut. |
|
25 |
*/ |
|
26 |
#if !defined(_LPC2138_PINOUT_H_) |
|
27 |
#define _LPC2138_PINOUT_H_ |
|
28 |
||
29 |
#define LPC2138_uart0_tx 0 /* Pin 0 */ |
|
30 |
#define LPC2138_uart0_tx_PORT P0 |
|
31 |
#define LPC2138_uart0_tx_SIZE 1 |
|
32 |
||
33 |
#define LPC2138_uart0_rx 1 /* Pin 1 */ |
|
34 |
#define LPC2138_uart0_rx_PORT P0 |
|
35 |
#define LPC2138_uart0_rx_SIZE 1 |
|
36 |
||
37 |
#define LPC2138_cs_sja1000 4 /* Pin 4 */ |
|
38 |
#define LPC2138_cs_sja1000_PORT P0 |
|
39 |
#define LPC2138_cs_sja1000_SIZE 1 |
|
40 |
||
41 |
#define LPC2138_cs_s1d13706 5 /* Pin 5 */ |
|
42 |
#define LPC2138_cs_s1d13706_PORT P0 |
|
43 |
#define LPC2138_cs_s1d13706_SIZE 1 |
|
44 |
||
45 |
#define LPC2138_wait 7 /* Pin 7 */ |
|
46 |
#define LPC2138_wait_PORT P0 |
|
47 |
#define LPC2138_wait_SIZE 1 |
|
48 |
||
49 |
#define LPC2138_uart1_tx 8 /* Pin 8 */ |
|
50 |
#define LPC2138_uart1_tx_PORT P0 |
|
51 |
#define LPC2138_uart1_tx_SIZE 1 |
|
52 |
||
53 |
#define LPC2138_uart1_rx 9 /* Pin 9 */ |
|
54 |
#define LPC2138_uart1_rx_PORT P0 |
|
55 |
#define LPC2138_uart1_rx_SIZE 1 |
|
56 |
||
57 |
#define LPC2138_bhe 10 /* Pin 10 */ |
|
58 |
#define LPC2138_bhe_PORT P0 |
|
59 |
#define LPC2138_bhe_SIZE 1 |
|
60 |
||
61 |
#define LPC2138_a17_mr 12 /* Pin 12 */ |
|
62 |
#define LPC2138_a17_mr_PORT P0 |
|
63 |
#define LPC2138_a17_mr_SIZE 1 |
|
64 |
||
65 |
#define LPC2138_a16 13 /* Pin 13 */ |
|
66 |
#define LPC2138_a16_PORT P0 |
|
67 |
#define LPC2138_a16_SIZE 1 |
|
68 |
||
69 |
#define LPC2138_interrupt_sja1000 14 /* Pin 14 */ |
|
70 |
#define LPC2138_interrupt_sja1000_PORT P0 |
|
71 |
#define LPC2138_interrupt_sja1000_SIZE 1 |
|
72 |
||
73 |
#define LPC2138_data 16 /* Pins 16-23 */ |
|
74 |
#define LPC2138_data_PORT P0 |
|
75 |
#define LPC2138_data_SIZE 8 |
|
76 |
||
77 |
#define LPC2138_dac0 25 /* Pin 25 */ |
|
78 |
#define LPC2138_dac0_PORT P0 |
|
79 |
#define LPC2138_dac0_SIZE 1 |
|
80 |
||
81 |
#define LPC2138_ale 26 /* Pin 26 */ |
|
82 |
#define LPC2138_ale_PORT P0 |
|
83 |
#define LPC2138_ale_SIZE 1 |
|
84 |
||
18
2fc8aa46980b
First version of NVRAM implemented on the file system for can_virtual
oremeq
parents:
3
diff
changeset
|
85 |
#define LPC2138_redgreenled 27 /* Pin 27 */ |
2fc8aa46980b
First version of NVRAM implemented on the file system for can_virtual
oremeq
parents:
3
diff
changeset
|
86 |
#define LPC2138_redgreenled_PORT P0 |
2fc8aa46980b
First version of NVRAM implemented on the file system for can_virtual
oremeq
parents:
3
diff
changeset
|
87 |
#define LPC2138_redgreenled_SIZE 2 |
0 | 88 |
|
89 |
#define LPC2138_rd 29 /* Pin 29 */ |
|
90 |
#define LPC2138_rd_PORT P0 |
|
91 |
#define LPC2138_rd_SIZE 1 |
|
92 |
||
93 |
#define LPC2138_wr 30 /* Pin 30 */ |
|
94 |
#define LPC2138_wr_PORT P0 |
|
95 |
#define LPC2138_wr_SIZE 1 |
|
96 |
||
97 |
#define LPC2138_a0_a15 16 /* Pins 16-31 */ |
|
98 |
#define LPC2138_a0_a15_PORT P1 |
|
99 |
#define LPC2138_a0_a15_SIZE 16 |
|
100 |
||
101 |
#define LPC2138_addresses_SIZE 18 |
|
102 |
||
103 |
#endif |