canfestival: examples/gene_SYNC_HCS12/trace32_flash_debug.cmm@72e9e1064432 (annotated)

0 4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	1	; Réinitialisation
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	2	SYS.d
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	3
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	4	; Effacer l'écran
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	5	WinCLEAR
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	6
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	7	;Raffraichissement de trace32 toutes les 1 secondes
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	8	setup.urate 1
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	9
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	10	; Choix du microcontrôleur cible
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	11	SYStem.CPU MCS12DP256
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	12
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	13	; Vitesse de commuication debugger / carte HCS12
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	14	SYStem.BdmClock 8.0MHZ
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	15
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	16	; initialiser le uc en mode debug
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	17	SYStem.UP
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	18
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	19	; Reset des registres
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	20	r.reset
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	21
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	22	; Charger le programme
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	23	DATA.LOAD.ELF geneSYNC.elf /gnu /nocode /GHILLS
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	24
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	25	; Positionner le compteur de programme
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	26	r.set PC _start
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	27
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	28	; Positionner le pointeur de pile
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	29	r.set SP _stack
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	30
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	31	; Afficher le code source
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	32	data.list
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	33
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	34	; Afficher les registres
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	35	r
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	36
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	37	; Afficher le contenu de la mémoire
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	38	DATA.dump 140
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	39
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	40
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	41	; Fin du programme de script
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	42	ENDDO
4472ee7c6c3e Commit a new cvs repo. etisserant parents: diff changeset	43

author	Robert Lehmann <robert.lehmann@sitec-systems.de>
	Tue, 28 Jul 2015 16:36:55 +0200
changeset 793	72e9e1064432
parent 0	4472ee7c6c3e
permissions	-rw-r--r--